A processor, data processing method and electronic device

Abstract

The application discloses a processor, a data processing method and an electronic device, and the application achieves the purpose of processing data by a processor other than a CPU by acquiring data and processing the acquired data by a first processing unit, a second processing unit or a third processing unit; and the first processing unit, the second processing unit and the third processing unit are respectively used for processing different data, so that different types of data can be processed simultaneously in the processor, the data processing speed of the processor is improved, the problems of large load and high power consumption caused by processing all data in the same processor or processing unit are further avoided, the power consumption demand of the CPU is relieved, and the operation efficiency of the system is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the control field, and particularly relates to a processor, a data processing method and an electronic device. BACKGROUND

[0002] In the electronic device, the CPU and the GPU are comprehensive operation units, and need to process many processes or events at the same time, which will cause the load of the CPU or the GPU to be too large, cause the system power consumption to be high, and is not conducive to the efficient operation of the system. SUMMARY

[0003] Therefore, the present application provides a processor, a data processing method and an electronic device, and the specific scheme is as follows:

[0004] A processor comprises:

[0005] At least three processing units, the at least three processing units comprise a first processing unit, a second processing unit and a third processing unit, and wherein:

[0006] The first processing unit can acquire data transmitted to the processor, and determine that the data is processed by the first processing unit, the second processing unit or the third processing unit;

[0007] The second processing unit is used for executing a neural network algorithm;

[0008] The third processing unit is used for executing an algorithm for feature extraction of data;

[0009] A system control unit can control the power supply state information of each processing unit in the at least three processing units;

[0010] A storage unit is used for storing at least a processing algorithm for data processing of the first processing unit, the second processing unit and the third processing unit.

[0011] Further, the storage unit can also be used for storing data detected by not less than one sensor;

[0012] The first processing unit can acquire data transmitted to the processor, and comprises:

[0013] The first processing unit can acquire data detected by not less than one sensor stored in the storage unit.

[0014] Further,

[0015] The storage unit can also be used for storing a processing result obtained after the first processing unit, the second processing unit and the third processing unit process the data.

[0016] Further,

[0017] The first processing unit stores the processing result obtained by the first processing unit, the second processing unit or the third processing unit to the storage unit, and sends the notification information of the processing result stored to the storage unit to the central processing unit;

[0018] The storage unit is further used for sending the stored processing result to the central processing unit based on the calling instruction of the central processing unit.

[0019] Further, it further comprises:

[0020] The switch module comprises at least two states,

[0021] When the switch module is in the first state, the first processing unit can obtain audio data, so that the processor can perform ultrasonic detection on part of the audio data;

[0022] When the switch module is in the second state, the first processing unit does not obtain the audio data.

[0023] Further,

[0024] The first processing unit can also obtain the data of the external device through the positive and negative plug-in interface, so that the processor can process the data of the external device.

[0025] Further, the first processing unit can also obtain the data of the external device through the positive and negative plug-in interface, comprising:

[0026] The first processing unit communicates with the positive and negative plug-in interface, so that the positive and negative plug-in interface has two transmission lines;

[0027] The first transmission line of the positive and negative plug-in interface is that the first processing unit obtains the first data of the external device through the positive and negative plug-in interface;

[0028] The second transmission line of the positive and negative plug-in interface is that the central processing unit obtains the second data of the external device through the positive and negative plug-in interface.

[0029] Further,

[0030] The first processing unit can also output control instructions based on the first data of the external device, and the control instructions are transmitted to the external device through the first transmission line of the positive and negative plug-in interface, so that the external device adjusts based on the control instructions.

[0031] A data processing method, comprising:

[0032] Obtaining data transmitted to the first processing unit;

[0033] analyzing the data to determine that the data is to be processed by the first processing unit, the second processing unit, or the third processing unit;

[0034] The second processing unit is configured to execute a neural network algorithm, and the third processing unit is configured to execute an algorithm for feature extraction of data.

[0035] An electronic device, comprising:

[0036] At least one sensor configured to detect data and send the data to the processor;

[0037] A central processor configured to obtain a processing result output by the processor;

[0038] The processor comprises a system control unit, a storage unit, and at least three processing units, wherein the at least three processing units comprise a first processing unit, a second processing unit, and a third processing unit, and wherein:

[0039] The first processing unit is configured to obtain data transmitted to the processor and determine that the data is to be processed by the first processing unit, the second processing unit, or the third processing unit;

[0040] The second processing unit is configured to execute a neural network algorithm;

[0041] The third processing unit is configured to execute an algorithm for feature extraction of data.

[0042] The system control unit is configured to control power supply state information of each of the at least three processing units.

[0043] The storage unit is configured to store at least processing algorithms for data processing by the first processing unit, the second processing unit, and the third processing unit, and output processing results obtained by the at least three processing units.

[0044] From the above technical solution can be seen, the processor, data processing method and electronic equipment disclosed by the application, comprising: at least three processing units, respectively first processing unit, second processing unit and third processing unit, the first processing unit can obtain the data transmitted to the processor, determine the data is processed by the first processing unit, the second processing unit or the third processing unit, the second processing unit is used for processing neural network data, the third processing unit is used for feature extraction of data, further comprising system control unit, which can control the power supply state information of each processing unit in the at least three processing units, storage unit, at least for storing the processing algorithm of the first processing unit, the second processing unit and the third processing unit for data processing. In the scheme, the data is obtained, and the obtained data is processed by the first processing unit, the second processing unit or the third processing unit, which realizes the purpose of processing data by the processor other than CPU; and the first processing unit, the second processing unit and the third processing unit are respectively used for processing different data, which can realize that different kinds of data can be processed simultaneously in the processor, improve the data processing speed of the processor, further avoid the problem of large load and high power consumption caused by processing all data in the same processor or processing unit, reduce the power consumption demand of CPU, and improve the running efficiency of the system. BRIEF DESCRIPTION OF DRAWINGS

[0045] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and those skilled in the art can obtain other drawings according to these drawings without creating any creative labor.

[0046] Figure 1 The structural diagram of a processor disclosed by the embodiment of the present application;

[0047] Figure 2 The schematic diagram of data processing by the processor disclosed by the embodiment of the present application;

[0048] Figure 3 The structural diagram of a processor disclosed by the embodiment of the present application;

[0049] Figure 4 The schematic diagram of processing sound disclosed by the embodiment of the present application;

[0050] Figure 5 The implementation mode schematic diagram of the connection channel in the multiplexing positive and negative plug-in interface disclosed by the embodiment of the present application;

[0051] Figure 6A schematic diagram of a display device according to an embodiment of the present application is shown in FIG. 1. The display device includes a processor 10, a display 20, and a system control unit 30. The display device also includes a storage unit 40 and a communication unit 50.

[0052] Figure 7 A flowchart of a data processing method according to an embodiment of the present application is shown in FIG. 2. The data processing method includes the following steps.

[0053] Figure 8 A schematic diagram of an electronic device according to an embodiment of the present application is shown in FIG. 3. The electronic device includes a processor 10, a display 20, and a system control unit 30. The electronic device also includes a storage unit 40 and a communication unit 50. DETAILED DESCRIPTION

[0054] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of the present application.

[0055] A processor according to an embodiment of the present application is shown in FIG. 4. The processor includes the following components. Figure 1

[0056] The processor includes at least three processing units, which are a first processing unit 11, a second processing unit 12, and a third processing unit 13. The processor also includes a system control unit 14 and a storage unit 15.

[0057] The first processing unit is capable of obtaining data transmitted to the processor and determining whether the data is processed by the first processing unit, the second processing unit, or the third processing unit.

[0058] The second processing unit is used to execute a neural network algorithm.

[0059] The third processing unit is used to execute an algorithm for feature extraction of data.

[0060] The system control unit is capable of controlling power supply information of each processing unit in the at least three processing units.

[0061] The storage unit is used to store at least processing algorithms for data processing of the first processing unit, the second processing unit, and the third processing unit.

[0062] ​The processor disclosed in the embodiment comprises at least three processing units, each processing unit can process different data, so that the plurality of processing units can process the plurality of data at the same time, and the processing efficiency of the data is improved; and the processor disclosed in the embodiment comprises at least three processing units, a system control unit and a storage unit, which is different from the central processing unit CPU and the graphic processing unit GPU, and can process the obtained data, thereby sharing the operation amount of the CPU or the GPU processing data, reducing the power consumption of the CPU or the GPU, and improving the efficient operation of the system comprising the processor and the CPU.

[0063] The algorithms required by the first processing unit, the second processing unit and the third processing unit for data processing are stored in the same storage unit, when the first processing unit, the second processing unit or the third processing unit needs to process data, the corresponding processing algorithm is directly called from the storage unit, so that the corresponding processing unit can execute the called algorithm to process the data.

[0064] For example, when the processor obtains first data, it is determined that the first data is processed by the second processing unit, the second processing unit obtains the first data, and at the same time, the algorithm required for executing the processing neural network is called from the storage unit, after the second processing unit calls the above algorithm, the algorithm is executed, and the processing of the first data by the second processing unit is realized.

[0065] The storage unit can be a DRAM (Dynamic Random Memory, dynamic random access memory).

[0066] The system control unit can control the power supply information of each processing unit in the at least three processing units, specifically, it can control whether to supply power to one or several processing units, or whether to power off one or several processing units; or whether to supply power or power off one or several devices in the entire processor.

[0067] That is, the system control unit can not only control the power supply information of the at least three processing units, but also control the power supply information of each device in the processor; in addition, the system control unit can also control the system timing to ensure the normal operation of the processor.

[0068] The system control unit can be a micro control unit MCU, or it can also be a system controller EC.

[0069] The second processing unit can execute the algorithm of the processing neural network to process the neural network data, and the second processing unit can be an NN Engine; the third processing unit can execute the algorithm of extracting the features of the data, such as extracting the audio features, and the third processing unit can be a DSP Engine.

[0070] The first processing unit can acquire the data transmitted to the processor and analyze the data to determine the data type, thereby determining which processing unit processes the data.

[0071] Specifically, the data transmitted to the processor can be stored in the storage unit first, and then acquired by the first processing unit from the storage unit; or, the data transmitted to the processor can be directly transmitted to the first processing unit in the processor, so that the first processing unit directly analyzes and processes the data.

[0072] The first processing unit analyzes the data type and allocates a corresponding processing unit for data processing according to the data type. For example, if the obtained data is audio data, the first processing unit sends the audio data to the third processing unit for data processing; if the obtained data is related to TDF distance, the first processing unit sends the data to the second processing unit for data processing.

[0073] The data processed by the first processing unit includes data that can be processed by the second processing unit and the third processing unit, that is, data that cannot be processed by the second processing unit and the third processing unit is processed by the first processing unit.

[0074] The first processing unit first determines the data type that each processing unit can process, and then allocates a corresponding processor to the obtained data based on the type of the obtained data after obtaining the data transmitted to the processor.

[0075] When the first processing unit determines that the obtained data is processed by the second processing unit or the third processing unit, the first processing unit sends the obtained data to the second processing unit or the third processing unit, and the second processing unit or the third processing unit retrieves the algorithm required for processing data from the storage unit. The second processing unit or the third processing unit executes the retrieved algorithm, thereby realizing the processing of the obtained data.

[0076] After the second processing unit or the third processing unit processes the obtained data, a processing result is obtained, which is fed back to the first processing unit, and the first processing unit stores the processing result in the storage unit, so that when the processing result needs to be called, it can be directly retrieved from the storage unit.

[0077] Alternatively, after the second processing unit or the third processing unit processes the obtained data, a processing result is obtained, which is directly sent to the storage unit for storage, and the processing result is also sent to the first processing unit, so that the first processing unit determines whether the processing result needs to be further processed.

[0078] For example, the data transmitted to the processor is audio data, the first processing unit analyzes the audio data and determines that the data needs to be processed by the third processing unit, and then sends the audio data to the third processing unit. After obtaining the audio data, the third processing unit retrieves the algorithm required for data feature extraction from the storage unit, executes the algorithm, obtains the processing result of the feature extraction of the audio data, and sends the processing result to the first processing unit. After obtaining the processing result of the feature extraction of the audio data, the first processing unit sends the processing result to the second processing unit, retrieves the corresponding algorithm and executes it, thereby realizing feature authentication of the audio feature, so that the second processing unit obtains the authentication result and sends it to the first processing unit.

[0079] If the first processing unit determines that the obtained data needs to be processed by the first processing unit, the first processing unit directly retrieves the corresponding algorithm from the storage unit and executes it, thereby realizing the processing of the data and obtaining the processing result.

[0080] If the data is processed by the first processing unit to obtain the processing result, the first processing unit will send the processing result to the storage unit for storage. At the same time, the first processing unit continues to judge the processing result and determines whether further processing is needed. If so, it determines whether the further processing is performed by the first processing unit, the second processing unit or the third processing unit.

[0081] The first processing unit can be RISC-V.

[0082] Further, the processor disclosed in the embodiment can further include other processing units, such as an independent security encryption processing unit Crypto Engine, which is used for data encryption and decryption protection work and can be used to store passwords and other related data and can also perform encryption and decryption processing.

[0083] The processor disclosed in the application comprises: at least three processing units, namely a first processing unit, a second processing unit and a third processing unit, the first processing unit is capable of acquiring data transmitted to the processor, determining that the data is processed by the first processing unit, the second processing unit or the third processing unit, the second processing unit is used for processing neural network data, and the third processing unit is used for feature extraction of the data, further comprising a system control unit capable of controlling power supply state information of each processing unit in the at least three processing units, and a storage unit used for storing at least processing algorithms of the first processing unit, the second processing unit and the third processing unit for data processing. In the scheme, the data is acquired and processed by the first processing unit, the second processing unit or the third processing unit, so as to realize the purpose of processing the data by the processor other than the CPU. In addition, the first processing unit, the second processing unit and the third processing unit are respectively used for processing different data, so that different types of data can be processed simultaneously in the processor, the data processing speed of the processor is improved, the problems of large load and high power consumption caused by processing all data in the same processor or processing unit are further avoided, the power consumption demand of the CPU is relieved, and the operation efficiency of the system is improved.

[0084] The processor disclosed in the embodiment comprises: Figure 1

[0085] at least three processing units, namely a first processing unit 11, a second processing unit 12 and a third processing unit 13, and the processor further comprises a system control unit 14 and a storage unit 15.

[0086] In addition to the same structure as the previous embodiment, the storage unit in the embodiment is further used for storing data detected by not less than one sensor.

[0087] The first processing unit acquires data transmitted to the processor, comprising: the first processing unit acquires data detected by not less than one sensor stored in the storage unit.

[0088] When the data detected by the not less than one sensor is transmitted to the storage unit of the processor for storage, each sensor in the not less than one sensor first transmits the detected data to a control unit corresponding to each sensor in the processor, each sensor corresponds to one control unit, and the control units are used for acquiring data of the corresponding sensor and performing preliminary processing on the data detected by the corresponding sensor, wherein the preliminary processing can be processing the data detected by the sensor into data capable of being recognized by the processing unit in the processor, and then storing the recognizable data into the storage unit.

[0089] ​If the storage unit stores data detected by no less than one sensor, at least three processing units process the data detected by the sensor, that is, the processor disclosed in the embodiment processes the data detected by the sensor, so that the CPU or GPU in the system including the storage unit does not need to process the data detected by the sensor, thereby reducing the operation amount of the CPU or GPU, improving the data processing efficiency by processing the data detected by the sensor by using an independent processor, and ensuring the high efficiency of data processing by including at least three processing units in the independent processor and processing different types of data detected by the sensor.

[0090] In addition, the first processing unit stores the processing result obtained by the first processing unit, the second processing unit or the third processing unit to the storage unit, and sends the notification information of the processing result stored to the storage unit to the central processor; the storage unit is also used for sending the stored processing result to the central processor based on the calling instruction of the central processor.

[0091] When the first processing unit, the second processing unit or the third processing unit processes the obtained data to obtain a processing result, the processing result can be directly stored from the first processing unit to the storage unit, or the second processing unit or the third processing unit sends the obtained processing result to the first processing unit and stores it to the storage unit at the same time; in addition, the first processing unit can first determine whether the processing result needs to be further processed after obtaining the processing result, if not, the processing result is directly sent to the storage unit for storage, if yes, the first processing unit continues to analyze the processing result to determine which processing unit performs further processing on the processing result, until the first processing unit determines that the final obtained processing result cannot be processed, and then stores the final obtained processing result to the storage unit.

[0092] After the first processing unit sends the processing result obtained by processing the data by the first processing unit, the second processing unit or the third processing unit to the storage unit for storage, the first processing unit also sends a notification information to the central processor CPU to inform that the data sent to the processor has been processed and the processing result is obtained and stored in the storage unit, so that when the CPU needs to obtain the processing result of the data sent to the processor, the processing result can be directly called from the storage unit.

[0093] As Figure 2As shown, a flowchart of a process in which an external sensor transmits data to a processor, and the processor processes the data and outputs the processing result to a PCH in a CPU, including: a first processing unit RISC-V, a second processing unit NN Engine, a third processing unit DSP Engine, a storage unit DRAM, at least one sensor sensor, a control unit Interface controller corresponding to the sensor, an audio receiving unit MIC, an audio control unit Audio controller, and a south bridge PCH in the CPU. The processor includes: the first processing unit RISC-V, the second processing unit NN Engine, the third processing unit DSP Engine, the storage unit DRAM, and the control unit Interface controller corresponding to the sensor and the audio control unit Audio controller.

[0094] The audio receiving unit MIC or the sensor sensor detects data and directly sends the data to the control unit corresponding to the sensor in the processor. The control unit identifies the data collected by the sensor, and then writes the data into the storage unit DRAM for storage. At the same time, the control unit also notifies the first processing unit RISC-V that data has been stored in the storage unit.

[0095] After the first processing unit RISC-V obtains the notification information of the control unit, the first processing unit RISC-V retrieves the data stored in the storage unit DRAM, and then analyzes the data by the first processing unit RISC-V to determine whether to process by the first processing unit, the second processing unit, or the third processing unit.

[0096] If the data is the data stored in the storage unit DRAM through the MIC, the first processing unit RISC-V sends the data to the third processing unit DSP Engine, the third processing unit DSP Engine performs feature extraction on the audio data, and then sends the extracted features to the storage unit DRAM, and sends the extracted features to the first processing unit RISC-V, and the first processing unit RISC-V determines whether to continue processing, if not, the first processing unit RISC-V sends a notification to the south bridge PCH in the CPU that the current data has been processed and the processing result is obtained and stored in the storage unit DRAM, and the PCH obtains the notification information, if the processing result of the audio data is needed, the PCH sends a call instruction to the storage unit DRAM through the USB interface, and the storage unit DRAM sends the processing result to the central processing unit based on the call instruction of the PCH, so as to complete the processing result of the processor to the audio data, and feed back the processing result to the central processing unit CPU.

[0097] Wherein, the first processing unit RISC-V sends a notification to the south bridge PCH in the CPU that the processing result of the data is stored in the storage unit, and the notification information will have the storage address of the processing result in the storage unit, which is the same as the address when the control unit writes the data detected by the sensor into the storage unit DRAM, that is, the storage of the data detected by the sensor and the processing result of the data in the storage unit is stored in the same address of the storage unit DRAM.

[0098] Similarly, if the first processing unit RISC-V determines that the data needs to be processed by the second processing unit NN Engine, or the first processing unit RISC-V, the same data processing process is adopted, except that the processing unit and algorithm of data processing are different, which will not be repeated here.

[0099] The processor disclosed in the application comprises: at least three processing units, respectively a first processing unit, a second processing unit and a third processing unit, the first processing unit is capable of acquiring data transmitted to the processor, determining that the data is processed by the first processing unit, the second processing unit or the third processing unit, the second processing unit is used for processing neural network data, and the third processing unit is used for feature extraction of the data, further comprising a system control unit capable of controlling power supply state information of each processing unit in the at least three processing units, a storage unit used for at least storing processing algorithms of the first processing unit, the second processing unit and the third processing unit for data processing. In the scheme, the data is acquired, and the acquired data is processed by the first processing unit, the second processing unit or the third processing unit, so as to realize the purpose of processing the data by the processor other than the CPU; and the first processing unit, the second processing unit and the third processing unit are respectively used for processing different data, so as to realize that different types of data can be processed simultaneously in the processor, improve the data processing speed of the processor, further avoid the problems of large load and high power consumption caused by processing all data in the same processor or processing unit, reduce the power consumption demand of the CPU, and improve the operation efficiency of the system.

[0100] The embodiment discloses an electronic device, a structural schematic diagram of which is shown in Figure 3 The electronic device comprises:

[0101] The at least three processing units are respectively a first processing unit 31, a second processing unit 32 and a third processing unit 33, and the processor further comprises a system control unit 34, a storage unit 35 and a switch module 36.

[0102] In addition to the same structure as the previous embodiment, the embodiment further comprises a switch module 36.

[0103] The switch module comprises at least two states.

[0104] When the switch module is in the first state, the first processing unit can acquire audio data, so that the processor can perform ultrasonic detection on part of the audio data, and the ultrasonic detection can specifically include human body detection or motion trajectory detection; when the switch module is in the second state, the first processing unit does not acquire audio data.

[0105] The user determines which state the switch module is in based on the use demand, when the switch module is in the first state, the processor can perform ultrasonic detection on the audio data, when the switch module is in the second state, the processor does not perform ultrasonic detection on the audio data, at this time, the processor does not perform any processing on the audio data, but directly performs normal sound input processing by the audio controller in the system.

[0106] In addition, the switch module can further include a third state, in which the audio data can be obtained by the first processing unit so that the processor performs ultrasonic detection on part of the audio data, and normal sound input processing can be performed by the audio controller in the system, that is, when the switch module is in the third state, normal sound input processing can be performed by the audio controller in the system, and ultrasonic detection can also be performed by the first processing unit or the third processing unit after the data is analyzed by the audio control unit in the processor.

[0107] Specifically, as shown in FIG. 1, it is a schematic diagram for processing sound, which includes a PCH in the system, a DSP Engine in the system, an audio controller Audio controller in the system, an audio receiving unit MIC in the system, a switch module in the processor, an audio control unit Audio controller in the processor, a first processing unit RISC-V in the system, a third processing unit DSP Engine in the system, and a storage unit DRAM in the system. Figure 4 If the switch module needs to be controlled in the second state according to user demand, when the audio receiving unit MIC detects audio data, it is transmitted to the switch module, at this time the switch module is in the second state, then the switch module directly sends the audio data to the audio controller Audio controller in the system, and the normal sound input processing is performed by the DSP Engine in the system, and the processing result is transmitted to the PCH.

[0108] If the switch module needs to be controlled in the first state according to user demand, the instruction that the switch module is in the first state is sent to the switch module through the PCH, and the switch module controls the audio controller Audio controller in the system to open the ultrasonic playing mode at the same time or after adjusting to the first state, that is, at this time the audio output unit speaker in the system can output ultrasonic audio, so that the MIC can receive the ultrasonic audio.

[0109]

[0110] ​When the audio receiving unit MIC detects audio data, it is transmitted to the switch module, at this time the switch module is in the first state, then the switch module does not send the audio data to the audio controller in the system, but directly sends the audio data to the audio control unit Audio controller in the processor, and the audio control unit Audio controller in the processor identifies the data and transmits it to the first processing unit RISC-V, which determines whether to process it by the first processing unit or the third processing unit DSP Engine. Whether it is processed by the first processing unit RISC-V or the third processing unit DSP Engine, it needs to read the ultrasonic algorithm from the storage unit DRAM to perform ultrasonic operation, so as to determine the motion trajectory or human body orientation, etc., and then transmit the ultrasonic detection result, such as gesture motion trajectory or human body orientation, to the south bridge PCH when the south bridge PCH sends the call instruction.

[0111] If the switch module is controlled to be in the third state according to the user's demand, the PCH sends an instruction to the switch module that the switch module is in the third state, and the switch module controls the audio controller Audio controller in the system to open the ultrasonic playback mode at the same time or after adjusting to the third state, that is, the audio output unit speaker in the system can output ultrasonic audio at this time, and the audio output unit speaker can still output ordinary audio data, that is, non-ultrasonic audio, so that the MIC can receive ultrasonic audio and ordinary audio.

[0112] When the audio receiving unit MIC detects audio data, it is transmitted to the switch module, at this time the switch module is in the third state, then the switch module sends the part of the audio data less than or equal to 20kHz to the audio controller Audio controller in the system, which is processed by the DSP Engine in the system; at the same time, the switch module sends the part of the audio data greater than 20kHz to the audio control unit Audio controller in the processor, so as to detect the part greater than 20kHz by the processor, so as to determine the motion trajectory or human body orientation, etc., and then transmit the ultrasonic detection result, such as gesture motion trajectory or human body orientation, to the south bridge PCH when the south bridge PCH sends the call instruction.

[0113] It should be noted that the system described in the embodiment is an electronic device that includes both a CPU and the processor described in the embodiment, or a system based on the electronic device.

[0114] The processor disclosed by the application comprises: at least three processing units, which are respectively a first processing unit, a second processing unit and a third processing unit; the first processing unit is capable of acquiring data transmitted to the processor, determining that the data is processed by the first processing unit, the second processing unit or the third processing unit; the second processing unit is used for processing neural network data; the third processing unit is used for feature extraction of the data; the processor further comprises a system control unit capable of controlling power supply state information of each processing unit in the at least three processing units, and a storage unit used for storing at least processing algorithms of the first processing unit, the second processing unit and the third processing unit for data processing. In the scheme, the data is acquired and processed by the first processing unit, the second processing unit or the third processing unit, so that the data is processed by the processor other than the CPU; and the first processing unit, the second processing unit and the third processing unit are respectively used for processing different data, so that different types of data can be processed simultaneously in the processor, the data processing speed of the processor is improved, the problems of large load and high power consumption caused by processing all data in the same processor or processing unit are further avoided, the power consumption demand of the CPU is relieved, and the operation efficiency of the system is improved.

[0115] The processor disclosed by the embodiment comprises: Figure 1

[0116] at least three processing units, which are respectively a first processing unit 11, a second processing unit 12 and a third processing unit 13; the processor further comprises a system control unit 14 and a storage unit 15.

[0117] In addition to the same structure as the previous embodiment, the first processing unit in the processor disclosed by the embodiment is further capable of obtaining data of an external device through a reversible interface, so that the processor can process the data of the external device.

[0118] The processor can obtain data detected by each external sensor, process the data and output the data to a central processing unit CPU; and the processor and the CPU can constitute an electronic device; on this basis, the processor can further obtain data of other external devices.

[0119] Specifically, the reversible interface is connected with the external device, one path of the reversible interface is used as a normal USB2.0 data transmission path to connect a south bridge PCH of the CPU, another path of the reversible interface is used to obtain data of the external device, and the external device can be controlled through the path.

[0120] Specifically, the reversible interface, that is, a Type-C interface, has two completely same data transmission paths inside, and the two data transmission paths are interconnected, as shown in​Figure 5 As shown, it includes A1-A12, B1-B12 contact points, wherein A1-A12 forms a first connection path, B1-B12 forms a second connection path, and in the prior art, A6 and B6 and A7 and B7 are cross-connected, which makes the first connection path and the second connection path in a connected state, and when connecting through the Type-C interface, only one connection path is used, and the other connection path is in an idle state.

[0121] In the present scheme, the position of the intersection between the first connection line of A6 and B6 and the second connection line of A7 and B7, i.e. Figure 5 K point, hollow out the K point, and at the same time, two connection lines, i.e. R1 and R2, are arranged at the K point, one of which connects the south bridge in the CPU, and the other connects the processor, so that the first connection line and the second connection line are not connected at the intersection, but one of them can be connected to the south bridge PCH for normal data transmission when the external device is connected to the electronic device including the CPU and the processor through the Type-C interface, and the other is connected to the processor, so that the processor can process the data of the external device.

[0122] Among them, the processor can process the data such as display color temperature, brightness, liquid crystal flip angle of the external device, or also can adjust the parameters of the camera, sensor and other devices of the external device.

[0123] For example: the external device is a display screen, the processor connects the display screen through one connection line of the Type-C interface, the processor can obtain the brightness, color temperature, liquid crystal flip angle and other information of the display screen, at the same time, the processor obtains the image information collected by the camera on the display screen, so that the first processing unit and the second processing unit in the processor can determine the angle of the display screen relative to the user, so that the processor determines whether the display screen needs to be adjusted in angle, if so, the processor sends adjustment instruction to the display screen through one connection line of the Type-C interface, so as to adjust the angle of the display screen relative to the user.

[0124] As shown in Figure 6 Three display screens are placed in front of the user, including monitor0, monitor-1 and monitor+1, wherein monitor0 is a display screen directly connected with the host, monitor-1 and monitor+1 are display screens connected with the host through the Type-C interface, and when monitor-1 and monitor+1 are connected with the host through the Type-C interface, the first connection line in the Type-C interface is connected to the CPU of the host, and the second connection line is connected to the processor in the host.

[0125] Wherein, the monitor0 is opposite to the face of the user.

[0126] The distance between the face and the display can be determined by the camera device on the monitor0, and the processor can obtain the distance between the face and the two displays monitor-1 and monitor+1 through the second connection line, that is:

[0127] The vertical distance between the face and the monitor0 is D1, the distance between the face and the center point of the screen of the left display monitor-1 is D2, and the distance between the face and the center point of the screen of the right display monitor+1 is D3.

[0128] In addition, the angle between the connection line between the center point of the screen of the left display monitor-1 and the face and the direction when the user looks at the host display monitor0 is determined as ∠1, and the angle between the connection line between the center point of the screen of the right display monitor+1 and the face and the direction when the user looks at the host display monitor0 is determined as ∠2.

[0129] The angle between the vertical line of the center point of the screen of the left display monitor-1 and the extension line of the direction when the user looks at the host display monitor0 is determined as ∠1', and the angle between the vertical line of the center point of the screen of the right display monitor+1 and the extension line of the direction when the user looks at the host display monitor0 is determined as ∠2'.

[0130] The relative positions of the user and the left display monitor-1 and the right display monitor+1 are determined by the first processing unit and / or the second processing unit of the processor, and the deflection angle is generated, and the deflection angle is transmitted to the left display monitor-1 and the right display monitor+1 through the second connection line, so that the left display monitor-1 and the right display monitor+1 can change the deflection angle with the position of the user, and the external device is controlled by the processor, avoiding the problem of increasing the processing data amount of the CPU caused by controlling the external device by the CPU.

[0131] In addition, the resolution of the external display when displaying images can also be controlled through the second connection line. Specifically, the external display is provided with a super-resolution control module, and when the resolution of the image that can be transmitted through the second connection line is low, the processor sends a super-resolution control instruction to the external display through the second connection line, so that the external display improves the resolution of the image displayed by the external display through the super-resolution control module arranged therein.

[0132] The processor disclosed in the application comprises at least three processing units, i.e., a first processing unit, a second processing unit and a third processing unit, the first processing unit is capable of acquiring data transmitted to the processor, determining that the data is processed by the first processing unit, the second processing unit or the third processing unit, the second processing unit is used for processing neural network data, and the third processing unit is used for feature extraction of the data, further comprising a system control unit capable of controlling power supply state information of each processing unit in the at least three processing units, and a storage unit used for storing at least processing algorithms of the first processing unit, the second processing unit and the third processing unit for data processing. In the scheme, the data is acquired and processed by the first processing unit, the second processing unit or the third processing unit, so as to realize the purpose of processing the data by the processor other than the CPU. In addition, the first processing unit, the second processing unit and the third processing unit are respectively used for processing different data, so as to realize that different types of data can be processed simultaneously in the processor, improve the data processing speed of the processor, further avoid the problems of large load and high power consumption caused by processing all data in the same processor or processing unit, reduce the power consumption demand of the CPU, and improve the operation efficiency of the system.

[0133] The embodiment discloses a data processing method, and a flow chart thereof is shown in Figure 7 The embodiment discloses a data processing method, and a flow chart thereof is shown in

[0134] In step S71, data transmitted to the first processing unit is acquired.

[0135] In step S72, the data is analyzed to determine that the data is processed by the first processing unit, the second processing unit or the third processing unit; the second processing unit is used for executing a neural network algorithm, the third processing unit is used for executing an algorithm for feature extraction of the data, and processing algorithms of the first processing unit, the second processing unit and the third processing unit for data processing are stored in the same storage unit.

[0136] Further, the storage unit is also capable of storing data detected by not less than one sensor.

[0137] The data transmitted to the first processing unit is acquired, including acquiring data detected by not less than one sensor stored in the storage unit.

[0138] Further, the storage unit is also capable of storing processing results obtained after the first processing unit, the second processing unit and the third processing unit process the data.

[0139] Further, the first processing unit stores the processing result obtained by the first processing unit, the second processing unit or the third processing unit to the storage unit, and sends the notification information of the processing result stored to the storage unit to the central processing unit; the storage unit is further used for sending the stored processing result to the central processing unit based on the calling instruction of the central processing unit.

[0140] Further, the processor further comprises a switch module, the switch module comprises at least two states,

[0141] When the switch module is in the first state, the first processing unit can obtain the audio data, so that the processor can perform ultrasonic detection on part of the audio data.

[0142] When the switch module is in the second state, the first processing unit does not obtain the audio data.

[0143] Further, the first processing unit can also obtain the data of the external device through the positive and negative plug-in interface, so that the processor can process the data of the external device.

[0144] Further, the first processing unit can also obtain the data of the external device through the positive and negative plug-in interface, comprising: the first processing unit is in communication with the positive and negative plug-in interface, so that the positive and negative plug-in interface has two transmission lines; the first transmission line of the positive and negative plug-in interface is that the first processing unit obtains the first data of the external device through the positive and negative plug-in interface; the second transmission line of the positive and negative plug-in interface is that the central processing unit obtains the second data of the external device through the positive and negative plug-in interface.

[0145] Further, the first processing unit can also output the control instruction based on the first data of the external device, and the control instruction is transmitted to the external device through the first transmission line of the positive and negative plug-in interface, so that the external device adjusts based on the control instruction.

[0146] The data processing method disclosed in the embodiment is realized based on the processor disclosed in the above embodiment, and the specific implementation manner is not repeated here.

[0147] The data processing method disclosed in the application obtains data transmitted to a first processing unit; the data is analyzed to determine that the data is processed by the first processing unit, a second processing unit or a third processing unit; the second processing unit is used to execute a processing neural network algorithm, and the third processing unit is used to execute an algorithm for feature extraction of the data; and processing algorithms for data processing of the first processing unit, the second processing unit and the third processing unit are stored in a same storage unit. In the scheme, the data is obtained, and the obtained data is processed by the first processing unit, the second processing unit or the third processing unit, so that the purpose of processing the data by a processor other than a CPU is achieved; and the first processing unit, the second processing unit and the third processing unit are respectively used to process different data, so that different types of data can be processed simultaneously in the processor, the data processing speed of the processor is improved, the problems of large load and high power consumption caused by processing all data in a same processor or processing unit are further avoided, the power consumption demand of the CPU is relieved, and the operation efficiency of the system is improved.

[0148] The embodiment discloses an electronic device, a structural schematic diagram of which is shown in Figure 8 The electronic device comprises:

[0149] at least one sensor 81, a central processing unit 82 and a processor 83.

[0150] The at least one sensor is used to detect data and send the data to the processor.

[0151] The central processing unit is used to obtain a processing result output by the processor.

[0152] The processor comprises a system control unit, a storage unit and at least three processing units, wherein the at least three processing units comprise a first processing unit, a second processing unit and a third processing unit, and wherein:

[0153] The first processing unit is capable of obtaining data transmitted to the processor and determining that the data is processed by the first processing unit, the second processing unit or the third processing unit.

[0154] The second processing unit is used to execute a processing neural network algorithm.

[0155] The third processing unit is used to execute an algorithm for feature extraction of the data.

[0156] The system control unit is capable of controlling power supply state information of each processing unit in the at least three processing units.

[0157] The storage unit is used to at least store processing algorithms for data processing of the first processing unit, the second processing unit and the third processing unit, and output processing results obtained by the at least three processing units in data processing.

[0158] The electronic device disclosed in the embodiment is realized based on the processor disclosed in the above embodiment, which is not described here again.

[0159] The electronic device disclosed in the application comprises no less than one sensor, a central processor and a processor, the processor comprises at least three processing units, which are respectively a first processing unit, a second processing unit and a third processing unit, the first processing unit can acquire data transmitted to the processor, determine that the data is processed by the first processing unit, the second processing unit or the third processing unit, the second processing unit is used for processing neural network data, and the third processing unit is used for feature extraction of the data, further comprising a system control unit capable of controlling power supply state information of each processing unit in the at least three processing units, a storage unit used for at least storing processing algorithms of the first processing unit, the second processing unit and the third processing unit for data processing. In the scheme, the data is acquired, and the acquired data is processed by the first processing unit, the second processing unit or the third processing unit, so as to realize the purpose of processing the data by the processor other than the CPU; and the first processing unit, the second processing unit and the third processing unit are respectively used for processing different data, so as to realize that different kinds of data can be processed simultaneously in the processor, improve the data processing speed of the processor, further avoid the problems of large load and high power consumption caused by processing all data in the same processor or processing unit, reduce the power consumption demand of the CPU, and improve the operation efficiency of the system.

[0160] The embodiments in the specification are described in a progressive manner, and each embodiment focuses on the difference from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple, and the related parts can be referred to the method part.

[0161] The skilled person can further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed in the present text can be realized in electronic hardware, computer software or combination of both. In order to clearly show the interchangeability of hardware and software, the composition and steps of each example have been described in the above description. Whether the functions are realized in hardware or software depends on the specific application and design constraints of the technical solution. The skilled person can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0162] The steps of a method or algorithm described in connection with the embodiments disclosed herein can be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module can reside in random access memory (RAM), flash memory, read-only memory (ROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and

[0163] The above description of disclosed embodiments is intended to be illustrative and not restrictive. Many embodiments of the application will be apparent to those of skill in the art upon reviewing the above description. The scope of the application should, therefore, be determined not with reference to the above description, but instead should be determined with reference to the appended claims, along with their full scope of equivalents.

Claims

1. An electronic device, comprising: First processor and system processor; The first processor includes a first audio control unit, a switching module, and at least three processing units, wherein the at least three processing units include: a first processing unit, a second processing unit, and a third processing unit, wherein: The first processing unit can acquire data transmitted to the first processor and determine whether the data is processed by the first processing unit, the second processing unit, or the third processing unit. The second processing unit is used to execute neural network processing algorithms; The third processing unit is used to execute an algorithm for feature extraction from the data; When the switch module is in the first state, the system audio control unit opens the ultrasonic playback mode, the system audio output unit outputs audio data including ultrasonic audio, and sends the audio data to the first audio control unit for recognition, and then transmits it to the first processing unit or the third processing unit for ultrasonic detection. The ultrasonic detection includes: human body detection, or motion trajectory detection. When the switch module is in the second state, it sends the audio data output by the system audio output unit to the system audio control unit for normal sound input processing.

2. The electronic device according to claim 1, wherein the first processor further comprises: The system control unit is capable of controlling the power supply status information of each of the at least three processing units.

3. The electronic device according to claim 1, wherein the first processor further comprises: The storage unit is used to store at least the processing algorithms for data processing performed by the first processing unit, the second processing unit, and the third processing unit.

4. The electronic device according to claim 3, wherein the storage unit can also be used to store data detected by not less than one sensor; The first processing unit is capable of acquiring data transmitted to the first processor, including: The first processing unit is capable of acquiring data detected by at least one sensor stored in the storage unit.

5. The electronic device according to claim 3, wherein the storage unit is further capable of storing the processing results obtained by the first processing unit, the second processing unit and the third processing unit after processing the data transmitted to the first processor.

6. The electronic device according to claim 5, wherein the first processing unit stores the processing result obtained by the first processing unit, the second processing unit, or the third processing unit into the storage unit, and sends a notification message that the processing result has been stored in the storage unit to the system processor; The storage unit is also used to send the stored processing results to the system processor based on the system processor's retrieval instructions.

7. The electronic device according to claim 1, wherein the first processing unit is further capable of obtaining data from an external device through a reversible connector, so that the first processor can process the data from the external device.

8. The electronic device according to claim 7, wherein the first processing unit is further capable of obtaining data from an external device via a reversible connector, including: The first processing unit is connected to the reversible connector, so that the reversible connector has two transmission lines. The first transmission line of the reversible connector is: the first processing unit obtains the first data of the external device through the reversible connector; The second transmission line of the reversible connector is: the central processing unit obtains the second data of the external device through the reversible connector.

9. The electronic device according to claim 8, wherein, The first processing unit can also output control commands based on the first data of the external device. The control commands are transmitted to the external device through the first transmission line of the reversible connector, so that the external device can adjust based on the control commands.

10. A data processing method, applied to an electronic device as described in any one of claims 1-9, comprising: Obtain the data transmitted to the first processing unit of the first processor; The data is analyzed to determine whether it is processed by the first processing unit, the second processing unit, or the third processing unit of the first processor. The second processing unit is used to execute a neural network processing algorithm, and the third processing unit is used to execute a feature extraction algorithm for the data. The data processing algorithms of the first processing unit, the second processing unit, and the third processing unit are stored in the same storage unit. When the switching module of the first processor is in the first state, the system audio control unit opens the ultrasonic playback mode, the system audio output unit outputs audio data including ultrasonic audio, and sends the audio data to the first audio control unit for recognition, and then transmits it to the first processing unit or the third processing unit for ultrasonic detection. The ultrasonic detection includes: human body detection, or motion trajectory detection. When the switch module is in the second state, it sends the audio data output by the system audio output unit to the system audio control unit for normal sound input processing.

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