Crystals, semiconductor elements, semiconductor devices, and semiconductor systems

Abstract

The present invention relates to a crystal, a semiconductor element, a semiconductor device, and a semiconductor system. The present invention provides a crystal useful for a semiconductor element and a semiconductor element excellent in electrical characteristics. A semiconductor element is produced using a crystal having a corundum structure and including a crystalline oxide containing gallium and / or indium as a main component, characterized in that the crystalline oxide further includes a metal of Group 4 of the periodic table, a semiconductor device such as a power card is produced from the produced semiconductor element, and a semiconductor system is constructed from these semiconductor elements or semiconductor devices.

Description

TECHNICAL FIELD

[0001] The present application relates to a crystal, a semiconductor element, a semiconductor device using the semiconductor element, and a semiconductor system, which are useful for power devices and the like. BACKGROUND

[0002] Gallium oxide (Ga2O3) has a wide band gap of 4.8-5.3 eV at room temperature, and is a transparent semiconductor that hardly absorbs visible light and ultraviolet light. Therefore, it is a promising material used in optical / electrical devices and transparent electronic devices that operate particularly in the deep ultraviolet light region, and in recent years, development of gallium oxide (Ga2O3)-based photodetectors, light-emitting diodes (LEDs), and transistors is being conducted (see Non-Patent Literature 1).

[0003] In addition, there are five crystal structures of α, β, γ, σ, and ε in gallium oxide (Ga2O3), and the most stable structure is generally β-Ga2O3. However, β-Ga2O3 is a β-gallia structure, and thus is different from the crystal system generally utilized as electronic materials and the like, and is not necessarily suitable for use in semiconductor elements. In addition, the growth of a β-Ga2O3 thin film requires a high substrate temperature and a high degree of vacuum, and thus there is also a problem of an increased manufacturing cost. In addition, as described in Non-Patent Literature 2, in β-Ga2O3, even a dopant (Si) having a high concentration (for example, 1 x 10 19 / cm 3 cannot be used as a donor unless annealing treatment is performed at a high temperature of 800°C to 1100°C after ion implantation.

[0004] On the other hand, α-Ga2O3 has the same crystal structure as the commonly used sapphire substrate, and thus is suitable for use in optoelectronic devices, and furthermore, since it has a wider band gap than β-Ga2O3, it is particularly useful for power devices, and thus a semiconductor element using α-Ga2O3 as a semiconductor is expected.

[0005] In Patent Literatures 1 and 2, as an electrode that uses β-Ga2O3 as a semiconductor and obtains an ohmic characteristic suitable therefor, a semiconductor element using a two-layer composed of a Ti layer and an Au layer, a three-layer composed of a Ti layer, an Al layer, and an Au layer, or a four-layer composed of a Ti layer, an Al layer, a Ni layer, and an Au layer is described.

[0006] In addition, in Patent Literature 3, as an electrode that uses β-Ga2O3 as a semiconductor and obtains a Schottky characteristic suitable therefor, a semiconductor element using any one of a laminate of Au, Pt, or Ni and Au is described.

[0007] However, in the case where the electrodes described in Patent Documents 1 to 3 are applied to a semiconductor element using α-Ga2O3 as a semiconductor, there are problems that the Schottky electrode or the ohmic electrode does not function, the electrode is not joined to the film, the semiconductor characteristics are damaged, and the like. Furthermore, the electrode structure described in Patent Documents 1 to 3 generates a leakage current from the electrode end portion and the like, and a satisfactory electrode structure as a semiconductor element in practical use cannot be obtained.

[0008] In particular, in recent years, in the case where gallium oxide is used as a semiconductor, Ti / Au is used as an ohmic electrode (Patent Documents 4 to 8), and although good adhesion is shown, the ohmic characteristics are not quite satisfactory, and a gallium oxide semiconductor element having excellent ohmic characteristics is expected.

[0009] Patent Document 1: Japanese Patent Laid-Open No. 2005-260101

[0010] Patent Document 2: Japanese Patent Laid-Open No. 2009-81468

[0011] Patent Document 3: Japanese Patent Laid-Open No. 2013-12760

[0012] Patent Document 4: Japanese Patent Laid-Open No. 2019-016680

[0013] Patent Document 5: Japanese Patent Laid-Open No. 2019-036593

[0014] Patent Document 6: Japanese Patent Laid-Open No. 2019-079984

[0015] Patent Document 7: Japanese Patent Laid-Open No. 2018-60992

[0016] Patent Document 8: WO2016-13554

[0017] Non-Patent Document 1: Jun Liang Zhao et al, "UV and Visible Electroluminescence From a Sn:Ga2O3 / n+-Si Heterojunction by Metal-Organic Chemical Vapor Deposition", IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 58, NO. 5 MAY 2011

[0018] Non-Patent Literature 2: Kohei Sasaki et al, "Si-Ion Implantation Doping in β-Ga2O3 and Its Application to Fabrication of Low-Resistance Ohmic Contacts", Applied Physics Express 6 (2013) 086502 SUMMARY

[0019] An object of the present application is to provide a semiconductor element which is useful for a semiconductor element and has excellent electrical characteristics.

[0020] The present inventors have found, as a result of intensive studies to achieve the above object, that Ti / Au has been used as an ohmic electrode, but that Ti diffusion causes problems in electrical characteristics, and that, in the case where a Ti diffusion preventing film such as Ni is provided between the Ti layer and the Au layer, oxygen diffusion of the oxide semiconductor in the ohmic electrode causes problems in electrical characteristics. In view of this, the present inventors have found a crystal which has a corundum structure and includes a crystalline oxide containing gallium and / or indium as a main component, characterized in that the crystalline oxide further includes a metal of Group 4 of the periodic table, and that, when this crystal is formed into an ohmic electrode, good ohmic characteristics are exhibited, and a semiconductor element having excellent electrical characteristics is successfully created, and that such a crystal and semiconductor element can solve the above problems at one stroke.

[0021] In addition, the present inventors have completed the present application as a result of repeated studies after obtaining the above insight.

[0022] That is, the present application relates to the following inventions.

[0023] [1] A crystal having a corundum structure and including a crystalline oxide containing gallium and / or indium as a main component, characterized in that the crystalline oxide further includes a metal of Group 4 of the periodic table.

[0024] [2] The crystal according to the above [1], wherein the metal of Group 4 of the periodic table includes at least one metal selected from the group consisting of titanium, zirconium, and hafnium.

[0025] [3] The crystal according to the above [1] or [2], wherein the metal of Group 4 of the periodic table is titanium.

[0026] [4] The crystal according to any one of [1] to [3], wherein the crystalline oxide contains gallium.

[0027] [5] The crystal according to any one of [1] to [4], wherein it is in a film shape.

[0028] [6] The crystal according to any one of [1] to [5], wherein it has an electrical conductivity.

[0029] [7] A semiconductor element comprising the crystal according to any one of [1] to [6].

[0030] [8] A semiconductor element which is a semiconductor device provided with at least a semiconductor layer and an electrode, characterized in that the electrode comprises the crystal according to [6].

[0031] [9] The semiconductor element according to [8], wherein the semiconductor layer comprises a crystalline oxide semiconductor as a main component.

[0032]

[10] The semiconductor element according to [9], wherein the crystalline oxide semiconductor has a corundum structure.

[0033]

[11] The semiconductor element according to [9] or

[10] , wherein the crystalline oxide semiconductor comprises one or two or more metals selected from aluminum, gallium, and indium.

[0034]

[12] The semiconductor element according to any one of [7] to

[11] , which is a vertical device.

[0035]

[13] The semiconductor element according to any one of [7] to

[12] , which is a power device.

[0036]

[14] A semiconductor device which is constituted by joining at least a semiconductor element and a lead frame, a circuit substrate, or a heat dissipation substrate by a joining member, wherein the semiconductor element is the semiconductor element according to any one of [7] to

[13] .

[0037]

[15] The semiconductor device according to

[14] , which is a power module, an inverter, or a converter.

[0038]

[16] The semiconductor device according to

[14] or

[15] , which is a power card.

[0039]

[17] A semiconductor system includes a semiconductor element or a semiconductor device, characterized in that the semiconductor element is the semiconductor element described in any one of [7] to

[13] , and the semiconductor device is the semiconductor device described in any one of

[14] to

[16] .

[0040] The crystal of the present invention is useful for semiconductor elements, and the electrical characteristics of the semiconductor elements of the present invention are excellent. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 It is a cross-sectional view schematically showing a preferred mode of the semiconductor element of the present invention.

[0042] Figure 2 It is for explaining Figure 1 A view showing a preferred manufacturing method of the semiconductor element.

[0043] Figure 3 It is for explaining Figure 1 A view showing a preferred manufacturing method of the semiconductor element.

[0044] Figure 4 It is for explaining Figure 1 A view showing a preferred manufacturing method of the semiconductor element.

[0045] Figure 5 It is for explaining Figure 1 A view showing a preferred manufacturing method of the semiconductor element.

[0046] Figure 6 It is a cross-sectional view schematically showing a preferred mode of the semiconductor element of the present invention. <000​​​​​​​​​​​​​​​​​​​​​​​​​​​​​X Ga 1-X A chart of TEM-EDS analysis results of the Ga2O3film (in the formula, 0 < X < 1).

[0052] Figure 12 is a chart schematically showing a preferred example of a power supply system.

[0053] Figure 13 is a chart schematically showing a preferred example of a system device.

[0054] Figure 14 is a chart schematically showing a preferred example of a power supply circuit diagram of a power supply device.

[0055] Figure 15 is a chart schematically showing a preferred example of a semiconductor device.

[0056] Figure 16 is a chart schematically showing a preferred example of a power card.

[0057] Figure 17 is a chart schematically showing a laminated structure that is a main part of a semiconductor element of the present application.

[0058] Figure 18 is a chart schematically showing a cross-sectional view of an embodiment product of a semiconductor element of the present application. DETAILED DESCRIPTION

[0059] The crystal of the present application has a corundum structure and includes a crystalline oxide as a main component, the crystalline oxide containing gallium or / and indium, characterized in that the crystalline oxide further includes a metal of Group 4 of the periodic table. As the metal of Group 4 of the periodic table, for example, at least one metal selected from the group consisting of titanium, zirconium and hafnium, etc. can be mentioned, and in the present application, titanium is preferred. In the present application, the crystalline oxide preferably contains gallium. The shape of the crystal is not particularly limited, and in the present application, a film shape is preferred. In addition, the crystal is usually formed by crystal growth and has electrical conductivity, but can also be an insulator. It can be a semiconductor including a dopant, a conductor or a semi-insulator, and in the present application, the crystal preferably has electrical conductivity. In the present application, when the crystal is in a film shape, the thickness (film thickness) of the crystal is not particularly limited, and in the present application, 5 nm or more is preferred, and when the thickness is 10 nm or more, the electrical properties can be made more excellent, and thus 10 nm or more is more preferred. Further, the "main component" means that the crystalline oxide is preferably contained in 50% or more, more preferably 70% or more, and further preferably 90% or more, and can also be 100% in terms of atomic ratio with respect to the entire components of the crystal.

[0060] The crystal can be obtained by causing gallium or / and indium to thermally react with a metal of Group 4 of the periodic table in an oxidizing atmosphere to form an oxide of gallium or / and indium and the metal of Group 4 of the periodic table, for example, in a film shape. The method of forming the crystal is not particularly limited and can be a publicly known method. As the method of forming the crystal, specifically, for example, a dry method and a wet method, etc. can be given. As the dry method, for example, sputtering, vacuum evaporation, CVD, etc. can be given. As the wet method, for example, screen printing or die coating, etc. can be given. The forming conditions of the crystal are not particularly limited and are generally set as appropriate according to each metal species to set conditions under which thermal reaction can occur in an oxidizing atmosphere.

[0061] Next, a preferred mode when the crystal is used as an ohmic electrode of a semiconductor element will be described. As an example of the preferred mode, a semiconductor element shown in FIG. 1 will be described. As the semiconductor element, a semiconductor element shown in FIG. 2 can be given. Figure 17 Figure 17 The layered structure of the main part of the semiconductor element has a first metal oxide layer 102a, a second metal layer 102b, and a third metal layer 102c stacked over a semiconductor layer 101 composed of an oxide semiconductor film, and the first metal oxide layer 102a is not particularly limited as long as the crystal is used.

[0062] ​The oxide semiconductor film (hereinafter referred to simply as "semiconductor layer" or "semiconductor film") is not particularly limited as long as it includes an oxide semiconductor film. However, in this invention, a semiconductor film including a metal oxide is preferred, a semiconductor film including a crystalline oxide semiconductor is more preferred, and a semiconductor film mainly composed of a crystalline oxide semiconductor is most preferred. Furthermore, in this invention, the crystalline oxide semiconductor preferably contains one or more metals selected from Group 9 (e.g., cobalt, rhodium, or iridium) and Group 13 (e.g., aluminum, gallium, or indium) of the periodic table, more preferably containing at least one metal selected from aluminum, indium, gallium, and iridium, and most preferably including at least gallium or iridium. The crystal structure of the crystalline oxide semiconductor is not particularly limited. Examples of crystal structures for the crystalline oxide semiconductor include corundum, β-gallia, or hexagonal structures (e.g., ε-type structures). In this invention, the crystalline oxide semiconductor preferably has a corundum structure. When it has a corundum structure and its principal surface is an m-plane, the diffusion of oxygen and the like can be further suppressed, resulting in superior electrical properties, and is therefore more preferred. Additionally, the crystalline oxide semiconductor has an off-angle. In this invention, the semiconductor film preferably comprises gallium oxide and / or iridium oxide, more preferably α-Ga₂O₃ and / or α-Ir₂O₃. Furthermore, "main component" refers to the total composition of the crystalline oxide semiconductor relative to the semiconductor layer, preferably comprising 50% or more on an atomic basis, more preferably 70% or more, further preferably 90% or more, and may also be 100%. Additionally, the thickness of the semiconductor layer is not particularly limited and can be less than 1 μm or more, but in this invention, it is preferably 1 μm or more, more preferably 10 μm or more. The surface area of ​​the semiconductor film is not particularly limited and may be 1 mm. 2 The above can also be 1mm. 2 The following is preferred: 10mm 2 ~300cm 2 More preferably 100mm 2 ~100cm 2 Furthermore, the semiconductor film is preferably a single-crystal film, but it can also be a polycrystalline film or a crystalline film comprising polycrystalline elements. Additionally, it is more preferably a multilayer film comprising at least a first semiconductor layer and a second semiconductor layer. When a Schottky electrode is disposed on the first semiconductor layer, the semiconductor film is a multilayer film in which the carrier density of the first semiconductor layer is less than the carrier density of the second semiconductor film. Furthermore, in this case, the second semiconductor layer typically contains a dopant, and the carrier density of the semiconductor layer can be appropriately set by adjusting the doping amount.

[0063] Preferably, the semiconductor layer contains a dopant. The dopant is not particularly limited and can be a publicly known dopant. As the dopant, for example, an n-type dopant such as tin, germanium, silicon, titanium, zirconium, vanadium, or niobium, or a p-type dopant such as magnesium, calcium, or zinc, or the like can be given. In the present application, the semiconductor layer preferably includes an n-type dopant, and more preferably an n-type oxide semiconductor layer. Further, in the present application, the n-type dopant is preferably Sn, Ge, or Si. As for the content of the dopant, in the composition of the semiconductor layer, it is preferably 0.00001 atomic % or more, more preferably 0.00001 atomic % to 20 atomic %, and most preferably 0.00001 atomic % to 10 atomic %. More specifically, the concentration of the dopant can be approximately 1 x 10 16 / cm 3 to 1 x 10 22 / cm 3 , and the concentration of the dopant can be set to be a low concentration of approximately 1 x 10 17 / cm 3 or lower, for example. Further, according to one embodiment of the present application, the dopant can be contained at a high concentration of approximately 1 x 10 20 / cm 3 or more. Further, the concentration of the fixed charge of the semiconductor layer is not particularly limited, but in the present application, it is 1 x 10 17 / cm 3 or more, which enables a depletion layer to be favorably formed by the semiconductor layer.

[0064] The semiconductor layer can be formed using a publicly known method. As the method for forming the semiconductor layer, for example, a CVD method, an MOCVD method, an MOVPE method, an atomizing CVD method, an atomizing / epitaxial method, an MBE method, an HVPE method, a pulse growth method, or an ALD method can be given. In the present application, the method for forming the semiconductor layer is preferably an atomizing CVD method or an atomizing / epitaxial method. In the atomizing CVD method or the atomizing / epitaxial method, for example, a raw material solution is atomized (atomizing step), the liquid droplets are floated and atomized, and then the obtained atomized liquid droplets are carried onto a substrate by a carrier gas (carrying step), and then the atomized liquid droplets are subjected to a thermal reaction in the vicinity of the substrate, whereby a semiconductor film including a crystalline oxide semiconductor as a main component is stacked on the substrate (film formation step) to form the semiconductor layer.

[0065] (atomizing step)

[0066] In the atomization step, the raw material solution is atomized. The method of atomizing the raw material solution is not particularly limited as long as it can atomize the raw material solution, and can be a publicly known method, and in the present application, an atomization method using ultrasonic waves is preferred. Since the initial velocity of the atomized droplets obtained by using ultrasonic waves is zero, they float in the air, and thus, since they are not sprayed like, for example, a spray, but float in the space and are transported as a gas, damage due to collision energy is not caused, and thus, they are very suitable. The droplet size is not particularly limited, and can be droplets of about several millimeters, and preferably 50 μm or less, and more preferably 100 nm to 10 μm.

[0067] (Raw material solution)

[0068] The raw material solution is not particularly limited as long as it includes a raw material that can be atomized and form a semiconductor film, and can be an inorganic material or an organic material. In the present application, the raw material is preferably a metal or a metal compound, and more preferably includes a metal selected from one or two or more of aluminum, gallium, indium, iron, chromium, vanadium, titanium, rhodium, nickel, cobalt, and iridium.

[0069] In the present application, as the raw material solution, a substance that dissolves or disperses the metal in the form of a complex or a salt into an organic solvent or water can be suitably used. As the form of a complex, for example, acetylacetone complexes, carbonyl complexes, amine complexes, hydride complexes, and the like can be given. As the form of a salt, for example, organometallic salts (for example, metal acetates, metal oxalates, metal citrates, and the like), metal sulfide salts, metal nitrate salts, metal phosphate salts, metal halide salts (for example, metal chloride salts, metal bromide salts, metal iodide salts, and the like), and the like can be given.

[0070] In addition, it is preferred that an additive such as a hydrogen halide acid or an oxidizing agent is mixed in the raw material solution. As the hydrogen halide acid, for example, hydrobromic acid, hydrochloric acid, hydroiodic acid, and the like can be given, and among them, hydrobromic acid or hydroiodic acid is preferred for the reason that abnormal particles can be more effectively inhibited from occurring. As the oxidizing agent, for example, peroxides such as hydrogen peroxide (H2O2), sodium peroxide (Na2O2), barium peroxide (BaO2), benzoyl peroxide (C6H5CO)2O2, and the like, hypochlorous acid (HCIO), perchloric acid, nitric acid, ozone water, organic peroxides such as peracetic acid and nitrobenzene, and the like can be given.

[0071] The raw material solution can also contain a dopant. By including a dopant in the raw material solution, doping can be performed well. The dopant is not particularly limited as long as it does not hinder the object of the present application. As the dopant, for example, an n-type dopant such as tin, germanium, silicon, titanium, zirconium, vanadium, or niobium, or a p-type dopant such as Mg, H, Li, Na, K, Rb, Cs, Fr, Be, Ca, Sr, Ba, Ra, Mn, Fe, Co, Ni, Pd, Cu, Ag, Au, Zn, Cd, Hg, Ti, Pb, N, or P, and the like can be given. The content of the dopant is appropriately set by using a calibration line showing the relationship between the concentration of the dopant in the raw material and the desired carrier density.

[0072] The solvent of the raw material solution is not particularly limited and can be an inorganic solvent such as water, an organic solvent such as ethanol, or a mixed solvent of an inorganic solvent and an organic solvent. In the present application, preferably, the solvent includes water, and more preferably, water or a mixed solvent of water and ethanol.

[0073] (Transportation step)

[0074] In the transportation step, the atomized droplets are transported into the film formation chamber by a carrier gas. The carrier gas is not particularly limited as long as it does not hinder the object of the present application, and for example, an inert gas such as oxygen, ozone, nitrogen, or argon, or a reducing gas such as hydrogen or a synthetic gas, and the like can be given as appropriate examples. In addition, the kind of the carrier gas can be one kind, but can also be two or more kinds, and further, a dilution gas (for example, a 10-fold dilution gas, or the like) having a reduced flow rate can be used as a second carrier gas. In addition, the supply site of the carrier gas is not only one, but can also be two or more. The flow rate of the carrier gas is not particularly limited, and is preferably 0.01 L / minute to 20 L / minute, and more preferably 1 L / minute to 10 L / minute. In the case where a dilution gas is present, the flow rate of the dilution gas is preferably 0.001 L / minute to 2 L / minute, and more preferably 0.1 L / minute to 1 L / minute.

[0075] (Film formation step)

[0076] In the film formation step, the atomized droplets are caused to undergo a thermal reaction in the vicinity of the substrate, thereby forming the semiconductor film on the substrate. The thermal reaction is a reaction of the atomized droplets caused by heat, and the reaction conditions and the like are not particularly limited as long as the object of the present application is not hindered. In the present step, the thermal reaction is usually performed at a temperature of 1000°C or lower, preferably at a temperature of 650°C or lower, more preferably at a temperature of 300°C to 650°C. In addition, the thermal reaction can be performed in any atmosphere, such as under vacuum, under a non-oxygen atmosphere (for example, under an inert gas atmosphere or the like), under a reducing gas atmosphere, and under an oxygen atmosphere, as long as the object of the present application is not hindered, and is preferably performed under an inert gas atmosphere or an oxygen atmosphere. In addition, the thermal reaction can be performed under any conditions, such as under atmospheric pressure, under pressure, and under reduced pressure, and in the present application, the thermal reaction is preferably performed under atmospheric pressure. In addition, the film thickness of the semiconductor film can be set by adjusting the film formation time.

[0077] (Substrate)

[0078] The substrate is not particularly limited as long as it can support the semiconductor film. The material of the substrate is also not particularly limited as long as the object of the present application is not hindered, and can be a publicly known substrate, an organic compound, or an inorganic compound. The shape of the substrate can be any shape, and is effective for all shapes, and for example, a plate shape such as a flat plate or a circular plate, a fiber shape, a rod shape, a cylindrical shape, a prismatic shape, a tubular shape, a spiral shape, a spherical shape, a ring shape, or the like can be given, but in the present application, a substrate is preferred. The thickness of the substrate is not particularly limited in the present application.

[0079] The substrate is a plate shape, and the substrate as a support for the semiconductor film is not particularly limited. It can be an insulator substrate, a semiconductor substrate, a metal substrate, or a conductive substrate, and preferably, the substrate is an insulator substrate, and further preferably, a substrate having a metal film on the surface. As the substrate, for example, a base substrate including a substrate material having a corundum structure as a main component, or a base substrate including a substrate material having a β-gallia structure as a main component, a base substrate including a substrate material having a hexagonal structure as a main component, or the like can be given. Here, the "main component" means that the substrate material having the specific crystal structure is preferably contained at 50% or more, more preferably at 70% or more, and further preferably at 90% or more, and can be 100%, in terms of atomic ratio, with respect to the entire component of the substrate material.

[0080] The substrate material is not particularly limited as long as it does not hinder the object of the present application, and can be a publicly known substrate material. As the substrate material having a corundum structure, for example, α-Al2O3 (sapphire substrate) or α-Ga2O3 can be appropriately cited, and as more appropriate examples, an a-plane sapphire substrate, an m-plane sapphire substrate, an r-plane sapphire substrate, a c-plane sapphire substrate, an α-type gallium oxide substrate (a-plane, m-plane, or r-plane), and the like can be cited. As a base substrate in which a substrate material having a β-gallia structure is a main component, for example, a β-Ga2O3 substrate, or a mixed crystal substrate including Ga2O3 and Al2O3 and having Al2O3 in an amount of more than 0 wt% and 60 wt% or less, and the like can be cited. In addition, as a base substrate in which a substrate material having a hexagonal crystal structure is a main component, for example, a SiC substrate, a ZnO substrate, a GaN substrate, and the like can be cited.

[0081] In the present application, after the film formation step, an annealing treatment can also be performed. The treatment temperature for annealing is not particularly limited as long as it does not hinder the object of the present application, and is typically 300°C to 650°C, and preferably 350°C to 550°C. In addition, the treatment time for annealing is typically 1 minute to 48 hours, and preferably 10 minutes to 24 hours, and more preferably 30 minutes to 12 hours. In addition, the annealing treatment can be performed in any atmosphere as long as it does not hinder the object of the present application. It can be in a non-oxygen atmosphere, or in an oxygen atmosphere. As a non-oxygen atmosphere, for example, an inert gas atmosphere (for example, a nitrogen atmosphere) or a reducing gas atmosphere, and the like can be cited, and in the present application, an inert gas atmosphere is preferred, and a nitrogen atmosphere is more preferred.

[0082] In addition, in the present application, the semiconductor film can be provided directly on the base, or can be provided via a stress relaxation layer (for example, a buffer layer, an ELO layer, and the like), a separation sacrificial layer, or another layer. The formation method of each layer is not particularly limited, and can be a publicly known method, but in the present application, an atomization CVD method is preferred.

[0083] In the present application, after a publicly known method in which the semiconductor film is separated from the base or the like is used, the semiconductor film can be used as the semiconductor layer for a semiconductor element, or can be directly used as the semiconductor layer for a semiconductor element.

[0084] The ohmic electrode includes at least a first metal oxide layer that makes ohmic contact with the semiconductor layer, a second metal layer, and a third metal layer, the second and third metal layers each being composed of one or more metals that are different from each other, and the second metal layer is disposed between the first metal oxide layer and the third metal layer. In the present application, the first metal oxide layer of the ohmic electrode is preferably the crystal. In addition, the second and third metal layers of the ohmic electrode are each not particularly limited and can be a publicly known metal layer. As the second and third metal layers, for example, at least one metal selected from Groups 4 to 11 of the periodic table can be cited. As the metal of Group 4 of the periodic table, for example, titanium (Ti), zirconium (Zr), hafnium (Hf), and the like can be cited. As the metal of Group 5 of the periodic table, for example, vanadium (V), niobium (Nb), tantalum (Ta), and the like can be cited. As the metal of Group 6 of the periodic table, for example, chromium (Cr), molybdenum (Mo), and tungsten (W), and the like can be cited. As the metal of Group 7 of the periodic table, for example, manganese (Mn), technetium (Tc), rhenium (Re), and the like can be cited. As the metal of Group 8 of the periodic table, for example, iron (Fe), ruthenium (Ru), osmium (Os), and the like can be cited. As the metal of Group 9 of the periodic table, for example, cobalt (Co), rhodium (Rh), iridium (Ir), and the like can be cited. As the metal of Group 10 of the periodic table, for example, nickel (Ni), palladium (Pd), platinum (Pt), and the like can be cited. As the metal of Group 11 of the periodic table, for example, copper (Cu), silver (Ag), gold (Au), and the like can be cited. In the present application, the second metal layer is preferably a metal of Group 4 of the periodic table, and more preferably titanium. In addition, the third metal layer is preferably a metal of Group 10 of the periodic table, and more preferably nickel. By using such preferred metals, the electrical properties of the crystal can be made more excellent. The thickness of each of the second and third metal layers of the ohmic electrode is not particularly limited, and is preferably 0.1 nm to 10 μm, and more preferably 1 nm to 1000 nm.

[0085] The method for forming the ohmic electrode is not particularly limited and can be a publicly known method. As the method for forming the ohmic electrode, specifically, for example, a dry method or a wet method can be cited. As the dry method, for example, sputtering, vacuum evaporation, CVD, and the like can be cited. As the wet method, for example, screen printing or die coating can be cited. In the present application, the method for forming the crystal is preferably an atomization CVD method or an atomization / epitaxial method.

[0086] In addition, the semiconductor element can include a Schottky electrode, and can not include a Schottky electrode. In the present application, as one of the preferred modes, the semiconductor element is preferably a Schottky barrier diode. The Schottky electrode (hereinafter, simply referred to as "electrode layer") is not particularly limited as long as it has conductivity and can be used as a Schottky electrode, and does not hinder the object of the present application. The constituent material of the electrode layer can be a conductive inorganic material, or a conductive organic material. In the present application, the material of the electrode is preferably a metal. As the metal, for example, at least one metal selected from Group 4 to Group 10 of the periodic table, and the like can be mentioned. As the metal of Group 4 of the periodic table, for example, titanium (Ti), zirconium (Zr), hafnium (Hf), and the like can be mentioned. As the metal of Group 5 of the periodic table, for example, vanadium (V), niobium (Nb), tantalum (Ta), and the like can be mentioned. As the metal of Group 6 of the periodic table, for example, chromium (Cr), molybdenum (Mo), and tungsten (W), and the like can be mentioned. As the metal of Group 7 of the periodic table, for example, manganese (Mn), technetium (Tc), rhenium (Re), and the like can be mentioned. As the metal of Group 8 of the periodic table, for example, iron (Fe), ruthenium (Ru), osmium (Os), and the like can be mentioned. As the metal of Group 9 of the periodic table, for example, cobalt (Co), rhodium (Rh), iridium (Ir), and the like can be mentioned. As the metal of Group 10 of the periodic table, for example, nickel (Ni), palladium (Pd), platinum (Pt), and the like can be mentioned. In the present application, preferably, the electrode layer includes at least one metal selected from Group 4, Group 6, and Group 9 of the periodic table, more preferably, at least one metal selected from Group 6 and Group 9 of the periodic table, and most preferably, Mo and / or Co. The layer thickness of the electrode layer is not particularly limited, and is preferably 0.1 nm to 10 μm, more preferably 5 nm to 500 nm, and most preferably 10 nm to 200 nm. In addition, in the present application, the electrode layer is preferably composed of two or more layers having different compositions. By providing the electrode layer with such a preferred structure, not only a semiconductor element having more excellent Schottky characteristics can be obtained, but also a leakage current suppression effect can be more favorably exhibited.

[0087] When the electrode layer is composed of two or more layers including a first electrode layer and a second electrode layer, the second electrode layer preferably has conductivity and a higher conductivity than the first electrode layer. The material constituting the second electrode layer can be a conductive inorganic material or a conductive organic material. In the present application, the second electrode material is preferably a metal. As the metal, for example, at least one metal selected from Groups 8 to 13 of the periodic table can be mentioned. As the metal of Groups 8 to 10 of the periodic table, the metals exemplified as the metal of Groups 8 to 10 of the periodic table in the description of the electrode layer, respectively, can be mentioned. As the metal of Group 11 of the periodic table, for example, copper (Cu), silver (Ag), gold (Au), and the like can be mentioned. As the metal of Group 12 of the periodic table, for example, zinc (Zn), cadmium (Cd), and the like can be mentioned. Further, as the metal of Group 13 of the periodic table, for example, aluminum (Al), gallium (Ga), indium (In), and the like can be mentioned. In the present application, the second electrode layer preferably includes at least one metal selected from the metals of Groups 11 and 13 of the periodic table, and more preferably includes at least one metal selected from silver, copper, gold, and aluminum. Further, the layer thickness of the second electrode layer is not particularly limited, and is preferably 1 nm to 500 μm, more preferably 10 nm to 100 μm, and most preferably 0.5 μm to 10 μm. Further, in the present application, the film thickness of the insulator film under the outer end portion of the electrode layer is thicker than the film thickness of the insulator film at a distance of 1 μm from the opening portion, and the withstand voltage characteristics of the semiconductor element can be made more excellent, and thus this is preferable.

[0088] Further, in the present application, preferably, the Schottky electrode includes at least a first metal layer, a second metal layer, and a third metal layer, the first metal layer, the second metal layer, and the third metal layer are each composed of a different metal, the second metal layer is disposed between the first metal layer and the third metal layer, and the first metal layer is closer to the semiconductor layer side than the third metal layer. Further, in the case where the Schottky electrode includes a first metal layer, a second metal layer, and a third metal layer, preferably, the first metal layer is a metal layer including a metal of Group 6 of the periodic table or a metal layer including a metal of Group 9, the second metal layer is a metal layer including a metal of Group 4 of the periodic table, and the third metal layer is a metal layer including a metal of Group 13 of the periodic table, and more preferably, the first metal layer is a Co layer or a Mo layer, the second metal layer is a Ti layer, and the third metal layer is an Al layer.

[0089] The method for forming the electrode layer is not particularly limited, and can be a publicly known method. As the method for forming the electrode layer, specifically, for example, a dry method, a wet method, or the like can be mentioned. As the dry method, for example, sputtering, vacuum evaporation, CVD, or the like can be mentioned. As the wet method, for example, screen printing, die coating, or the like can be mentioned.

[0090] In addition, in one embodiment of the present application, it is preferable that the Schottky electrode have a structure in which the film thickness decreases toward the outside of the semiconductor element. In that case, the Schottky electrode can have a tapered region on the side surface, the Schottky electrode can be formed of two or more layers including a first electrode layer and a second electrode layer, and the outer end portion of the first electrode layer can be closer to the outside than the outer end portion of the second electrode layer. In one embodiment of the present application, in the case where the Schottky electrode has a tapered region, the taper angle of such a tapered region is not particularly limited as long as it does not hinder the object of the present application, and is preferably 80° or less, more preferably 60° or less, and most preferably 40° or less. The lower limit of the taper angle is not particularly limited, and is preferably 0.2°, more preferably 1°. In addition, in one embodiment of the present application, in the case where the outer end portion of the first electrode layer of the Schottky electrode is closer to the outside than the outer end portion of the second electrode layer, the distance between the outer end portion of the first electrode layer and the outer end portion of the second electrode layer is preferably 1 μm or more, which can suppress a leakage current. In addition, in one embodiment of the present application, in the first electrode layer of the Schottky electrode, at least a part of a portion (hereinafter also referred to as "protruding portion") which protrudes outward from the outer end portion of the second electrode layer has a structure in which the film thickness decreases toward the outside of the semiconductor element, which can make the withstand voltage of the semiconductor element more excellent, and is thus preferable. Furthermore, by combining such a preferable electrode structure with the above-described preferable material of the semiconductor layer, a semiconductor element which has a leakage current suppressed more and has lower loss can be obtained.

[0091] The semiconductor element preferably includes an oxide semiconductor layer and a dielectric film which covers at least a side surface of the oxide semiconductor layer. By being thus formed, it is possible to suppress a semiconductor property of the oxide semiconductor film from being hindered by oxygen or the like from moisture absorption and the atmosphere. Furthermore, in one embodiment of the present application, by making the side surface of the semiconductor layer tapered, not only is the adhesion to the dielectric film or the like improved, but also stress relaxation is more favorably performed, and reliability or the like can be further improved.

[0092] The dielectric film is formed on the semiconductor layer, generally has an opening portion, but the specific dielectric constant or the like is not particularly limited, and can be a known dielectric film. In one embodiment of the present application, it is preferable that the dielectric film be formed from the opening portion by at least 1 μm or more, and that the specific dielectric constant be 5 or less. The "specific dielectric constant" refers to the ratio of the dielectric constant of the film to the dielectric constant of vacuum. In the present application, the dielectric film is preferably a film including Si. As the film including Si described above, a silicon oxide-based film can be given as a preferable example. As the silicon oxide-based film, for example, a SiO2 film, a phosphorus-added SiO2 (PSG) film, a boron-added SiO2 film, a phosphorus-boron-added SiO2 film (BPSG film), a SiOC film, a SiOF film, or the like can be given. As the method of forming the dielectric film, although not particularly limited, for example, a CVD method, an atmospheric pressure CVD method, a plasma CVD method, an atomizing CVD method, a thermal oxidation method, or the like can be given. In the present application, the method of forming the dielectric film is preferably an atomizing CVD method or an atmospheric pressure CVD method.

[0093] Further, preferably, the semiconductor device in one embodiment of the present application is further provided with a porous layer in contact with the third metal layer of the ohmic electrode. The porous layer is not particularly limited, but preferably has conductivity, and more preferably includes a noble metal. In one embodiment of the present application, preferably, the porosity of the porous layer is 10 % or lower. By being provided with such a preferred porosity, concentration of warping and thermal stress and the like can be relaxed without impairing the semiconductor characteristics. Further, the method of setting the porosity of the porous layer to 10 % is not particularly limited, and can be a publicly known method, and by appropriately setting the sintering conditions such as sintering time, pressure, sintering temperature, and the like, the porosity of the porous layer can be easily set to 10 %, and for example, a method of adjusting the porosity to 10 % or lower by pressure bonding under heating (hot pressing) and the like can be given, and more specifically, for example, a method of sintering for a longer time than usual under a certain pressure at the time of sintering can be given. By using such a porous layer having a porosity of 10 % or lower for a semiconductor device, concentration of warping and thermal stress and the like can be further relaxed without impairing the semiconductor characteristics. Further, here, the "porosity" refers to the proportion of the volume of the space generated by the voids to the volume of the porous layer (the volume including the voids). The porosity of the porous layer can be calculated, for example, based on a cross-sectional photograph taken using a scanning electron microscope (SEM: Scanning Electron Microscope). Specifically, a cross-sectional photograph (SEM image) of the porous layer is taken at a plurality of positions. Next, using a commercially available image analysis software, binarization of the taken SEM image is performed, and the proportion of the portion (e.g., black portion) corresponding to the pores (voids) in the SEM image is calculated. The proportions of the black portions calculated from the SEM images taken at the plurality of positions are averaged, and used as the porosity of the porous layer. Further, the "porous layer" includes not only a porous film which is a continuous film-like structure, but also a porous agglomerate.

[0094] Further, preferably, the semiconductor device of the present application is further provided with a substrate on the porous layer. Further, the substrate can be directly stacked on the porous layer, or the substrate can be stacked on the porous layer via one or a plurality of other layers such as a metal layer (e.g., a metal of the above-described example) and the like.

[0095] In one embodiment of the present application, the semiconductor device is not particularly limited in the direction of current flow and the like, and preferably, a Schottky electrode is provided on the first surface side of the oxide semiconductor film, and an ohmic electrode is provided on the second surface side which is on the opposite side of the first surface side, and more preferably, it is a vertical device.

[0096]

EXAMPLE

[0097] Next, preferred embodiments of the present application will be described in more detail using the drawings, but the present application is not limited to these embodiments.

[0098] Figure 1 A main part of a semiconductor element, a Schottky barrier diode (SBD), is shown as one of the preferred embodiments of the present application. Figure 1 The SBD of the present application has: an ohmic electrode 102, a semiconductor layer 101, a Schottky electrode 103, a dielectric film 104. The ohmic electrode 102 includes a metal oxide layer (crystal) 102a, a metal layer 102b, a metal layer 102c. The semiconductor layer 101 includes a first semiconductor layer 101a, a second semiconductor layer 101b. The Schottky electrode 103 includes a metal layer 103a, a metal layer 103b, a metal layer 103c. The first semiconductor layer 101a is, for example, an n-type semiconductor layer, and the second semiconductor layer 101b is, for example, an n+ type semiconductor layer 101b. In addition, the dielectric film 104 (hereinafter also referred to as "insulator film") has an opening portion that covers the side surface of the semiconductor layer 101 (the side surface of the first semiconductor layer 101a and the side surface of the second semiconductor layer 101b) and is located on the upper surface of the semiconductor layer 101 (the first semiconductor layer 101a), and the opening portion is provided between a part of the first semiconductor layer 101a and the metal layer 103c of the Schottky electrode 103. The dielectric film 104 can also be provided so as to cover the side surface of the semiconductor layer 101 and cover a part of the upper surface of the semiconductor layer 101 (the first semiconductor layer 101a). Figure 1 The semiconductor element of the present application improves the crystal defects at the end portion by the dielectric film 104, forms a depletion layer better, and the electric field relaxation is further good, and in addition, the leakage current can be suppressed better. Figure 18 A preferred example of an SBD provided with a porous layer 108 and a substrate 109 is shown.

[0099] Figure 6 A main part of a semiconductor element, a Schottky barrier diode (SBD), is shown as one of the preferred embodiments of the present application. Figure 6 The SBD of the present application differs from the SBD of the present application in that the side surface of the Schottky electrode 103 has a tapered region. Figure 1 The semiconductor element of the present application can suppress the leakage current better because the outer end portion of the metal layer 103b and / or the metal layer 103c as the first metal layer is closer to the outside than the outer end portion of the metal layer 103a as the second metal layer. In addition, further, in the metal layer 103b and / or the metal layer 103c, the portion that protrudes outward more than the outer end portion of the metal layer 103a has a tapered region in which the film thickness decreases toward the outside of the semiconductor element, and thus a structure in which the withstand voltage is more excellent is obtained. Figure 6 As the constituent material of the metal layer 103a, for example, a metal of the above-described example or the like can be given. In addition, as the constituent material of the metal layer 103b and the metal layer 103c, for example, a metal of the above-described example or the like can be given.

[0100] Figure 1 ​The method for forming each layer is not particularly limited as long as it does not hinder the purpose of the present invention, and can be a known method. For example, methods such as forming a film by vacuum evaporation, CVD, sputtering, various coating techniques and then patterning it by photolithography, or directly patterning it using printing technology, etc., can be cited.

[0101] Below, on Figure 18 The preferred manufacturing process of the SBD will be described, but the present invention is not limited to these preferred manufacturing methods. Figure 2 (a) shows a stack of a first semiconductor layer 101a and a second semiconductor layer 101b deposited on a crystal growth substrate (sapphire substrate) 110 via a stress relaxation layer, using the aforementioned atomization CVD method. On the second semiconductor layer 101b, a metal oxide layer (crystal) 102a, a metal layer 102b, and a metal layer 102c are formed as ohmic electrodes using either the dry or wet method, resulting in... Figure 2 The stacked structure of (b). The first semiconductor layer 101a is, for example, an n-type semiconductor layer, and the second semiconductor layer 101b is, for example, an n+ type semiconductor layer 101b. Additionally, for Figure 2 The laminate of (b) is obtained by laminating a substrate 109 with a porous layer 108 made of noble metal to form laminate (c). Moreover, as Figure 3 As shown, the crystal growth substrate 110 and stress relaxation layer 111 of the laminate (c) are peeled off using a known peeling method to obtain the laminate (d). Furthermore, as... Figure 4 As shown, after etching the semiconductor layer of the laminate (d) to form a tapered side to obtain laminate (e), an insulating film 104 is laminated on the tapered side and the upper surface excluding the opening of the semiconductor layer to obtain laminate (f). Next, as... Figure 5 As shown, metal layers 103a, 103b, and 103c are formed at the opening portion on the upper surface of the semiconductor layer of the laminate (f) using either the dry or wet method as Schottky electrodes, resulting in the laminate (g). As described above, the obtained semiconductor device exhibits excellent ohmic characteristics, and the crystal defects at the ends are improved, the depletion layer is formed better, the electric field mitigation is further improved, and leakage current is better suppressed.

[0102] Furthermore, as an embodiment, a trial was conducted based on the above steps. Figure 18 The semiconductor device shown is illustrated below. The structure of Example 1 is shown below. α-(Ti) is used as the metal oxide layer (crystal) 102a. X Ga 1-X)2O3 film (where 0 < X < 1), Ti is used as the metal layer 102b, and Ni is used as the metal layer 102c. In addition, in this Example 1, an undoped α-Ga2O3 layer is used as the stress relaxation layer 111, an n-type semiconductor layer composed of tin-doped α-Ga2O3 is used as the first semiconductor layer 101a, an n+-type semiconductor layer composed of tin-doped α-Ga2O3 is used as the second semiconductor layer 101b, Al is used as the metal layer 103a, Ti is used as the metal layer 103b, Co is used as the metal layer 103c, SiO2 is used as the insulator film 104, a porous layer composed of Ag is used as the porous layer 108, and a conductive substrate containing Cu and Mo is used as the substrate 109. Figure 8 The appearance photograph of the semiconductor element of the trial-produced Example 1 is shown. In addition, Figure 9 shows Figure 8 the observation result of the cross-sectional TEM of the analysis part of Figure 10 and shows the analysis result of TEM-EDS. From Figure 9 and Figure 10 it is clearly known that a crystal film of α-(Ti X Ga 1-X )2O3 (where 0.5 < X < 1) is well formed. In addition, the I-V characteristics of the semiconductor element of this Example 1 were evaluated. Figure 7 The result is shown. As Figure 7 shown, it is known that it has good semiconductor characteristics.

[0103] As Example 2, except that the thickness of the metal oxide layer (crystal) 102a is set to a thickness of 10 nm or more, which is thicker than that of Example 1, a semiconductor element was trial-produced in the same manner as Example 1. Figure 8 The appearance photograph of the semiconductor element of the trial-produced Example 2 is shown. In addition, Figure 9 shows Figure 8 the observation result of the cross-sectional TEM of the analysis part of Figure 11 and shows the analysis result of TEM-EDS. From Figure 9 and Figure 11 it is clearly known that a crystal film of α-(Ti X Ga 1-X )2O3 (where 0.5 < X < 1) is well formed. In addition, the I-V characteristics of the semiconductor element of this Example 2 were evaluated. Figure 7 The result is shown. As Figure 7 shown, it is known that since the metal oxide layer (crystal) 102a has a sufficient thickness, it has more excellent semiconductor characteristics than Example 1.

[0104] Further, the semiconductor element is preferably a longitudinal device, and is particularly useful for a power device. As the semiconductor element, for example, a diode (e.g., PN diode, Schottky barrier diode, junction barrier Schottky diode, etc.) or a transistor (e.g., MOSFET, MESFET, etc.) can be cited, with a diode being preferred, and a Schottky barrier diode (SBD) being more preferred.

[0105] The semiconductor element of the present application, in addition to the above, is further joined to a lead frame, a circuit substrate, or a heat dissipation substrate, etc. by a joining member based on a general method and is suitable for use as a semiconductor device, and particularly preferably as a power module, an inverter, or a converter, and further, for example, is preferably used in a semiconductor system using a power supply device, etc. Figure 15 A preferred example of the semiconductor device is shown. Figure 15 In the semiconductor device, both surfaces of the semiconductor element 500 are joined to a lead frame, a circuit substrate, or a heat dissipation substrate 502 by solder 501. By so configuring, a semiconductor device having excellent heat dissipation properties can be provided. Further, in the present application, it is preferred that the periphery of the joining member such as solder be sealed with a resin.

[0106] Further, the power supply device is connected to a wiring pattern, etc. by using a known method, and thus can be made from the semiconductor device or as the semiconductor device. Figure 12 A power supply system 170 is configured using a plurality of the power supply devices 171, 172 and a control circuit 173. As shown in Figure 13 The power supply system can be combined with an electronic circuit 181 and a power supply system 182 for a system device 180. Further, Figure 14 An example of a power supply circuit diagram of a power supply device is shown. Figure 14 A power supply circuit of a power supply device configured by a power circuit and a control circuit is shown, in which a DC voltage is converted to AC at high frequency by an inverter 192 (configured by MOSFET A-D), insulation and transformation are performed by a transformer 193, rectification is performed by rectification MOSFETs 194 (A-B'), smoothing is performed by a DCCL 195 (smoothing coils LI, L2) and a capacitor, and a DC voltage is output. At this time, the output voltage is compared with a reference voltage by a voltage comparator 197, and the inverter 192 and the rectification MOSFETs 194 are controlled by a PWM control circuit 196 so as to become a desired output voltage.

[0107] In one embodiment of the present application, the semiconductor device is preferably a power card, includes a cooler and an insulating member, more preferably the cooler is provided on both sides of the semiconductor layer via at least the insulating member, and most preferably a heat dissipation layer is provided on both sides of the semiconductor layer, and the cooler is provided on the outside of the heat dissipation layer via at least the insulating member. Figure 16A power card is shown as one of the preferred embodiments of the present application. Figure 16 The power card is a double-sided cooling type power card 201, provided with: a coolant pipe 202, a gasket 203, an insulating plate (insulating gasket) 208, a sealing resin portion 209, a semiconductor chip 301a including a semiconductor element, a metal heat transfer plate (protruding terminal portion) 302b, a heat sink and an electrode 303, a metal heat transfer plate (protruding terminal portion) 303b, a solder layer 304, a control electrode terminal 305, a bonding wire 308. The thickness direction cross section of the coolant pipe 202 has a plurality of flow paths 222, which are divided by a plurality of partition walls 221 that are spaced apart from each other by a predetermined interval and extend in the flow path direction. According to this preferred power card, a stronger heat dissipation performance can be achieved, and a higher reliability can be satisfied.

[0108] The semiconductor chip 301a is joined to the inner side main surface of the metal heat transfer plate 302b by the solder layer 304, and on the remaining main surface of the semiconductor chip 301a, the metal heat transfer plate (protruding terminal portion) 302b is joined by the solder layer 304, whereby the anode electrode surface and the cathode electrode surface of the flywheel diode are connected in a so-called reverse parallel connection with the collector electrode surface and the emitter electrode surface of the IGBT. As the material of the metal heat transfer plates (protruding terminal portions) 302b and 303b, for example, Mo or W can be mentioned. The metal heat transfer plates (protruding terminal portions) 302b and 303b have a thickness difference that absorbs the thickness difference of the semiconductor chip 301a, and thus the outer surfaces of the metal heat transfer plates 302b and 303b are flat.

[0109] The resin sealing portion 209, for example, is composed of an epoxy resin, is molded covering the side surfaces of these metal heat transfer plates 302b and 303b, and the semiconductor chip 301a is molded by the resin sealing portion 209. However, the outer main surfaces of the metal heat transfer plates 302b and 303b, i.e., the heat receiving surfaces, are completely exposed. The metal heat transfer plates (protruding terminal portions) 302b and 303b protrude from the resin sealing portion 209 to the left and right, and the control electrode terminal 305, which is a so-called lead frame terminal, is connected to, for example, the gate (control) electrode surface of the semiconductor chip 301a on which the IGBT is formed and the control electrode terminal 305. Figure 16

[0110] The insulating plate 208, which is an insulating gasket, is composed of, for example, an aluminum nitride film, but can be other insulating films. The insulating plate 208 completely covers the metal heat transfer plates 302b and 303b and is attached together, but the insulating plate 208 can only be in contact with the metal heat transfer plates 302b and 303b, can be coated with a good heat transfer material such as silicone grease, or can be joined by various methods. In addition, the insulating layer can be formed by ceramic sintering or the like, the insulating plate 208 can be joined to the metal heat transfer plates, or can be joined or formed on the coolant pipe.

[0111] ​The refrigerant tube 202 is manufactured by cutting a sheet material formed by drawing or extrusion forming of an aluminum alloy to a desired length. The thickness direction cross section of the refrigerant tube 202 has a plurality of flow paths 222 divided by a plurality of partition walls 221 spaced apart by a predetermined interval and extending in the flow path direction. The gasket 203 can be a soft metal plate such as a solder alloy, but can also be a film formed on the contact surfaces of the metal heat transfer plates 302b and 303b by coating or the like. The surface of this soft gasket 203 is easily deformed, and is adapted to the slight unevenness or warping of the insulating plate 208, the slight unevenness or warping of the refrigerant tube 202, and the like, thereby reducing thermal resistance. In addition, a publicly known lubricating oil or the like having good thermal conductivity can be applied to the surface of the gasket 203 or the like, and the gasket 203 can also be omitted.

[0112] The crystal and semiconductor element of the present application can be used in all fields of semiconductors (e.g., compound semiconductor electronic devices and the like), electronic / electrical machine components, optical / electrophotographic-related devices, industrial components, and the like, and is particularly useful for power devices.

[0113] Explanation of Reference Signs

[0114] 101 semiconductor layer

[0115] 101a first semiconductor layer

[0116] 101b second semiconductor layer

[0117] 102 ohmic electrode

[0118] 102a metal oxide layer (crystal)

[0119] 102b metal layer

[0120] 102c metal layer

[0121] 103 schottky electrode

[0122] 103a metal layer

[0123] 103b metal layer

[0124] 103c metal layer

[0125] 104 insulator layer

[0126] 108 porous layer

[0127] 109 substrate

[0128] 110 substrate for crystal growth

[0129] 170 power supply system

[0130] 171 power supply device

[0131] 172 power supply device

[0132] 173 control circuit

[0133] 180 system device

[0134] 181 electronic circuit

[0135] 182 power supply system

[0136] 192 inverter

[0137] 193 transformer

[0138] 194 rectifying MOSFET

[0139] 195 DCL

[0140] 196 PWM control circuit

[0141] 197 voltage comparator

[0142] 201 double-sided cooling type power card

[0143] 202 refrigerant pipe

[0144] 203 gasket

[0145] 208 insulating plate (insulating gasket)

[0146] 209 sealing resin portion

[0147] 221 partition wall

[0148] 222 flow path

[0149] 301a semiconductor chip

[0150] 302b metal heat transfer plate (protruding terminal portion)

[0151] 303 heat dissipation fin and electrode

[0152] 303b metal heat transfer plate (protruding terminal portion)

[0153] 304 solder layer

[0154] 305 control electrode terminal

[0155] 308 bonding wire

[0156] 500 semiconductor element

[0157] 501 solder

[0158] 502 lead frame, circuit substrate, or heat dissipation substrate

Claims

1. A stacked structure comprising a semiconductor layer, a crystalline film on the semiconductor layer, and a metal layer on the crystalline film, characterized in that, The semiconductor layer includes a crystalline oxide semiconductor having a corundum structure as a main component, the crystalline oxide semiconductor contains gallium or / and indium, and the crystal film has a composition of α-(Ti X Ga 1-X )2O3, where 0.5 < X < 1, and the metal layer includes a Group 4 metal of the periodic table as a main component.

2. The laminated structure according to claim 1, wherein, The metals in Group 4 of the periodic table include at least one metal selected from titanium, zirconium, and hafnium.

3. The laminated structure according to claim 1 or 2, wherein, The metal in Group 4 of the periodic table is titanium.

4. The laminated structure according to claim 1 or 2, wherein, The crystalline oxide semiconductor contains gallium.

5. The laminated structure according to claim 1 or 2, wherein, It is electrically conductive.

6. A semiconductor element, wherein, The laminated structure includes any one of claims 1 to 5.

7. The semiconductor device according to claim 6, wherein, It has an electrode comprising the crystal film and the metal layer.

8. The semiconductor element according to claim 6 or 7, wherein it is a vertical device.

9. The semiconductor element according to claim 6 or 7, wherein it is a power device.

10. A semiconductor device comprising at least a semiconductor element joined to a lead frame, a circuit board, or a heat sink via a bonding member, wherein, The semiconductor element is the semiconductor element according to any one of claims 6 to 9.

11. The semiconductor device according to claim 10, wherein, It can be a power module, inverter, or converter.

12. The semiconductor device according to claim 10 or 11, wherein, It is a power card.

13. A semiconductor system comprising semiconductor elements or semiconductor devices, characterized in that, The semiconductor element is the semiconductor element according to any one of claims 6 to 9, and the semiconductor device is the semiconductor device according to any one of claims 10 to 12.

Images