Semiconductor device package

Abstract

The present disclosure provides a semiconductor device package. The semiconductor device package includes a first surface and a second surface opposite the first surface. The semiconductor device package further includes a first support structure disposed on the first surface of the substrate and a second support structure disposed on the first surface of the substrate. The first support structure has a first surface spaced apart from the first surface of the substrate by a first distance. The second support structure has a first surface spaced apart from the first surface of the substrate by a second distance. The second distance is different from the first distance. The semiconductor device package further includes a first antenna disposed above the first surface of the substrate. The first antenna is supported by the first surface of the first support structure and the first surface of the second support structure.

Description

Technical Field

[0001] The present disclosure generally relates to a semiconductor device package and to a semiconductor device package including an antenna. Background Art

[0002] A wireless communication device, such as a mobile phone, may include a semiconductor device package having an antenna (e.g., an antenna on package (AoP)) for signal (e.g., radio frequency (RF) signal) transmission. Patch antennas are more commonly used than other antennas due to their directivity, ease of manufacturing, and small size and light weight. As the operating frequency increases (e.g., equal to or greater than 5 GHz), the signal attenuation or signal loss of the RF signal may deteriorate. Summary of the Invention

[0003] In one or more embodiments, a semiconductor device package includes a substrate having a first surface and a second surface opposite the first surface. The semiconductor device package further includes a first support structure disposed on the first surface of the substrate and a second support structure disposed on the first surface of the substrate. The first support structure has a first surface spaced apart from the first surface of the substrate by a first distance. The second support structure has a first surface spaced apart from the first surface of the substrate by a second distance. The second distance is different from the first distance. The semiconductor device package further includes a first antenna disposed above the first surface of the substrate. The first antenna is supported by the first surface of the first support structure and the first surface of the second support structure.

[0004] In one or more embodiments, a semiconductor device package includes a substrate having a first surface and a second surface opposite the first surface. The semiconductor device package further includes an antenna disposed above the first surface of the substrate. An extension line of the antenna and an extension line of the first surface of the substrate define an acute angle. The semiconductor device package further includes a ground element disposed between the antenna and the substrate. The ground element is parallel to the antenna.

[0005] In one or more embodiments, a semiconductor device package includes a substrate having a first surface and a second surface opposite the first surface. The semiconductor device package further includes a first support structure disposed on the first surface of the substrate. The first support structure has a first top surface parallel to the first surface of the substrate and a second top surface parallel to the first surface of the substrate. The distance between the first top surface of the first support structure and the first surface of the substrate is different from the distance between the second top surface of the first support structure and the first surface of the substrate. The semiconductor device package further includes a first antenna disposed on the first top surface of the first support structure. The semiconductor device package further includes a second antenna disposed on the second top surface of the first support structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Aspects of the present invention are readily understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that the various features may not be drawn to scale. The dimensions of the various components may be arbitrarily increased or decreased for clarity of discussion.

[0007] Figure 1 A cross-sectional view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0008] Figure 2 A cross-sectional view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0009] Figure 3 A cross-sectional view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0010] Figure 4 A cross-sectional view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0011] Figure 5 A cross-sectional view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0012] Figure 6 A cross-sectional view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0013] Figure 7 A cross-sectional view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0014] Figure 8 A cross-sectional view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0015] Common reference numerals are used throughout the drawings and the detailed description to indicate the same or like elements. The present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. Detailed Description

[0016] The following disclosure provides many different embodiments or examples for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to be limiting. In this disclosure, references in the following description to the formation of a first feature on or over a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features such that the first and second features may not be in direct contact. Additionally, the disclosure may repeat reference numerals and / or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and / or configurations discussed.

[0017] Embodiments of the present disclosure are discussed in detail below. However, it should be understood that the present invention provides many applicable concepts that may be implemented in a variety of specific contexts. The specific embodiments discussed are merely illustrative and do not limit the scope of the disclosure.

[0018] Figure 1 A cross-sectional view of a semiconductor device package 1 according to some embodiments of the present disclosure is shown. The semiconductor device package 1 includes a substrate 10, support structures 11, 12, 16, and 17 on the substrate 10, an antenna 13, an electronic component 14, and electrical contacts 15.

[0019] The substrate 10 has a surface 101 and a surface 102 opposite to the surface 101. The substrate 10 may be, for example, a printed circuit board, such as a paper-based copper foil laminate, a composite copper foil laminate, or a polymer-impregnated glass fiber-based copper foil laminate. The substrate 10 may include an interconnect structure, such as a redistribution layer (RDL).

[0020] The substrate 10 includes conductive layers 10a and 10b on the surface 101 and the surface 102, respectively. The conductive layer 10b is covered by a dielectric layer 10d disposed on the surface 102. In some embodiments, the conductive layer 10a is a ground layer.

[0021] The support structure 11 is disposed on the surface 101 of the substrate 10. The support structure 11 has a surface 112 facing the surface 101 of the substrate 10, a surface 111 facing away from the surface 101 of the substrate 10, and a surface (or sidewall) 113 extending between the surface 112 and the surface 111.

[0022] As Figure 1 shown, the surface 112 is in contact with the surface 101 of the substrate 10. In some embodiments, asFigure 5 As shown, the surface 112 may be in contact with a conductive layer 10a (or a ground layer) provided on the surface 101 of the substrate 10.

[0023] The surface 111 is spaced apart from the surface 101 of the substrate 10 by a distance D1.

[0024] The support structure 16 is provided on the surface 111 of the support structure 11. The support structure 16 has a surface 162 in contact with the surface 111, a surface 161 opposite to the surface 162, and a surface (or sidewall) 163 extending between the surface 162 and the surface 161.

[0025] The width 11w of the support structure 11 is greater than the width 16w of the support structure 16. In some embodiments, the width of the support structure (e.g., the widths 11w and 16w) may be measured along a direction substantially parallel to the surface 101 of the substrate 10.

[0026] The surface 163, the surface 111, and the surface 113 define a stepped structure.

[0027] In some embodiments, the interface between the support structures 11 and 16 may be observed.

[0028] Similar to the support structures 11 and 16, the support structure 12 is provided on the surface 101 of the substrate 10. The support structure 12 has a surface 122, a surface 121, and a surface (or sidewall) 123 extending between the surface 122 and the surface 121.

[0029] The surface 121 is spaced apart from the surface 101 of the substrate 10 by a distance D2. The surface 111 and the surface 121 may have different heights relative to the surface 101 of the substrate 10. For example, the distance D1 and the distance D2 are different. For example, as Figure 1 shown, the distance D1 is less than the distance D2. In some embodiments, the distance D1 may be greater than the distance D2.

[0030] The support structure 17 is provided on the surface 121 of the support structure 12. The support structure 17 has a surface 172, a surface 171 opposite to the surface 172, and a surface (or sidewall) 173 extending between the surface 172 and the surface 171.

[0031] The width 12w of the support structure 12 is greater than the width 17w of the support structure 17.

[0032] The surface 173, the surface 121, and the surface 123 define a stepped structure.

[0033] In some embodiments, each of the support structures 11, 12, 16, and 17 may comprise an insulating material. In some embodiments, each of the support structures 11, 12, 16, and 17 may comprise a photosensitive material, such as a photoimageable dielectric (PID).

[0034] As Figure 1 shown, the support structures 11, 12, 16, and 17 provide surfaces having different heights, elevations, or distances (e.g., Figure 1 the distances D1 and D2 shown therein) measured from the substrate 10, such that the antenna 13 supported by the foregoing surfaces can be positioned in an inclined or tilted manner relative to the substrate 10. In this way, multiple orientations of the antenna can be achieved to allow for more optimized and flexible RF coverage.

[0035] In some embodiments, each of the support structures 11, 12, 16, and 17 may comprise a dielectric material. For example, each of the support structures 11, 12, 16, and 17 may comprise a molding compound, a pre-impregnated composite fiber (e.g., prepreg), borophosphosilicate glass (BPSG), silicon oxide, silicon nitride, silicon oxynitride, undoped silicate glass (USG), any combination thereof, etc. Examples of molding compounds may include, but are not limited to, epoxy resins containing fillers dispersed therein. Examples of prepregs may include, but are not limited to, multi-layer structures formed by stacking or laminating multiple prepreg materials / sheets.

[0036] In some embodiments, each of the support structures 11, 12, 16, and 17 may comprise solder balls (e.g., Figure 3 shown), liquid crystal polymers, posts (e.g., copper posts), conductive resins, or combinations thereof.

[0037] The antenna 13 is disposed above the surface 101 of the substrate 10 and is supported by the support structures 11 and 12. The antenna 13 has a surface 131 facing away from the surface 101, a surface 132 facing the surface 101, and a side surface 133 extending between the surface 131 and the surface 132.

[0038] In some embodiments, the surfaces 131 and 132 of the antenna 13 are exposed. In some embodiments, the surfaces 131 and 132 of the antenna 13 are not covered. In some embodiments, the surfaces 131 and 132 of the antenna 13 are exposed to air. In some embodiments, the surfaces 131 and 132 of the antenna 13 are in direct contact with air. In some embodiments, the semiconductor device package 1 is disposed in a vacuum space or a vacuum chamber, and thus the surfaces 131 and 132 of the antenna 13 are exposed to vacuum.

[0039] The experimental results show that the peak gain of an antenna with a surface exposed to air (or vacuum, dissipation constant (Dk) of about 1) is about 1.3 to 2.3 times that of another antenna with a surface covered by a dielectric material with a Dk of about 4.

[0040] Antenna 13 is not parallel to the surface 101 of substrate 10. For example, the surface 131 of antenna 13 and the surface 111 of support structure 11 define an acute angle. For example, the extension lines of the surface 131 of antenna 13 and the surface 101 of substrate 10 define an acute angle. For example, the normal vectors of the surface 131 of antenna 13 and the surface 101 of substrate 10 define an acute angle.

[0041] In some embodiments, the side surface 133 of antenna 13 may be spaced apart from the surface 163 of support structure 16. In some embodiments, an adhesive layer (not shown in the figure) may be provided between the side surface 133 of antenna 13 and the support structure. For example, an adhesive layer may be provided between the side surface 133 of antenna 13 and the surface 163 of support structure 16. For example, an adhesive layer may be provided between the side surface 133 of antenna 13 and the surface 111 of support structure 11.

[0042] In some embodiments, the adhesive layer may include a gel-type adhesive layer, a film-type adhesive layer, or other suitable types of adhesive layers, or a combination thereof. In some embodiments, the adhesive layer may include a thermosetting resin, a thermoplastic resin, a polyester resin, a polyether resin, an epoxy resin, a polyolefin composition, or other suitable materials, or a combination thereof.

[0043] In some embodiments, antenna 13 may include a conductive material such as a metal or a metal alloy. Examples of the conductive material include gold (Au), silver (Ag), aluminum (Al), copper (Cu), or an alloy thereof. In some embodiments, antenna 13 may include a patch antenna. In some embodiments, antenna 13 may include an antenna pattern 13a and a protective layer 13b surrounding the antenna pattern 13a. For example, the side surface of antenna pattern 13a may be covered by or in contact with protective layer 13b. Antenna pattern 13a may be embedded within protective layer 13b, where neither surface of antenna pattern 13a is covered by protective layer 13b.

[0044] Antenna 13 is electrically connected to substrate 10 (e.g., the interconnect structure of substrate 10) through, for example, but not limited to, conductive elements 10c and 10s. In some embodiments, conductive element 10c can be used as a feeding element to provide signals to antenna 13. In some embodiments, conductive element 10c can include, but not be limited to, metal pillars, bonding wires, or stacked vias. In some embodiments, conductive element 10c can include Au, Ag, Al, Cu, or their alloys. In some embodiments, connecting element 10s can include, but not be limited to, solder balls or any other suitable electrical connection structure.

[0045] Electronic component 14 is disposed on surface 102 of substrate 10. Electronic component 14 can be a chip or die that includes a semiconductor substrate, one or more integrated circuit devices, and one or more overlying interconnect structures therein. The integrated circuit devices can include active devices such as, for example, transistors, and / or passive devices such as, for example, resistors, capacitors, inductors, or combinations thereof.

[0046] Electrical contacts 15 (e.g., solder balls) are disposed on conductive layer 10b and can provide electrical connections between semiconductor package device 1 and external components (e.g., an external circuit or circuit board). In some embodiments, electrical contacts 15 include controlled collapse chip connection (C4) bumps, ball grid arrays (BGAs), or land grid arrays (LGAs).

[0047] Figure 2 A cross-sectional view of semiconductor device package 2 according to some embodiments of the present disclosure is shown. Figure 2 of semiconductor device package 2 is similar to Figure 1 of semiconductor device package 1, and the differences between them are described below.

[0048] Semiconductor device package 2 further includes support structures 18 and 19, and another antenna 20 disposed above antenna 13.

[0049] Support structure 18 is disposed on support structure 16. The width 18w of support structure 18 is less than the width 16w of support structure 16. The surface 183 of support structure 18, the surface 161 of support structure 16, and surface 163 define a stepped structure.

[0050] Similar to support structure 18, support structure 19 is disposed on support structure 17, and the width 19w is less than the width 17w of support structure 17.

[0051] Surfaces 161 and 171 can have different elevations relative to surface 101 of substrate 10. For example, the distance between surface 161 and surface 101 is different from the distance between surface 171 and surface 101. For example, as Figure 2As shown, the distance between surface 171 and surface 101 is greater than the distance between surface 161 and surface 101.

[0052] Antenna 20 is disposed above antenna 13 and supported by support structures 16 and 17. In some embodiments, antenna 20 is parallel to antenna 13.

[0053] In some embodiments, the antenna pattern of antenna 20 may be aligned with the antenna pattern of antenna 13. For example, the antenna pattern of antenna 20 may be aligned with the antenna pattern of antenna 13 in a direction perpendicular to the surface of antenna 13 (e.g., Figure 1 surface 131 in

[0054] In an embodiment, signals may be transmitted between antenna 13 and antenna 20 through coupling.

[0055] Although four support structures and six support structures are depicted in Figure 1 and Figure 2 respectively, the number of support structures is not limited thereto. In some embodiments, the number of support structures may be changed according to design requirements.

[0056] Figure 3 A cross-sectional view of semiconductor device package 3 according to some embodiments of the present disclosure is shown. Figure 3 The semiconductor device package 3 of Figure 1 is similar to the semiconductor device package 1 of

[0057] In Figure 3 the support structures 11, 12, 16, and 17 in Figure 1 are replaced by solder balls 30 and 31.

[0058] Solder balls 30 and 31 are disposed on surface 101. Solder balls 30 and 31 have different heights. For example, the distance between the highest point of solder ball 30 and surface 101 is different from the distance between the highest point of solder ball 31 and surface 101.

[0059] Figure 4 A cross-sectional view of semiconductor device package 4 according to some embodiments of the present disclosure is shown. Figure 4 The semiconductor device package 4 of Figure 2 is similar to the semiconductor device package 2 of

[0060] In Figure 4 the semiconductor device package 4 includes antenna 20 and a ground element 41, which is disposed above the surface 101 of the substrate 10 and supported by a support structure. The ground element 41 is spaced apart from the surface 101 of the substrate 10. In some embodiments, the ground element 41 is parallel to antenna 20.

[0061] The grounding element 41 includes a hole 41h. The conductive element 10c passes through the hole 41h of the grounding element 41 and is connected to the antenna 20.

[0062] The grounding element 41 is electrically connected to the substrate 10 (e.g., the interconnect structure of the substrate 10) through a conductive via 42 provided in the support structure 11.

[0063] Figure 5 A cross-sectional view of a semiconductor device package 5 according to some embodiments of the present disclosure is shown. Figure 5 The semiconductor device package 5 is similar to Figure 1 the semiconductor device package 1, and the differences between them are described below.

[0064] The semiconductor device package 5 includes support structures 51, 52, and 53. The support structure 51 is disposed on the conductive layer 10a and has a surface 511 spaced apart from the surface 101 of the substrate 10 by a distance D3.

[0065] The support structure 52 is disposed on the support structure 51 and has a surface 521 spaced apart from the surface 101 of the substrate 10 by a distance D4.

[0066] The antenna 13 and the antenna 54 are respectively supported by the surface 521 and the surface 511. The antenna 13 and the antenna 54 can be placed at different angles with respect to the substrate 10. For example, the antenna 13 may not be parallel to the antenna 54.

[0067] Figure 6 A cross-sectional view of a semiconductor device package 6 according to some embodiments of the present disclosure is shown. Figure 6 The semiconductor device package 6 is similar to Figure 5 the semiconductor device package 5, and the differences between them are described below.

[0068] The semiconductor device package 6 further includes an antenna 55, which is disposed above the antenna 13 and supported by the support structures 16 and 53. In some embodiments, the antenna 55 may be parallel to the antenna 13.

[0069] Figure 7 A cross-sectional view of a semiconductor device package 7 according to some embodiments of the present disclosure is shown. Figure 7 The semiconductor device package 7 is similar to Figure 1 the semiconductor device package 1, and the differences between them are described below.

[0070] The semiconductor device package 7 includes a plurality of antennas supported above the substrate 10 by support structures. Each antenna is placed at a different angle with respect to the substrate 10. As Figure 7As shown, the antennas are placed at different angles relative to the substrate 10, such that the antennas form a curved or recessed antenna array when viewed from a side view. In some embodiments, the recessed antenna array can help concentrate RF signals and enhance radiation intensity.

[0071] Figure 8 A cross-sectional view of a semiconductor device package 8 according to some embodiments of the present disclosure is shown. Figure 8 The semiconductor device package 8 is similar to Figure 7 the semiconductor device package 7, and the differences between them are described below.

[0072] The semiconductor device package 8 includes a plurality of antennas, which form a curved or protruding antenna array when viewed from the side. In some embodiments, the protruding antenna array can achieve better RF signal coverage.

[0073] For ease of description, spatial relative terms such as "under", "below", "lower", "above", "upper", "left", "right", etc. may be used herein to describe the relationship of one element or feature to another element or feature as shown in the figures. Except for the orientation depicted in the figures, the spatial relative terms are intended to cover different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein may thus be interpreted accordingly. It should be understood that when an element is referred to as "connected to" or "coupled to" another element, it may be directly connected or coupled to the other element, or intervening elements may be present.

[0074] As used herein, the terms "approximate", "substantially", "essentially" and "about" are used to describe and account for minor variations. When used in conjunction with an event or situation, the terms can refer to the instance in which the event or situation occurs precisely as well as instances in which the event or situation occurs extremely close to occurring. As used herein with respect to a given value or range, the term "about" generally means within ±10%, ±5%, ±1% or ±0.5% of the given value or range. Ranges may be expressed herein as from one endpoint to the other endpoint or between two endpoints. Unless otherwise specified, all ranges disclosed herein include the endpoints. The term "substantially coplanar" may refer to two surfaces positioned along the same plane within a few micrometers (μm), such as within 10 μm, 5 μm, 1 μm or 0.5 μm along the same plane. When referring to "substantially" the same numerical value or feature, the term may refer to a value within ±10%, ±5%, ±1% or ±0.5% of the average of the said value.

[0075] The foregoing outlines several embodiments of the present invention and features of the details thereof. The embodiments described in this disclosure can be readily used as a basis for designing or modifying other processes and for structures that perform the same or similar purposes and / or achieve the same or similar advantages as the embodiments introduced herein. Such equivalent constructs do not depart from the spirit and scope of the present invention, and various changes, substitutions, and variations can be made without departing from the spirit and scope of the present invention.

Claims

1. A semiconductor device package, comprising: A substrate having a first surface and a second surface opposite to the first surface; A first support structure disposed on the first surface of the substrate and having a first surface spaced apart from the first surface of the substrate by a first distance; A second support structure disposed on the first surface of the substrate and having a first surface spaced apart from the first surface of the substrate by a second distance, wherein the second distance is different from the first distance; And A first antenna disposed above the first surface of the substrate and supported by the first surface of the first support structure and the first surface of the second support structure, Wherein the first antenna has a first surface facing away from the substrate, a second surface opposite to the first surface of the first antenna, and a third surface extending between the first surface and the second surface of the first antenna, Wherein the first surface and the second surface of the first antenna are exposed to air, and Wherein the third surface of the first antenna and the first surface of the first support structure define an acute angle.

2. The semiconductor device package according to claim 1, further comprising: An adhesive layer between the third surface of the first antenna and the first support structure.

3. The semiconductor device package according to claim 1, further comprising A third support structure, which is disposed on the first support structure; And A third support structure disposed on the second support structure; Wherein the width of the third support structure is smaller than the width of the first support structure, and the width of the fourth support structure is smaller than the width of the second support structure.

4. The semiconductor device package according to claim 3, further comprising: A second antenna disposed on the third support structure and the fourth support structure, wherein the second antenna is parallel to the first antenna.

5. The semiconductor device package according to claim 4, wherein the first antenna has a first antenna pattern and the second antenna has a second antenna pattern, and wherein the first antenna pattern of the first antenna is aligned with the second antenna pattern of the second antenna in a direction perpendicular to the surface of the first antenna.

6. The semiconductor device package according to claim 1, wherein the first support structure and the second support structure include solder balls.

7. The semiconductor device package according to claim 1, further comprising: A fifth support structure disposed between the first support structure and the substrate; And A sixth support structure disposed between the second support structure and the substrate, Wherein the width of the fifth support structure is greater than the width of the first support structure, and the width of the sixth support structure is greater than the width of the second support structure.

8. The semiconductor device package according to claim 7, further comprising: A grounding element disposed on the fifth support structure and the sixth support structure, wherein the grounding element is parallel to the first antenna.

9. The semiconductor device package according to claim 8 further includes a conductive via hole, the conductive via hole being disposed within the fifth support structure and electrically connecting the grounding element to the substrate.

10. The semiconductor device package according to claim 8, wherein the grounding element includes a hole, and the semiconductor device package further includes a conductive element, the conductive element being disposed on the first surface of the substrate and passing through the hole of the grounding element to be electrically connected to the first antenna.

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