Capacitive touch sensing channel

By employing an accumulating first-order Σ-Δ converter and sinusoidal excitation in the capacitive touch sensing channel, the problems of insufficient high sensitivity and noise immunity of capacitive touch sensors are solved, achieving higher sensing resolution and signal-to-noise ratio.

CN113141184BActive Publication Date: 2026-02-10INFINEON TECHNOLOGIES AMERICAS CORP
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Patent Information

Application Number
CN202011582006.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-06-25
Filing Date
2020-12-28
Publication Date
2026-02-10
Estimated Expiration
2040-12-28

AI Technical Summary

Technical Problem

Existing capacitive touch sensors have shortcomings in terms of high sensitivity and noise immunity, especially in thick coverings, gloved operation, and noisy conditions, where it is difficult to achieve a high signal-to-noise ratio.

Method used

A capacitive touch sensing channel based on an accumulator-first-order Σ-Δ converter is adopted. By using sinusoidal excitation and coherent demodulation, combined with integration and accumulation techniques, the sensing resolution is improved and the noise immunity is enhanced.

Benefits of technology

It improves sensing resolution, enhances sensing performance in noisy environments, and achieves a higher signal-to-noise ratio and better noise immunity.

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Abstract

This application relates to capacitive touch sensing channels. Techniques are described for a capacitive touch sensing channel that includes a sigma-delta modulator-based capacitive sensing converter. A sigma-delta modulator includes a comparator, a first integrator coupled to receive an incoming signal from an input node and to provide a first output signal, a second integrator coupled in parallel with the first integrator to receive the incoming signal and to provide a second output signal, and switch circuitry. The switch circuitry is configured to selectively couple either the first integrator between the input node and the comparator to provide the first output signal to the comparator or the second integrator between the input node and the comparator to provide the second output signal to the comparator.
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Description

[0001] Related applications

[0002] This application claims the benefit of U.S. Provisional Application No. 62 / 961,893, filed January 16, 2020, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to a technology for capacitive touch sensing channels. Background Technology

[0004] Touch sensors can be used to detect the presence and location of objects within their sensitive area, or the proximity of objects within that area. For example, a touch sensing circuit system can detect the presence and location of a touch object that is near a touch sensor integrated with a display screen. Many different types of touch sensors exist. These types can include resistive touch sensors, surface acoustic wave (SAW) touch sensors, capacitive touch sensors, inductive touch sensors, and so on. Different touch sensors can detect different types of objects.

[0005] Most touch sensing applications require high sensitivity to support thick overlays on touch sensors, operation with gloves, or long-distance hover recognition under noisy conditions (such as those caused by nearby liquid crystal displays (LCDs), inductive load switching, radio emissions, etc.). Furthermore, the emission of touch sensors is finite, which limits the excitation energy required to achieve a sufficient signal-to-noise ratio (SNR). Attached Figure Description

[0006] The disclosure is illustrated by way of example and not limitation in the various figures of the accompanying drawings.

[0007] Figure 1 This is a functional diagram of a capacitive touch sensing channel based on an accumulating first-order Σ-Δ (accumulated increment, Sigma-Delta) converter according to one embodiment.

[0008] Figures 2A to 2B This is a waveform diagram of an accumulating first-order Σ-Δ converter according to one implementation method.

[0009] Figure 3 It is a waveform diagram of the noise transfer function according to one implementation method.

[0010] Figures 4A to 4C This is a block diagram of an accumulating first-order Σ-Δ converter according to one implementation method.

[0011] Figure 4D This is a schematic diagram of a current-to-current converter according to one embodiment.

[0012] Figure 4E This is a schematic diagram of a current-to-current converter with a low-pass filter according to one embodiment.

[0013] Figure 5 It is a touch system having an electrode array and multiple capacitive touch sensing receiving channels according to one embodiment.

[0014] Figure 6 It is a touch system according to one embodiment, having an electrode array, multiple capacitive touch sensing channels, and a processing device.

[0015] Figure 7 This is a method for operating an accumulating first-order Σ-Δ converter according to one embodiment. Detailed Implementation

[0016] The following description sets forth numerous specific details, such as examples of specific systems, components, methods, etc., to provide a good understanding of various implementations of the techniques described herein for a capacitive touch sensing channel, including a Σ-Δ modulator-based capacitive sensing transducer whose structure is modified to obtain the accumulation characteristics of the sensing results, thereby providing a sensing resolution proportional to the integration duration. As described above, most touch sensing applications require high sensitivity. As described herein, implementations can provide improved immunity to external noise and improved sensing resolution by using a sinusoidal demodulation window along with a sinusoidal excitation, and by increasing the integration duration. However, it will be apparent to those skilled in the art that at least some implementations can be practiced without these specific details. In other instances, well-known components, elements, or methods have not been described in detail or presented in a simple block diagram format to avoid unnecessarily obscuring the techniques described herein. Therefore, the specific details set forth below are merely exemplary. Certain implementations may differ from these exemplary details and are still considered to be within the spirit and scope of the invention.

[0017] This document describes various implementations of techniques for capacitive sensing. These implementations can provide sensing units (also known as touch sensors) that can be used in conjunction with capacitive sensing circuitry systems to detect different types of objects. In one implementation, the sensing unit can be used for mutual capacitance sensing or self-capacitance sensing. In one implementation, a capacitive sensing circuitry system (also referred to herein as a “capacitive sensing circuitry system” or “sensing circuitry system”) can utilize a capacitive touch sensing channel in a manner that allows it to measure the capacitance of a sensing element (e.g., a single electrode relative to ground potential or a single electrode between a receiving (RX) electrode and a transmitting (TX) electrode), as described in more detail herein. The sensing circuitry system can also be configured to detect the inductance of the sensing element, for example, using inductive sensing techniques to detect ferrous and non-ferrous metal objects approaching the sensing unit. Examples of devices that can use capacitive sensing include, but are not limited to, automobiles, home appliances (e.g., refrigerators, washing machines, etc.), personal computers (e.g., laptops, notebook computers, etc.), mobile computing devices (e.g., tablets, tablet computers, e-reader devices, etc.), mobile communication devices (e.g., smartphones, mobile phones, personal digital assistants, messaging devices, PDAs, etc.), connectivity and charging devices (e.g., hubs, docking stations, adapters, chargers, etc.), audio / video / data recording and / or playback devices (e.g., cameras, recorders, handheld scanners, monitors, etc.), wearable devices, and other similar electronic devices.

[0018] In the description, references to "implementation," "one implementation," "example implementation," "some implementations," and "various implementations" indicate that a specific feature, structure, step, operation, or characteristic described in connection with an implementation is included in at least one implementation of the invention. Furthermore, the phrases "implementation," "one implementation," "example implementation," "some implementations," and "various implementations" appearing in various places in the description do not necessarily all refer to the same implementation.

[0019] The description includes references to the accompanying drawings, which form part of the detailed description. The drawings illustrate exemplary embodiments. These embodiments, which may also be referred to herein as “examples,” are described in sufficient detail to enable those skilled in the art to practice embodiments of the claimed subject matter described herein. Embodiments may be combined, other embodiments may be utilized, or structural, logical, and electrical changes may be made without departing from the scope and spirit of the claimed subject matter. It should be understood that the embodiments described herein are not intended to limit the scope of the subject matter, but rather to enable those skilled in the art to practice, perform, and / or use the subject matter.

[0020] Figure 1 This is a functional diagram of a capacitive touch sensing channel 100 based on an accumulating first-order Σ-Δ converter according to one embodiment. The capacitive touch sensing channel 100 includes a Σ-Δ modulator 104 coupled to an input node 103. The Σ-Δ modulator 104 may be a first-order Σ-Δ modulator. The input node 103 is coupled to a touch sensor 102. In one embodiment, the touch sensor 102 includes a transmit (TX) electrode and a receive (RX) electrode, such as... Figure 1 The equivalent circuit is shown in the diagram. In another embodiment, the touch sensor 102 includes a single electrode. Alternatively, other types of touch sensors can be used. The output 105 of the Σ-Δ modulator 104 is coupled to a counter 106, which is coupled to a demodulator 108. In one embodiment, a waveform generator 110 generates an excitation signal 107, which is applied to the touch sensor 102, such as the TX electrode. The demodulator 108 is also configured to receive the excitation signal 107 to demodulate the output 109 of the counter 106. An accumulator 112 is coupled to the output 111 of the demodulator 108, and a decimator 114 is coupled to the output 113 of the accumulator 112. The decimator 114 outputs a digital result 115 representing the capacitance of the touch sensor 102, such as a digital count value.

[0021] like Figure 1 As shown, the Σ-Δ modulator 104 includes a comparator 120, a first integrator 122, a second integrator 124, and a switching circuit system 126. The first integrator 122 is coupled to the comparator 120 and configured to receive an incoming signal from the input node 103 and a reference voltage, and to provide a first output signal. The second integrator 124 is coupled to the comparator 120 in parallel with the first integrator 122. The second integrator 124 is configured to receive the incoming signal at the input node 103 and to provide a second output signal. The switching circuit system 126 is configured to selectively couple the first integrator 122 between the input node 103 and the comparator 120 to provide the first output signal to the comparator 120, or selectively couple the second integrator 124 between the input node 103 and the comparator 120 to provide the second output signal to the comparator 120.

[0022] During operation, the incoming signal enters one of the first integrator 122 or the second integrator 124 in the form of a current and is balanced by a feedback loop formed by the output of the single-bit digital converter from comparator 120 (output 105). In one embodiment, the feedback is denoted as -G, where G represents the following:

[0023]

[0024] The input signal balancing process forms a bitstream at output 105, which is then input to counter 106. Counter 106 is a digital integrator. Counter 106 reflects a digitally scaled excitation signal proportional to the capacitance of touch sensor 102. The operation of counter 106 can be represented as follows:

[0025]

[0026] Demodulator 108 multiplies the counter output and a digitized reference signal 117 coherent with excitation signal 107. Accumulator 112 integrates the demodulated digitized signal at output 111 to obtain the amplitude of the sensed signal at output 113. Decimator 114 forms a digital result 115 sensed over an integer number of excitation signal cycles (Ntx). The components of capacitive touch sensing channel 100 form an accumulating first-order Σ-Δ converter that converts the capacitance of touch sensor 102 into a digital value representing that capacitance. As described in more detail below, the accumulating first-order Σ-Δ converter exhibits characteristics of quantization error accumulation when samples are accumulated over several cycles of excitation signal 107.

[0027] It should be noted that the channel transfer function of the capacitive touch sensing channel 100 is linear with respect to the linear scan of the sensing capacitance of the touch sensor 102. In a conventional Σ-Δ converter, if the conversion lasts for a long time, the quantization error of the sensed signal amplitude does not change, while dithering reduces the quantization error. That is, the capacitive touch sensing channel 100 measures the signal amplitude. Signal shape distortion can be reduced by adding filtering, but in this way the resolution of the signal amplitude does not change because the signal amplitude remains constant. One conversion of the excitation period (also called the Tx period) is defined by the quantization step size value caused by the symmetry between the positive and negative half-cycle shapes. The above shape gives quantization errors with the same amplitude but different polarities at the end of each half-cycle. Finally, the quantization error at the end of the excitation signal period is equal to zero. Each subsequent conversion must be considered an independent conversion without any history from previous conversions. The accumulation of conversion samples during subsequent excitation signal periods narrows the channel passband but does not improve the resolution. Dithering is needed to give the result of each cycle conversion a random component greater than a balance step size. In this case, the subsequent accumulation of the excitation signal over Ntx periods increases the resolution by sqrt(Ntx). In this solution, it is impossible to implement an anti-aliasing filter to prevent saturation caused by high-frequency noise. The channel frequency response can be affected by external noise, and the channel passband narrows as the integration time (decimation factor) increases. For example, when a high-frequency noise signal is injected into the channel, the injected noise will generate a current at the input of the Σ-Δ modulator that is larger than the balancing current. If impulse noise (e.g., LCD noise) affects the touch sensor, this can cause significant distortion in the conversion. Saturation can be prevented if the anti-aliasing filter reduces the amplitude of the high-frequency noise components. However, conventional Σ-Δ converters cannot implement anti-aliasing filters. Conventional solutions use high-order modulators, which can also saturate. Saturation occurs when the signal variation during the sampling period is greater than the balancing signal. Conventional solutions require converting the sensor current to voltage, followed by a filter. A high-order Σ-Δ modulator can be used to obtain sufficient overload capability, but the channel resolution will be proportionally reduced.

[0028] In contrast, the capacitive touch sensing channel 100 is based on a Σ-Δ modulator 104. The bitstream of the Σ-Δ modulator 104 is integrated by a counter 106, coherently demodulated by multiplying it with sinusoidal data coherent with the excitation signal 107, and finally accumulated by an accumulator 112. The Σ-Δ modulator 104 includes an additional integrator, a second integrator 124, which is connected in parallel with the main integrator, a first integrator 122. A switching circuit system 126 connects the integrator to the input signal and the comparator 120. For example, a first switch S1 and a second switch S2 connect the input signal to the comparator 120 via two branches. Switches S1 and S2 operate synchronously to form two branches from the touch sensor 102 to the comparator 120. When the excitation signal 107 rises, one branch passes through the first integrator 122, and when the excitation signal 107 falls, the other branch passes through the second integrator 124. The balanced feedback loop is connected to the effective branch via a third switch S3 that operates synchronously with switches S1 and S2.

[0029] In this way, the integrator stores the quantization error formed at the end of its valid phase, and each subsequent valid phase begins under the quantization conditions of the previously valid phases of other integrators. This gives the characteristics of quantization error accumulation when samples are accumulated over several cycles of the excitation signal 107, such as... Figures 2A to 2B As shown.

[0030] In another embodiment, the capacitive touch sensing channel 100 can demodulate the bitstream of the Σ-Δ modulator by multiplying the bitstream by cosine data. In this case, the first digital integrator 106 can be removed. The cosine data can be multiplied by +1 and -1. The multiplication can be replaced by adding or subtracting the sine data. This method can provide the advantage of a wider channel baseband (e.g., twice the width of the channel passband).

[0031] Figures 2A to 2B This is waveform diagram 200 of an accumulator first-order Σ-Δ converter according to one embodiment. In waveform diagram 200, the excitation signal 202 (labeled "Vtx") is a rising and falling sine wave. Sine table 208 contains sinusoidal data coherent with the excitation signal 202. When the excitation signal 202 rises, the switch control signal 204 (labeled "θa") is in a first state (e.g., low or logic 0). When the excitation signal 202 falls, the switch control signal 204 is in a second state (e.g., high or logic 1). Waveform diagram 200 shows the output current 210 of the attenuator, for example, as shown below regarding... Figure 4A As shown and described above, waveform 200 also shows a balancing current signal 206 (labeled "Ibal") that increases and decreases at a frequency obtained through the period of excitation signal 202. The balancing current signal 206 represents the current used to balance the integrator based on a feedback loop formed by the output (output 105) of the single-bit digital converter from comparator 120. Waveform 200 shows signal 212 on the integrator, including the quantization error 214 of the sensed amplitude. As described above, Figures 2A to 2B The signaling in the integrator allows the accumulation of the quantization error stored in the integrator at the end of its active phase in the first-order Σ-Δ converter, and allows each subsequent active phase to begin under the quantization error condition of the integrator's previously active phase, thus causing the quantization error to accumulate. Waveform diagram 200 also shows the output 216 of the counter and the output 218 of the demodulator. Figure 2B An enlarged view of the excitation signal 202, the switch control signal 204, and the balancing current signal 206 is shown. Figures 2A to 2BThe signal transmission in the design allows the capacitive sensing channel to be narrowband and have resolution proportional to the duration of the sensing period. The operation of the capacitive touch sensing channel 100 based on an accumulating first-order Σ-Δ modulator can improve its immunity to external noise by using a sinusoidal demodulation window combined with sinusoidal excitation. While conventional attempts do not allow for increased resolution by increasing the sensing period (also known as the sensing duration), the capacitive touch sensing channel 100 allows for increased resolution by increasing the sensing period. The capacitive touch sensing channel 100 can combine the characteristics of a conventional capacitive touch sensing channel, which uses sinusoidal excitation and a dual-slope charge-balance converter based on charge transfer. However, the capacitive touch sensing channel 100 utilizes an accumulating Σ-Δ modulator as described herein instead of the dual-slope charge-balance converter.

[0032] Figure 3 Waveform 300 shows a noise transfer function according to one embodiment. Waveform 300 illustrates the noise sources of the sinusoidal synchronous demodulator 302 and the rectangular window synchronous demodulator 304. For sinusoidal excitation, the sinusoidal shape of the excitation signal produces single-tone emission, which can be placed in a frequency range without strong restrictions on the emission. For low harmonic content, a complex synthesizer can be used. The single-lobe noise transfer function results in good noise immunity and good SNR in high-sensitivity mode. The Fast Fourier Transform (FFT) of the channel samples enables the ability to find quiet bands for frequency hopping, thus enabling reliable operation in noisy environments. Demodulation of the channel samples can be accomplished by multiplying the samples by a digital sine value. Processing elements can be used to multiply the channel samples by the digital sine value. Alternatively, an existing channel engine can be modified to increase the number of channel samples. The channel engine can be firmware executed by a processing device coupled to the demodulator.

[0033] The following description addresses the above regarding Figure 1 as well as Figure 2A and Figure 2B The implementation of the described functional operation. For example, the capacitive touch sensing channel 100 may include two integrators, both constructed using current-to-current converters, such as... Figures 4A to 4C The accumulator first-order Σ-Δ converter is shown.

[0034] Figures 4A to 4CThis is a block diagram of an accumulating first-order Σ-Δ converter 400 (hereinafter referred to as "converter 400") according to one embodiment. For ease of description, converter 400 is referred to as converter 400 below. Converter 400 is an analog-to-digital converter (ADC) that converts current or charge from a touch sensor into a digital value. The ADC is a first-order converter because it has a first-order Σ-Δ modulator 402, which measures the feedback of the quantization error used for the continuous balanced integrator. For ease of description, first-order Σ-Δ modulator 402 is referred to as Σ-Δ modulator 402 below. Counter 404 is used to store the digital representation of the input signal. The output of counter 404 is determined by the following... Figure 4C The multiply-accumulate circuit (MAC) 406 is described and explained for performing multiplication and accumulation.

[0035] In one embodiment, the Σ-Δ modulator 402 may include two integrators, each including an operational amplifier and an integrator capacitor. Alternatively, the Σ-Δ modulator 402 may include, for example, Figure 4A The attenuator 408 shown enables the output current to be kept within a suitable range, thereby allowing the use of a unity-value balancing source.

[0036] As shown, the Σ-Δ modulator 402 includes an attenuator 408 coupled to input node 401 and bias voltage 403. Attenuator 408 includes an amplifier (e.g., a transimpedance operational amplifier 410) shared by a first integrator and a second integrator. The Σ-Δ modulator 402 also includes a first integrator capacitor 412 coupled to a first node 405 and a second integrator capacitor 414 coupled to a second node 407. The Σ-Δ modulator 402 also includes a first current source 416, a second current source 418, a comparator 420, and a flip-flop 422 coupled to the output of comparator 420 and to the input of counter 404. The output of flip-flop 422 is part of a balanced feedback loop 424 coupled to a switching circuit system. Figure 4AAs shown, the switching circuit system includes: a first switch 426 coupled to attenuator 408, first node 405, and second node 407; a second switch 428 coupled to comparator 420, first node 405, and second node 407; a third switch 430 coupled to third node 409, first node 405, and second node 407; and a fourth switch 432 coupled to third node 409, first current source 416, and second current source 418. The first switch 426, second switch 428, and third switch 430 are configured to operate synchronously. These switches can be controlled by a first control signal 411 (labeled “θAcc”) depending on the excitation signal 413. When the excitation signal 413 rises, the first control signal 411 goes low, causing the first switch 426 and the second switch 428 to couple the incoming signal to comparator 420 via first node 405 coupled to first integrator capacitor 412. When the excitation signal 413 falls, the first control signal 411 goes high, causing the first switch 426 and the second switch 428 to couple the incoming signal to the comparator 420 via a second node 407 coupled to the second integrator capacitor 414. The third switch 430, controlled by the first control signal 411, connects the balancing feedback loop 424 to the first node 405 when the excitation signal 413 rises and to the second node 407 when the excitation signal 413 falls. The fourth switch 432 is controlled by the output of the flip-flop 422. The fourth switch 432 couples either the first current source 416 or the second current source 418 to the third node 409 to balance the integrator. The balancing feedback loop 424 includes a balancing current signal 206 that controls the current source to balance the incoming signal. The comparator 420 compares the incoming signal, including the balanced feedback, with a voltage reference 415. The flip-flop 422 is clocked using a clock signal 429 (labeled "Fmod"). The counter 404 uses the same clock signal. As described above, the balancing current signal fed back to control the fourth switch 432 represents the current of the integrator based on the balancing feedback loop 424 formed by the single-bit digitizer output 417, which represents the output from the comparator 420 sampled by the trigger 422. The signal transmission of the balancing feedback loop 424 allows the integrator in the Σ-Δ modulator 402 to store the quantization error formed at the end of its active phase, and allows each subsequent active phase to begin under the quantization error condition of the integrator's previous active phase, thus causing the quantization error to accumulate. The counter 404 counts the single-bit digitizer output 417 during the sensing period and outputs the digital count value 419 to the following... Figure 4C The MAC 406 is described.

[0037] In one embodiment, the excitation signal 413 is generated by a waveform generator 434. The waveform generator 434 generates the excitation signal 413 as a sinusoidal wave (also referred to as a sine wave). The input node 401 may be coupled to a touch sensor 436, which includes a first electrode 438 coupled to the waveform generator 434 and a second electrode 440 coupled to the input node 401. A switching circuit system is configured to form a first branch between the touch sensor 436 and the comparator 420 and a second branch between the touch sensor 436 and the comparator 420. The first branch passes through a first integrator when the excitation signal 413 rises, and the second branch passes through a second integrator when the excitation signal 413 falls. The switching circuit system is also configured to couple a balanced feedback loop 424 to the first branch when the excitation signal 413 rises and to the second branch when the excitation signal 413 falls. The first integrator is configured to store the quantization error formed at the end of the first effective phase of the first integrator, and wherein the second integrator is configured to begin quantization error accumulation at the beginning of the second effective phase of the second integrator, starting with the quantization error. In one embodiment, the waveform generator 434 is controlled by control data 421 (labeled "sine table"). The control data may be stored in a sine table. The control data 421 is digital data coherent with the excitation signal 413. The control data 421 is also described below regarding... Figure 4C The digital demodulator described is used.

[0038] In another embodiment, the Σ-Δ modulator includes: a comparator; a first integrator coupled to receive an incoming signal from an input node and provide a first output signal; a second integrator coupled in parallel with the first integrator to receive the incoming signal and provide a second output signal; and a switching circuit system for selectively coupling the first integrator between the input node and the comparator to provide the first output signal to the comparator, or selectively coupling the second integrator between the input node and the comparator to provide the second output signal to the comparator. In yet another embodiment, the switching circuit system includes: a first switch coupled to provide an incoming signal to either the first integrator or the second integrator; and a second switch coupled to provide either the first output signal to the comparator or the second output signal to the comparator. The first switch and the second switch are configured to operate synchronously.

[0039] In another embodiment, the Σ-Δ modulator includes a balanced feedback loop coupled to a switching circuit system, and the switching circuit system includes: a first switch coupled to provide an incoming signal to a first integrator or a second integrator; a second switch coupled to provide a first output signal to a comparator or a second output signal to a comparator; and a third switch coupled to provide a balanced feedback signal from the balanced feedback loop to an incoming signal provided to the first integrator or an incoming signal provided to the second integrator. In this embodiment, the first, second, and third switches are configured to operate synchronously.

[0040] like Figure 4B As shown, converter 400 includes a current-to-current converter (also referred to as attenuator 408) based on a transimpedance operational amplifier 410 with a 100% feedback loop and an output stage amplifier 442. That is, the transimpedance operational amplifier 410 has a feedback loop. Attenuator 408 maintains the output current within a suitable range, allowing for continuous balancing using a uniform value balancing source.

[0041] like Figure 4C As shown, converter 400 is coupled to MAC 406. MAC 406 can be... Figure 1 One implementation of the demodulator 108, accumulator 112, and decimator 114 in the MAC 406. The MAC 406 includes a multiplier circuit 444 coupled to the counter 404 and an accumulator circuit 446 coupled to the multiplier circuit 444. The multiplier circuit 444 is configured to demodulate the digital count value 419 output by the counter 404 by multiplying the digital count value 419 by control data 421. The output of the multiplier circuit 444 is the demodulated signal 423. The control data 421 is sinusoidal data coherent with the excitation signal 413 from the waveform generator 434. The accumulator circuit 446 is configured to accumulate the demodulated signal 423 by adding the current output 425 of the multiplier circuit 444 to an accumulated value 427 already stored in the register 448. The output of the accumulator circuit is stored in the register 448 as an updated accumulated value 429 output from the MAC 406.

[0042] Figure 4D This is a schematic diagram of a current-to-current converter 408 according to one embodiment. (See diagram below.) Figure 4D As shown, the transimpedance operational amplifier 410 may include an output stage 450 with a first transistor set and may be complementary to an additional output stage 452 with a second transistor set, the additional output stage 452 mirroring the current generated by the output stage 450 of the transimpedance operational amplifier 410. Amplification or attenuation of the output current can be achieved by changing the number of transistors in the mirror stage. Attenuation adjustment allows the output current to be kept within a suitable range, thus enabling the use of a uniform value balancing source.

[0043] Figure 4E This is a schematic diagram of a current-to-current converter with a low-pass filter 454 according to one embodiment. Figure 4E As shown, a low-pass filter (LPF) 454 can be added to the path of the drive signal. The LPF 454 can suppress high-frequency noise components in the incoming current. The LPF can operate as an anti-aliasing filter.

[0044] Figure 5 This is a touch system 500 according to one embodiment, having an electrode array 502 and multiple capacitive touch sensing channels 504. The touch system 500 includes an analog front-end (AFE) capacitive touch sensing controller coupled to the array 502. The AFE includes a waveform generator 506 coupled to a first multiplexer circuit 508 and a second multiplexer circuit 510 coupled to the multiple capacitive touch sensing channels 504. The waveform generator 506 may be a direct digital synthesizer (DDS) that receives digital inputs referred to as control data or sine wave data and generates an excitation signal. The DDS can generate a DDS-based sine wave. This sine wave differs from the conventionally implemented rectangular excitation signal. The excitation signal can be applied to any of the electrodes in the array 502 via the first multiplexer circuit 508. It should be noted that the first multiplexer circuit 508 can connect either the direct or inverted output of the waveform generator 506 to any sensor TX line according to a polyphase mode. Any one of the multiple capacitive touch sensing channels 504 can be coupled to any electrode of the array 502 via the second multiplexer circuit 510. Each of the multiple capacitive touch sensing channels 504 may include an accumulating Σ-Δ converter 512 and a MAC 514. The accumulating Σ-Δ converter 512 and... Figures 4A to 4C The accumulator Σ-Δ converter 400 is similar to the MAC 514. Figures 4A to 4C Similar to MAC 406 in the previous example. As described herein, the accumulating Σ-Δ converter 512 generates samples and demodulates them by multiplying the samples with sinusoidal data coherent with the excitation via MAC 514. Waveform generator 506 forms a half-cycle signal to drive the quantization error accumulation in the accumulating Σ-Δ converter 512.

[0045] In another embodiment, a system includes a touch sensor having a first electrode and a second electrode, and a capacitive touch sensing controller coupled to the touch sensor. The capacitive touch sensing controller includes a waveform generator coupled to the first electrode. The waveform generator generates an excitation signal, sinusoidal data coherent with the excitation signal, and a control signal indicating whether the excitation signal rises or falls. A sensing channel is coupled to the second electrode at an input node. The sensing channel includes an accumulating Σ-Δ analog-to-digital converter (ADC) to generate a digital value representing the capacitance of the touch sensor. The accumulating Σ-Δ ADC may include: a comparator; a first integrator coupled to receive an incoming signal from the input node and provide a first output signal; a second integrator coupled in parallel with the first integrator to receive an incoming signal and provide a second output signal; and a switching circuit system for selectively coupling the first integrator between the input node and the comparator to provide the first output signal to the comparator, or selectively coupling the second integrator between the input node and the comparator to provide the second output signal to the comparator. In yet another embodiment, the accumulating Σ-Δ ADC further includes a balanced feedback loop coupled to the switching circuit system. The switching circuit system may include: a first switch coupled to provide an incoming signal to a first integrator or a second integrator; a second switch coupled to provide a first output signal to a comparator or a second output signal to a comparator; and a third switch coupled to provide a balanced feedback signal from a balanced feedback loop to an incoming signal provided to the first integrator or to the second integrator. The first, second, and third switches are configured to operate synchronously.

[0046] In another embodiment, the accumulating Σ-Δ ADC includes a first-order Σ-Δ modulator comprising an attenuator coupled to an input node and a bias voltage. The attenuator may include an amplifier shared by a first integrator and a second integrator. The accumulating Σ-Δ ADC also includes: a first integrator capacitor coupled to a first node; a second integrator capacitor coupled to a second node; a first current source; a second current source; and a flip-flop coupled to the output of a comparator and the input of a counter. The output of the flip-flop is part of a balanced feedback loop coupled to a switching circuit system. In this embodiment, the switching circuit system includes: a first switch coupled to the attenuator, the first node, and the second node; a second switch coupled to the comparator, the first node, and the second node; a third switch coupled to the third node, the first node, and the second node; and a fourth switch coupled to the third node, the first current source, and the second current source. The first, second, and third switches are configured to operate synchronously. The fourth switch is controlled by the output of the flip-flop.

[0047] In one implementation, a first integrator is configured to store a quantization error formed at the end of a first effective phase of the first integrator, and a second integrator is configured to begin quantization error accumulation at the beginning of a second effective phase of the second integrator, starting with the quantization error.

[0048] In another embodiment, the accumulating Σ-Δ ADC includes a first-order Σ-Δ modulator comprising a first integrator capacitor, a second integrator capacitor, and a current-to-current converter. The current-to-current converter may include a transimpedance operational amplifier with a feedback loop and a transistor set coupled to the output stage of the transimpedance operational amplifier. The transistor set mirrors the current signal generated by the transimpedance operational amplifier. In yet another embodiment, the current-to-current converter may further include an LPF set coupled between the transimpedance operational amplifier and the transistor set. The LPF set filters high-frequency components in the current signal. In this embodiment, the switching circuitry can be configured to form a first integrator by coupling the first integrator capacitor to a first branch between the current-to-current converter and the comparator, and a second integrator by coupling the second integrator capacitor to a second branch between the current-to-current converter and the comparator. In yet another embodiment, the switching circuitry is configured to allow the incoming signal to pass through the first branch when the excitation signal rises and to allow the incoming signal to pass through the second branch when the excitation signal falls. The switching circuit system can be further configured to couple the balanced feedback loop to the first branch when the excitation signal rises, and to the second branch when the excitation signal falls.

[0049] In another embodiment, the capacitive touch sensing channel may further include a multiply-accumulate circuit, which includes a register for storing the accumulated value and a multiplication circuit coupled to a counter of the modulator. The multiply-accumulate circuit includes a multiplication circuit that demodulates the output of the counter by multiplying the output of the counter by sinusoidal data coherent with an excitation signal from a waveform generator. The multiply-accumulate circuit also includes an accumulation circuit coupled to the multiplication circuit. The accumulation circuit accumulates the demodulated signal by adding the current output of the multiplication circuit to the accumulated value to obtain an updated accumulated value and storing the updated accumulated value in the register.

[0050] Figure 6 This is a touch system 600 according to one embodiment, having an electrode array 602, multiple capacitive touch sensing channels 604, and a processing device 618. The touch system 600 includes a waveform generator 606 coupled to a multiplexer circuit 608. The multiplexer circuit 608 can represent... Figure 5The first multiplexer circuit 508 and the second multiplexer circuit 510 are described. Multiplexer circuit 608 is used to couple waveform generator 606 to any one or more electrodes of array 602, and to couple any one or more electrodes of array 602 to one of the plurality of capacitive touch sensing channels 604. Waveform generator 606 may be a DDS that receives digital inputs, referred to as control data or sine data, and generates an excitation signal. Control data is also sent to capacitive touch sensing channels 604. As described herein, the excitation signal is a sine wave. It should be noted that multiplexer circuit 608 may connect the direct or inverted output of waveform generator 606 to any sensor TX line according to a polyphase mode. Any one of the plurality of capacitive touch sensing channels 604 may be coupled to any one of the electrodes of array 602 via multiplexer circuit 608. Each of the plurality of capacitive touch sensing channels 604 may include an accumulating Σ-Δ converter 612 and a MAC 614. Accumulating Σ-Δ converter 612 and MAC 614 are... Figures 4A to 4C The accumulator Σ-Δ converter 400 is similar to the MAC 614. Figures 4A to 4C Similar to MAC 406 in the example. Because a multiphase mode can be used, the capacitive touch sensing channel 604 can include a deconvolution circuit 616 coupled to the output of MAC 614. As described herein, the accumulating Σ-Δ converter 612 generates samples and demodulates them by multiplying the samples with sinusoidal data coherent with the excitation via MAC 614. The deconvolution circuit 616 can perform deconvolution on the sampled data. Waveform generator 606 forms a half-cycle signal to drive the accumulation of quantization error in the accumulating Σ-Δ converter 612.

[0051] The touch system 600 may also include a processing device 618 that receives digital outputs from multiple capacitive touch sensing channels 604. The processing device 618 may be a processor, a controller, or hardware circuitry capable of performing further processing of the digital data. In one embodiment, the processing device 618 executes firmware including post-processing logic, communication logic, mutual capacitance mapping, self-capacitance vector generator, etc. The processing device 618 may include a state machine. The processing device 618 may output data to the host 620 after processing the digital data. The touch system 600 may include other components, such as a control circuitry system for controlling the multiplexer circuitry 608, a sequencer for sequencing the electrodes of the array 602, baseline compensation circuitry, etc.

[0052] Figure 7This is a method for operating an accumulating first-order Σ-Δ converter according to one embodiment. Method 700 can be executed by processing logic including hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. In one embodiment, method 700 can be executed by any processing device described herein. In one embodiment, method 700 is performed by… Figure 1 The capacitive touch sensing channel 100 performs the operation. In another embodiment, method 700 is performed by... Figures 4A to 4E The accumulation first-order Σ-Δ converter 400 performs the method. In another embodiment, the method 700 is performed by a device including a capacitive touch sensing channel and a processing device coupled to the capacitive touch sensing channel.

[0053] Method 700 begins with processing logic receiving an incoming signal from a touch sensor via a Σ-Δ modulator of a capacitive sensing channel (box 702). The Σ-Δ modulator includes a comparator, a first integrator, and a second integrator. The processing logic selectively couples the incoming signal to the comparator via a first integrator in a first branch when the excitation signal rises using a switching circuit system of the capacitive sensing channel (box 704). The processing logic selectively couples the incoming signal to the comparator via a second integrator in a second branch when the excitation signal falls using the switching circuit system (box 706). The processing logic generates an output signal via the comparator (box 708). Based on the comparator's output signal, the processing logic selectively couples a balanced feedback loop to the first branch when the excitation signal rises and to the second branch when the excitation signal falls using the switching circuit system (box 710). The processing logic generates a count of the output signal (box 712). The processing logic demodulates the count by multiplying it by a sinusoidal data coherent with the excitation signal to obtain a demodulated signal (box 714). The processing logic accumulates the demodulated signal to obtain a quantization error accumulation (box 716). The processing logic downsamples the quantization error accumulation to obtain a digital value (box 718), and method 700 ends. This digital value indicates the capacitance associated with the touch sensor.

[0054] In another embodiment, the processing logic selectively couples the incoming signal to the comparator via the first integrator by controlling a first switch and a second switch to couple the input node and the comparator to the first node coupled to the first integrator capacitor. The processing logic also selectively couples the incoming signal to the comparator via the second integrator by controlling a first switch and a second switch to couple the input node and the comparator to the second node coupled to the second integrator capacitor. In yet another embodiment, the processing logic selectively couples the balanced feedback loop to the first branch and the second branch according to the output signal by controlling a third switch to couple a third node to the first or second node and controlling a fourth switch to couple a first current source or a second current source to the third node based on the comparator's output signal.

[0055] In the above description, some parts of the specific implementation are presented according to algorithms and symbolic representations for manipulating data bits in computer memory. These algorithmic descriptions and representations are means by which those skilled in the art of data processing most effectively communicate the substance of their work to others skilled in the art. Here, an algorithm is, and is generally conceived as, a self-consistent sequence of steps leading to a desired result. These steps are steps required to physically manipulate physical quantities. Typically, although not essential, these quantities take the form of electrical or magnetic signals that can be stored, transmitted, combined, compared, and otherwise processed. It has proven convenient to sometimes refer to these signals primarily for general purposes as bits, values, elements, symbols, characters, items, numbers, etc.

[0056] However, it should be remembered that all these terms, and similar terms, should be associated with appropriate physical quantities and are merely convenient labels applied to those quantities. Unless otherwise stated, as is apparent from the above discussion, it can be understood that throughout the description, discussions using terms such as “determine,” “allocate,” “dynamically allocate,” “redistribute,” “ignore,” “reassign,” “detect,” “execute,” “polling,” “register,” “monitor,” etc., refer to the actions and processes of a computing system or similar electronic computing device that manipulates data represented as physical (e.g., electronic) quantities in the registers and memories of the computing system and converts this data into other data similarly represented as physical quantities in the memory or registers of the computing system or other such information storage, transmission, or display devices.

[0057] The terms “example” or “exemplary” as used herein are intended to serve as examples, instances, or illustrations. Any aspect or design described herein as “example” or “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects or other designs. Rather, the use of the terms “example” or “exemplary” is intended to present the concept in a concrete manner. As used herein, the term “or” is intended to mean inclusive “or” rather than exclusive “or.” That is, unless otherwise specified or clear from the context, “X comprises A or B” is intended to mean any natural inclusive arrangement. That is, if X comprises A, X comprises B, or X comprises both A and B, then “X comprises A or B” is satisfied in any of the foregoing cases. Furthermore, for the singular form, unless otherwise specified or clear from the context, the articles “a” and “an” as used in this application and the appended claims should generally be construed as meaning “one or more.” Moreover, unless so described, the use of the terms “implementation” or “an implementation” or “a mode of implementation” throughout the document is not intended to refer to the same implementation or mode of implementation.

[0058] The embodiments described herein may also relate to means for performing the operations described herein. Such means may be specifically constructed for a desired purpose, or may include a general-purpose computer that can be selectively activated or reconfigured by a computer program stored in a computer. Such a computer program may be stored in a non-transitory computer-readable storage medium, such as, but not limited to, any type of disk including: floppy disk, optical disk, CD-ROM, magneto-optical disk, read-only memory (ROM), random access memory (RAM), EPROM, EEPROM, magnetic or optical cards, flash memory, or any type of medium suitable for storing electronic instructions. The term "computer-readable storage medium" should be considered to include a single medium or multiple media (e.g., a centralized or distributed database and / or associated caches and servers) storing one or more sets of instructions. The term "computer-readable medium" should also be considered to include any medium capable of storing, encoding, or carrying a set of instructions that are executed by a machine and cause the machine to perform any one or more of the methods of this embodiment. The term "computer-readable storage medium" should therefore be considered to include, but is not limited to, solid-state memory, optical media, magnetic media, and any medium capable of storing a set of instructions for execution by a machine and causing the machine to perform any one or more of the methods of this embodiment.

[0059] The methods and demonstrations presented herein are not inherently related to any particular computer or other device. Various general-purpose systems can be used with the programs taught herein, or it may prove convenient to construct more proprietary devices to perform the required method steps. The desired structures of various such systems will become apparent from the description below. Furthermore, this embodiment is described without reference to any particular programming language. It should be understood that various programming languages ​​can be used to implement the teachings of the embodiments described herein.

[0060] The foregoing description sets forth numerous specific details, such as examples of specific systems, components, methods, etc., to provide a good understanding of several embodiments of this disclosure. It should be understood that the foregoing description is intended to be illustrative and not restrictive. Many other embodiments will become apparent to those skilled in the art upon reading and understanding the foregoing description. Therefore, the scope of this disclosure should be determined by reference to the appended claims, together with the full scope of their equivalents.

Claims

1. A circuit comprising: An input node, which is coupled to a touch sensor; An accumulator-decrement modulator coupled to the input node, wherein the accumulator-decrement modulator includes: Comparator; A first integrator is coupled to receive an incoming signal from the input node and provide a first output signal; A second integrator, coupled in parallel with the first integrator, is used to receive the incoming signal and provide a second output signal; and A switching circuit system is configured to selectively couple a first integrator between the input node and the comparator to provide a first output signal to the comparator, or selectively couple a second integrator between the input node and the comparator to provide a second output signal to the comparator. The circuit further includes a waveform generator for generating an excitation signal, the excitation signal being a sine wave. The touch sensor includes a first electrode coupled to the waveform generator and a second electrode coupled to the input node. The switching circuit system is configured to form a first branch between the touch sensor and the comparator and a second branch between the touch sensor and the comparator. The first branch passes through the first integrator when the excitation signal rises, and the second branch passes through the second integrator when the excitation signal falls. The switching circuit system is also configured to couple a balanced feedback loop to the first branch when the excitation signal rises and to couple the balanced feedback loop to the second branch when the excitation signal falls.

2. The circuit according to claim 1 further includes: A counter, which is coupled to the cumulative increment modulator; A demodulator, coupled to the counter; An accumulator, which is coupled to the demodulator; and an extractor coupled to the accumulator, the extractor being used to output a digital signal indicating the capacitance of the touch sensor, wherein the switching circuit system includes: A first switch, coupled to provide the incoming signal to either the first integrator or the second integrator; and A second switch is coupled to provide the first output signal to the comparator or the second output signal to the comparator, wherein the first switch and the second switch are configured to operate synchronously.

3. The circuit according to claim 1, wherein, The cumulative delta modulator includes a balanced feedback loop coupled to the switching circuit system, wherein the switching circuit system includes: A first switch is coupled to provide the incoming signal to either the first integrator or the second integrator; A second switch, coupled to provide the first output signal to the comparator or the second output signal to the comparator; and A third switch is coupled to provide a balanced feedback signal from the balanced feedback loop to an input signal provided to the first integrator or to the second integrator, wherein the first switch, the second switch, and the third switch are configured to operate synchronously.

4. The circuit according to claim 1, wherein, The cumulative delta modulator is a first-order cumulative delta modulator, wherein the first-order cumulative delta modulator includes: counter; An attenuator coupled to the input node and a bias voltage, wherein the attenuator includes an amplifier shared by the first integrator and the second integrator; The first integrator capacitor is coupled to the first node; The second integrator capacitor is coupled to the second node; First current source; Second current source; A flip-flop coupled to the output of the comparator and coupled to the input of the counter; wherein the output of the flip-flop is part of the balanced feedback loop coupled to the switching circuit system, wherein the switching circuit system includes: A first switch is coupled to the attenuator, the first node, and the second node; A second switch is coupled to the comparator, the first node, and the second node; A third switch is coupled to a third node, a first node, and a second node; A fourth switch is coupled to the third node, the first current source, and the second current source, wherein the fourth switch is controlled by the output of the trigger, and wherein the first switch, the second switch, and the third switch are configured to operate synchronously.

5. The circuit according to claim 1, wherein, The first integrator is configured to store the quantization error formed at the end of the first effective phase of the first integrator, and wherein the second integrator is configured to begin quantization error accumulation with the quantization error at the beginning of the second effective phase of the second integrator.

6. The circuit according to claim 1, wherein, The cumulative increment modulator includes: First integrator capacitor; The second integrator capacitor; and A current-to-current converter, comprising: A transimpedance operational amplifier with a feedback loop; The transistor set of the output stage, coupled to the transimpedance operational amplifier, mirrors the current signal generated by the transimpedance operational amplifier; A low-pass filter set coupled between the transimpedance operational amplifier and the transistor set, the low-pass filter set being used to filter high-frequency components in the current signal, wherein the switching circuit system is configured to form a first integrator by coupling a first integrator capacitor to a first branch between the current-to-current converter and the comparator, wherein the switching circuit system is configured to form a second integrator by coupling a second integrator capacitor to a second branch between the current-to-current converter and the comparator.

7. The circuit according to claim 6, wherein, The switching circuit system is configured to allow the incoming signal to pass through the first branch between the current-to-current converter and the comparator when the excitation signal rises, and wherein the switching circuit system is configured to allow the incoming signal to pass through the second branch between the current-to-current converter and the comparator when the excitation signal falls, and wherein the switching circuit system is further configured to couple the balanced feedback loop to the first branch between the current-to-current converter and the comparator when the excitation signal rises and to couple the balanced feedback loop to the second branch between the current-to-current converter and the comparator when the excitation signal falls.

8. The circuit according to claim 1, further comprising: A counter, which is coupled to the cumulative increment modulator; Multiplication and accumulation circuit; An extractor, coupled to the multiply-accumulate circuit, is configured to output a digital signal indicating the capacitance of the touch sensor, wherein the multiply-accumulate circuit includes: A register, used to store accumulated values; A multiplication circuit coupled to a counter of the cumulative increment modulator, the multiplication circuit being used to demodulate the output of the counter by multiplying the output of the counter by sinusoidal data coherent with the excitation signal from the waveform generator; and An accumulation circuit, coupled to the multiplication circuit, is used to accumulate the demodulated signal by adding the current output of the multiplication circuit to the accumulated value to obtain an updated accumulated value and storing the updated accumulated value in the register.

9. A system comprising: A touch sensor, comprising a first electrode and a second electrode; as well as A capacitive touch sensing controller coupled to the touch sensor, the capacitive touch sensing controller comprising: A waveform generator coupled to the first electrode, the waveform generator being used to generate an excitation signal, sinusoidal data coherent with the excitation signal, and a control signal indicating whether the excitation signal rises or falls; A sensing channel, coupled to the second electrode at an input node, includes an accumulator-accumulator-increment analog-to-digital converter (ADC) for generating a digital value representing the capacitance of the touch sensor, wherein the accumulator-accumulator-increment analog-to-digital converter includes: Comparator; A first integrator is coupled to receive an incoming signal from the input node and provide a first output signal; A second integrator, coupled in parallel with the first integrator, is used to receive the incoming signal and provide a second output signal; and A switching circuit system for selectively coupling the first integrator between the input node and the comparator to provide the first output signal to the comparator, or selectively coupling the second integrator between the input node and the comparator to provide the second output signal to the comparator.

10. The system according to claim 9, wherein, The cumulative incremental analog-to-digital converter includes a balanced feedback loop coupled to the switching circuit system, wherein the switching circuit system includes: A first switch is coupled to provide the incoming signal to either the first integrator or the second integrator; A second switch, coupled to provide the first output signal to the comparator or the second output signal to the comparator; and A third switch is coupled to provide a balanced feedback signal from the balanced feedback loop to an input signal provided to the first integrator or to the second integrator, wherein the first switch, the second switch, and the third switch are configured to operate synchronously.

11. The system according to claim 9, wherein, The cumulative-increment analog-to-digital converter includes a first-order cumulative-increment modulator, wherein the first-order cumulative-increment modulator includes: A counter, coupled to the output of the comparator, is used to output the digital value; An attenuator coupled to the input node and a bias voltage, wherein the attenuator includes an amplifier shared by the first integrator and the second integrator; The first integrator capacitor is coupled to the first node; The second integrator capacitor is coupled to the second node; First current source; Second current source; and A flip-flop coupled to the output of the comparator and coupled to the input of the counter, wherein the output of the flip-flop is part of a balanced feedback loop coupled to the switching circuit system, and wherein the switching circuit system includes: A first switch is coupled to the attenuator, the first node, and the second node; A second switch is coupled to the comparator, the first node, and the second node; A third switch, coupled to a third node, a first node, and a second node; and A fourth switch is coupled to the third node, the first current source, and the second current source, wherein the fourth switch is controlled by the output of the trigger, and wherein the first switch, the second switch, and the third switch are configured to operate synchronously.

12. The system according to claim 9, wherein, The first integrator is configured to store the quantization error formed at the end of the first effective phase of the first integrator, and wherein the second integrator is configured to begin quantization error accumulation with the quantization error at the beginning of the second effective phase of the second integrator.

13. The system according to claim 9, wherein, The cumulative-increment analog-to-digital converter includes a first-order cumulative-increment modulator, wherein the first-order cumulative-increment modulator includes: First integrator capacitor; The second integrator capacitor; and A current-to-current converter, comprising: A transimpedance operational amplifier with a feedback loop; The transistor set of the output stage, coupled to the transimpedance operational amplifier, mirrors the current signal generated by the transimpedance operational amplifier; A low-pass filter set coupled between the transimpedance operational amplifier and the transistor set, the low-pass filter set being used to filter high-frequency components in the current signal, wherein the switching circuit system is configured to form the first integrator by coupling the first integrator capacitor to a first branch between the current-to-current converter and the comparator, wherein the switching circuit system is configured to form the second integrator by coupling the second integrator capacitor to a second branch between the current-to-current converter and the comparator.

14. The system according to claim 13, wherein, The switching circuit system is configured to allow the incoming signal to pass through the first branch when the excitation signal rises, and wherein the switching circuit system is configured to allow the incoming signal to pass through the second branch when the excitation signal falls, and wherein the switching circuit system is further configured to couple a balanced feedback loop to the first branch when the excitation signal rises and to couple the balanced feedback loop to the second branch when the excitation signal falls.

15. The system according to claim 9, wherein, The sensing channel also includes: counter; A multiply-accumulate circuit, wherein the multiply-accumulate circuit includes: A register, used to store accumulated values; A multiplication circuit, coupled to the counter, is used to demodulate the output of the counter by multiplying the output of the counter with sinusoidal data coherently derived from an excitation signal from a waveform generator; and An accumulation circuit, coupled to the multiplication circuit, is used to accumulate the demodulated signal by adding the current output of the multiplication circuit to the accumulated value to obtain an updated accumulated value and storing the updated accumulated value in the register.

16. A method comprising: The cumulative increment modulator receives the incoming signal from the touch sensor through the capacitive sensing channel, and the cumulative increment modulator includes a comparator, a first integrator, and a second integrator. The switching circuit system of the capacitive sensing channel selectively couples the incoming signal to the comparator through the first integrator in the first branch when the excitation signal rises. The switching circuit system selectively couples the incoming signal to the comparator via the second integrator in the second branch when the excitation signal decreases. The comparator generates the output signal. The switching circuit system selectively couples the balanced feedback loop to the first branch when the excitation signal rises and to the second branch when the excitation signal falls, based on the output signal of the comparator. The count that generates the output signal; The count is demodulated by multiplying the count with sinusoidal data coherent with the excitation signal to obtain a demodulated signal; as well as The demodulated signal is accumulated to obtain the quantization error accumulation, and the quantization error accumulation indicator capacitor is used.

17. The method according to claim 16, wherein, Accumulating the demodulated signal includes: Samples of the output signal are generated; and Accumulating the samples over multiple periods of the excitation signal yields a quantization error accumulation indicating the capacitance; and The quantization error is downsampled to obtain a digital value, wherein the digital value indicates the capacitance.

18. The method according to claim 16, wherein, The touch sensor and the cumulative delta modulator are coupled to the input node, and: Selectively coupling the incoming signal to the comparator via the first integrator includes: controlling a first switch and a second switch to couple the input node and the comparator to a first node coupled to a first integrator capacitor; and Selectively coupling the incoming signal to the comparator via the second integrator includes controlling the first switch and the second switch to couple the input node and the comparator to a second node coupled to the second integrator capacitor.

19. The method according to claim 18, wherein, Selectively coupling the balanced feedback loop to the first branch and the second branch based on the output signal of the comparator includes: Control the third switch to couple the third node to the first node or the second node; and The output signal is used to control a fourth switch to couple either the first current source or the second current source to the third node.

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