Metal capacitors
By connecting the metal capacitors in parallel with the transistor capacitors, the capacitance parasitic effect of the electrode sheet is used to solve the problem of large area occupied by the boost capacitors, and the capacitance value and cost reduction are achieved.
Patent Information
- Application Number
- CN202010091136.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-02-07
- Filing Date
- 2020-02-13
- Publication Date
- 2025-01-17
- Estimated Expiration
- 2040-07-19
AI Technical Summary
In semiconductor circuits, boost capacitors occupy a large area, resulting in increased production costs and it is difficult for the prior art to effectively reduce their area.
The metal capacitor is formed using the idle metal layer. By connecting the metal capacitor with the transistor capacitor in parallel, the capacitance parasitic effect of the electrode sheet is used to increase the capacitance value of the boost capacitor, and the area requirement of the transistor capacitor is reduced.
The capacitance value of the boost capacitor is increased without occupying the extra area, which is about 40%, reducing the production cost of semiconductor circuits.
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Figure CN113258001B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a metal capacitor, and more particularly to a metal capacitor formed by utilizing capacitor parasitic effects. Background Art
[0002] In analog circuits, it is often the case that the operating voltage required by the internal circuit is higher than the power supply voltage Vdd received by the system. For example, the power supply voltage Vdd received by the memory circuit is 3V, but when performing selection operations, writing operations, and erasing operations, a high voltage such as 5V, 10V, or 12V may be required. Therefore, charge pumps are often used in analog circuits to generate an operating voltage when the power supply voltage (which may be provided by a battery) is lower than the operating voltage.
[0003] See also Figure 1 , which is a schematic diagram of a charge pump voltage doubling circuit. The charge pump voltage doubling circuit 10 includes a multi-stage charge pump 10a. As the frequency signals clk and clkb with opposite phase sequences are driven in turn, the voltage generated by the subsequent charge pump 10a becomes higher and higher. The number of charge pumps 10a included in the charge pump voltage doubling circuit 10 can be determined according to the values of the power supply voltage Vdd and the output voltage Vout.
[0004] exist Figure 1 In the embodiment, each charge pump 10a includes a secondary reverse driver, a boot capacitor Cb and a pass MOS connected in series. The two ends of the boot capacitor Cb receive a boost voltage Vb and a driving clock signal clkd. In the charge pump 10a, the boot capacitor Cb needs to occupy a larger area. Therefore, if the area of the boot capacitor Cb can be reduced, the production cost of the semiconductor circuit can be reduced. Summary of the invention
[0005] The present invention relates to a method of utilizing the capacitance parasitic effect of an idle metal layer as a metal capacitor. The metal capacitor can be used in conjunction with a transistor capacitor to increase the capacitance value without using additional area.
[0006] According to a first aspect of the present invention, a metal capacitor is proposed, comprising: a first metal layer and a second metal layer. The first metal layer is arranged above a substrate, and the second metal layer is arranged above the first metal layer. The first metal layer comprises: a first electrode sheet and a second electrode sheet. A first planar capacitor is formed between the first electrode sheet and the second electrode sheet. The second metal layer comprises: a third electrode sheet and a fourth electrode sheet. A second planar capacitor is formed between the third electrode sheet and the fourth electrode sheet. At least a portion of the fourth electrode sheet is located above the first electrode sheet, and a first longitudinal capacitor is formed between the first electrode sheet and the fourth electrode sheet. At least a portion of the third electrode sheet is located above the second electrode sheet, and a second longitudinal capacitor is formed between the second electrode sheet and the third electrode sheet.
[0007] According to a second aspect of the present invention, a metal capacitor is provided, comprising: at least one metal layer disposed above a transistor capacitor. The at least one metal layer comprises: a first electrode sheet and a second electrode sheet. The first electrode sheet receives a first voltage, and the second electrode sheet receives a second voltage.
[0008] In order to better understand the above and other aspects of the present invention, embodiments are given below and described in detail with reference to the accompanying drawings: BRIEF DESCRIPTION OF THE DRAWINGS
[0009] Figure 1 Schematic diagram of the charge pump voltage doubler circuit.
[0010] Figure 2 FIG. 4 is a schematic diagram of connecting the metal capacitor C_MET and the transistor capacitor C_MOS in parallel.
[0011] Figure 3 A schematic diagram of forming an electrode pattern using a metal layer above a transistor capacitor.
[0012] Figure 4 A schematic diagram of an embodiment of disposing electrode sheets on two metal layers to generate a capacitance effect according to the capacitance pattern of the electrode sheets.
[0013] Figure 5A , Figure 5B , Figure 5C , Figure 5D Schematic diagram of the mutual capacitance formed by the electrodes on the two metal layers.
[0014] Figure 6 Schematic diagram of the electrode sheet ELED1.
[0015] Figure 7 Schematic diagram of the electrode pattern included in the electrode sheet ELED1.
[0016] Figure 8 Schematic diagram of the electrode sheet ELED2.
[0017] Fig. 9 It is a schematic diagram of the electrode pattern included in the electrode sheet ELED2.
[0018] Fig.10 for Figure 6 The electrode sheet ELED1 and Figure 8 Schematic diagram of the metal layer MTL1 composed of the electrode sheet ELED2.
[0019] Fig.11 Schematic diagram of the electrode sheet ELED3.
[0020] Fig.12 It is a schematic diagram of the electrode pattern included in the electrode sheet ELED3.
[0021] Fig.13 Schematic diagram of electrode sheet ELED4.
[0022] Fig.14 It is a schematic diagram of the electrode pattern included in the electrode sheet ELED4.
[0023] Fig.15 for Fig.11 The electrode sheet ELED3 and Fig.13 Schematic diagram of the metal layer MTL1 composed of the electrode piece ELED4.
[0024] Fig.16 The schematic diagram is a diagram of forming electrode sheets with electrode patterns interlaced with each other on multiple metal layers.
[0025] Fig.17 A schematic diagram of another embodiment of disposing electrode sheets on two metal layers to generate a capacitance effect according to a capacitance pattern of the electrode sheets.
[0026] Fig.18 FIG. 1 is a schematic diagram of an embodiment in which the electrode sheet on the metal layer MTL1 includes two sections.
[0027] Fig.19 for Fig.18 Schematic diagram of the electrode sheet ELED1.
[0028] Fig. 20 for Fig.18 Schematic diagram of the electrode pattern included in the electrode sheet ELED1.
[0029] Fig.21 for Fig.18 Schematic diagram of the electrode sheet ELED2.
[0030] Fig. 22 for Fig.18 Schematic diagram of the electrode pattern included in the electrode sheet ELED2.
[0031] Fig.23 FIG. 1 is a schematic diagram of another embodiment in which the electrode sheet on the metal layer MTL1 includes two sections.
[0032] Fig.24 for Fig.23 Schematic diagram of the electrode sheet ELED1.
[0033] Fig.25 for Fig.23 Schematic diagram of the electrode pattern included in the electrode sheet ELED1.
[0034] Fig.26 for Fig.23 Schematic diagram of the electrode sheet ELED2.
[0035] Fig. 27 for Fig.23 Schematic diagram of the electrode pattern included in the electrode sheet ELED2.
[0036] Fig.28 FIG. 1 is a schematic diagram of an embodiment in which the electrode sheet on the metal layer MTL1 includes four segments.
[0037] Fig.29 FIG. 1 is a schematic diagram of another embodiment in which the electrode sheet on the metal layer MTL1 includes four segments.
[0038]
Explanation of symbols
[0039] Charge pump voltage doubler circuit 10 Power supply voltage Vdd
[0040] Output voltage Vout Frequency signal Clk, Clkb
[0041] Frequency drive signal Clkd Charge pump 10a
[0042] Boost voltage Vb Boost capacitor Cb
[0043] Voltage V1, V2 Transistor Capacitance C_MOS
[0044] Polysilicon layers 31a, 31c Diffusion layer 31b
[0045] Metal capacitor C_MET
[0046] Electrode sheets ELED1, ELED2, ELED3, ELED4, mELED1, mELED2, mELED3, mELED4, mELED5, mELED6, mELED7, mELED8, oELED1 , oELED2, oELED3, oELED4, s2ELED1, s2ELED2, s2ELED1', s2ELED2', s4ELED1, s4ELED2, s4ELED1', s4ELED2'
[0047] Metal layer MTL, MTL1, MTL2, mMTL1, mMTL2, mMTL3, mMTL4, oMTL1, oMTL2, s2MTL1, s2MTL1', s4MTL1, s4MTL1'
[0048] Planar capacitance Ch, Ch1, Ch2 Vertical capacitance Cv1, Cv2
[0049] Shared electrodes cmn11, cmn12, cmn21, cmn22, s2cmn11, s2cmn12, s2cmn11', s2cmn12'
[0050] Electrode groups GP11a, GP11b, GP21a, GP21b, s2GP11a, s2GP11b, s2GP11c, s2GP11a', s2GP11b', s2GP11c'
[0051] Main electrodes M11a, M11b, M21a, M21b, s2M11a, s2M11c, s2M11b, s2M11a', s2M11c', s2M11b'
[0052] Branch electrodes br11a, br11b, b21a, b21b, s2br11a, s2br11c1, s2br11c2, s2br11b, s2br11a', s2br11c1', s2br11c2', s2br11b'
[0053] Bending electrodes bnd12, bnd22, s2bnd12a, s2bnd12b, s2bnd12a', s2bnd12b'
[0054] Long electrodes eledL12, eledL22, s2bnd12aL, s2bnd12bL, s2bnd12aL', s2bnd12bL'
[0055] Short electrodes eledS12a, eledS12b, eledS22a, eledS22b, s2bnd12aSa, s2bnd12aSb, sbnd12bSa, s2bnd12bSb, s2bnd12aSa', s2bnd12aSb', sbnd12bSa', s2bnd12bSb' DETAILED DESCRIPTION
[0056] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.
[0057] In semiconductor circuits, MOS transistors are usually used as capacitors. However, when MOS transistors are used as capacitors, additional area is required. Therefore, how to reduce the area of the boost capacitor Cb in semiconductor circuits is an important issue. For ease of explanation, this article will refer to the capacitor implemented using CMOS transistors as transistor capacitor C_MOS.
[0058] In a memory circuit, multiple metal layers are usually provided to enable access to memory cells. These metal layers are mainly used for the related control of the memory cell circuit, but these metal layers are not used in circuits that are not the main circuits of the memory cell (for example, the transistor capacitor C_MOS of the charge pump). In other words, the metal layer located above the transistor capacitor C_MOS is equivalent to being idle. Therefore, the present invention utilizes this idle metal layer located above the transistor capacitor C_MOS to form a metal capacitor C_MET. Then, the metal capacitor C_MET is connected in parallel with the transistor capacitor C_MOS to achieve the effect of increasing the capacitance value of the boost capacitor Cb. Similarly, in other circuits using a charge pump, if there is an idle metal layer, the effect of increasing the capacitance value of the boost capacitor Cb can also be achieved in a similar manner.
[0059] See also Figure 2 FIG. 1 is a schematic diagram of connecting a metal capacitor C_MET and a transistor capacitor C_MOS in parallel. According to an embodiment of the present invention, the boost capacitor Cb includes a metal capacitor C_MET and a transistor capacitor C_MOS.
[0060] In the transistor capacitor C_MOS, the gate of the transistor is connected to the boost voltage Vb, and the source and drain of the transistor are connected to the frequency driving signal clkd. On the other hand, the two ends of the metal capacitor C_MET receive the boost voltage Vb and the frequency driving signal clkd respectively. Therefore, the metal capacitor C_MET and the transistor capacitor C_MOS are connected in parallel between the boost voltage Vb and the frequency driving signal clkd. For ease of explanation, this article defines the boost voltage Vb as voltage V1, and assumes that the frequency driving signal clkd is defined as voltage V2.
[0061] By connecting the metal capacitor C_MET and the transistor capacitor C_MOS in parallel, the capacitance value of the boost capacitor Cb can be increased. According to the simulation results, when the metal capacitor C_MET is used, the capacitance value of the boost capacitor Cb can be increased by about 40%. Since the metal capacitor C_MET is implemented using an idle metal layer, it does not occupy additional area. When the boost capacitor Cb uses the metal capacitor C_MET to provide part of the capacitance value, the area required for the transistor capacitor C_MOS can also be relatively reduced.
[0062] See also Figure 3 It is a schematic diagram of forming an electrode pattern using a metal layer above a transistor capacitor. The transistor capacitor C_MOS includes polysilicon (poly) layers 31a, 31c and a diffusion layer (diffusion) 31b. The method of making the transistor capacitor C_MOS is not described in detail here. At least one metal layer MTL is included above the transistor capacitor C_MOS. The metal layer MTL is used as a metal capacitor C_MET. In this embodiment, it is assumed that the width of the transistor capacitor C_MOS and the metal capacitor in the x-direction and the y-direction is approximately 20μm. However, the width value of the metal layer MTL applied in this embodiment is related to the design parameters, and the scope of the present invention is not restricted by these values. In addition, the position of the metal capacitor C_MET is above the transistor capacitor C_MOS (in the positive direction of the z-axis). The layered structure of the transistor capacitor C_MOS is defined here as a substrate.
[0063] exist Figure 3 In FIG. 1 , it is assumed that the metal layer MTL1 includes electrode sheets ELED1 and ELED2. In this paper, the electrode (sheet) for receiving the voltage V1 is represented by the diagonal shading from the upper right to the lower left, and the electrode (sheet) for receiving the voltage V2 is represented by the dotted shading. Figure 3 In the embodiment, the electrode sheet ELED1 is used to receive the voltage V1, and the electrode sheet ELED2 receives the voltage V2. Since the electrode sheets ELED1 and ELED2 receive different voltages, the gap between the electrode sheets ELED1 and ELED2 will accumulate charges and form a capacitive parasitic effect. Therefore, a capacitor will be formed between the electrode sheets ELED1 and ELED2.
[0064] In this article, the capacitance formed between different electrode sheets of the same metal layer is defined as a plane capacitance Ch. The capacitance value of the plane capacitance Ch is proportional to the relative surface area between the electrode sheets on both sides, and inversely proportional to the distance between the electrode sheets on both sides. Therefore, when the number of electrodes on the electrode sheet is more and the spacing is denser, the capacitance value of the plane capacitance Ch can be increased.
[0065] When a semiconductor circuit includes multiple metal layers, in addition to the planar capacitance Ch that may be formed between different electrode sheets in the same metal layer, if the electrodes (sheets) across metal layers receive different voltages, a parasitic capacitance effect may also be formed between the electrodes (sheets). This article defines the capacitance formed across metal layers as vertical capacitance Cv.
[0066] Taking the memory circuit as an example, there may be four metal layers above the transistor capacitor. According to the concept of the present invention, each of the four metal layers may include two electrode sheets for receiving voltages V1 and V2, and the shape of each electrode sheet and the voltage received may vary according to the location. For ease of description, the following only describes the relative position between the metal layer and the electrode sheet, and does not repeat the relationship between the substrate and the metal layer.
[0067] Please also note that, in order to facilitate the description of the positional relationship between the electrode pattern of the electrode sheet and the metal layer, this article assumes that the x-axis, y-axis, and z-axis directions correspond to the length direction, width direction, and height direction of the semiconductor circuit, respectively. Among them, different metal layers represent different positions on the z-axis. In actual applications, the directions and relative positions of the electrode pattern and the metal layer may vary depending on the actual application.
[0068] See also Figure 4 A schematic diagram of an embodiment of providing electrode sheets on two metal layers and generating a capacitance effect according to the capacitance pattern of the electrode sheets. This diagram assumes that there are two metal layers MTL1 and MTL2 above the substrate, wherein the metal layer MTL1 is located above the substrate, and the metal layer MTL2 is located above the metal layer MTL1. Furthermore, the metal layer MTL1 includes electrode sheets ELED1 and ELED2; the metal layer MTL2 includes electrode sheets ELED3 and ELED4. Among them, the electrode sheets ELED1 and ELED3 receive a voltage V1, and the electrode sheets ELED2 and ELED4 receive a voltage V2.
[0069] It can be seen from the enlarged view in the upper right corner of this figure that on the metal layer MTL2, because the electrode sheets ELED3 and ELED4 receive voltages V1 and V2 respectively, a plane capacitor Ch is formed between the electrode sheets ELED3 and ELED4. Similarly, on the metal layer MTL1, because the electrode sheets ELED1 and ELED2 receive voltages V1 and V2 respectively, a plane capacitor Ch is also formed between the electrode sheets ELED1 and ELED2.
[0070] In addition to the planar capacitance formed in each metal layer, in this case, capacitance can also be generated between metal layers by configuring the positions of electrodes. For example, in the electrode sheets ELED1, ELED2, ELED3, and ELED4 of this diagram, if the voltage received by the electrode of the electrode sheet on the metal layer MTL2 is different from the voltage received by the electrode of the electrode sheet on the metal layer MTL1 at the opposite position, a longitudinal capacitance Cv will be formed between the two electrodes.
[0071] Taking the two metal layers MTL1 and MTL2 as an example, at least a portion of the electrode sheet ELED4 is located above the electrode sheet ELED1. Since the electrode sheet ELED1 and the electrode sheet ELED4 receive the voltage V1 and the voltage V2 respectively, a longitudinal capacitor Cv is formed at the overlapping position between the electrode sheet ELED1 and the electrode sheet ELED4. Similarly, since at least a portion of the electrode sheet ELED3 is located above the electrode sheet ELED2, another longitudinal capacitor Cv is formed at the overlapping position between the electrode sheet ELED2 and the electrode sheet ELED3.
[0072] exist Figure 4 In the electrode sheets ELED1, ELED2, ELED3, and ELED4, some of the electrode boundaries are marked with thicker lines, and other electrode boundaries are marked with thinner lines. The electrodes marked with thicker lines will form a longitudinal capacitance Cv between the electrodes at the corresponding positions in the z-axis direction (above / below). On the other hand, the electrodes marked with thinner lines will not form a longitudinal capacitance Cv between the electrodes at the corresponding positions in the z-axis direction (above / below). Further details about the location of the electrodes and whether longitudinal capacitance is generated will be explained in more detailed examples below.
[0073] exist Figure 4 In the embodiment, the electrode sheets ELED1 and ELED3 have similar electrode patterns, and the electrode sheets ELED2 and ELED4 have similar electrode patterns. That is, in the metal layers MTL1 and MTL2, the electrode patterns of the electrode sheets (ELED1 and ELED3) for receiving the voltage V1 are similar to each other; and in the metal layers MTL1 and MTL2, the electrode patterns of the electrode sheets (ELED2 and ELED4) for receiving the voltage V2 are similar to each other.
[0074] according to Figure 4 As shown in FIG. 1 , the electrode sheets ELED1, ELED2, ELED3, and ELED4 form a plurality of planar capacitors Ch and longitudinal capacitors Cv. As to how the planar capacitors Ch and longitudinal capacitors Cv are formed between the electrode sheets ELED1, ELED2, ELED3, and ELED4, and the connection relationship between the planar capacitors Ch and longitudinal capacitors Cv, the following will be described in detail. Figure 5A , Figure 5B , Figure 5C , Figure 5D illustrate.
[0075] See also Figure 5A , Figure 5B , Figure 5C , Figure 5D The diagram is a schematic diagram showing the mutual capacitance formed by the electrodes on the two metal layers. Figure 4 As described above, the relationship between the relative positions of the electrode sheets ELED1, ELED2, ELED3, and ELED4 and the plane capacitance Ch and the vertical capacitance Cv formed can be summarized as follows: Figure 5A shown.
[0076] On the metal layer MTL1, since the electrode sheets ELED1 and ELED2 receive different voltages, a plane capacitor Ch1 is formed between the electrode sheets ELED1 and ELED2; and, on the metal layer MTL2, since the electrode sheets ELED3 and ELED4 receive different voltages, a plane capacitor Ch2 is formed between the electrode sheets ELED3 and ELED4. Between the metal layers MTL1 and MTL2, a longitudinal capacitor Cv1 is formed between the electrode sheets ELED1 and ELED4; and, a longitudinal capacitor Cv2 is formed between the electrode sheets ELED2 and ELED3.
[0077] Viewed from the side (xz plane) Figure 5A The relationship between the planar capacitance Ch1, C2 and the longitudinal capacitance Cv1, Cv2 can be summarized as follows Figure 5B As shown. Moreover, because the electrode sheets ELED1 and ELED3 also receive the voltage V1, Figure 5B The electrodes ELED1 and ELED3 have the same voltage. Figure 5B Can be simplified to Figure 5C Similarly, because the electrodes ELED2 and ELED4 also receive the voltage V2, Figure 5C The electrodes ELED2 and ELED4 have the same voltage. Figure 5C It can be further simplified to Figure 5D .
[0078] according to Figure 5A , Figure 5B , Figure 5C , Figure 5DIt can be seen from the description that by designing the electrode patterns of the electrode sheets ELED1, ELED2, ELED3, and ELED4 on the metal layers MTL1 and MTL2, the effect of multiple capacitors (including vertical capacitors Cv and planar capacitors Ch) connected in parallel can be generated. In other words, this design of the existing unused metal layer and the use of the parasitic effect of the capacitors formed between the electrode patterns can indeed be used as metal capacitors C_MET to achieve the following effect: Figure 2 As shown, the effect of increasing the capacitance value of the boost capacitor Cb is achieved.
[0079] Based on the perspective of the painting, Figure 4 The number of electrodes contained in each electrode sheet ELED1, ELED2, ELED3, and ELED4 is relatively small. In one of the following embodiments, it is assumed that the metal layers MTL1 and MTL2 drawn in the xy plane are drawn more completely in an area of about 20μm*20μm, and 38 columns of electrodes can be set in the direction parallel to the x-axis. However, the area value of this embodiment and the number of electrode columns that can be formed are related to the design parameters, and the scope of the present invention is not limited to these numerical constraints. As mentioned above, the closer the distance between the electrodes, the greater the capacitance value. Therefore, arranging multiple columns of electrodes in a high-density manner can increase the capacitance value of the planar capacitors Ch1 and Ch2.
[0080] Here Figure 6 , Figure 7 Describe the electrode pattern of the electrode sheet ELED1; and Figure 8 , Fig. 9 The electrode pattern of the electrode sheet ELED2 is described. Fig.10 The electrode pattern after the electrode sheets ELED1 and ELED2 on the metal layer MTL1 are combined together is described.
[0081] See also Figure 6 Schematic diagram of electrode sheet ELED1. Electrode sheet ELED1 includes common electrode cmn11 and electrode groups GP11a and GP11b. Common electrode cmn11 is connected to electrode groups GP11a and GP11b at the same time.
[0082] See also Figure 7 Schematic diagram of the electrode pattern included in the electrode sheet ELED1. The left side of the figure is the electrode group GP11a, the right side is the electrode group GP11b, and the bottom is the shared electrode cmn11.
[0083] The electrode group GP11a includes: a main electrode M11a parallel to the y-axis and connected to the common electrode cmn11, and a plurality of branch electrodes br11a parallel to the x-axis. Among them, each branch electrode br11a is equal in length to each other, and each branch electrode br11a is connected to the main electrode M11a at its left end point. The right end point of the branch electrode br11a faces the positive direction of the x-axis. The electrode group GP11b includes: a main electrode M11b parallel to the y-axis and connected to the common electrode cmn11, and a plurality of branch electrodes br11b parallel to the x-axis. Among them, each branch electrode br11b is equal in length to each other, and each branch electrode br11b is connected to the main electrode M11b at its right end point. The left end point of the branch electrode br11b faces the negative direction of the x-axis. Accordingly, the electrode groups GP11a and GP11b present a flat comb shape. Among them, the comb teeth of the electrode group GP11a face the positive direction of the x-axis, while the comb teeth of the electrode group GP11b face the negative direction of the x-axis.
[0084] The common electrode cmn11 is parallel to the x-axis, and its two ends are connected to the bottom of the main electrodes M11a and M11b respectively. The common electrode cmn11 is longer than the branch electrode br11a of the electrode group GP11a, and the common electrode cmn11 is also longer than the branch electrode br11b of the electrode group GP11b.
[0085] Please also see Figure 6 , Figure 7 . On the electrode sheet ELED1, the branch electrodes br11a and the branch electrodes br11b are located in different columns, and the branch electrodes br11a and the branch electrodes br11b are arranged in a finger-like cross-shaped manner. When the metal layer MTL1 includes a total of 38 columns of electrodes, the electrode group GP11a includes a total of 9 branch electrodes br11a, and the electrode group GP11b includes 9 branch electrodes br11b. The shared electrode cmn11 is located in the first column (y=1). The branch electrodes br11a are arranged from the 3rd column at intervals of four columns (y=3,7,…35). The branch electrodes br11b are arranged from the 3rd column at intervals of four columns (y=5,9,…37).
[0086] See also Figure 8 Schematic diagram of the electrode sheet ELED2. The electrode sheet ELED2 includes a common electrode cmn12 and a bent electrode bnd12. The common electrode cmn12 is parallel to the x-axis, and the bent electrode bnd12 is in a zigzag shape.
[0087] See also Fig. 9 Schematic diagram of the electrode pattern included in the electrode sheet ELED2. The upper part of the figure is the common electrode cmn12, and the lower part is the bent electrode bnd12.
[0088] The common electrode cmn12 is parallel to the x-axis, and the length of the common electrode cmn12 is slightly longer than the length of the bent electrode bnd12 in the x-axis. The bent electrode bnd12 includes a plurality of long electrodes eledL12 and a plurality of short electrodes eledS12a and eledS12b. The long electrodes eledL12 are equal in length and parallel to the x-axis, and the left end points of the long electrodes eledL12 are aligned with each other. Figure 8 In the figure, the long electrode eledL12 is located in the even columns (y=even).
[0089] Please also see Figure 8 , Fig. 9 . The short electrodes eledS12a and eledS12b of the bent electrode bnd12 are parallel to the y-axis. Each short electrode eledS12a and eledS12b has an upper endpoint and a lower endpoint. The short electrode eledS12a is connected to the left endpoint of the long electrode eledL12 through the upper endpoint and the lower endpoint; the short electrode eledS12b is connected to the right endpoint of the long electrode eledL12 through the upper endpoint and the lower endpoint. In addition, the positions of the short electrodes eledS12a and eledS12b on the left and right sides connected to the same long electrode eledL12 are not consistent in the y-axis direction.
[0090] For example, the right end points of the long electrodes eledL12 located in the 2nd and 4th columns are respectively connected to the two ends of the short electrodes eledS12b located on the right; the left end points of the long electrodes eledL12 located in the 4th and 6th columns are respectively connected to the two ends of the short electrodes eledS12a located on the left; the right end points of the long electrodes eledL12 located in the 6th and 8th columns are respectively connected to the two ends of the short electrodes eledS12b located on the right; the left end points of the long electrodes eledL12 located in the 8th and 10th columns are respectively connected to the two ends of the short electrodes eledS12 located on the left. The connection relationship between the remaining long electrodes eledL12 and the short electrodes eledS12a and eledS12b is similar and will not be described in detail.
[0091] That is, the positions of the short electrode eledS12a on the left and the short electrode eledS12b on the right on the y-axis are interlaced with each other. In addition, the upper end of the left short electrode eledS12a connected to the long electrode eledL12 located in the 36th column is also connected to the shared electrode cmn12.
[0092] See also Fig.10 for Figure 6 The electrode sheet ELED1 and Figure 8 Schematic diagram of the metal layer MTL1 composed of the electrode sheet ELED2. Figure 6 The electrode sheet ELED1 shown is Figure 8 The electrode sheet ELED2 shown together constitutes Fig.10 The metal layer MTL1 is shown. Please also refer to Figure 6 , Figure 8 , Fig.10 , where the electrode positions of the electrode sheets ELED1 and ELED2 located on the metal layer MTL1 can be summarized as shown in Table 1.
[0093] Table 1
[0094]
[0095] It can be seen from Table 1 that the branch electrodes br11a and br11b of the electrode sheet ELED1 receiving the voltage V1 are mostly located on odd columns, while the long electrode eledL12 of the electrode sheet ELED2 receiving the voltage V2 is mostly located on even columns. Therefore, on the metal layer MTL1, a planar capacitor Ch1 can indeed be formed between the electrodes of each column.
[0096] Next, Fig.11 , Fig.12 Describe the electrode pattern of the electrode sheet ELED3; and Fig.13 , Fig.14 The electrode pattern of the electrode sheet ELED4 is described. Fig.15 The electrode pattern after the electrode sheets ELED3 and ELED4 on the metal layer MTL2 are combined together is described.
[0097] See also Fig.11 Schematic diagram of electrode sheet ELED3. Electrode sheet ELED3 includes common electrode cmn21 and electrode groups GP21a and GP21b. Common electrode cmn21 is connected to electrode groups GP21a and GP21b at the same time.
[0098] See also Fig.12 Schematic diagram of the electrode pattern included in the electrode sheet ELED3. The left side of the figure is the electrode group GP21a, the right side is the electrode group GP21b, and the bottom is the shared electrode cmn21.
[0099] The electrode group GP21a includes: a main electrode M21a parallel to the y-axis and connected to the common electrode cmn21, and a plurality of branch electrodes br21a parallel to the x-axis. Among them, each branch electrode br21a is equal in length to each other, and each branch electrode br21a is connected to the main electrode M21a at its left end point. The right end point of the branch electrode br21a faces the positive direction of the x-axis. The electrode group GP21b includes: a main electrode M21b parallel to the y-axis and connected to the common electrode cmn11, and a plurality of branch electrodes br21b parallel to the x-axis. Among them, each branch electrode br21b is equal in length to each other, and each branch electrode br21b is connected to the main electrode M21b at its right end point. The left end point of the branch electrode br21b faces the negative direction of the x-axis. Accordingly, the electrode groups GP21a and GP21b present a flat comb shape. Among them, the comb teeth of the electrode group GP21a face the positive direction of the x-axis, while the comb teeth of the electrode group GP21b face the negative direction of the x-axis.
[0100] The common electrode cmn21 is parallel to the x-axis, and both ends of the common electrode cmn21 are connected to the bottoms of the main electrodes M21a and M21b respectively. The common electrode cmn21 is longer than the branch electrode br21a of the electrode group GP21a and the branch electrode br21b of the electrode group GP21b.
[0101] Please also see Fig.11 , Fig.12 . On the electrode sheet ELED3, the branch electrodes br21a and the branch electrodes br21b are located in different columns, and the branch electrodes br21a and the branch electrodes br21b are arranged in a finger-like cross-shaped manner. When the metal layer MTL2 contains a total of 38 columns of electrodes, the electrode group GP21a contains a total of 8 branch electrodes br21a, and the electrode group GP21b contains 9 branch electrodes br21b. The shared electrode cmn21 is located in the first column (y=1). The branch electrodes br21a are arranged from the 6th column at intervals of four columns (y=6,10,…34). The branch electrodes br21b are arranged from the 4th column at intervals of four columns (y=4,8,…36).
[0102] See also Fig.13 Schematic diagram of the electrode sheet ELED4. The electrode sheet ELED4 includes a common electrode cmn22 and a bent electrode bnd22. The common electrode cmn22 is parallel to the x-axis, and the bent electrode bnd22 is zigzag-shaped.
[0103] See also Fig.14 Schematic diagram of the electrode pattern included in the electrode sheet ELED4. The upper part of the figure is the common electrode cmn22, and the lower part is the bent electrode bnd22.
[0104] The common electrode cmn22 is parallel to the x-axis, and the length of the common electrode cmn22 is slightly longer than the length of the bent electrode bnd22 in the x-axis. The bent electrode bnd22 includes a plurality of long electrodes eledL22 and a plurality of short electrodes eledS22a and eledS22b. The long electrodes eledL22 are equal in length and parallel to the x-axis, and the left end points of the long electrodes eledL22 are aligned with each other. Fig.13 In the figure, the long electrode eledL12 is located in the 2nd column, the 38th column, and the odd columns between 2 and 38 (y=3, 5, ... 37).
[0105] Please also see Fig.13 , Fig.14 . The short electrodes eledS22a and eledS22b are parallel to the y-axis. The short electrodes eledS22a and eledS22b of the bent electrode bnd22 are parallel to the y-axis. Each short electrode eledS22a and eledS22b has an upper endpoint and a lower endpoint. The short electrode eledS22a is connected to the left endpoint of the long electrode eledL22 through the upper endpoint and the lower endpoint; the short electrode eledS22b is connected to the right endpoint of the long electrode eledL22 through the upper endpoint and the lower endpoint. In addition, the positions of the short electrodes eledS22a and eledS22b on the left and right sides connected to the same long electrode eledL22 in the y-axis direction are not the same.
[0106] For example, the right end points of the long electrodes eledL22 located in the 2nd and 3rd columns are respectively connected to the two ends of the short electrodes eledS22b located on the right; the left end points of the long electrodes eledL22 located in the 3rd and 5th columns are respectively connected to the two ends of the short electrodes eledS22a located on the left; the right end points of the long electrodes eledL22 located in the 5th and 7th columns are respectively connected to the two ends of the short electrodes eledS22b located on the right; the left end points of the long electrodes eledL22 located in the 7th and 9th columns are respectively connected to the two ends of the short electrodes eledS22 located on the left. The connection relationship between the remaining long electrodes eledL22 and the short electrodes eledS22a and eledS22b is similar and will not be described in detail.
[0107] That is, the positions of the short electrode eledS22a on the left and the short electrode eledS22b on the right are staggered on the y-axis. In addition, the upper end of the right short electrode eledS22b connected to the long electrode eledL12 located in the 37th column is also connected to the shared electrode cmn22.
[0108] See also Fig.15 for Fig.11 The electrode sheet ELED3 and Fig.13Schematic diagram of the metal layer MTL1 composed of the electrode piece ELED4. Fig.11 The electrode sheet ELED3 shown is Fig.13 The electrode sheet ELED4 shown together constitutes Fig.15 The metal layer MTL2 is shown. Please also refer to Fig.11 , Fig.13 , Fig.15 The electrode positions of the electrode sheets ELED3 and ELED4 located on the metal layer MTL2 can be summarized as shown in Table 2
[0109]
[0110]
[0111] It can be seen from Table 2 that the branch electrodes br21a and br21b of the electrode sheet ELED3 receiving the voltage V2 are mostly located on even columns, while the long electrode eledL22 of the electrode sheet ELED4 receiving the voltage V2 is mostly located on odd columns. Therefore, on the metal layer MTL2, a planar capacitor Ch2 can indeed be formed between the electrodes of each column.
[0112] As described above, through the design of the electrode pattern, in addition to the planar capacitors Ch1 and Ch2 formed by the metal layers MTL1 and MTL2 on their respective planes, longitudinal capacitors Cv1 and Cv2 can be further formed between the metal layer MTL2 and the metal layer MTL1.
[0113] Please also see Figure 6 , Figure 7 , Fig.13 , Fig.14 As shown in Table 1, Figure 6 , Figure 7 In the embodiment, the branch electrodes br11a of the electrode sheet ELED1 are located in the 3rd, 7th, 11th, 15th, 19th, 23rd, 27th, 31st, and 35th columns, and the branch electrodes Br11b are located in the 5th, 9th, 13th, 17th, 21st, 25th, 29th, 33rd, and 37th columns. As shown in Table 2, Fig.13 , Fig.14 In the figure, the long electrode eledL22 of the bent electrode bnd22 of the electrode sheet ELED4 is located in the 2nd column and all the odd columns from the 3rd to the 37th columns. Since the metal layer MTL2 is located above the metal layer MTL1, based on the above description, it can be known that the position of the long electrode eledL22 of the electrode sheet ELED4 is mostly above the position of the branch electrode br11a of the electrode sheet ELED1. In addition, the electrode sheet ELED1 is used to receive the voltage V1, and the electrode sheet receiving ELED4 is used to receive the voltage V2. It can be seen from this that if the metal layer MTL2 is located above the metal layer MTL1, the long electrode eledL22 of the electrode sheet ELED4 is located above the branch electrode br11a of the electrode sheet ELED1. Fig.15 The metal layer MTL2 is placed on Fig.10Directly above the metal layer MTL1, a vertical capacitor Cv1 will be formed between the upper and lower electrodes of all odd-numbered columns from the 3rd to the 37th columns.
[0114] Please also see Figure 8 , Fig. 9 , Fig.11 , Fig.12 As shown in Table 1, Figure 8 , Fig. 9 In the embodiment, the long electrodes of the bent electrodes of the electrode sheet ELED2 are located in even columns (y=2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36). As shown in Table 2, Fig.11 , Fig.12 In the figure, the branch electrode br21a of the electrode sheet ELED3 is located at the 6th, 10th, 14th, 18th, 22nd, 26th, 30th, and 34th columns, and the branch electrode br21b is located at the 4th, 8th, 12th, 16th, 20th, 24th, 28th, 32nd, and 36th columns. Since the metal layer MTL2 is located above the metal layer MTL1, based on the above description, it can be known that the positions of the branch electrodes br21a and br21b of the electrode sheet ELED3 are both above the position of the long electrode eledL12 of the electrode sheet ELED2. In addition, the electrode sheet ELED2 is used to receive the voltage V2, and the electrode sheet ELED3 is used to receive the voltage V1. It can be seen from this that if the metal layer MTL2 is located above the metal layer MTL1, it can be known that the branch electrodes br21a and br21b of the electrode sheet ELED3 are located above the position of the long electrode eledL12 of the electrode sheet ELED2. In addition, the electrode sheet ELED2 is used to receive the voltage V2, and the electrode sheet ELED3 is used to receive the voltage V1. Fig.15 The metal layer MTL2 is placed on Fig.10 Directly above the metal layer MTL1, a vertical capacitor Cv2 will be formed between the upper and lower electrodes of all even-numbered columns from the 4th to the 36th columns.
[0115] The relationship between the metal layer and the electrode sheet described above can be further applied to more metal layers. Fig.16 Assume that there are four metal layers. In actual application, the number of metal layers will be determined by the number of layers of the semiconductor process itself.
[0116] See also Fig.16 Schematic diagram of electrode sheets with electrode patterns interlaced with each other formed on multiple metal layers. For ease of explanation, the positions of the electrode sheets mELED1, mELED2, mELED3, mELED4, mELED5, mELED6, mELED7, and mELED8 in the electrode patterns on the respective metal layers mMTL1, mMTL2, mMTL3, and mMTL4 are sorted in Table 3 according to the number of columns.
[0117] Table 3
[0118]
[0119]
[0120] As mentioned above, the electrodes belonging to different metal layers will form a longitudinal capacitor, while the electrodes belonging to the same metal layer will form a planar capacitor. Fig.16 When the electrode pattern is designed, a plane capacitor Ch is formed between the electrode sheets mELED1 and mELED2 of the metal layer mMTL1; a plane capacitor Ch is formed between the electrode sheets mELED3 and mELED4 of the metal layer mMTL2; a plane capacitor Ch is formed between the electrode sheets mELED5 and mELED6 of the metal layer mMTL3; and a plane capacitor Ch is formed between the electrode sheets mELED7 and mELED8 of the metal layer mMTL4. In addition, a longitudinal capacitor Cv is formed between the metal layers mMTL1 and mMTL2; a longitudinal capacitor Cv is formed between the metal layers mMTL2 and mMTL3; and a longitudinal capacitor Cv is formed between the metal layers mMTL3 and mMTL4.
[0121] In the aforementioned embodiment, it is assumed that the electrode sheets receiving the voltage V1 have similar appearances, and it is assumed that the electrode sheets receiving the voltage V2 have similar appearances. That is, the electrode sheet ELED1 on the metal layer MTL1 for receiving the voltage V1 and the electrode sheet ELED3 on the metal layer MTL2 for receiving the voltage V1 are both composed of an electrode group and a shared electrode located in the first column. Also, the electrode sheet ELED2 on the metal layer MTL1 for receiving the voltage V2 and the electrode sheet ELED4 on the metal layer MTL2 for receiving the voltage V2 are both composed of a shared electrode and a bent electrode. However, in actual applications, it is not necessary to limit the electrode sheets receiving the same voltage to have similar appearances. For example, in Fig.17 In the example, electrode sheets located in odd-numbered metal layers and electrode sheets located in even-numbered metal layers receive the same voltage using electrode sheets having different electrode pattern appearances.
[0122] See also Fig.17 A schematic diagram of another embodiment of providing electrode sheets on two metal layers to generate a capacitance effect according to the capacitance pattern of the electrode sheets. For ease of explanation, the number of columns of the electrodes of the electrode sheets mELED1, mELED2, mELED3, mELED4, mELED5, mELED6, mELED7, and mELED8 on each metal layer mMTL1, mMTL2, mMTL3, and mMTL4 is presented in a table.
[0123] Table 4
[0124]
[0125] and Figure 4 In comparison, although Fig.17The electrode patterns of the electrode sheets oELED3 and oELED4 on the metal layer MTL2 in the embodiment are slightly different in appearance and relative positions of the electrodes. Fig.17 When the electrode pattern is designed in the same manner, the relationship between the voltages V1 and V2 received by the electrode sheets oELED1, oELED2, oELED3, and oELED4 remains unchanged. That is, on the metal layer oMTL1, the electrode sheet oELED1 still receives the voltage V1, and the electrode sheet oELED2 receives the voltage V2; and, on the metal layer oMTL2, the electrode sheet oELE4 still receives the voltage V2, and the electrode sheet oELED3 receives the voltage V1. Therefore, the relationship between the longitudinal capacitance Cv formed between the electrode sheets of different metal layers and the planar capacitance Ch formed between the electrode sheets of the same metal layer remains similar to the above description.
[0126] exist Fig.17 In the embodiment, the electrode sheets oELED1 and oELED4 have similar electrode patterns, and the electrode sheets oELED2 and oELED3 have similar electrode patterns. That is, the electrode pattern of the electrode sheet (oELED1) receiving the voltage V1 in the metal layer oMTL1 is similar to the electrode pattern of the electrode sheet (oELED4) receiving the voltage V2 in the metal layer oMTL2; and the electrode pattern of the electrode sheet (oELED2) receiving the voltage V2 in the metal layer oMTL1 is similar to the electrode pattern of the electrode sheet (oELED3) receiving the voltage V1 in the metal layer oMTL2.
[0127] Furthermore, the present invention can further change the electrode pattern, for example, further divide it into multiple sections in the direction of the x-axis, and change the number of bent electrodes and electrode groups according to the number of sections. As the number of bent electrodes and electrode groups is different, the arrangement of their relative positions may also change differently. The following description of dividing the electrode sheet into multiple sections only takes a single metal layer as an example. In actual application, the electrode sheets on other metal layers must also be modified accordingly. This will not further describe how the electrode pattern of multiple metal layers should be designed.
[0128] See also Fig.18 FIG. 1 is a schematic diagram of an embodiment in which the electrode sheet on the metal layer MTL1 includes two sections. The metal layer s2MTL1 includes electrode sheets s2ELED1 and s2ELED2. Fig.19 , Fig. 20 The electrode pattern of the electrode sheet s2ELED1 and the Fig.21 , Fig. 22 The electrode pattern of the electrode sheet s2ELED2 is described.
[0129] See also Fig.19 for Fig.18Schematic diagram of an electrode sheet ELED1. The electrode sheet s2ELED1 includes electrode groups s2GP11a, s2GP11b, s2GP11c, and a common electrode s2cmn11. The common electrode s2cmn11 is connected to the electrode groups s2GP11a, s2GP11b, s2GP11c at the same time.
[0130] See also Fig. 20 for Fig.18 Schematic diagram of the electrode pattern included in the electrode sheet ELED1. The electrode group s2GP11a includes the main electrode s2M11a and the branch electrode s2br11a; the electrode group s2GP11b includes the main electrode s2M11b and the branch electrode s2br11b; and the electrode group s2GP11c includes the main electrode s2M11c and the branch electrodes s2br11c1 and s2br11c2. The main electrodes s2M11a, s2M11b, and s2M11c are all parallel to the y-axis direction, and the branch electrodes s2br11a, s2br11b, s2br11c1, and s2br11c2 are all parallel to the x-axis.
[0131] The electrode groups s2GP11a and s2GP11b are in a flat comb shape. Figure 7 The electrode groups GP11a and GP11b are similar, so they are not described in detail. On the other hand, the electrode group s2GP11c presents a fishbone shape. Since the electrode group s2GP11c includes branch electrodes s2br11c1 and s2br11c2 on both sides of the main electrode s2M11c, the number of branch electrodes s2br11c1 and s2br11c2 included in the electrode group s2GP11c is greater than the number of branch electrodes s2br11a included in the electrode group s2GP11a, and is also greater than the number of branch electrodes s2br11b included in the electrode group s2GP11b. In addition, the shared electrode s2cmn11 is parallel to the x-axis direction. The two ends of the shared electrode s2cmn11 are respectively connected to the main electrodes s2M11a and s2M11b, and the middle of the shared electrode s2cmn11 is connected to the main electrode s2M11c.
[0132] See also Fig.21 for Fig.18 Schematic diagram of the electrode sheet ELED2. The electrode sheet s2ELED2 includes a common electrode s2cmn12 and bent electrodes s2bnd12a and s2bnd12b.
[0133] See also Fig. 22 for Fig.18Schematic diagram of the electrode pattern included in the electrode sheet ELED2. The shared electrode s2cmn12 is parallel to the x-axis direction, and the bent electrodes s2bnd12a and s2bnd12b have similar shapes and are symmetrical (mirror images) to each other. Therefore, the number of long electrodes s2bnd12aL of the bent electrode s2bnd12a is equal to the number of long electrodes s2bnd12bL of the bent electrode s2bnd12b. In addition, the number of short electrodes s2bnd12aSa of the bent electrode s2bnd12a is equal to the number of short electrodes s2bnd12bSb of the bent electrode s2bnd12b; and, the number of short electrodes s2bnd12aSb of the bent electrode s2bnd12a is equal to the number of short electrodes s2bnd12bSa of the bent electrode s2bnd12b.
[0134] Will Fig.19 The electrode sheet s2ELED1 and Fig.21 After combining the electrode sheets s2ELED2, the following can be obtained: Fig.18 The metal layer s2MTL is shown. The main electrode s2M11c divides the metal layer s2MTL into two sections. The electrode patterns of the electrode sheet s2ELED1 in section x=1 and section x=2 are mirror images of each other, and the electrode patterns of the electrode sheet s2ELED2 in section x=1 and section x=2 are also mirror images of each other.
[0135] See also Fig.23 FIG. 1 is a schematic diagram of another embodiment in which the electrode sheet on the metal layer MTL1 includes two sections. The metal layer s2MTL1′ includes electrode sheets s2ELED1′ and s2ELED2′. Fig.24 , Fig.25 The electrode pattern of the electrode sheet s2ELED1' and the Fig.26 , Fig. 27 The electrode pattern of the electrode sheet s2ELED2' is described.
[0136] See also Fig.24 for Fig.23 Schematic diagram of an electrode sheet ELED1. The electrode sheet s2ELED1' comprises electrode groups s2GP11a', s2GP11b', s2GP11c', and a shared electrode s2cmn11'.
[0137] See also Fig.25 for Fig.23Schematic diagram of the electrode pattern included in the electrode sheet ELED1. The electrode group s2GP11a' includes the main electrode s2M11a' and the branch electrode s2br11a'; the electrode group s2GP11b' includes the main electrode s2M11b' and the branch electrode s2br11b'; and the electrode group s2GP11c' includes the main electrode s2M11c' and the branch electrodes s2br11c1' and s2br11c2'. The main electrodes s2M11a', s2M11b', and s2M11c' are all parallel to the y-axis direction, and the branch electrodes s2br11a', s2br11b', s2br11c1', and s2br11c2' are all parallel to the x-axis.
[0138] The electrode groups s2GP11'a and s2GP11b' are in a flat comb shape. Fig.11 The electrode groups GP21a and GP21b are similar, so they are not described in detail. On the other hand, the electrode group s2GP11c' presents a fishbone shape. Since the electrode group s2GP11c' includes branch electrodes s2br11c1' and s2br11c2' on both sides of the main electrode s2M11c', the number of branch electrodes s2br11c1' and s2br11c2' included in the electrode group s2GP11c' is greater than the number of branch electrodes s2br11a' included in the electrode group s2GP11a', and is also greater than the number of branch electrodes s2br11b' included in the electrode group s2GP11b'. In addition, the shared electrode s2cmn11' is parallel to the x-axis direction. Both ends of the common electrode s2cmn11' are connected to the main electrodes s2M11a' and s2M11b' respectively, and the middle of the common electrode s2cmn11' is connected to the main electrode s2M11c'.
[0139] See also Fig.26 for Fig.23 Schematic diagram of an electrode sheet ELED2. The electrode sheet s2ELED2' comprises a common electrode s2cmn12' and bent electrodes s2bnd12a' and s2bnd12b'.
[0140] See also Fig. 27 for Fig.23Schematic diagram of the electrode pattern included in the electrode sheet ELED2. The shared electrode s2cmn12' is parallel to the x-axis, and the bent electrodes s2bnd12a' and s2bnd12b' have the same shape and are arranged parallel to each other. Therefore, the number of long electrodes s2bnd12aL' of the bent electrode s2bnd12a' is equal to the number of long electrodes s2bnd12bL' of the bent electrode s2bnd12b'. Furthermore, the number of short electrodes s2bnd12aSa' of the meander electrode s2bnd12a' is equal to the number of short electrodes s2bnd12bSa' of the meander electrode s2bnd12b'; and the number of short electrodes s2bnd12aSb' of the meander electrode s2bnd12a' is equal to the number of short electrodes s2bnd12bSb' of the meander electrode s2bnd12b'.
[0141] Will Fig.24 The electrode sheet s2ELED1' and Fig.26 After combining the electrode sheet s2ELED2', the following can be obtained: Fig.23 The metal layer s2MTL' is shown. The main electrode s2M11c' divides the metal layer s2MTL' into two sections. The electrode pattern of the electrode sheet s2ELED1' in section x=1 and section x=2 is the same, and the electrode pattern of the electrode sheet s2ELED2' in section x=1 and section x=2 is also the same.
[0142] See also Fig.28 The schematic diagram of an embodiment in which the electrode sheet on the metal layer MTL1 includes four segments. The metal layer MTL1 includes electrode sheets s4ELED1 and s4ELED2. The electrode sheet s4ELED1 includes 4 electrode groups and a shared electrode, and the electrode sheet s4ELED2 includes a shared electrode and 4 bent electrodes. Among them, the electrode patterns of segment x=1 and segment x=2 are mirror images of each other; the electrode patterns of segment x=3 and segment x=4 are mirror images of each other. In addition, the electrode patterns of the two segments on the left (x=1 and x=2) and the electrode patterns of the two segments on the right (x=3 and x=4) are mirror images of each other.
[0143] See also Fig.29 Schematic diagram of another embodiment in which the electrode sheet on the metal layer MTL1 includes four segments. The metal layer MTL1' includes electrode sheets s4ELED1' and s4ELED2'. The metal layer MTL1 includes electrode sheets s4ELED1' and s4ELED2'. The electrode sheet s4ELED1' includes four electrode groups and one common electrode, and the electrode sheet s4ELED2' includes one common electrode and four bent electrodes. The electrode pattern of each segment x=1, 2, 3, 4 is the same.
[0144] According to the above description, the relationship between the number of segments (X) included in the electrode sheet and the number of electrode groups, common electrodes and bent electrodes can be summarized as shown in Table 5.
[0145] Table 5
[0146]
[0147]
[0148] As the number of segments increases, the number of electrode groups and the number of bent electrodes included in the electrode sheet also increase. Assuming that it is divided into X segments, the electrode sheet ELED1 contains (X+1) electrode groups, and the electrode sheet ELED2 contains X bent electrodes. In addition, the number of shared electrodes included in the electrode sheets ELED1 and ELED3 does not change with the change in the number of segments, and always contains 1 shared electrode. As mentioned above, when the number of segments included in the electrode sheet on the metal layer MTL1 changes, the electrode sheets on other metal layers also need to be modified accordingly. The modifications in this part are changes in application and will not be described in detail here.
[0149] In summary, the present invention provides a method of designing the electrode pattern of the idle metal layer so that the electrode sheets on the metal layer form a parasitic capacitance effect. By changing the electrode patterns of the electrode sheets ELED1 and ELED2 on the metal layer MTL1 and the electrode sheets ELED3 and ELED4 on the metal layer MTL2, a metal capacitor C_MET connected in parallel with the transistor capacitor C_MOS can be provided. Since an idle metal layer is used and the characteristics of the parasitic capacitance between the metal layers are directly utilized, the method of the present invention can effectively increase the capacitance value of the boost capacitor Cb without occupying additional circuits.
[0150] The specific embodiments described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.
Claims
1. A metal capacitor, comprising: A first metal layer, disposed above a substrate, comprises: a first electrode sheet; and a second electrode sheet, wherein a first planar capacitor is formed between the first electrode sheet and the second electrode sheet; and A second metal layer, disposed above the first metal layer, comprises: a third electrode sheet; and a fourth electrode sheet, wherein a second planar capacitor is formed between the third electrode sheet and the fourth electrode sheet, wherein, At least a portion of the fourth electrode sheet is located above the first electrode sheet, and a first longitudinal capacitor is formed between the first electrode sheet and the fourth electrode sheet, and At least a portion of the third electrode sheet is located above the second electrode sheet, and a second longitudinal capacitor is formed between the second electrode sheet and the third electrode sheet; Wherein, the first electrode sheet comprises: a first common electrode, parallel to a first direction; A first electrode group, comprising: a first main electrode, parallel to a second direction, connected to the first common electrode; and A plurality of first branch electrodes parallel to the first direction, wherein each of the first branch electrodes comprises a first end and a second end, and the first end of each of the first branch electrodes is connected to the first main electrode; and A second electrode group, comprising: a second main electrode, parallel to the second direction, connected to the first common electrode; and A plurality of second branch electrodes are parallel to the first direction, wherein each of the second branch electrodes comprises a first end and a second end, and the second end of each of the second branch electrodes is connected to the second main electrode, wherein the second ends of the first branch electrodes face the second main electrode, and the first ends of the second branch electrodes face the first main electrode; The second electrode sheet comprises: a second common electrode, parallel to the first direction; A first bent electrode, comprising: A plurality of long electrodes, parallel to the first direction and arranged in parallel along the second direction, wherein each of the long electrodes has a first end and a second end; and A plurality of short electrodes are parallel to the second direction, wherein a first short electrode among the short electrodes is connected to the second common electrode, The positions of the short electrodes of the first bent electrode of a first portion in the first direction are aligned with each other, the positions of the short electrodes of the first bent electrode of a second portion in the first direction are aligned with each other, and the positions of the short electrodes of the first bent electrode in the second direction are staggered with each other, wherein the short electrodes of the first bent electrode of the first portion are connected to the first ends of the long electrodes of the first bent electrode, and the short electrodes of the first bent electrode of the second portion are connected to the second ends of the long electrodes of the first bent electrode; The third electrode sheet comprises: a third common electrode, parallel to the first direction; A third electrode group, comprising: a third main electrode, parallel to the second direction, connected to the third common electrode; and a plurality of third branch electrodes parallel to the first direction, wherein each of the third branch electrodes comprises a first end and a second end, and the first end of each of the third branch electrodes is connected to the third main electrode; and A fourth electrode group, comprising: a fourth main electrode, parallel to the second direction, connected to the third common electrode; and A plurality of fourth branch electrodes are parallel to the first direction, wherein each of the fourth branch electrodes comprises a first end and a second end, and the second end of each of the fourth branch electrodes is connected to the fourth main electrode, wherein the second ends of the third branch electrodes face the fourth main electrode, and the first ends of the fourth branch electrodes face the third main electrode; The fourth electrode sheet comprises: a fourth common electrode, parallel to the first direction; A third bent electrode, comprising: A plurality of long electrodes, parallel to the first direction and arranged in parallel along the second direction, wherein each of the long electrodes has a first end and a second end; and A plurality of short electrodes are parallel to the second direction, wherein a first short electrode among the short electrodes of the third bent electrode is connected to the fourth common electrode, The positions of the short electrodes of the third bent electrode of a first portion in the first direction are aligned with each other, the positions of the short electrodes of the third bent electrode of a second portion in the first direction are aligned with each other, and the positions of the short electrodes of the third bent electrode in the second direction are staggered with each other, The short electrodes of the first portion of the third bent electrode are connected to the first ends of the long electrodes of the third bent electrode, and the short electrodes of the second portion of the third bent electrode are connected to the second ends of the long electrodes of the third bent electrode.
2. The metal capacitor according to claim 1, wherein: The first electrode sheet and the third electrode sheet receive a first voltage; and The second electrode sheet and the fourth electrode sheet receive a second voltage, The first planar capacitor, the second planar capacitor, the first longitudinal capacitor and the second longitudinal capacitor are connected in parallel.
3. A metal capacitor comprising: At least one metal layer is disposed above a transistor capacitor and includes: a first electrode sheet receiving a first voltage; and a second electrode sheet receiving a second voltage; The at least one metal layer comprises: a first metal layer; and a second metal layer, in, A first planar capacitor is formed between the first electrode sheet of the first metal layer and the second electrode sheet of the first metal layer, and a second planar capacitor is formed between the first electrode sheet of the second metal layer and the second electrode sheet of the second metal layer, wherein At least a portion of the second electrode sheet of the second metal layer is located above the first electrode sheet of the first metal layer, and a first longitudinal capacitor is formed between the first electrode sheet of the first metal layer and the second electrode sheet of the second metal layer, and, At least a portion of the first electrode sheet of the second metal layer is located above the position of the second electrode sheet of the first metal layer, and a second longitudinal capacitor is formed between the second electrode sheet of the first metal layer and the first electrode sheet of the second metal layer. The first planar capacitor, the second planar capacitor, the first longitudinal capacitor and the second longitudinal capacitor are connected in parallel.
4. The metal capacitor according to claim 3, wherein The first electrode sheet of the first metal layer has a first electrode pattern, the second electrode sheet of the first metal layer has a second electrode pattern, the first electrode sheet of the second metal layer has a third electrode pattern, and the second electrode sheet of the second metal layer has a fourth electrode pattern, wherein The plurality of electrodes included in the first electrode pattern and the plurality of electrodes included in the second electrode pattern are arranged in a staggered manner, and the plurality of electrodes included in the third electrode pattern and the plurality of electrodes included in the fourth electrode pattern are arranged in a staggered manner. The first electrode pattern is similar to the third electrode pattern, and the second electrode pattern is similar to the fourth electrode pattern.
5. The metal capacitor according to claim 3, wherein The first electrode sheet of the first metal layer has a first electrode pattern, the second electrode sheet of the first metal layer has a second electrode pattern, the first electrode sheet of the second metal layer has a third electrode pattern, and the second electrode sheet of the second metal layer has a fourth electrode pattern, wherein The plurality of electrodes included in the first electrode pattern and the plurality of electrodes included in the second electrode pattern are arranged in a staggered manner, and the plurality of electrodes included in the third electrode pattern and the plurality of electrodes included in the fourth electrode pattern are arranged in a staggered manner. The first electrode pattern is similar to the fourth electrode pattern, and the second electrode pattern is similar to the third electrode pattern.
Citation Information
Patent Citations
Differential MOS capacitor semiconductor device
TW201417275A
Semiconductor device
US20060237819A1