differential amplifier

Abstract

The present invention relates to a differential amplifier. The differential amplifier is provided with: first and second MOS transistors of a first conductivity type, which constitute a differential input circuit; a bias current source which causes a bias current to flow through the first and second MOS transistors; and a third MOS transistor of the first conductivity type, which is interposed between the bias current source and the first and second MOS transistors, and which limits a back gate voltage of the first and second MOS transistors.

Description

Technical Field

[0001] This invention relates to differential amplifiers. Background Technology

[0002] Figure 3 This is a circuit diagram representing a conventional differential amplifier.

[0003] Conventional differential amplifiers include: PMOS transistors 31 and 32 forming the differential input circuit; NMOS transistors 33 and 34 acting as a load; a constant current source 35 serving as a bias current source; and an NMOS transistor 36. The NMOS transistor 36 limits the back-gate and source voltage of the PMOS transistors 31 and 32.

[0004] As described above, the differential amplifier includes an NMOS transistor 36. Therefore, even if the high voltage is set to the power supply voltage, since the back gate-source voltage of PMOS transistors 31 and 32 becomes the gate-source voltage of NMOS transistor 36, the transconductance of PMOS transistor 31 will not be reduced to the necessary level. This allows for the suppression of the increase in offset voltage while ensuring a wide in-phase input voltage range (for example, see Patent Document 1).

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent Application Publication No. 11-41037 Summary of the Invention

[0008] The problem that the invention aims to solve

[0009] However, conventional differential amplifiers have an NMOS transistor 36 with diode connections. Therefore, the power supply voltage needs to be higher than the voltage obtained by adding the gate-source voltages of PMOS transistors 31 and 32 and the gate-source voltage of NMOS transistor 36. In other words, conventional differential amplifiers have difficulty operating at low voltages.

[0010] The present invention was made in view of the above-mentioned problems, and its object is to provide a differential amplifier that can perform low-voltage operation while ensuring a wide in-phase input voltage range.

[0011] Methods for solving problems

[0012] To address the aforementioned issues, the differential amplifier of the present invention is characterized by comprising: first and second MOS transistors of a first conductivity type, which constitute a differential input circuit; a bias current source that allows a bias current to flow through the first and second MOS transistors; and a third MOS transistor of a first conductivity type that limits the back gate voltage of the first and second MOS transistors between the bias current source and the first and second MOS transistors.

[0013] Invention Effects

[0014] The differential amplifier according to the present invention can operate at low voltage while ensuring a wide in-phase input voltage range. Attached Figure Description

[0015] Figure 1 This is a circuit diagram illustrating a differential amplifier according to an embodiment of the present invention.

[0016] Figure 2 This is a circuit diagram illustrating another example of a differential amplifier according to an embodiment of the present invention.

[0017] Figure 3 This is a circuit diagram representing a conventional differential amplifier.

[0018] Label Explanation

[0019] 11, 12, 16: PMOS transistors

[0020] 13, 14: NMOS transistors

[0021] 15: Constant Current Source

[0022] 17: Constant pressure source Detailed Implementation

[0023] Figure 1 This is a circuit diagram illustrating a differential amplifier according to an embodiment of the present invention.

[0024] The differential amplifier in this embodiment includes: PMOS transistors 11 and 12 constituting a differential input circuit; NMOS transistors 13 and 14 acting as a load; a constant current source 15 serving as a bias current source; and a PMOS transistor 16.

[0025] The source and back gate of PMOS transistor 16 are connected to constant current source 15, and its gate is connected to the input terminal of the differential amplifier, such as input terminal INN. The source of PMOS transistor 11 is connected to the drain of PMOS transistor 16, its gate is connected to input terminal INP, and its back gate is connected to constant current source 15. The source of PMOS transistor 12 is connected to the drain of PMOS transistor 16, its gate is connected to input terminal INN, and its back gate is connected to constant current source 15. The gate and drain of NMOS transistor 13 are connected to the drain of PMOS transistor 11, and its source and back gate are connected to ground. The gate of NMOS transistor 14 is connected to the gate of NMOS transistor 13, its drain is connected to the drain of PMOS transistor 12 and output terminal OUT, and its source and back gate are connected to ground.

[0026] The operation of the differential amplifier constructed as described above will be explained below.

[0027] The gate of PMOS transistor 16 is connected to the input terminal INN of the differential amplifier. Therefore, the voltage across the back gate of PMOS transistor 16, which is connected to the source, is the value obtained by adding the voltage across the input terminal INN to the voltage between the gate and source. Furthermore, the source of PMOS transistor 16 is connected to the back gates of PMOS transistors 11 and 12. Therefore, PMOS transistor 16 limits the voltage between the back gate and source of PMOS transistors 11 and 12. In other words, the voltage across the back gates of PMOS transistors 11 and 12 is the value obtained by adding the voltage across the input terminal to the voltage between the gate and source of PMOS transistor 16.

[0028] Here, the PMOS transistor 16 is sized such that the gate-source voltage is higher than that of PMOS transistors 11 and 12. For example, the L of PMOS transistor 16 is made larger than that of PMOS transistors 11 and 12.

[0029] If PMOS transistor 16 is configured in this way, the back gate potential of PMOS transistors 11 and 12 becomes higher. Therefore, the in-phase input voltage range can be expanded through the back gate effect. Furthermore, the power supply voltage only needs to be higher than the voltage between the gate and source of PMOS transistor 16. Thus, the differential amplifier can operate at a lower voltage than conventional differential amplifiers.

[0030] As described above, the differential amplifier according to the present invention includes a PMOS transistor whose gate is connected to the input terminal and whose gate-source voltage is higher than that of the PMOS transistor constituting the differential input circuit in the circuit that limits the back gate-source voltage of the PMOS transistor constituting the differential input circuit. Therefore, it is possible to operate at a low voltage while ensuring a wider in-phase input voltage range.

[0031] Figure 2This is a circuit diagram illustrating another example of a differential amplifier according to an embodiment of the present invention.

[0032] Figure 2 The differential amplifier from Figure 1 A constant voltage source 17 is added and connected to the gate of the PMOS transistor 16. The constant voltage source 17 applies a bias voltage to the gate of the PMOS transistor 16.

[0033] When the bias voltage of the constant voltage source 17 is set higher than the voltage at the input terminal, the gate-source voltage of the PMOS transistor 16 is higher than the gate-source voltage of the PMOS transistors 11 and 12. Therefore, if the bias voltage of the constant voltage source 17 is set to an appropriate value, the PMOS transistor 16 can be configured with the same size as the PMOS transistors 11 and 12.

[0034] Right now, Figure 2 Even if the differential amplifier is configured with PMOS transistor 16 of the same size as PMOS transistors 11 and 12 by setting the bias voltage of constant voltage source 17 to an appropriate value, it is still possible to obtain the same performance as PMOS transistors 12. Figure 1 It has the same effect as a differential amplifier.

[0035] The embodiments of the present invention have been described above, but the present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit of the present invention.

[0036] For example, in this embodiment, a differential amplifier circuit is described where a PMOS transistor forms the differential input circuit and limits the voltage between its back gate and source. However, an NMOS transistor can also form the differential input circuit and limit the voltage between its back gate and source. In this case, the differential amplifier circuit is configured with the relationship between the power supply terminal and the ground terminal reversed.

Claims

1. A differential amplifier, characterized in that, It possesses: The first and second MOS transistors of the first conductivity type constitute a differential input circuit; A bias current source that allows bias current to flow through the first and second MOS transistors; as well as A third MOS transistor of a first conductivity type limits the back gate voltage of the first and second MOS transistors between the bias current source and the first and second MOS transistors. The gate of the third MOS transistor is connected to the gate of any one of the first and second MOS transistors.

2. The differential amplifier according to claim 1, characterized in that, The gate-source voltage of the third MOS transistor is higher than that of the gate-source voltage of the first and second MOS transistors.

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