Display devices
By introducing protection circuits and sensing circuits into the display device to monitor and control the voltage of the power line, the overcurrent problem caused by driving power failure is solved, the driver is protected, and the reliability and safety of the device are improved.
Patent Information
- Application Number
- CN202011412234.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-02-21
- Filing Date
- 2020-12-04
- Publication Date
- 2025-10-21
- Estimated Expiration
- 2040-12-04
AI Technical Summary
In conventional display devices, when a driving power supply fails, the driver is easily damaged, especially due to an overcurrent flow caused by a connection failure between the light emitting element and the driving power supply.
By introducing a protection circuit in the display device, including a switch and a sensing circuit, monitoring the sensing voltage of the second power line, generating a control signal to disconnect the initialization voltage supply of the third power line, limiting the flow of overcurrent, and adjusting the data voltage and power voltage to protect the driver when the sensing voltage exceeds a reference range.
It effectively prevents or reduces damage to the driver and display device, improves the reliability and safety of the device, and prevents damage to the driver caused by overcurrent.
Smart Images

Figure CN113299224B_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2020-0021719, filed on February 21, 2020, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field
[0003] Aspects of example embodiments of the present disclosure relate generally to display devices. Background Art
[0004] A display device includes a display panel and a driver. The display panel includes scan lines, data lines, and a plurality of pixels. Each pixel includes a light-emitting element connected between a plurality of drive power sources and a pixel circuit that supplies a drive current to the light-emitting element. The driver includes a scan driver that sequentially supplies scan signals to the scan lines and a data driver that supplies data signals to the data lines. Each pixel emits light having a brightness corresponding to the data signal supplied via the corresponding data line in response to the scan signal supplied via the corresponding scan line.
[0005] In order to improve contrast, the display device may periodically initialize the light emitting element (eg, the anode electrode of the light emitting element) of each of the pixels by using an initialization power source of a driver.
[0006] When a defect occurs in the connection between the light-emitting element (or display panel) and the driving power supply (e.g., the driving power supply connected to the cathode electrode of the light-emitting element), for example, a fault occurs in the wire or connector to which the driving power supply is applied, the driving current may flow through the initialization power supply instead of the light-emitting element, and the driver may be damaged.
[0007] The above information disclosed in this Background section is for enhancement of understanding of the background of the disclosure and therefore it may contain information that does not constitute prior art. Summary of the Invention
[0008] One or more example embodiments of the present disclosure are directed to a display device capable of preventing or substantially preventing damage to a driver that may be caused by a failure of one or more driving power supplies.
[0009] According to one or more example embodiments of the present disclosure, a display device includes: a display panel including pixels electrically connected to each of a data line, a first power line, a second power line, and a third power line; a power supply configured to supply a first power voltage to the first power line and a second power voltage to the second power line; and a driver configured to supply a data voltage to the data line and a third power voltage to the third power line. The driver is configured to determine whether a sense voltage measured at the second power line exceeds a reference range, and to limit supply of the third power voltage when the sense voltage exceeds the reference range.
[0010] In an example embodiment, the pixel may include: a light emitting element connected between a first power line and a second power line; a driving current generating circuit configured to provide a driving current from the first power line to the light emitting element in response to a data voltage; and an initialization transistor connected between a third power line and one electrode of the light emitting element.
[0011] In example embodiments, the driver may be configured to measure the sense voltage through a routing line branched from the second power line.
[0012] In example embodiments, the display device may further include a switch connected between the third power line of the display panel and the driver, and the driver may be configured to generate a control signal for turning off the switch when the sensing voltage exceeds a reference range.
[0013] In example embodiments, the driver may include an analog-to-digital converter configured to convert a sensing voltage into a sensing value in digital form; a comparator configured to compare the sensing value with a reference value; and a control signal generator configured to generate a control signal based on a comparison result of the comparator.
[0014] In example embodiments, the driver may include a reference voltage generator configured to generate a reference voltage; a comparator configured to compare the sensed voltage with the reference voltage; and a control signal generator configured to generate a control signal based on a comparison result of the comparator.
[0015] In an example embodiment, the driving current generating circuit may include: a first transistor including a first electrode electrically connected to a first power line through a second node, a second electrode electrically connected to one electrode of a light emitting element through the first node, and a gate electrode electrically connected to a third node; a second transistor including a first electrode connected to a data line, a second electrode connected to the second node, and a gate electrode connected to a scan line; a third transistor including a first electrode connected to the first node, a second electrode connected to the third node, and a gate electrode connected to the scan line; and a storage capacitor between the first power line and the third node.
[0016] In an example embodiment, the driving current generating circuit may include: a first transistor including a first electrode electrically connected to a first power line, a second electrode electrically connected to one electrode of a light emitting element, and a gate electrode connected to a gate node; a second transistor including a first electrode connected to a data line, a second electrode connected to the gate node, and a gate electrode connected to a scan line; and a storage capacitor between the gate node and the one electrode of the light emitting element.
[0017] In example embodiments, the display device may further include: a current limiting circuit connected between the third power line of the display panel and the driver, and the driver may be configured to generate a control signal when the sensed voltage exceeds a reference range to allow the current limiting circuit to limit the amount of current flowing through the third power line.
[0018] In example embodiments, the driver may be configured to vary the third power voltage when the sensing voltage exceeds a reference range.
[0019] In example embodiments, the driver may be configured to increase a voltage level of the third power voltage when the sensing voltage exceeds a reference range.
[0020] In example embodiments, a voltage level of the first power voltage may be greater than a voltage level of the second power voltage.
[0021] According to one or more example embodiments of the present disclosure, a display device includes: a display panel including pixels electrically connected to each of a data line, a first power line, a second power line, and a third power line; a power supply configured to supply a first power voltage to the first power line and a second power voltage to the second power line; and a driver configured to supply a data voltage to the data line and a third power voltage to the third power line. The driver is configured to determine whether a sensing voltage measured at the second power line exceeds a reference range, and change the data voltage from the first voltage range to a second voltage range different from the first voltage range when the sensing voltage exceeds the reference range.
[0022] In example embodiments, the second voltage range may be a subset of the first voltage range, and the second voltage range may correspond to low brightness lower than an average brightness of the first voltage range.
[0023] In example embodiments, the driver may be configured to change the data voltage to correspond to a minimum grayscale when the sensing voltage exceeds a reference range.
[0024] In an example embodiment, the display panel may include a plurality of pixels including a first pixel configured to emit light of a first color and a second pixel configured to emit light of a second color, and the driver may be configured to change a data voltage of the first pixel to correspond to a minimum grayscale and change a data voltage of the second pixel to correspond to an intermediate grayscale greater than the minimum grayscale.
[0025] In an example embodiment, the driver may include: a control circuit configured to determine whether a sensing voltage exceeds a reference range; a gamma voltage generating circuit configured to generate a gamma voltage and change a voltage range of the gamma voltage based on a determination result of the control circuit; and an analog-to-digital converter configured to generate a data voltage based on the gamma voltage and a grayscale value included in image data and corresponding to a pixel.
[0026] In example embodiments, the display device may further include a memory configured to store notification data, the driver may be configured to generate a data voltage based on the notification data when the sensing voltage exceeds a reference range, and the notification data may correspond to an error image representing that the second power voltage is not normally supplied to the second power line.
[0027] In example embodiments, the error image may include a black image, a monochrome image, a pattern image, or a pattern.
[0028] According to one or more example embodiments of the present disclosure, a display device includes: a display panel including pixels electrically connected to each of a data line, a first power line, a second power line, and a third power line; a power supply configured to supply a first power voltage to the first power line and a second power voltage to the second power line; and a driver configured to supply a data voltage to the data line and a third power voltage to the third power line. The driver is configured to determine whether a sense voltage measured at the second power line exceeds a reference range and generate a control signal when the sense voltage exceeds the reference range, and the power supply is configured to interrupt supply of the first power voltage in response to the control signal. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] The above aspects and other aspects and features of the present disclosure will become more apparent to those skilled in the art based on the following detailed description of example embodiments with reference to the accompanying drawings.
[0030] Figure 1 is a block diagram illustrating a display device according to an embodiment of the present disclosure.
[0031] Figure 2 The diagram is included in Figure 1 A diagram of an example of a pixel in a display device is shown in FIG.
[0032] Figure 3A It is an icon Figure 2 A circuit diagram of an example of a pixel is shown in FIG.
[0033] Figure 3B It is an icon Figure 2 A circuit diagram of another example of a pixel is shown in FIG.
[0034] Figure 4A The diagram is included in Figure 1 is a block diagram of an example of a driver in a display device shown in .
[0035] Figure 4B The diagram is included in Figure 1 A block diagram of another example of a driver in a display device is shown in .
[0036] Figure 5 is a block diagram illustrating a display device according to an embodiment of the present disclosure.
[0037] Figure 6 is a block diagram illustrating a display device according to an embodiment of the present disclosure.
[0038] Figure 7 The diagram is included in Figure 6 is a block diagram of an example of a driver in a display device shown in .
[0039] Figure 8A It is shown in the figure Figure 7 An example of a gamma voltage generated in a driver is shown in FIG.
[0040] Figure 8B It is shown in the figure Figure 7 An example of a gamma voltage generated in a driver is shown in FIG.
[0041] Figure 9 The diagram is included in Figure 6 A block diagram of another example of a driver in a display device is shown in .
[0042] Figure 10 is a block diagram illustrating a display device according to an embodiment of the present disclosure.
[0043] Figure 11 is a block diagram illustrating a display device according to an embodiment of the present disclosure. DETAILED DESCRIPTION
[0044] Hereinafter, example embodiments will be described in more detail with reference to the accompanying drawings, in which the same reference numerals refer to the same elements throughout the entire text. However, the present disclosure can be embodied in various different forms and should not be understood as being limited to the embodiments illustrated herein. On the contrary, these embodiments are provided as examples so that the present disclosure will be comprehensive and complete, and will fully convey the aspects and features of the present disclosure to those skilled in the art. Accordingly, for a complete understanding of the aspects and features of the present disclosure, processes, elements and techniques that are not necessary for those of ordinary skill in the art may not be described. Unless otherwise stated, the same reference numerals represent the same elements throughout the drawings and written descriptions, and therefore, their descriptions may not be repeated.
[0045] In the accompanying drawings, for the sake of clarity, the relative sizes of elements, layers and regions may be exaggerated and / or simplified. The dimensional relationships between the individual elements in the drawings are illustrated only for ease of understanding, but are not limited to their actual proportions. For ease of illustration, spatial relative terms such as "below," "below," "down," "beneath," "above," and "on" may be used herein to describe the relationship between an element or feature as illustrated in the drawings relative to another (or more) element or feature. It will be understood that spatial relative terms are intended to encompass different orientations of the device in use or operation other than the orientation depicted in the drawings. For example, if the device in the drawings is flipped, the element described as being "below" or "below" or "below" other elements or features will then be oriented as being "above" other elements or features. Therefore, the example terms "below" and "below" may include both above and below orientations. The device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein should be interpreted accordingly.
[0046] It will be understood that although the terms "first," "second," "third," etc. may be used herein to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, layers, and / or portions should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or portion from another element, component, region, layer, or portion. Thus, a first element, component, region, layer, or portion described below could be referred to as a second element, component, region, layer, or portion without departing from the spirit and scope of the present disclosure.
[0047] It will be understood that when an element or layer is referred to as being “on,” “connected to,” or “coupled to” another element or layer, it can be directly on, directly connected to, or directly coupled to the other element or layer, or one or more intervening elements or layers may be present. Additionally, it will be understood that when an element or layer is referred to as being “between” two elements or layers, it can be the only element or layer between the two elements or layers, or one or more intervening elements or layers may also be present.
[0048] The terms used herein are used to describe the purpose of specific embodiments and are not intended to limit the present disclosure. As used herein, the "one" in the singular is intended to also include the plural form, unless the context clearly indicates otherwise. It will be further understood that the terms "comprise", "include", "have" and "contain" are used in this specification to indicate the presence of stated features, integral bodies, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integral bodies, steps, operations, elements, parts and / or their combinations. As used herein, the term "and / or" includes any combination and all combinations of one or more of the associated listed items. Phrases such as "at least one of...", when located after a list of elements, modify the entire list of elements and do not modify the individual elements in the list.
[0049] As used herein, the terms "substantially," "approximately," and similar terms are used as terms of approximation and not as terms of degree, and are intended to take into account the inherent deviations in measured or calculated values that would be recognized by one of ordinary skill in the art. Further, when describing embodiments of the present disclosure, the use of "may" refers to "one or more embodiments of the present disclosure." As used herein, the term "using" may be considered synonymous with the term "utilizing." Furthermore, the term "exemplary" is intended to indicate an example or illustration.
[0050] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and / or this specification, and should not be interpreted in an idealized or overly formal sense, unless expressly defined as such herein.
[0051] Figure 1 is a block diagram illustrating a display device 100 according to an embodiment of the present disclosure.
[0052] refer to Figure 1The display device 100 may include a display 110 (e.g., a display panel), a scan driver 120 (e.g., a scan driving circuit or a first gate driver), an emission driver 130 (e.g., an emission driving circuit or a second gate driver), a driver 140 (e.g., a driver integrated circuit (IC)), and a power supply 150.
[0053] The display 110 may include a plurality of scan lines (e.g., a plurality of gate lines) SL1 to SLn (where n is a positive integer), a plurality of data lines DL1 to DLm (where m is a positive integer), a plurality of emission control lines EL1 to ELn, and a plurality of pixels PXL. The pixels PXL may be disposed in an area (e.g., a pixel area) defined by the scan lines SL1 to SLn and the data lines DL1 to DLm at (e.g., in or above) the display area DA.
[0054] Each pixel PXL can be connected to at least one of the scan lines SL1 to SLn, one of the data lines DL1 to DLm, and at least one of the emission control lines EL1 to ELn. Hereinafter, the term "connected" may refer to an electrical connection. For example, a pixel PXL can be connected to a scan line SLi, a data line DLj, and an emission control line ELi (where i and j are each a positive integer). Furthermore, the pixel PXL can be connected to a first power line PL1, a second power line PL2, and a third power line PL3.
[0055] The pixel PXL can store or record a data signal (e.g., a data voltage) provided through the data line DLj in response to a scan signal (e.g., a gate signal) provided through the scan line SLi. The pixel PXL can emit light having a desired brightness corresponding to the stored data signal in response to an emission control signal provided through the emission control line ELi.
[0056] The display 110 may further include a first power line PL1, a second power line PL2, and a third power line PL3. A first power voltage VDD may be applied to the first power line PL1, and the first power line PL1 may be a common line connected to a plurality of pixels PXL. A second power voltage VSS may be applied to the second power line PL2, and the second power line PL2 may be a common line connected to a plurality of pixels PXL. An initialization voltage VINT (e.g., an initialization power voltage or a third power voltage) may be applied to the third power line PL3, and the third power line PL3 may be a common line connected to a plurality of pixels PXL. The first power voltage VDD and the second power voltage VSS may be suitable voltages (e.g., used voltages) for the operation of the pixel PXL, and the first power voltage VDD may have a voltage level higher than the voltage level of the second power voltage VSS. The initialization voltage VINT may be a voltage used to initialize the pixel PXL (e.g., for initializing the light-emitting element in the pixel PXL and / or for initializing the parasitic capacitor of the light-emitting element).
[0057] The scan driver 120 may generate a scan signal based on a scan control signal SCS (e.g., a gate control signal) and may sequentially supply the scan signal to the scan lines SL1 to SLn. The scan control signal SCS may include a scan start signal and / or a scan clock signal, etc., and may be supplied from the driver 140 (e.g., a timing controller). For example, the scan driver 120 may include a shift register (or stage) to sequentially generate and output a pulse-shaped scan signal corresponding to the pulse-shaped scan start signal using the scan clock signal.
[0058] The emission driver 130 may generate an emission control signal based on the emission drive control signal ECS and may sequentially provide the emission control signal to the emission control lines EL1 to ELn. The emission drive control signal ECS may include an emission start signal and / or an emission clock signal, etc., and may be provided from the driver 140 (e.g., a timing controller). For example, the emission driver 130 may include a shift register to sequentially generate and output a pulse-form emission control signal corresponding to the pulse-form emission start signal using the emission clock signal.
[0059] However, the present disclosure is not limited thereto. For example, in some embodiments, the emission driver 130 may be omitted according to a desired or suitable circuit structure of the pixel PXL.
[0060] At least one of the scan driver 120 and the emission driver 130 may be formed at (eg, in or on) the display 110 , or may be implemented with an IC to be connected to the display 110 through a circuit board (eg, a flexible circuit board).
[0061] although Figure 1 A case is shown in which the scan driver 120 and the emission driver 130 are located at different sides (e.g., different directions) (e.g., in the middle or above) relative to the display 110, but the present disclosure is not limited thereto, and the scan driver 120 and the emission driver 130 may be located at the same side (e.g., the same direction) (e.g., in the middle or above) relative to the display 110, and / or may be implemented with a single IC.
[0062] The power supply 150 may generate a first power voltage VDD and a second power voltage VSS, and may provide the first power voltage VDD and the second power voltage VSS to the display 110. Further, the power supply 150 may generate a gamma power voltage AVDD, and may provide the gamma power voltage AVDD to the driver 140. The gamma power voltage AVDD may be a voltage for operation of the driver 140. For example, the power supply 150 may be implemented using a power management integrated circuit (PMIC).
[0063] The driver 140 may receive input image data and control signals from the outside (e.g., from a graphics processor), may generate a scanning control signal SCS and an emission driving control signal ECS based on the control signals, and may convert the input image data into image data corresponding to the arrangement of the pixels PXL at (e.g., in the middle or upper portion) of the display 110. For example, the driver 140 may convert input image data in RGB format into image data in RGB format.
[0064] Furthermore, the driver 140 may generate a data signal based on the image data and may provide the data signal to the display 110 (e.g., to the pixel PXL). For example, the driver 140 may receive a gamma power voltage AVDD, may generate a gamma voltage based on the gamma power voltage AVDD, and may generate a data signal (e.g., a data voltage corresponding to the grayscale value included in the image data) based on the image data (e.g., grayscale value) and the gamma voltage.
[0065] The driver 140 may generate an initialization voltage VINT and may provide the initialization voltage VINT to the third power line PL3 of the display 110 .
[0066] The driver 140 may include a timing controller for generating a scan control signal SCS, an emission drive control signal ECS, and image data, and a data driver (e.g., a data drive circuit) for generating a data signal and an initialization voltage VINT. In some embodiments, the driver 140 may be implemented as a single IC. The driver 140 may be mounted on a circuit board (e.g., a flexible circuit board) to connect to the display 110.
[0067] In some embodiments, the driver 140 can control and / or limit the supply of the initialization voltage VINT based on a sense voltage VSS_S that can be measured at the second power line PL2 of the display 110 (e.g., the voltage level of the second power voltage VSS actually applied to the display 110). For example, a routing line branching from the second power line PL2 of the display 110 can be connected to an input terminal for receiving the sense voltage VSS_S of the driver 140. However, the present disclosure is not limited thereto. For example, in some embodiments, the driver 140 can measure the sense voltage VSS_S external to the display 110 or at an output terminal of the power supply 150. For example, the driver 140 can determine whether the sense voltage VSS_S exceeds a reference range (e.g., an allowable range) and can interrupt the supply of the initialization voltage VINT when the sense voltage VSS_S exceeds the reference range. In other words, the driver 140 can determine whether the second power voltage VSS is being supplied normally to the display 110 and can interrupt the application of the initialization voltage VINT to the third power line PL3 when the second power voltage VSS is not being supplied (e.g., not being supplied normally) to the display 110.
[0068] For example, an electrical disconnection may occur between the power supply 150 and the display 110 due to external impact and / or connector failure, etc. Figure 1 As shown in , for example, the line adjacent to the emission driver 130 (for example, the line to which the second power voltage VSS is applied) may be disconnected. In this case, the second power voltage VSS (or only the second power voltage VSS) may not be supplied from the power supply 150 to the display 110, or may be supplied abnormally. As will be described below with reference to Figure 2 As described in more detail, when the second power voltage VSS is not supplied, the second power line PL2 may be floated, and the drive current may not flow from the first power line PL1 through the pixel PXL in the second power line PL2. The drive current that does not flow in the second power line PL2 may increase the voltage of a node (e.g., a specific or designated node) in the pixel PXL (e.g., the anode electrode of the light-emitting element of the pixel PXL), and due to the increased voltage of the node, an overcurrent may flow in the driver 140 through the third power line PL3 connected to the node. In this case, the continuously generated overcurrent may increase the temperature of the driver 140, may cause a malfunction of the driver 140, and / or may further cause a malfunction and / or damage to the display 110 driven by the driver 140.
[0069] Therefore, the driver 140 (or the display device 100) can be disconnected from the third power line PL3 when the second power voltage VSS is not applied (or is abnormally applied) to the second power line PL2 of the display 110. Therefore, damage to the driver 140 (and damage to the display 110) can be prevented or substantially prevented.
[0070] In an embodiment, the display device 100 may include at least one protection circuit (e.g., an overcurrent protection circuit) connected between the third power line PL3 of the display 110 and the driver 140, and the at least one protection circuit may include at least one switch. For example, when the display 110 receives the initialization voltage VINT through a plurality of input terminals, the display device 100 may include a plurality of switches (e.g., a first switch SW1 and a second switch SW2).
[0071] In an embodiment, when the sensing voltage VSS_S exceeds a reference range, the driver 140 may generate an initialization voltage control signal VINT_EN (e.g., an initialization enable signal) for operating at least one protection circuit. For example, when the sensing voltage VSS_S exceeds the reference range, the driver 140 may generate an initialization voltage control signal VINT_EN (e.g., a switch control signal) for turning off at least one switch. For example, the first switch SW1 and the second switch SW2 may be turned off in response to the initialization voltage control signal VINT_EN (e.g., an initialization voltage control signal VINT_EN having a turn-off voltage level), and the third power line PL3 of the display 110 and the driver 140 may be electrically disconnected. In other words, the path through which an overcurrent may move to the driver 140 through the third power line PL3 of the display 110 can be interrupted.
[0072] although Figure 1 The case where at least one protection circuit (e.g., the first switch SW1 and the second switch SW2) is provided independently of and separately from the display 110 and the driver 140 is shown, but the present disclosure is not limited thereto. For example, the at least one protection circuit (e.g., the first switch SW1 and the second switch SW2) may be implemented in the driver 140 (e.g., may be built into the driver 140), or may be formed in an area (e.g., in the middle or upper part) of the display 110 (e.g., in a non-display area between the display area DA and the driver 140).
[0073] As reference Figure 1As described above, the display device 100 supplies the initialization voltage VINT to the third power line PL3 of the display 110 through the driver 140, and when the second power voltage VSS is not normally supplied to the display 110, the initialization voltage VINT applied from the driver 140 to the third power line PL3 is interrupted by the protection circuit (e.g., the first switch SW1 and the second switch SW2). Therefore, damage to the driver 140 (and damage to the display device 100) can be prevented or substantially prevented.
[0074] Despite Figure 1 , a case where the protection circuit (e.g., the first switch SW1 and the second switch SW2) is formed between the driver 140 and the display 110 (or the third power line PL3) is illustrated, but the present disclosure is not limited thereto. For example, when the display 110 further includes a power line connected to a specific or designated node in the pixel PXL (e.g., a node at which the voltage level may increase due to a connection error of the second power voltage VSS, or a node at which an overcurrent may be generated), the protection circuit may be formed between the power line and a power source (e.g., a power source for supplying a separate power voltage to the power line).
[0075] Figure 2 The diagram is included in Figure 1 FIG. 1 is a diagram of an example of a pixel PXL in the display device 100 shown in FIG.
[0076] refer to Figure 1 and Figure 2 , the pixel PXL may include a light emitting element (eg, a light emitting device) LD, a driving current generating circuit DCG, and a seventh transistor T7 (eg, an initialization transistor).
[0077] The light-emitting element LD can be connected to the first power line PL1 and the second power line PL2. For example, the anode electrode of the light-emitting element LD can be connected to the first power line PL1 via the drive current generating circuit DCG, and the cathode electrode of the light-emitting element LD can be connected to the second power line PL2. In some embodiments, the light-emitting element LD can be implemented using an organic light-emitting diode. However, the present disclosure is not limited thereto, and the light-emitting element LD can be implemented using any suitable type of light-emitting device, such as, for example, an inorganic light-emitting element.
[0078] The driving current generating circuit DCG may be connected between the first power line PL1 and the light emitting element LD (e.g., the anode electrode of the light emitting element LD), and may provide a driving current to the light emitting element LD in response to a data signal DATA (e.g., a data voltage) provided through the data line DLj. The light emitting element LD may emit light having a desired brightness corresponding to the driving current provided from the driving current generating circuit DCG. Figure 3Aand Figure 3B The detailed configuration of the drive current generating circuit DCG is described.
[0079] The seventh transistor T7 (e.g., an initialization transistor) can be connected between the third power line PL3 and a path through which the drive current flows. For example, a first electrode (e.g., one electrode) of the seventh transistor T7 can be connected to the third power line PL3, a second electrode (e.g., another electrode) of the seventh transistor T7 can be connected to the anode electrode of the light-emitting element LD, and a gate electrode of the seventh transistor T7 can be connected to the scan line SLi (or the next scan line SLi+1 adjacent to the scan line SLi). The seventh transistor T7 can be turned on when a scan signal is supplied to the scan line SLi (or the next scan line SLi+1) to supply the initialization voltage VINT to the anode electrode of the light-emitting element LD.
[0080] When the initialization voltage VINT is supplied to the anode electrode of the light-emitting element LD, the parasitic capacitor of the light-emitting element LD can be discharged. When the residual voltage charged in the parasitic capacitor is discharged (e.g., removed), unexpected micro-emissions can be prevented or substantially prevented. Therefore, the black rendering capability of the pixel PXL can be improved.
[0081] The seventh transistor T7 may be implemented by a P-type transistor, but the present disclosure is not limited thereto. For example, the seventh transistor T7 may be implemented by an N-type transistor.
[0082] As reference Figure 1 As described, when the second power voltage VSS is not provided from the power supply 150 to the second power line PL2, the second power line PL2 may be floated. In this case, the driving current provided from the driving current generating circuit DCG may not flow normally through the light emitting element LD to the second power line PL2, and the light emitting element LD may not emit light or may emit light abnormally (for example, may emit light with an unexpected brightness). The driving current that does not flow to the second power line PL2 may increase the voltage at the anode electrode of the light emitting element LD (for example, at the node connected to the anode electrode of the light emitting element LD). In this case, when the seventh transistor T7 is turned on, the anode electrode of the light emitting element LD and the third power line PL3 may be connected to each other, and due to the increased voltage at the anode electrode of the light emitting element LD, an overcurrent may flow in the third power line PL3. Therefore, as shown in reference Figure 1 As described above, the driver 140 (or the display device 100) can be disconnected from the third power line PL3 when the second power voltage VSS is not applied (or is abnormally applied) to the second power line PL2. Therefore, damage to the driver 140 (and damage to the display 110) can be prevented or substantially prevented.
[0083] Figure 3AIt is an icon Figure 2 0 is a circuit diagram of an example of a pixel PXL shown in FIG.
[0084] refer to Figure 2 and Figure 3A The pixel PXL may include first to seventh transistors T1 to T7, a storage capacitor Cst, and a light emitting element LD. The driving current generating circuit DCG may include first to sixth transistors T1 to T6 and a storage capacitor Cst.
[0085] Each of the first to seventh transistors T1 to T7 may be implemented with a P-type transistor, but the present disclosure is not limited thereto. For example, in some embodiments, at least one of the first to seventh transistors T1 to T7 may be implemented with an N-type transistor.
[0086] A first electrode of a first transistor T1 (e.g., a driving transistor) may be connected to a second node N2 and / or may be connected to a first power line PL1 via a fifth transistor T5. A second electrode of the first transistor T1 may be connected to the first node N1 and / or may be connected to an anode electrode of the light-emitting element LD via a sixth transistor T6. A gate electrode of the first transistor T1 may be connected to a third node N3. The first transistor T1 may control a driving current (e.g., an amount of current) flowing from the first power line PL1 via the light-emitting element LD to the second power line PL2 in accordance with (e.g., based on) a voltage of the third node N3.
[0087] The second transistor T2 may be connected between the data line DLj and the second node N2. A gate electrode of the second transistor T2 may be connected to the scan line SLi. The second transistor T2 may be turned on when a scan signal (e.g., a scan signal having a gate-on voltage level) is supplied to the scan line SLi to electrically connect the data line DLj and the first electrode of the first transistor T1 to each other.
[0088] The third transistor T3 may be connected between the first node N1 and the third node N3. The gate electrode of the third transistor T3 may be connected to the scan line SLi. The third transistor T3 may be turned on when a scan signal is supplied to the scan line SLi to electrically connect the first node N1 and the third node N3 to each other. Therefore, when the third transistor T3 is turned on, the first transistor T1 may be connected in a diode form. In other words, when the third transistor T3 is turned on, the first transistor T1 may be diode-connected.
[0089] The storage capacitor Cst may be connected and / or formed between the first power line PL1 and the third node N3. The storage capacitor Cst may store a voltage corresponding to the data signal and a threshold voltage of the first transistor T1.
[0090] The fourth transistor T4 may be connected between the third node N3 and the third power line PL3. A gate electrode of the fourth transistor T4 may be connected to the previous scan line SLi-1. The fourth transistor T4 may be turned on when a scan signal is supplied to the previous scan line SLi-1 to supply the initialization voltage VINT to the third node N3.
[0091] The fifth transistor T5 may be connected between the first power line PL1 and the second node N2. A gate electrode of the fifth transistor T5 may be connected to the emission control line ELi. The fifth transistor T5 may be turned off when an emission control signal (e.g., an emission control signal having a gate-off voltage level) is supplied to the emission control line ELi, and may be turned on in other cases.
[0092] The sixth transistor T6 may be connected between the first node N1 and the light emitting element LD. A gate electrode of the sixth transistor T6 may be connected to the emission control line ELi. The sixth transistor T6 may be turned off when an emission control signal (e.g., an emission control signal having a gate-off voltage level) is supplied to the emission control line ELi, and may be turned on in other cases.
[0093] Figure 3B It is an icon Figure 2 2 is a circuit diagram of another example of a pixel PXL shown in FIG.
[0094] refer to Figure 3B The pixel PXL may include a first thin film transistor M1 (eg, a first transistor), a second thin film transistor M2 (eg, a second transistor), a third thin film transistor M3 (eg, an initialization transistor), a storage capacitor Cst, and a light emitting element LD. The third thin film transistor M3 may be the same as that in the above reference. Figure 2 The seventh transistor T7 described above corresponds to the sensing scan line SSi, and the sensing scan line SSi can be the same as that described above. Figure 3A The first thin film transistor M1, the second thin film transistor M2 and the storage capacitor Cst may constitute the emission control line ELi described above. Figure 2 Described drive current generating circuit DCG.
[0095] Each of the first to third thin film transistors M1 to M3 may be implemented with an N-type transistor, but the present disclosure is not limited thereto. For example, in some embodiments, at least one of the first to third thin film transistors M1 to M3 may be implemented with a P-type transistor.
[0096] A gate electrode of the first thin film transistor M1 (e.g., a driving transistor) may be connected to the gate node Na, a first electrode (e.g., one electrode) of the first thin film transistor M1 may be connected to the first power line PL1, and a second electrode (e.g., the other electrode) of the first thin film transistor M1 may be connected to the source node Nb.
[0097] A gate electrode of the second thin film transistor M2 may be connected to the scan line SLi, a first electrode of the second thin film transistor M2 may be connected to the data line DLj, and a second electrode of the second thin film transistor M2 may be connected to the gate node Na.
[0098] A gate electrode of the third thin film transistor M3 may be connected to the sensing scan line SSi, a first electrode of the third thin film transistor M3 may be connected to the third power line PL3 (eg, or a sensing line), and a second electrode of the third thin film transistor M3 may be connected to the source node Nb.
[0099] The storage capacitor Cst may be connected between the gate node Na and the source node Nb.
[0100] As reference Figure 2 、 Figure 3A and Figure 3B As described, the pixel PXL may include a light emitting element LD, a drive current generating circuit DCG for supplying a drive current to the light emitting element LD, and a seventh transistor T7 (e.g., an initialization transistor) connected to the third power line PL3 and a path through which the drive current moves (e.g., the anode electrode of the light emitting element LD).
[0101] Figure 4A The diagram is included in Figure 1 FIG. 1 is a block diagram of an example of a driver 140 in the display device 100 shown in FIG. Based on the configuration for controlling the supply of the initialization voltage VINT, in FIG. Figure 4A The driver 140 is briefly (eg, partially) illustrated in FIG.
[0102] refer to Figure 1 and Figure 4A , the driver 140 may include a sensing unit 410 (e.g., a sensing circuit), a comparator 420 (e.g., a comparison circuit), a storage unit 430 (e.g., a storage circuit), a control signal generator 440 (e.g., a control signal generating circuit), and an initialization voltage generator 450 (e.g., an initialization voltage generating circuit). The protector 460 may correspond to (e.g., may be) the above reference Figure 1 The protection circuit described (for example, the first switch SW1 and the second switch SW2). Figure 4A In the embodiment shown in , the driver 140 may include a protector 460 .
[0103] The sensing unit 410 may be connected to the second power line PL2 and may measure a second power voltage VSS (eg, a sensing voltage VSS_S) at the second power line PL2 .
[0104] The sensing unit 410 may include a sampling unit 411 (eg, a sampling circuit) and an analog-to-digital converter (ADC) 412 .
[0105] The sampling unit 411 may measure the sensing voltage VSS_S by using at least one capacitor and at least one switch (eg, at least one transistor).
[0106] The ADC 412 may convert the voltage (eg, the sensing voltage VSS_S) provided from the sampling unit 411 into a sensing value (eg, a digital code). In other words, the ADC 412 may convert the sampled sensing voltage VSS_S from an analog form to a digital form.
[0107] The comparator 420 can compare the sensed value provided by the ADC 412 with a reference value (e.g., a reference digital code). The reference value can be determined (e.g., predetermined) based on a suitable or desired voltage level or voltage range (e.g., an ideal voltage level or voltage range) and stored in the storage unit 430. In other words, the driver 140 can determine whether the second power voltage VSS is normally supplied to the second power line PL2 through the comparator 420. For example, when the sensed value is less than or equal to the reference value (e.g., when the difference between the sensed value and the reference value is less than an allowable error), the comparator 420 can determine that the second power voltage VSS is normally supplied to the second power line PL2. For another example, when the sensed value is greater than the reference value (e.g., when the difference between the sensed value and the reference value is greater than an allowable error), the comparator 420 can determine that the second power voltage VSS is not normally supplied to the second power line PL2. In some embodiments, the storage unit 430 can be implemented using a memory device.
[0108] The control signal generator 440 may generate an initialization voltage control signal VINT_EN based on the determination result of the comparator 420. For example, when the comparator 420 determines that the second power voltage VSS is normally supplied to the second power line PL2, the control signal generator 440 may generate an initialization voltage control signal VINT_EN having a first value. When the initialization voltage control signal VINT_EN has the first value, the protector 460 may not operate (for example, Figure 1The first switch SW1 and the second switch SW2 shown in the figure may be kept or substantially kept in an open state). In this case, the initialization voltage generator 450 may be connected to the display 110 (for example, connected to the third power line PL3 of the display 110), and the initialization voltage VINT may be provided from the initialization voltage generator 450 to the display 110. For another example, when the comparator 420 determines that the second power voltage VSS is not normally provided to the second power line PL2, the control signal generator 440 may generate an initialization voltage control signal VINT_EN having a second value. When the initialization voltage control signal VINT_EN has the second value, the protector 460 may operate (for example, Figure 1 In this case, the initialization voltage generator 450 may be electrically disconnected from the display 110 (eg, from the third power line PL3 of the display 110), and the supply of the initialization voltage VINT to the display 110 may be interrupted.
[0109] The initialization voltage generator 450 may generate the initialization voltage VINT. For example, the initialization voltage generator 450 may be implemented with a DC-DC converter and may be based on the gamma power voltage AVDD (eg, see Figure 1 ) generates the initialization voltage VINT.
[0110] As reference Figure 4A As described, the driver 140 may determine whether the second power voltage VSS is normally supplied to the second power line PL2 and may interrupt the initialization voltage VINT applied to the third power line PL3 when the second power voltage VSS is not supplied to the second power line PL2.
[0111] Although referenced Figure 4A A case is described in which the driver 140 digitally determines whether the second power voltage VSS is normally supplied to the second power line PL2 , but the present disclosure is not limited thereto.
[0112] Figure 4B The diagram is included in Figure 1 8 is a block diagram of another example of the driver 140 in the display device 100 shown in FIG.
[0113] refer to Figure 4A and Figure 4B , Figure 4B The driver 140_1 shown in FIG Figure 4A The driver 140 shown in FIG. 1 may differ in that: Figure 4BThe driver 140_1 includes a reference voltage generator 510 and a comparator 520. The control signal generator 440, the initialization voltage generator 450 and the protector 460 of the driver 140_1 can be connected to the reference voltage generator 510 and the comparator 520. Figure 4A Those described are the same or substantially the same, and thus redundant descriptions thereof may not be repeated.
[0114] The reference voltage generator 510 (eg, a reference voltage generating circuit) may generate the same voltage as the reference voltage above. Figure 4A For example, the reference voltage generator 510 may generate a reference voltage VSS_REF corresponding to the reference value described above. Figure 1 )Generates reference voltage VSS_REF.
[0115] The comparator 520 (e.g., a comparison circuit) can compare the sensing voltage VSS_S (e.g., the voltage at the second power line PL2) with the reference voltage VSS_REF. For example, when the sensing voltage VSS_S is less than or equal to the reference voltage VSS_REF (e.g., when the difference between the sensing voltage VSS_S and the reference voltage VSS_REF is less than a permissible error), the comparator 520 can determine that the second power voltage VSS is normally supplied to the second power line PL2. For another example, when the sensing voltage VSS_S is greater than the reference voltage VSS_REF (e.g., when the difference between the sensing voltage VSS_S and the reference voltage VSS_REF is greater than a permissible error), the comparator 520 can determine that the second power voltage VSS is not normally supplied (e.g., is abnormally supplied) to the second power line PL2.
[0116] In other words, the driver 140_1 may determine whether the second power voltage VSS is normally supplied to the second power line PL2 in an analog manner.
[0117] Figure 5 is a block diagram illustrating a display device 100_1 according to an embodiment of the present disclosure.
[0118] refer to Figure 1 and Figure 5 , Figure 5 The display device 100_1 shown in FIG. Figure 1 The display device 100 shown in FIG. 1 is different in that Figure 5 The display device 100_1 includes a current limiter CLC (eg, a current limiting circuit) as a protection circuit. In addition to the current limiter CLC, Figure 5 The display device 100_1 and Figure 1 The display device 100 shown in FIG. 1 is the same or substantially the same as (eg, similar to) FIG. 1 , and thus a redundant description thereof may not be repeated.
[0119] The current limiter CLC may be connected between the third power line PL3 of the display 110 and the driver 140, and may limit the amount of current flowing between the third power line PL3 and the driver 140 in response to an initialization voltage control signal VINT_EN. For example, the current limiter CLC may include a variable resistance element (e.g., a variable resistor) connected between the third power line PL3 and the driver 140, and may control the resistance of the variable resistance element in response to the initialization voltage control signal VINT_EN. For example, when the second power voltage VSS (e.g., the sensing voltage VSS_S) at the second power line PL2 is abnormal, the current limiter CLC may limit the magnitude of the current flowing from the display 110 to the driver 140 to an appropriate or desired magnitude (e.g., a specific or designated magnitude) or less by increasing the resistance between the third power line PL3 and the driver 140.
[0120] Figure 6 is a block diagram illustrating a display device 100_2 according to an embodiment of the present disclosure. Figure 7 The diagram is included in Figure 6 FIG. 1 is a block diagram of an example of a driver 140_2 in a display device 100_2 shown in FIG. Figure 7 The driver 140_2 is briefly (eg, partially) illustrated in FIG. Figure 8A It is shown in the figure Figure 7 2 is a diagram of an example of a gamma voltage VG generated in the driver 140_2 shown in FIG. Figure 8B It is shown in the figure Figure 7 2 is a diagram of an example of a gamma voltage VG generated in the driver 140_2 shown in FIG.
[0121] refer to Figure 1 and Figure 6 , Figure 6 The display device 100_2 shown in FIG. Figure 1 The display device 100 shown in FIG. 1 may differ in that: Figure 6 The display device 100_2 may not include a protection circuit and may include a driver 140_2. In addition to the driver 140_2, Figure 6 The display device 100_2 and Figure 1 The display device 100 shown in FIG. 1 is the same or substantially the same as (eg, similar to) FIG. 1 , and thus a redundant description thereof may not be repeated.
[0122] The driver 140_2 may control or vary the voltage range of at least some of the data signals supplied to the data lines DL1 to DLm based on the sense voltage VSS_S measured at the second power line PL2 of the display 110 (e.g., the voltage level of the second power voltage VSS actually applied to the display 110). For example, the driver 140_2 may limit the voltage range of the data signal to a low grayscale voltage range corresponding to low brightness. The voltage level of the pixel PXL (e.g., as shown in FIG. 1 ) may be reduced. Figure 2 By reducing the driving current (e.g., the amount of current) flowing in the display 110 (described above), an increase in the voltage of the anode electrode of the light emitting element LD can be reduced, and an overcurrent flowing in the driver 140_2 through the third power line PL3 can be reduced. Therefore, there is a low possibility that the driver 140_2 and the display 110 will be damaged.
[0123] refer to Figure 6 and Figure 7 , the driver 140_2 may include a control circuit 710 , a gamma voltage generation circuit 720 , a decoder 730 (eg, a digital-to-analog converter), and an output buffer 740 (eg, a buffer circuit).
[0124] The control circuit 710 may be connected to the second power line PL2, may measure the second power voltage VSS (e.g., the sensing voltage VSS_S) at the second power line PL2, may determine whether the second power voltage VSS is normally supplied to the second power line PL2 based on the sensing voltage VSS_S, and may generate a control signal CS obtained by reflecting the determination result. For example, the control circuit 710 may include the control circuit 710 described above with reference to FIG. Figure 4A The sensing unit 410, the comparator 420 and the storage unit 430 (and the control signal generator 440) described above may include the above reference Figure 4B The reference voltage generator 510 and the comparator 520 (and the control signal generator 440) described above. The control signal CS can be Figure 4A and Figure 4B The initialization voltage control signal VINT_EN described above corresponds to the initialization voltage control signal VINT_EN.
[0125] The gamma voltage generating circuit 720 may generate gamma voltages VG having various suitable voltage levels. The gamma voltages VG may be used to convert grayscale values included in the image data DATA_S into data signals DATA (eg, data voltages or grayscale voltages).
[0126] The decoder 730 may convert the digital grayscale value contained in the image data DATA_S into the analog data signal DATA by using the gamma voltage VG. The decoder 730 may be implemented as a digital-to-analog converter. The image data DATA_S may be provided to the decoder 730, for example, through a shift register and a latch.
[0127] The output buffer 740 may output the data signal DATA provided from the decoder 730 to the data lines DLs. The data lines DLs may include Figure 6 The data lines DL1 to DLm of the display 110 are shown in FIG. The output buffer 740 may be implemented to include one or more amplifiers connected to the data lines DLs.
[0128] In some embodiments, the gamma voltage generation circuit 720 can vary the gamma voltage VG based on the control signal CS, or can vary the voltage range of the gamma voltage VG. For example, when the control circuit 710 determines that the second power voltage VSS is normally supplied to the second power line PL2, the gamma voltage generation circuit 720 can generate a gamma voltage VG having a first voltage range. For another example, when the control circuit 710 determines that the second power voltage VSS is not normally supplied to the second power line PL2, the gamma voltage generation circuit 720 can generate a gamma voltage VG having a second voltage range. In some embodiments, the second voltage range can be a subset of the first voltage range. The second voltage range can correspond to a low brightness that is lower than the total brightness (e.g., or average brightness) of the first voltage range.
[0129] refer to Figure 8A , the first curve CURVE1 (e.g., a first gamma curve or a first gray-voltage curve) represents the voltage level of the gamma voltage VG (e.g., or the data signal DATA) according to the gray value GRAY of the image data DATA_S when the second power voltage VSS is normal. The gamma voltage VG may have a first voltage range VR1 according to the first curve CURVE1. As described above with reference to Figure 3A As described above, when the first transistor T1 is implemented by a P-type transistor, the voltage level of the gamma voltage VG (or the voltage level of the data signal DATA) may decrease as the grayscale value GRAY increases. However, the present disclosure is not limited thereto. For example, as shown in FIG. Figure 3B As described above, when the first thin film transistor M1 is implemented by an N-type transistor, the voltage level of the gamma voltage VG (or the voltage level of the data signal DATA) may increase as the grayscale value GRAY increases.
[0130] A second curve CURVE2 (e.g., a second gamma curve or a second gray-voltage curve) represents a voltage level of a gamma voltage VG (e.g., or a data signal DATA) according to a gray value GRAY of image data DATA_S when the second power voltage VSS is not normally supplied (e.g., abnormally supplied) to the second power line PL2. The gamma voltage VG may have a second voltage range VR2 according to the second curve CURVE2. The second voltage range VR2 may be a subset of the first voltage range VR1 and may correspond to low gray values (e.g., gray values corresponding to relatively low brightness) on the first curve CURVE1.
[0131] When the second power voltage VSS is not normally supplied to the second power line PL2, the gamma voltage generating circuit 720 (eg, see Figure 7 ) or driver 140_2 can change (e.g., vary) the voltage range of data signal DATA from the first voltage range VR1 to the second voltage range VR2. Therefore, as described above, the drive current (e.g., the amount of current) flowing in pixel PXL can be reduced, the increase in the voltage of the anode electrode of light-emitting element LD can be reduced, and the overcurrent flowing in driver 140_2 through third power line PL3 can be reduced. Because the voltage range of gamma voltage VG can be limited (and because the second power voltage VSS is not normally supplied to second power line PL2), an error may occur in the image displayed by display 110. Therefore, a user of display device 100_2 can recognize that an error has occurred in display device 100_2 and may not use display device 100_2 or may take measures to repair display device 100_2.
[0132] In an embodiment, the gamma voltage generating circuit 720 (see, for example, Figure 7 ) can generate only appropriate or desired gamma voltages VG (eg, specific or designated gamma voltages VG) based on the control signal CS.
[0133] refer to Figure 6 and Figure 8B Each of the first and second sub-curves CURVE_S1 and CURVE_S2 represents a voltage level of the gamma voltage VG (e.g., or the data signal DATA) according to the gray value GRAY of the image data DATA_S when the second power voltage VSS is normal. Each of the third and fourth sub-curves CURVE_S3 (e.g., a third graph) and CURVE_S4 (e.g., a fourth graph) represents a voltage level of the gamma voltage VG (e.g., or the data signal DATA) according to the gray value GRAY of the image data DATA_S when the second power voltage VSS is not normally applied to the second power line PL2.
[0134] When the display device 100_2 includes multiple pixels emitting light of different colors, the first sub-curve CURVE_S1 and the third sub-curve CURVE_S3 can represent the gamma voltage VG of a first pixel (e.g., or multiple first pixels) emitting light of the first color, and the second sub-curve CURVE_S2 and the fourth sub-curve CURVE_S4 can represent the gamma voltage VG of a second pixel (e.g., or multiple second pixels) emitting light of the second color.
[0135] When the second power voltage VSS is not normally supplied to the second power line PL2, the gamma voltage generating circuit 720 (e.g., or the driver 140_2) may change the gamma voltage VG of the first pixel (e.g., the gamma voltage VG according to the first sub-curve CURVE_S1) to the gamma voltage VG according to the third sub-curve CURVE_S3 (e.g., the minimum gamma voltage VG corresponding to the minimum grayscale or grayscale value), and may change the gamma voltage VG of the second pixel (e.g., the gamma voltage VG according to the second sub-curve CURVE_S2) to the gamma voltage VG according to the fourth sub-curve CURVE_S4 (e.g., the gamma voltage VG corresponding to the intermediate grayscale or grayscale value). In this case, the data signal DATA of the first pixel may be changed to a data voltage corresponding to the minimum grayscale (e.g., the minimum grayscale value) regardless of the grayscale value GRAY, and the data signal DATA of the second pixel may be changed to a data voltage corresponding to the intermediate grayscale (e.g., the intermediate grayscale value) regardless of the grayscale value GRAY. Therefore, a monochrome image with a specific or designated color (e.g., red, blue, green, etc.) can be Figure 6 1 is displayed regardless of the image data DATA_S. Accordingly, the user of the display device 100_2 can recognize that an error has occurred in the display device 100_2 (for example, the second power voltage VSS is not normally applied to the second power line PL2) and may not use the display device 100_2 or may take measures to repair the display device 100_2.
[0136] Although the case where the display 110 displays a monochrome image has been described, the present disclosure is not limited thereto. Figure 7 ) or the driver 140_2 may change the gamma voltages VG of all pixels to the gamma voltages VG according to the third sub-curve CURVE_S3 (eg, the gamma voltage VG corresponding to the minimum grayscale or grayscale value). Thus, a black image may be displayed on the display 110.
[0137] As reference Figure 6 、 Figure 7 、 Figure 8A and Figure 8B As described above, when the second power voltage VSS is not normally supplied to the display 110, the display device 100_2 (e.g., the driver 140_2) can limit the voltage range of the gamma voltage VG (e.g., or the data signal) to a low grayscale voltage range corresponding to low brightness, thereby reducing the possibility that the driver 140_2 and the display 110 will be further damaged. Furthermore, an abnormal image, a monochrome image, a black image, etc. can be displayed on the display 110, so that the user of the display device 100_2 can recognize that an error has occurred in the display device 100_2.
[0138] Figure 9 The diagram is included in Figure 6 FIG. 1 is a block diagram of another example of a driver 140_2 in a display device 100_2 shown in FIG. Based on a configuration for generating an initialization voltage VINT, Figure 9 The driver 140_3 is briefly (eg, partially) illustrated in FIG.
[0139] refer to Figure 6 、 Figure 7 and Figure 9 , Figure 9 The driver 140_3 shown in FIG Figure 7 The difference between the driver 140_2 shown in FIG. 1 and FIG. 2 may be that: Figure 9 The driver 140_3 may control the initialization voltage VINT instead of (or in addition to) the gamma voltage VG.
[0140] The driver 140_3 may include a control circuit 910 and an initialization voltage generator 920 (eg, an initialization voltage generating circuit). The control circuit 910 may be similar to the above referenced Figure 7 The control circuit 710 is the same or substantially the same (or similar) as described above, and the initialization voltage generator 920 can be the same as described above with reference to FIG. Figure 4A The described initialization voltage generator 450 is the same or substantially the same (or similar). Therefore, a redundant description thereof may not be repeated, and differences therebetween may be mainly described hereinafter.
[0141] The control circuit 910 can be connected to the second power line PL2, can measure the second power voltage VSS (for example, the sensing voltage VSS_S) at the second power line PL2, can determine whether the second power voltage VSS is normally provided to the second power line PL2 based on the sensing voltage VSS_S, and can generate a control signal CS obtained by reflecting the determination result.
[0142] The initialization voltage generator 920 may be connected to the display 110 (eg, the third power line PL3 of the display 110 ), and may provide an initialization voltage VINT to the display 110 .
[0143] The initialization voltage generator 920 may change (eg, may vary) a voltage level of the initialization voltage VINT based on the control signal CS.
[0144] For example, when the second power voltage VSS is normal (NORMAL), the initialization voltage generator 920 may generate an initialization voltage VINT having a first voltage level V1. For example, when the second power voltage VSS is not normally provided (ERROR) to the second power line PL2, the initialization voltage generator 920 may generate an initialization voltage VINT having a second voltage level V2. The second voltage level V2 may be different from the first voltage level V1. For example, in some embodiments, the second voltage level V2 may be higher than the first voltage level V1 (V1@NORMAL). <V2@ERROR)。
[0145] When the second power voltage VSS is not normally supplied to the second power line PL2, the voltage of the anode electrode of the light emitting element LD (for example, the voltage of the anode electrode of the light emitting element LD) Figure 2 described) may increase, but the magnitude of the overcurrent flowing in the driver 140_3 through the third power line PL3 may be reduced by the initialization voltage VINT having the second voltage level V2 which may be relatively high.
[0146] As reference Figure 9 As described, when the second power voltage VSS is not normally supplied to the display 110 , the driver 140_3 may change (eg, may vary) the voltage level of the initialization voltage VINT so that there is less likelihood that the driver 140_3 and the display 110 will be damaged.
[0147] Figure 10 is a block diagram illustrating a display device 100_3 according to an embodiment of the present disclosure.
[0148] refer to Figure 1 and Figure 10 , Figure 10 The display device 100_3 shown in FIG. Figure 1 The display device 100 shown in FIG. 1 may differ in that: Figure 10 The display device 100_3 may not include a protection circuit and may include a driver 140_4 that generates an error flag ERROR_FLAG (eg, an error occurrence signal) instead of the initialization voltage control signal VINT_EN. In addition to the configuration for generating the error flag ERROR_FLAG, the display device 100_3 may be configured with Figure 1The display device 100 shown in FIG. 1 is the same or substantially the same (or similar), and thus, a redundant description thereof may not be repeated.
[0149] The driver 140_4 may generate an error flag ERROR_FLAG based on the sensing voltage VSS_S measured at the second power line PL2 of the display 110 and may provide the error flag ERROR_FLAG to the power supply 150 .
[0150] For example, the driver 140_4 may determine whether the sensing voltage VSS_S exceeds a reference range (eg, an allowable range), and may generate an error flag ERROR_FLAG when the sensing voltage VSS_S exceeds the reference range.
[0151] When the power supply 150 receives the error flag ERROR_FLAG, the power supply 150 may stop supplying the first power voltage VDD to the display 110 (e.g., to the first power line PL1). In other words, the power supply 150 may sense that the second power voltage VSS is not normally supplied to the second power line PL2, and may not apply the first power voltage VDD to the first power line PL1. In this case, the driving current generating circuit DCG (e.g., the above reference Figure 2 described) may not generate a driving current (eg, may not generate any driving current), and an increase in voltage and / or an increase in temperature at the anode electrode of the light emitting element LD, etc. may not occur.
[0152] As reference Figure 10 As described, although a connection error of the second power voltage VSS may occur, the display device 100_3 can interrupt the power supply (e.g., the first power voltage VDD) that may generate overcurrent, so that damage to the driver 140_4 and damage to the display device 100_3 can be prevented or substantially prevented.
[0153] Figure 11 is a block diagram illustrating a display device 100_4 according to an embodiment of the present disclosure.
[0154] refer to Figure 10 and Figure 11 , Figure 11 The display device 100_4 shown in FIG. Figure 10 The display device 100_3 shown in FIG may be different in that: Figure 11 The display device 100_4 may include a memory 1160 (eg, a memory device). In addition to the memory 1160, Figure 11 The display device 100_4 and Figure 10 The display device 100_3 shown in FIG. 1 is the same as or substantially the same as (or similar to) the display device 100_3 shown in FIG. 1 , and thus a redundant description thereof may not be repeated.
[0155] The driver 140_5 may generate an error flag ERROR_FLAG based on the sensing voltage VSS_S measured at the second power line PL2 of the display 110 and may provide the error flag ERROR_FLAG to the memory 1160 .
[0156] The memory 1160 may store notification data DATA_ERROR and may provide the notification data DATA_ERROR to the driver 140_5 in response to the error flag ERROR_FLAG. The notification data DATA_ERROR may be image data corresponding to an error image representing that the second power voltage VSS is not normally supplied to the second power line PL2. For example, the error image may include text such as "VSS connection error" or may include a specific pattern that enables a user to recognize that there is a VSS connection error. For example, the error image may include a black image or a monochrome image (e.g., a red image). The driver 140_5 may generate a data signal corresponding to the error image, and the display 110 may display the error image.
[0157] In other words, in addition to the reference Figure 6 and Figure 7 The configuration for changing (eg, varying) the voltage range of the gamma voltage VG described and the configuration described with reference to Figure 9 In addition to the configuration for changing (eg, varying) the initialization voltage VINT, the display device 100_4 may replace the image data with the notification data DATA_ERROR. Therefore, the user of the display device 100_4 may recognize that an error has occurred in the display device 100_4.
[0158] According to one or more example embodiments of the present disclosure, a display device may supply an initialization voltage to a display panel (e.g., to a pixel) through a driver. When a second power voltage is not normally supplied to the display panel, the display device may interrupt the initialization voltage applied from the driver to the display panel through a protection circuit, and / or may limit the amount of current corresponding to the initialization voltage. Thus, a path through which an overcurrent, which may be caused by a fault in the electrical connection between the power supply and the display panel, moves between the display panel and the driver may be interrupted, and damage to the driver (and damage to the display device) may be prevented or substantially prevented.
[0159] According to one or more exemplary embodiments of the present disclosure, when the second power voltage is not normally supplied to the display panel, the display device can limit the voltage range of the data signal (or gamma voltage) to a low grayscale voltage range corresponding to low brightness, and can supply a data signal corresponding to an error image (e.g., an error image representing that the second power voltage is not normally supplied) to the display panel. Therefore, an overcurrent flowing from the driver into the display panel can be reduced, and the driver (and the display device) is less likely to be damaged (e.g., further damaged).
[0160] According to one or more exemplary embodiments of the present disclosure, when the second power voltage is not normally supplied to the display panel, the display device can interrupt the power supply (e.g., the first power voltage) that may generate an overcurrent. Thus, damage to the driver (and the display device) can be prevented or substantially prevented.
[0161] Although some example embodiments have been described, it will be readily understood by those skilled in the art that many modifications may be made to the example embodiments without departing from the spirit and scope of the present disclosure. It will be understood that, unless otherwise described, the description of features or aspects in each embodiment should typically be considered to be applicable to other similar features or aspects in other embodiments. Therefore, as will be apparent to those skilled in the art when filing this application, the features, characteristics and / or elements described in conjunction with a particular embodiment may be used alone or in combination with the features, characteristics and / or elements described in conjunction with other embodiments, unless otherwise specifically indicated. Therefore, it will be understood that the above is an illustration of various example embodiments and should not be construed as being limited to the specific example embodiments disclosed herein, and that various modifications to the disclosed example embodiments as well as other example embodiments are intended to be included within the spirit and scope of the present disclosure as defined by the appended claims and their equivalents.
Claims
1. A display device, comprising: a display panel including a pixel electrically connected to each of the data line, the first power line, the second power line, and the third power line; a power supply configured to provide a first power voltage to the first power line and a second power voltage to the second power line; and a driver configured to supply a data voltage to the data line and a third power voltage to the third power line, wherein the driver is configured to determine whether a sense voltage measured at the second power line exceeds a reference range, and to limit the supply of the third power voltage when the sense voltage exceeds the reference range, and The pixels include: a light emitting element connected between the first power line and the second power line; a driving current generating circuit configured to supply a driving current from the first power line to the light emitting element in response to the data voltage; and The initialization transistor is connected between the third power line and one electrode of the light emitting element.
2. The display device according to claim 1, wherein The driver is configured to measure the sense voltage through a routing line branched from the second power line.
3. The display device according to claim 1, further comprising: a switch connected between the third power line of the display panel and the driver, The driver is configured to generate a control signal for turning off the switch when the sense voltage exceeds the reference range.
4. The display device according to claim 3, wherein The driver includes: an analog-to-digital converter configured to convert the sensed voltage into a sensed value in digital form; a comparator configured to compare the sensed value with a reference value; and The control signal generator is configured to generate the control signal based on the comparison result of the comparator.
5. The display device according to claim 3, wherein The driver includes: a reference voltage generator configured to generate a reference voltage; a comparator configured to compare the sensed voltage with the reference voltage; and The control signal generator is configured to generate the control signal based on the comparison result of the comparator. The display device according to claim 1 , wherein: The driving current generating circuit comprises: a first transistor including a first electrode electrically connected to the first power line through a second node, a second electrode electrically connected to the one electrode of the light emitting element through the first node, and a gate electrode electrically connected to a third node; a second transistor including a first electrode connected to the data line, a second electrode connected to the second node, and a gate electrode connected to the scan line; a third transistor including a first electrode connected to the first node, a second electrode connected to the third node, and a gate electrode connected to the scan line; and A storage capacitor is provided between the first power line and the third node.
7. The display device according to claim 1, wherein The driving current generating circuit comprises: a first transistor including a first electrode electrically connected to the first power line, a second electrode electrically connected to the one electrode of the light emitting element, and a gate electrode connected to a gate node; a second transistor including a first electrode connected to the data line, a second electrode connected to the gate node, and a gate electrode connected to the scan line; and A storage capacitor is provided between the gate node and the one electrode of the light emitting element.
8. The display device according to claim 1, further comprising: a current limiting circuit connected between the third power line of the display panel and the driver, The driver is configured to generate a control signal when the sense voltage exceeds the reference range to allow the current limiting circuit to limit the amount of current flowing through the third power line.
9. The display device according to claim 1, wherein The driver is configured to change the third power voltage when the sensing voltage exceeds the reference range.
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