Semiconductor structure and method for forming the same

Abstract

A semiconductor structure and a method for forming the same, the method comprising: providing a substrate; forming an electrode layer on the substrate; forming an alloy seed layer on the electrode layer; and forming a magnetic tunnel junction stacking structure on the alloy seed layer. In an embodiment of the present invention, after the magnetic tunnel junction stacking structure is formed, the magnetic tunnel junction stacking structure is usually annealed. During the annealing process, the atoms in the alloy seed layer are not easily diffused into the tunneling barrier layer of the magnetic tunnel junction stacking structure, and the material of the tunneling barrier layer is more easily transformed into a single crystal state, so that the magnetic tunnel junction stacking structure has a larger magnetoresistance ratio; in addition, by controlling the ratio between the atoms in the alloy seed layer, the surface roughness of the top surface of the alloy seed layer is not easily increased after the alloy seed layer is annealed, and the surface roughness of the interface between the film layers of the magnetic tunnel junction stacking structure is not easily increased, which is conducive to the magnetic tunnel junction stacking structure having a larger magnetoresistance ratio.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular to a semiconductor structure and a method for forming the same. Background Art

[0002] Magnetic Random Access Memory (MRAM) is a non-volatile magnetic random access memory. The so-called "non-volatility" means that the memory can remain intact after the power is turned off. MRAM devices have the high-speed reading and writing capabilities of static random access memory (SRAM) and the high integration of dynamic random access memory (DRAM), and can basically be repeatedly written indefinitely. Magnetic random access memory is a "full-kinetic" solid-state memory. Therefore, its application prospects are very promising and it is expected to dominate the next-generation memory market.

[0003] MRAM is a memory device that includes an array of MRAM cells, each of which uses resistance values ​​rather than charge to store data bits. Each MRAM cell includes a magnetic tunnel junction (MTJ) cell, the resistance of which can be adjusted to represent a logic "0" or a logic "1". The MTJ cell includes a fixed magnetic layer, a tunneling barrier layer, and a magnetic free layer. The resistance of the MTJ cell can be adjusted by changing the direction of the magnetic moment of the magnetic free layer relative to the fixed magnetic layer. In particular, when the magnetic moment of the magnetic free layer is parallel to the magnetic moment of the fixed magnetic layer, the resistance of the MTJ cell is low, corresponding to a logic 0, and conversely, when the magnetic moment of the magnetic free layer is not parallel to the magnetic moment of the fixed magnetic layer, the resistance of the MTJ cell is high, corresponding to a logic 1. The MTJ cell is connected between the top and bottom electrodes, and the current flowing through the MTJ cell from one electrode to the other can be detected to determine the resistance and thus the logic state.

[0004] The tunnel magnetoresistance (TMR) effect in magnetic tunnel junctions (MTJs) is the key to developing magnetoresistive random access memories (MRAMs), magnetic sensors, and novel programmable logic devices. Summary of the invention

[0005] The problem solved by the embodiments of the present invention is to provide a semiconductor and a method for forming the same, so as to improve the electrical performance of the semiconductor structure.

[0006] To solve the above problems, an embodiment of the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming an electrode layer on the substrate; forming an alloy seed layer on the electrode layer; and forming a magnetic tunnel junction stacked structure on the alloy seed layer.

[0007] Optionally, the material of the alloy seed layer includes MoTa alloy.

[0008] Optionally, in the step of forming the alloy seed layer, the atomic number ratio of Mo and Ta in the alloy seed layer is 1 to 5.

[0009] Optionally, in the step of forming the alloy seed layer, the thickness of the alloy seed layer is to

[0010] Optionally, the alloy seed layer is formed by a plasma enhanced atomic layer deposition process, a chemical vapor deposition process or a physical vapor deposition process.

[0011] Optionally, the alloy seed layer is formed by a radio frequency magnetron sputtering process or a direct current magnetron sputtering process.

[0012] Optionally, process parameters for forming the alloy seed layer using a radio frequency magnetron sputtering process or a direct current magnetron sputtering process include: sputtering ions include Ar, targets include Mo targets and Ta targets, or MoTa alloy targets, process temperature is 20°C to 350°C, and chamber pressure is 100mTorr to 500mTorr.

[0013] Optionally, the steps of forming the magnetic tunnel junction stack structure include: forming a fixed magnetic layer; forming a tunneling barrier layer on the fixed magnetic layer; forming a magnetic free layer on the tunneling barrier layer; the steps of forming the fixed magnetic layer include: forming a first antiferromagnetic layer on the alloy seed layer; forming a first coupling layer on the first antiferromagnetic layer; forming a second antiferromagnetic layer on the first coupling layer; forming a second coupling layer on the second antiferromagnetic layer; forming a pinned layer on the second coupling layer.

[0014] Optionally, the material of the first coupling layer includes non-tantalum metal.

[0015] Optionally, the material of the second coupling layer includes non-tantalum metal.

[0016] Optionally, the material of the tunnel barrier layer includes MgO, AlO, AlN or AlON.

[0017] Optionally, the method for forming the semiconductor structure further includes: after forming the magnetic tunnel junction stacked structure, performing annealing treatment on the magnetic tunnel junction stacked structure.

[0018] Correspondingly, an embodiment of the present invention further provides a semiconductor structure, comprising: a substrate; an electrode layer located on the substrate; an alloy seed layer located on the electrode layer; and a magnetic tunnel junction unit located on the alloy seed layer.

[0019] Optionally, the material of the alloy seed layer includes MoTa alloy.

[0020] Optionally, the atomic number ratio of Mo to Ta in the alloy seed layer is 1 to 5.

[0021] Optionally, the thickness of the alloy seed layer is to

[0022] Optionally, the roughness of the alloy seed layer is less than

[0023] Optionally, the magnetic tunnel junction unit includes: a fixed magnetic layer, a tunneling barrier layer located on the fixed magnetic layer, and a magnetic free layer located on the tunneling barrier layer; the fixed magnetic layer includes a first antiferromagnetic layer, a first coupling layer located on the first antiferromagnetic layer, a second antiferromagnetic layer located on the first coupling layer, a second coupling layer located on the second antiferromagnetic layer, and a pinned layer located on the second coupling layer.

[0024] Optionally, the material of the first coupling layer includes non-tantalum metal.

[0025] Optionally, the material of the second coupling layer includes non-tantalum metal.

[0026] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0027] In the method for forming a semiconductor structure provided by an embodiment of the present invention, after forming the magnetic tunnel junction stacking structure, the magnetic tunnel junction stacking structure is usually annealed. During the annealing process, the atoms in the alloy seed layer are not easy to diffuse into the tunneling barrier layer of the magnetic tunnel junction stacking structure, and the material of the tunneling barrier layer is more easily transformed into a single crystal state, so that the magnetic tunnel junction stacking structure has a larger magnetoresistance ratio; in addition, by controlling the ratio between the atoms in the alloy seed layer, the surface roughness of the top surface of the alloy seed layer can be made difficult to increase after the alloy seed layer is annealed, so that the magnetic tunnel junction stacking structure is less affected by the surface roughness of the top surface of the alloy seed layer, and the surface roughness of the interface between the film layers of the magnetic tunnel junction stacking structure is not easy to increase. Therefore, the film layers of the magnetic tunnel junction stacking structure still have a large perpendicular anisotropy, which is conducive to the magnetic tunnel junction stacking structure having a large magnetoresistance ratio. In summary, the seed layer includes an alloy material, which can improve the tunneling magnetoresistance ratio of the magnetic tunnel junction stacking structure, so that the semiconductor structure has excellent electrical properties. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A schematic diagram of a semiconductor structure;

[0029] Figure 2Electron microscope image of the seed layer surface after annealing of the magnetic tunnel junction

[0030] Figures 3 to 12 ,as well as Fig.14 and Fig.15 is a schematic structural diagram corresponding to each step in an embodiment of a method for forming a semiconductor structure of the present invention;

[0031] Fig.13 It is an electron microscope image of the top surface of the alloy seed layer after the magnetic tunnel junction stack structure is annealed. DETAILED DESCRIPTION

[0032] The semiconductor structure currently formed still has the problem of poor performance. Now, the reasons for the poor performance of the semiconductor structure are analyzed in combination with a structural schematic diagram of a semiconductor structure.

[0033] Figure 1 , showing a schematic structural diagram of a semiconductor structure.

[0034] refer to Figure 1 The semiconductor structure includes: a first electrode (not shown in the figure); a seed layer 1, located on the first electrode; a fixed magnetic layer 2 is located on the seed layer 1, and the fixed magnetic layer includes: a first antiferromagnetic layer 3, a first coupling layer 4 located on the first antiferromagnetic layer 3, a second antiferromagnetic layer 5 located on the first coupling layer 4, a second coupling layer 6 located on the second antiferromagnetic layer 5, and a pinned layer 7 located on the second coupling layer 6; a tunneling barrier layer 8, located on the fixed magnetic layer 2; a free magnetic layer 9, located on the tunneling barrier layer 8; and a cap layer 10, located on the free magnetic layer 9.

[0035] It should be noted that the fixed magnetic layer 2 , the tunnel barrier layer 8 and the free magnetic layer 9 constitute a magnetic tunnel junction. In order to improve the magnetoresistance ratio of the magnetic tunnel junction, the magnetic tunnel junction is usually annealed.

[0036] Figure 2 This is an electron microscope image of the surface of the seed layer 1 after annealing the magnetic tunnel junction. Usually the material of the seed layer 1 includes Ta. Figure 2 It can be seen that after annealing, the lattice of Ta atoms in the seed layer 1 becomes larger (as shown in A), resulting in a larger surface roughness of the seed layer 1, so that the magnetic tunnel junction is easily affected by the surface roughness of the top surface of the seed layer 1. The surface roughness of the interface between the film layers of the magnetic tunnel junction is relatively high. Therefore, the perpendicular anisotropy between the film layers of the magnetic tunnel junction is relatively poor, resulting in a relatively small magnetic resistance of the magnetic tunnel junction.

[0037] In addition, Ta has a strong diffusion ability. During the annealing process, the Ta in the seed layer 1 can easily pass through the fixed magnetic layer 2 and diffuse into the tunnel barrier layer 8. During the annealing process, the metal oxide in the tunnel barrier layer 8 is not easy to transform from a polycrystalline state to a single crystal state, resulting in a weak tunnel magnetoresistance (TMR) effect of the magnetic tunnel junction.

[0038] In order to solve the technical problem, an embodiment of the present invention provides a method for forming a semiconductor structure, including: providing a substrate; forming an electrode layer on the substrate; forming an alloy seed layer on the electrode layer; and forming a magnetic tunnel junction stacked structure on the alloy seed layer.

[0039] In the method for forming a semiconductor structure provided by an embodiment of the present invention, after forming the magnetic tunnel junction stacking structure, the magnetic tunnel junction stacking structure is usually annealed. During the annealing process, the atoms in the alloy seed layer are not easy to diffuse into the tunneling barrier layer of the magnetic tunnel junction stacking structure, and the material of the tunneling barrier layer is more easily transformed into a single crystal state, so that the magnetic tunnel junction stacking structure has a larger magnetoresistance ratio; in addition, by controlling the ratio between the atoms in the alloy seed layer, the surface roughness of the top surface of the alloy seed layer can be made difficult to increase after the alloy seed layer is annealed, so that the magnetic tunnel junction stacking structure is less affected by the surface roughness of the top surface of the alloy seed layer, and the surface roughness of the interface between the film layers of the magnetic tunnel junction stacking structure is not easy to increase. Therefore, the film layers of the magnetic tunnel junction stacking structure still have a large perpendicular anisotropy, which is conducive to the magnetic tunnel junction stacking structure having a large magnetoresistance ratio. In summary, the seed layer includes an alloy material, which can improve the tunneling magnetoresistance ratio of the magnetic tunnel junction stacking structure, so that the semiconductor structure has excellent electrical properties.

[0040] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present invention more obvious and understandable, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0041] Figures 3 to 15 It is a schematic structural diagram corresponding to each step in an embodiment of a method for forming a semiconductor structure according to an embodiment of the present invention.

[0042] refer to Figure 3 , providing a substrate.

[0043] The substrate is used to provide a process platform for forming a magnetic random access memory (MRAM). Specifically, the MRAM device is a spin transfer torque magnetoresistive random access memory (Spin Transfer Torque-MRAM, STT-MRAM).

[0044] The substrate includes: a first intermetallic dielectric layer 100 and an interconnection line 101 located in the first intermetallic dielectric layer 100 .

[0045] The first intermetallic dielectric layer 100 is used to electrically isolate the interconnection lines 101 .

[0046] In this embodiment, the material of the first metal interlayer dielectric layer 100 is a low-k dielectric material, which is beneficial to reducing the parasitic capacitance between the interconnection lines 101 and reducing the subsequent RC delay.

[0047] It should be noted that the substrate also includes a transistor, the first metal interlayer dielectric layer 100 is usually formed on the transistor, the transistor includes a gate structure, and source and drain doped regions located on both sides of the gate structure, and the substrate also has contact hole plugs (not shown in the figure) in contact with the source and drain doped regions.

[0048] The interconnection line 101 is used to connect with the contact hole plug.

[0049] In this embodiment, the interconnection line 101 is a first metal layer (M1), and the first metal layer refers to a metal layer closest to the contact hole plug.

[0050] In this embodiment, the material of the interconnection line 101 is copper. In other embodiments, according to the actual process, the material of the interconnection line can also be a conductive material such as tungsten, aluminum, cobalt, etc.

[0051] The substrate further includes: a dielectric layer 102 located on the first metal interlayer dielectric layer 100 and covering the interconnection line 101 ; and a conductive plug 103 penetrating the dielectric layer 102 , wherein the conductive plug 103 is connected to the interconnection line 101 .

[0052] The dielectric layer 102 is used to electrically isolate the conductive plug 103 .

[0053] In this embodiment, the material of the dielectric layer 102 is a dielectric material such as a low-k dielectric material, an ultra-low-k dielectric material, silicon oxide, silicon nitride, silicon oxynitride, or silicon oxycarbide.

[0054] Specifically, the material of the dielectric layer 102 is a low-k dielectric material, which is beneficial to reducing the parasitic capacitance between the conductive plugs 103, thereby reducing the RC delay of the back end. Specifically, the material of the dielectric layer 102 is SiCOH.

[0055] Subsequently, a bottom electrode is formed on the substrate, and the conductive plug 103 is used to realize electrical connection between the contact hole plug in the substrate and the bottom electrode.

[0056] The material of the conductive plug 103 can be one or more of Cu, W, Al, TiN, TaN, and Ti. In this embodiment, the material of the conductive plug 103 is Cu.

[0057] refer to Figure 4 , an electrode layer 104 is formed on the substrate.

[0058] In this embodiment, the electrode layer 104 is a bottom electrode (BE), and the electrode layer 104 is used to electrically connect the subsequent magnetic tunnel junction stack structure with the conductive plug 103 .

[0059] Specifically, the material of the electrode layer 104 includes one or more of tantalum nitride (TaN), tantalum (Ta), titanium (TiN) and titanium nitride (TiN). In this embodiment, the electrode layer 104 is a single-layer structure, and the material of the electrode layer 104 includes tantalum nitride.

[0060] In this embodiment, the electrode layer 104 is formed by an atomic layer deposition (ALD) process. The atomic layer deposition process is a self-limiting reaction process based on the atomic layer deposition process. The deposited film can reach the thickness of a single layer of atoms. Because the atomic layer deposition process can accurately deposit one atomic layer in each cycle, the use of the atomic layer deposition process is conducive to the precise control of the thickness of the electrode layer 104. In addition, the film prepared by the ALD process has the characteristics of good bonding strength, consistent film thickness, good composition uniformity, good conformality, etc., which is conducive to improving the thickness uniformity and film quality of the electrode layer 104. In other embodiments, according to the actual process, the physical vapor deposition process can also be used to form the electrode layer.

[0061] refer to Figure 5 , an alloy seed layer 105 is formed on the electrode layer 104 .

[0062] Subsequently, a magnetic tunnel junction stacked structure is formed on the alloy seed layer 105 . Usually, after the magnetic tunnel junction stacked structure is formed, the magnetic tunnel junction stacked structure is annealed to improve the magnetoresistance ratio of the magnetic tunnel junction stacked structure. During the annealing process, the atoms in the alloy seed layer 105 are not easy to diffuse into the tunneling barrier layer of the magnetic tunnel junction stacking structure, and then the material of the tunneling barrier layer is easier to transform into a single crystal state, so that the magnetic tunnel junction stacking structure has a larger tunneling magnetoresistance ratio; in addition, by controlling the ratio between the atoms in the alloy seed layer 105, the surface roughness of the top surface of the alloy seed layer 105 can be made difficult to increase after the alloy seed layer 105 is annealed, so that the magnetic tunnel junction stacking structure is less affected by the surface roughness of the top surface of the alloy seed layer 105, and the surface roughness of the interface between the film layers of the magnetic tunnel junction stacking structure is not easy to increase. Therefore, the film layers of the magnetic tunnel junction stacking structure still have a large perpendicular anisotropy (PMA), which is conducive to the magnetic tunnel junction stacking structure having a large magnetoresistance ratio. In summary, the alloy seed layer 105 includes an alloy material, which can improve the tunneling magnetoresistance ratio of the magnetic tunnel junction stacking structure, so that the semiconductor structure has excellent electrical properties.

[0063] The top surface of the alloy seed layer 105 has high flatness and smoothness, so as to provide a good interface state for the subsequent formation of a magnetic tunnel junction stacked structure, thereby improving the formation quality of the magnetic tunnel junction stacked structure.

[0064] In this embodiment, the material of the alloy seed layer 105 includes MoTa alloy. MoTa alloy is a continuous disordered solid solution. MoTa alloy has stable performance and low thermal conductivity. At high temperature, Mo and Ta atoms in MoTa alloy are not easy to diffuse into the tunnel barrier layer of the magnetic tunnel junction stack structure formed subsequently. In the annealing process, the material of the tunnel barrier layer is more likely to be transformed into a single crystal state, so that the magnetic tunnel junction stack structure has a larger tunnel magnetoresistance ratio. Mo has a smaller resistance. Compared with the seed layer of Ta, in this embodiment, the resistance of the alloy seed layer 105 is smaller.

[0065] It should be noted that the ratio of the number of Mo and Ta atoms in the alloy seed layer 105 should not be too large or too small. During the subsequent annealing process, the lattice of Ta tends to become larger than that of Mo. If the number of Mo and Ta atoms is too small, that is, the proportion of Ta atoms in the alloy seed layer 105 is too high, during the annealing process, the lattice of Ta atoms becomes larger, which will cause the surface roughness of the top surface of the alloy seed layer 105 to be too large. The roughness change of the alloy seed layer 105 will be transmitted to the magnetic tunnel junction stacking structure, thereby increasing the roughness of the interface between each film layer in the magnetic tunnel junction stacking structure, resulting in a decrease in the vertical anisotropy between each film layer of the magnetic tunnel junction stacking structure, and then causing the magnetic tunnel junction stacking structure to have a smaller magnetoresistance ratio. Compared with Ta atoms, Mo atoms have poorer adhesion. If the atomic number ratio of Mo to Ta is too large, the adhesion of the alloy seed layer 105 is poor, the formation quality of the buffer layer 107 subsequently formed on the alloy seed layer 105 is poor, and the formation quality of the magnetic tunnel junction stacked structure subsequently formed on the buffer layer 107 is poor. The alloy seed layer 105 is not easy to provide a good interface state for the subsequent formation of the magnetic tunnel junction stacked structure. In this embodiment, the atomic number ratio of Mo to Ta in the alloy seed layer 105 is 1 to 5.

[0066] It should be noted that, in the step of forming the alloy seed layer 105, the alloy seed layer 105 should not be too thick or too thin. If the alloy seed layer 105 is too thick, it is easy to spend too much process time to form the alloy seed layer 105, and it will also cause the electrical properties of the subsequently formed magnetic tunnel junction stack structure to shift, which is not conducive to improving the magnetoresistance ratio of the magnetic tunnel junction stack structure. The material of the electrode layer 104 includes tantalum nitride. If the alloy seed layer 105 is too thin, during the annealing process, Ta is easy to pass through the alloy seed layer 105 and diffuse into the subsequently formed tunnel barrier layer. The metal oxide in the tunnel barrier layer is not easy to be transformed into a single crystal state, resulting in a relatively small magnetoresistance of the magnetic tunnel junction stack structure. In this embodiment, in the step of forming the alloy seed layer 105, the thickness of the alloy seed layer 105 is to

[0067] In this embodiment, a physical vapor deposition (PVD) process is used to form the alloy seed layer 105. The physical vapor deposition process has the advantages of low deposition temperature, fast deposition speed, controllable composition and structure of the deposited layer, simple operation, high efficiency and low cost, and the physical vapor deposition process is highly compatible with existing machines and process flows.

[0068] Specifically, the physical vapor deposition process includes a radio frequency magnetron sputtering process (RF sputtering) or a direct current magnetron sputtering process (DC sputtering) to form the alloy seed layer 105 .

[0069] In this embodiment, a DC magnetron sputtering process is used to form the alloy seed layer 105. In other embodiments, a radio frequency magnetron sputtering process may also be used to form the alloy seed layer.

[0070] The steps of forming the alloy seed layer 105 by using a DC magnetron sputtering process include: setting a target material at the positive pole of a DC voltage in a chamber, applying a DC voltage in the chamber, introducing a reaction gas into the chamber, the reaction gas is ionized in the chamber to form plasma, the plasma bombards the target material under the action of the DC voltage, and the atoms bombarded out of the target material are deposited on the electrode layer 104 to form the alloy seed layer 105.

[0071] In this embodiment, a Mo target and a Ta target are provided at the positive electrode in the chamber. By adjusting the ratio of the number of Mo targets and Ta targets, the ratio of the number of Mo and Ta atoms in the formed alloy seed layer 105 can be adjusted. In other embodiments, a MoTa alloy target can also be provided in the chamber.

[0072] In this embodiment, in the process of forming the alloy seed layer 105 by using a DC magnetron sputtering process, the sputtering ions include Ar. In other embodiments, they may also include He.

[0073] It should be noted that in the process of forming the alloy seed layer 105 by the DC magnetron sputtering process, the process temperature should not be too high or too low. If the process temperature is too high, the lattice size of the Ta atoms in the alloy seed layer 105 is too large, resulting in a large surface roughness of the formed alloy seed layer 105, which is not easy to provide a good interface state for the subsequent formation of the magnetic tunnel junction stacking structure, resulting in poor formation quality of the magnetic tunnel junction stacking structure, so the magnetic resistance of the magnetic tunnel junction stacking structure is relatively small. If the process temperature is too low, in the process of forming the alloy seed layer 105, Mo and Ta are not easy to diffuse with each other, resulting in inconsistent Mo and Ta atomic number ratios in various regions of the alloy seed layer 105, poor uniformity of the alloy seed layer 105, and correspondingly poor uniformity of various regions of the magnetic tunnel junction stacking structure formed subsequently. In this embodiment, the process temperature is 20°C to 350°C.

[0074] It should be noted that in the process of forming the alloy seed layer 105 by the DC magnetron sputtering process, the chamber pressure should not be too high or too low. If the chamber pressure is too low, it is easy to cause the deposition rate of Mo atoms produced by the sputtering ions bombarding the Mo target to be too slow, so that the crystal orientation of the alloy seed layer 105 is not easy to be consistent, resulting in poor density of the formed alloy seed layer 105. If the chamber pressure is too high, the Mo atoms bombarded from the Mo target collide violently during the deposition process, which can easily lead to excessive roughness of the top surface of the formed alloy seed layer 105. In this embodiment, the chamber pressure is 100mTorr to 500mTorr.

[0075] In some other embodiments, the alloy seed layer may be formed by atomic layer deposition (ALD) or chemical vapor deposition (CVD).

[0076] refer to Figures 6 to 11 , a magnetic tunnel junction stacked structure is formed on the alloy seed layer 105 .

[0077] The magnetic tunnel junction stack structure is prepared for the subsequent formation of a magnetic tunnel junction unit.

[0078] Specifically, the steps of forming the magnetic tunnel junction stack structure include:

[0079] like Figures 6 to 10 As shown, a fixed magnetic layer 106 (Pinning Layer) is formed on the alloy seed layer 105 (as shown in FIG. Fig.10 shown).

[0080] The fixed magnetic layer 106 has a fixed magnetic direction.

[0081] In this embodiment, the fixed magnetic layer 106 includes: a first antiferromagnetic layer 1061 (antiferro-magnetic, AFM), a first coupling layer 1062 located on the first antiferromagnetic layer 1061, a second antiferromagnetic layer 1063 located on the first coupling layer 1062, a second coupling layer 1064 located on the second antiferromagnetic layer 1063, and a pinned layer 1065 (fix layer) located on the second coupling layer 1064.

[0082] like Figure 6 As shown, a first antiferromagnetic layer (synthetic antiferromagnet, SAF) 1061 is formed on the alloy seed layer 105 .

[0083] When the semiconductor structure is working, the first antiferromagnetic layer 1061 is used to fix the magnetization direction of the subsequently formed pinned layer to avoid the magnetization direction being changed due to the direction of the induced magnetic field generated when the current in the bit line or word line flows due to the coercive force of the pinned layer being insufficient.

[0084] Specifically, the first antiferromagnetic layer 1061 includes a stacked structure consisting of alternately deposited Co layers and Pt layers. The more Co layers and Pt layers there are in the first antiferromagnetic layer 1061, the stronger the perpendicular anisotropy of the corresponding first antiferromagnetic layer 1061.

[0085] In this embodiment, a physical vapor deposition process is used to form the first antiferromagnetic layer 1061. In other embodiments, a chemical vapor deposition process or an atomic layer deposition process may also be used to form the first antiferromagnetic layer.

[0086] It should be noted that, after the alloy seed layer 105 is formed and before the fixed magnetic layer is formed, a buffer layer 107 is formed on the alloy seed layer 105 .

[0087] The buffer layer 107 is used to improve the surface roughness and interface defects of the alloy seed layer 105, provide a good growth interface for forming a magnetic tunnel junction stack structure, and improve the lattice growth quality of each film layer in the magnetic tunnel junction stack structure, so that the magnetic tunnel junction stack structure has a larger magnetoresistance ratio.

[0088] Specifically, the material of the buffer layer 107 includes one or more of Ru, Pt and Hf. In this embodiment, the material of the buffer layer 107 includes Pt.

[0089] like Figure 7 As shown, a first coupling layer 1062 is formed on the first antiferromagnetic layer 1061 .

[0090] When the semiconductor structure is working, the first coupling layer 1062 magnetically couples the first antiferromagnetic layer 1061 with the subsequently formed second antiferromagnetic layer, which is beneficial to improving the perpendicular anisotropy of the fixed magnetic layer and can better fix the electron spin direction of the subsequently formed pinned layer.

[0091] Specifically, the material of the first coupling layer 1062 includes non-tantalum metal. The material of the first coupling layer 1062 includes non-tantalum metal, which means that the first coupling layer 1062 does not contain Ta elements, thereby reducing the probability of atoms in the first coupling layer 1062 diffusing into the tunneling barrier layer formed later. In the subsequent annealing process, the material of the tunneling barrier layer is more likely to be transformed into an amorphous state. In this embodiment, the first coupling layer 1062 includes ruthenium (Ru). In other embodiments, the first coupling layer may also include other suitable materials, such as Ti, Cu, or Ag.

[0092] In this embodiment, a physical vapor deposition process is used to form the first coupling layer 1062. In other embodiments, a chemical vapor deposition process or an atomic layer deposition process may also be used to form the first coupling layer.

[0093] like Figure 8 As shown, a second antiferromagnetic layer 1063 is formed on the first coupling layer 1062 .

[0094] The second antiferromagnetic layer 1063 is magnetically coupled with the first antiferromagnetic layer 1061, which is beneficial to increase the perpendicular anisotropy of the fixed magnetic layer 106 and the subsequently formed magnetic free layer, so that the subsequently formed magnetic tunnel junction stack structure has a larger magnetoresistance ratio.

[0095] Specifically, the second antiferromagnetic layer 1063 includes a stacked structure consisting of alternately deposited Co layers and Pt layers. The more Co layers and Pt layers there are in the second antiferromagnetic layer 1063, the stronger the perpendicular anisotropy of the second antiferromagnetic layer 1063.

[0096] In this embodiment, a physical vapor deposition process is used to form the second antiferromagnetic layer 1063. In other embodiments, a chemical vapor deposition process or an atomic layer deposition process may also be used to form the second antiferromagnetic layer.

[0097] like Fig. 9 As shown, a second coupling layer 1064 is formed on the second antiferromagnetic layer 1063 .

[0098] When the semiconductor structure is working, the second coupling layer 1064 can antiferromagnetically couple the first antiferromagnetic layer 1061 and the second antiferromagnetic layer 1062 with the subsequently formed pinned layer, and a closed magnetic field line is formed between the first antiferromagnetic layer 1061, the second antiferromagnetic layer 1062 and the pinned layer. The closed magnetic field line can prevent the leakage of magnetic field lines from affecting the magnetization direction of the subsequently formed magnetic tunnel junction unit.

[0099] Specifically, the material of the second coupling layer 1064 includes non-tantalum metal. The fact that the material of the second coupling layer 1064 includes non-tantalum metal means that the second coupling layer 1064 does not contain Ta elements, thereby reducing the probability of atoms in the first coupling layer 1062 diffusing into the tunneling barrier layer formed subsequently. In the subsequent annealing process, the material of the tunneling barrier layer is more likely to be transformed into an amorphous state. In this embodiment, the second coupling layer 1064 includes ruthenium (Ru). In other embodiments, the second coupling layer may also include other suitable materials, such as Ti, Cu, or Ag.

[0100] In this embodiment, a physical vapor deposition process is used to form the second coupling layer 1064. In other embodiments, a chemical vapor deposition process or an atomic layer deposition process may also be used to form the second coupling layer.

[0101] like Fig.10 As shown, a pinned layer 1065 is formed on the second coupling layer 1064 .

[0102] The pinned layer 1065 has a relatively strong coercive force and is not easily affected by the direction of the induced magnetic field generated when a current flows through the bit line or the word line to change the magnetization direction.

[0103] The pinned layer 1065 includes a material containing Fe. Specifically, the material of the pinned layer 1065 includes one or more of FeCoB, CoFeTa, NiFe and FePt. In this embodiment, the material of the pinned layer 1065 includes FeCoB.

[0104] In this embodiment, the pinned layer 1065 is formed by a physical vapor deposition process. In other embodiments, the pinned layer may be formed by a chemical vapor deposition process or an atomic layer deposition process.

[0105] like Fig.11 The step of forming the magnetic tunnel junction stacked structure further includes: forming a tunnel barrier layer 108 on the fixed magnetic layer 106 .

[0106] The tunneling barrier layer 108 is used to electrically isolate the fixed magnetic layer 106 from a subsequently formed magnetic free layer while allowing electrons to tunnel through the tunneling barrier layer 108 under appropriate conditions.

[0107] Specifically, the material of the tunnel barrier layer 108 includes MgO, AlO, AlN or AlON. In this embodiment, the material of the tunnel barrier layer 108 includes MgO.

[0108] In this embodiment, the tunneling barrier layer 108 is formed by electron beam evaporation (EBE). In other embodiments, the tunneling barrier layer 108 may be formed by atomic layer deposition, chemical vapor deposition or physical vapor deposition.

[0109] like Fig.12 As shown, the step of forming the magnetic tunnel junction stacked structure further includes: forming a magnetic free layer 109 on the tunnel barrier layer 108 .

[0110] The magnetic free layer 109, the tunnel barrier layer 108 and the fixed magnetic layer 106 constitute a magnetic tunnel junction stack structure, which is prepared for the subsequent formation of a magnetic tunnel junction unit. It should be noted that the magnetic resistance of the magnetic tunnel junction stack structure is relatively large, and the magnetic resistance of the magnetic tunnel junction unit formed subsequently is relatively large.

[0111] The magnetic free layer 109 has a free magnetic orientation. When the magnetic tunnel junction unit is working, the spin transfer torque (STT) effect is usually used to change or switch the magnetic polarity of the magnetic free layer 109 to be parallel or opposite to the magnetization direction of the fixed magnetic layer 106, so that the magnetic tunnel junction unit can be in a low resistance state or a high resistance state.

[0112] In this embodiment, the material of the magnetic free layer 109 includes FeCo, CoNi, CoFeB, FeB, FePt, FePd, and an alloy of Fe, Co, and Ni.

[0113] In this embodiment, the magnetic free layer 109 is formed by a physical vapor deposition process. In other embodiments, the magnetic free layer can also be formed by a chemical vapor deposition process or an atomic layer deposition process.

[0114] refer to Fig.13 The method for forming the semiconductor structure further includes: after forming the magnetic tunnel junction stacked structure, annealing the magnetic tunnel junction stacked structure. Fig.13 , is an electron microscope image of the surface of the alloy seed layer 105 after the magnetic tunnel junction stack structure is annealed. The roughness of the surface of the alloy seed layer 105 is very small, and it is difficult to observe the grains with larger lattice size after annealing through the electron microscope image.

[0115] The annealing treatment can transform the MgO in the tunnel barrier layer 108 from a polycrystalline state to a single crystalline state, thereby increasing the magnetoresistance ratio of the magnetic tunnel junction stack structure and making the tunnel magnetoresistance (TMR) effect stronger; and the annealing treatment can magnetize the magnetic particles in the fixed magnetic layer 106 and the magnetic free layer 109, thereby making the spin directions of the magnetic particles in the fixed magnetic layer 106 and the magnetic free layer 109 orderly, and also making the tunnel magnetoresistance (TMR) effect of the subsequently formed magnetic tunnel junction unit stronger.

[0116] After the annealing treatment, a non-magnetic insulating layer and a cap layer are formed on the magnetic tunnel junction stack structure. Before the non-magnetic insulating layer and the cap layer are formed, the magnetic tunnel junction stack structure is annealed so that the ions in the non-magnetic insulating layer and the cap layer are not easily diffused into the tunnel barrier layer 108, which is beneficial to improving the magnetoresistance ratio of the magnetic tunnel junction stack structure.

[0117] It should be noted that during the annealing process, the grains of Ta atoms and Mo atoms in the alloy seed layer 105 do not increase significantly, and the roughness of the top surface of the alloy seed layer 105 does not increase significantly, so that the magnetic tunnel junction stacked structure is less affected by the roughness of the top surface of the alloy seed layer 105, and the surface roughness of the interface between the various film layers of the magnetic tunnel junction stacked structure is not easy to increase. Therefore, the various film layers of the magnetic tunnel junction stacked structure still have a large perpendicular anisotropy, which is beneficial for the magnetic tunnel junction stacked structure to have a larger magnetoresistance ratio.

[0118] In this embodiment, annealing is performed by means of strong magnetic field annealing.

[0119] refer to Fig.14 , a non-magnetic insulating layer 110 is formed on the magnetic free layer 109 .

[0120] The non-magnetic insulating layer 110 allows the magnetic field and the electric field to be contained between the magnetic free layer 109 and the fixed magnetic layer 106. When the semiconductor structure is in operation, the non-magnetic insulating layer 110 helps to reduce the switching current density of the magnetic tunnel junction unit switching from one orientation (e.g., parallel orientation) to another orientation (e.g., anti-parallel orientation).

[0121] Specifically, the material of the non-magnetic insulating layer 110 includes MgO, AlO, AlN or AlON. In this embodiment, the material of the non-magnetic insulating layer 110 includes MgO.

[0122] In this embodiment, the non-magnetic insulating layer 110 is formed by a physical vapor deposition process. In other embodiments, the non-magnetic insulating layer can also be formed by a chemical vapor deposition process or an atomic layer deposition process.

[0123] Continue to refer Fig.14 , a capping layer 111 is formed on the non-magnetic insulating layer 110 .

[0124] In the subsequent process, the magnetic tunnel junction stack structure is patterned to form a magnetic tunnel junction unit. During the etching process, the cap layer 111 can protect the top of the magnetic tunnel junction stack structure, so that the top of the formed magnetic tunnel junction unit is not easily damaged.

[0125] In this embodiment, the cap layer 111 is a laminated structure. The cap layer 111 is a laminated structure that can better protect the magnetic tunnel junction laminated structure. Specifically, the material of the cap layer 111 includes a laminated structure consisting of a Ru layer and a Ta layer. In other embodiments, the cap layer 111 can also be a single-layer structure, including only a Ta layer or only a Ru layer.

[0126] refer to Fig.15The method for forming the semiconductor structure further includes: after forming the cap layer 111 , patterning the magnetic tunnel junction stacked structure to form a plurality of magnetic tunnel junction units 200 .

[0127] Specifically, during the process of forming the magnetic tunnel junction unit 200 , the electrode layer 104 , the alloy seed layer 105 , the non-magnetic insulating layer 110 and the cap layer 111 are also patterned.

[0128] In this embodiment, dry etching is used for patterning. The dry etching process has anisotropic etching characteristics and good etching profile control, which is conducive to making the morphology of the magnetic tunnel junction unit 200 meet the process requirements, and in the process of dry etching, the dielectric layer 102 can be used as the etching stop position, and it is not easy to cause damage to the conductive plug 103 in the dielectric layer 102; in addition, by changing the etching gas, the magnetic tunnel junction stacked structure, the electrode layer 104, the alloy seed layer 105, the non-magnetic insulating layer 110 and the cap layer 111 can be etched in the same etching equipment, which simplifies the process steps.

[0129] Accordingly, an embodiment of the present invention further provides a semiconductor structure. Fig.15 , showing a schematic structural diagram of an embodiment of a semiconductor structure of the present invention.

[0130] The semiconductor structure includes: a substrate; an electrode layer 104 located on the substrate; an alloy seed layer 105 located on the electrode layer 104 ; and a magnetic tunnel junction unit 200 located on the alloy seed layer 105 .

[0131] In the semiconductor structure provided by the embodiment of the present invention, the magnetic tunnel junction unit 200 is formed by patterning the magnetic tunnel junction stack structure. Before the patterning, the magnetic tunnel junction stack structure is usually annealed. During the annealing process, the atoms in the alloy seed layer 105 are not easy to diffuse into the tunnel barrier layer of the magnetic tunnel junction stack structure, and the material of the tunnel barrier layer is more likely to be transformed into a single crystal state, so that the magnetic tunnel junction stack structure has a larger magnetoresistance ratio, and the corresponding magnetic tunnel junction unit 200 has a larger magnetoresistance ratio; in addition, by controlling the alloy The ratio between the atoms in the gold seed layer 105 can make the surface roughness of the top surface of the alloy seed layer 105 not easy to increase after the alloy seed layer 105 is annealed, so that the magnetic tunnel junction stacking structure is less affected by the surface roughness of the top surface of the alloy seed layer 105, and the surface roughness of the interface between the film layers of the magnetic tunnel junction stacking structure is not easy to increase. Therefore, the film layers of the magnetic tunnel junction stacking structure still have a large perpendicular anisotropy, which is conducive to making the magnetic tunnel junction stacking structure have a large magnetoresistance ratio, and the corresponding magnetic tunnel junction unit 200 has a large magnetoresistance ratio. In summary, the alloy seed layer 105 can improve the tunneling magnetoresistance ratio of the magnetic tunnel junction unit 200, so that the semiconductor structure has excellent electrical properties.

[0132] The substrate includes: a first intermetallic dielectric layer 100 and an interconnection line 101 located in the first intermetallic dielectric layer 100 .

[0133] The first intermetallic dielectric layer 100 is used to electrically isolate the interconnection lines 101 .

[0134] In this embodiment, the material of the first metal interlayer dielectric layer 100 is a low-k dielectric material, which is beneficial to reducing the parasitic capacitance between the interconnection lines 101 and reducing the subsequent RC delay.

[0135] It should be noted that the substrate also includes a transistor, the first metal interlayer dielectric layer 100 is usually formed on the transistor, the transistor includes a gate structure, and source and drain doped regions located on both sides of the gate structure, and the substrate also has contact hole plugs (not shown in the figure) in contact with the source and drain doped regions.

[0136] The interconnection line 101 is used to connect with the contact hole plug.

[0137] In this embodiment, the interconnection line 101 is a first metal layer (M1), and the first metal layer refers to a metal layer closest to the contact hole plug.

[0138] In this embodiment, the material of the interconnection line 101 is copper. In other embodiments, according to the actual process, the material of the interconnection line can also be a conductive material such as tungsten, aluminum, cobalt, etc.

[0139] The substrate further includes a dielectric layer 102 located on the first intermetallic dielectric layer 100 .

[0140] The dielectric layer 102 is formed on the first intermetallic dielectric layer 100 and covers the interconnection line 101 ; the conductive plug 103 penetrates the dielectric layer 102 , and the conductive plug 103 is connected to the interconnection line 101 .

[0141] The dielectric layer 102 is used to electrically isolate the conductive plug 103 .

[0142] In this embodiment, the material of the dielectric layer 102 is a dielectric material such as a low-k dielectric material, an ultra-low-k dielectric material, silicon oxide, silicon nitride, silicon oxynitride, or silicon oxycarbide.

[0143] Specifically, the material of the dielectric layer 102 is a low-k dielectric material, which is beneficial to reducing the parasitic capacitance between the conductive plugs 103, thereby reducing the RC delay of the back end. Specifically, the material of the dielectric layer 102 is SiCOH.

[0144] The conductive plug 103 is used to realize electrical connection between the contact hole plug in the substrate and the electrode layer 104 .

[0145] The material of the conductive plug 103 can be one or more of Cu, W, Al, TiN, TaN, and Ti. In this embodiment, the material of the conductive plug 103 is Cu.

[0146] The electrode layer 104 is a bottom electrode (BE), and the electrode layer 104 is used to electrically connect the magnetic tunnel junction unit 200 with the conductive plug 103 .

[0147] Specifically, the material of the electrode layer 104 includes one or more of tantalum nitride (TaN), tantalum (Ta), titanium (TiN) and titanium nitride (TiN). In this embodiment, the electrode layer 104 is a single-layer structure, and the material of the electrode layer 104 includes tantalum nitride.

[0148] After annealing, the top surface of the alloy seed layer 105 still has a high degree of flatness and smoothness, so that the surface roughness of the interface between the film layers in the magnetic tunnel junction unit 200 is relatively small. Therefore, the film layers of the magnetic tunnel junction unit 200 still have a large perpendicular anisotropy, which is conducive to the magnetic tunnel junction unit 200 having a larger magnetoresistance ratio.

[0149] In this embodiment, the material of the alloy seed layer 105 includes MoTa alloy. MoTa alloy is a continuous disordered solid solution. MoTa alloy has stable performance and low thermal conductivity. Mo and Ta atoms in MoTa alloy are not easy to diffuse into the tunneling barrier layer 108, and the content of single crystal metal oxide in the tunneling barrier layer 108 is relatively high, so that the magnetic tunnel junction unit 200 has a large tunneling magnetoresistance ratio. In addition, Mo has a relatively small resistance. Compared with the seed layer of Ta, in this embodiment, the resistance of the alloy seed layer 105 is relatively small, which is conducive to reducing the power consumption of the semiconductor structure.

[0150] It should be noted that the atomic number ratio of Mo and Ta in the alloy seed layer 105 should not be too large or too small. If the atomic number of Mo and Ta is too small, that is, the proportion of Ta atoms in the alloy seed layer 105 is too high, after annealing, the lattice of Ta atoms becomes larger, which will cause the surface roughness of the top surface of the alloy seed layer 105 to be too large. The roughness change of the alloy seed layer 105 will be transmitted to the magnetic tunnel junction unit 200, so that the roughness of the interface between each film layer in the magnetic tunnel junction unit 200 becomes larger, resulting in the vertical anisotropy between each film layer of the magnetic tunnel junction unit 200 becoming smaller, and then causing the magnetic tunnel junction unit 200 to have a smaller magnetoresistance ratio. If the atomic number of Mo and Ta is too large, the adhesion of the alloy seed layer 105 is poor, and the magnetic tunnel junction unit 200 is located on the alloy seed layer 105, resulting in poor formation quality of the magnetic tunnel junction stacked structure. In this embodiment, the atomic number ratio of Mo and Ta in the alloy seed layer 105 is 1 to 5.

[0151] It should be noted that the alloy seed layer 105 should not be too thick or too thin. If the alloy seed layer 105 is too thick, the process time for forming the alloy seed layer 105 will be too long, and it will also cause the electrical properties of the magnetic tunnel junction unit 200 to shift, which is not conducive to improving the magnetoresistance ratio of the magnetic tunnel junction stack structure. The material of the electrode layer 104 includes tantalum nitride. If the alloy seed layer 105 is too thin, Ta will easily pass through the alloy seed layer 105 and diffuse into the tunnel barrier layer 108, resulting in a relatively small magnetoresistance of the magnetic tunnel junction unit 200. In this embodiment, the thickness of the alloy seed layer 105 is to

[0152] The magnetic tunnel junction unit 200 is used as a basic memory unit.

[0153] The magnetic tunnel junction unit 200 includes a fixed magnetic layer 106 , a tunnel barrier layer 108 located on the fixed magnetic layer 106 , and a magnetic free layer 109 located on the tunnel barrier layer 108 .

[0154] The fixed magnetic layer 106 has a fixed magnetic direction.

[0155] The fixed magnetic layer 106 includes a first antiferromagnetic layer 1061, a first coupling layer 1062 located on the first antiferromagnetic layer 1061, a second antiferromagnetic layer 1063 located on the first coupling layer 1062, a second coupling layer 1064 located on the second antiferromagnetic layer 1063, and a pinned layer 1065 located on the second coupling layer 1064.

[0156] When the semiconductor structure is working, the first antiferromagnetic layer 1061 is used to fix the magnetization direction of the pinned layer 1065 to prevent the magnetization direction from changing due to the direction of the induced magnetic field generated when the current in the bit line or word line flows due to the insufficient coercive force of the pinned layer 1065.

[0157] Specifically, the first antiferromagnetic layer 1061 includes a stacked structure consisting of alternately deposited Co layers and Pt layers. The more Co layers and Pt layers there are in the first antiferromagnetic layer 1061, the stronger the perpendicular anisotropy of the corresponding first antiferromagnetic layer 1061.

[0158] When the semiconductor structure is working, the first coupling layer 1062 magnetically couples the first antiferromagnetic layer 1061 and the second antiferromagnetic layer 1063 together, which is beneficial to improving the perpendicular anisotropy of the fixed magnetic layer 106 and can better fix the electron spin direction of the pinned layer 1065 .

[0159] Specifically, the material of the first coupling layer 1062 includes non-tantalum metal. The material of the first coupling layer 1062 includes non-tantalum metal, which means that the first coupling layer 1062 does not contain Ta elements, thereby reducing the probability of atoms in the first coupling layer 1062 diffusing into the tunneling barrier layer 108, and the content of amorphous metal oxide in the tunneling barrier layer 108 is relatively high. In this embodiment, the first coupling layer 1062 includes ruthenium (Ru). In other embodiments, the first coupling layer may also include other suitable materials, such as Ti, Cu, or Ag.

[0160] The second antiferromagnetic layer 1063 is magnetically coupled with the first antiferromagnetic layer 1061 , which is beneficial to increase the perpendicular anisotropy of the fixed magnetic layer 106 and the magnetic free layer 109 , so that the magnetic tunnel junction unit 200 has a larger magnetoresistance ratio.

[0161] Specifically, the second antiferromagnetic layer 1063 includes a stacked structure consisting of alternately deposited Co layers and Pt layers. The more Co layers and Pt layers there are in the second antiferromagnetic layer 1063, the stronger the perpendicular anisotropy of the corresponding second antiferromagnetic layer 1063.

[0162] When the semiconductor structure is working, the second coupling layer 1064 can antiferromagnetically couple the first antiferromagnetic layer 1061 and the second antiferromagnetic layer 1062 with the pinned layer 1065, and form a closed magnetic field line between the first antiferromagnetic layer 1061 and the second antiferromagnetic layer 1062 and the pinned layer 1065. The closed magnetic field line can prevent the magnetization direction of the magnetic tunnel junction unit 200 from being affected by the leaked magnetic field lines.

[0163] Specifically, the material of the second coupling layer 1064 includes non-tantalum metal. The material of the second coupling layer 1064 includes non-tantalum metal, which means that the second coupling layer 1064 does not contain Ta elements, thereby reducing the probability of atoms in the first coupling layer 1062 diffusing into the tunneling barrier layer 108, and the content of amorphous metal oxide in the tunneling barrier layer 108 is relatively high. In this embodiment, the second coupling layer 1064 includes ruthenium (Ru). In other embodiments, the second coupling layer may also include other suitable materials, such as Ti, Cu, or Ag.

[0164] The pinned layer 1065 has a relatively strong coercive force and is not easily affected by the direction of the induced magnetic field generated when a current flows through the bit line or the word line to change the magnetization direction.

[0165] The pinned layer 1065 includes a material containing Fe. Specifically, the material of the pinned layer 1065 includes one or more of FeCoB, CoFeTa, NiFe and FePt. In this embodiment, the material of the pinned layer 1065 includes FeCoB.

[0166] The semiconductor structure further includes a buffer layer 107 located between the alloy seed layer 105 and the fixed magnetic layer 106 .

[0167] The buffer layer 107 is used to improve the surface roughness and interface defects of the alloy seed layer 105 , so that the formation quality of the magnetic tunnel junction unit 200 is better and the magnetic tunnel junction unit 200 has a larger magnetoresistance ratio.

[0168] Specifically, the material of the buffer layer 107 includes one or more of Ru, Pt and Hf. In this embodiment, the material of the buffer layer 107 includes Pt.

[0169] The tunneling barrier layer 108 is used to electrically isolate the fixed magnetic layer 106 and the magnetic free layer 109 while allowing electrons to tunnel through the tunneling barrier layer 108 under appropriate conditions.

[0170] Specifically, the material of the tunnel barrier layer 108 includes MgO, AlO, AlN or AlON. In this embodiment, the material of the tunnel barrier layer 108 includes MgO.

[0171] The magnetic free layer 109 has a free magnetic orientation. When the magnetic tunnel junction unit 200 is working, the spin transfer torque (STT) effect is usually used to change or switch the magnetic polarity of the magnetic free layer 109, which is parallel or opposite to the magnetization direction of the fixed magnetic layer 106, so that the magnetic tunnel junction unit 200 can be in a low resistance state or a high resistance state.

[0172] In this embodiment, the material of the magnetic free layer 109 includes FeCo, CoNi, CoFeB, FeB, FePt, FePd, and an alloy of Fe, Co, and Ni.

[0173] The non-magnetic insulating layer 110 allows the magnetic field and the electric field to be contained between the magnetic free layer 109 and the fixed magnetic layer 106. When the semiconductor structure is operating, the non-magnetic insulating layer 110 helps to reduce the switching current density of the magnetic tunnel junction unit 200 when switching from one orientation (e.g., parallel orientation) to another orientation (e.g., anti-parallel orientation).

[0174] Specifically, the material of the non-magnetic insulating layer 110 includes MgO, AlO, AlN or AlON. In this embodiment, the material of the non-magnetic insulating layer 110 includes MgO.

[0175] The semiconductor structure further includes: the cap layer 111 located on the non-magnetic insulation layer 110 .

[0176] The cap layer 111 can protect the top of the magnetic tunnel junction unit 200 from being damaged.

[0177] In this embodiment, the cap layer 111 is a laminated structure. The cap layer 111 is a laminated structure that can better protect the magnetic tunnel junction laminated structure. Specifically, the material of the cap layer 111 includes a laminated structure composed of a Ru layer and a Ta layer. In other embodiments, the cap layer 111 can also be a single-layer structure, including only a Ta layer or only a Ru layer.

[0178] The semiconductor structure described in this embodiment can be formed by the formation method described in the above embodiment, or by other formation methods. For the specific description of the semiconductor structure described in this embodiment, reference can be made to the corresponding description in the above embodiment, and this embodiment will not be repeated here.

[0179] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: providing a substrate; forming an electrode layer on the substrate; forming an alloy seed layer on the electrode layer; A magnetic tunnel junction stacked structure is formed on the alloy seed layer, and the steps of forming the magnetic tunnel junction stacked structure include: forming a fixed magnetic layer, and the steps of forming the fixed magnetic layer include: forming a first antiferromagnetic layer on the alloy seed layer; forming a first coupling layer on the first antiferromagnetic layer; forming a second antiferromagnetic layer on the first coupling layer; forming a second coupling layer on the second antiferromagnetic layer; forming a pinned layer on the second coupling layer, and the material of the pinned layer includes FeCoB; forming a tunneling barrier layer on the fixed magnetic layer, and the material of the tunneling barrier layer includes MgO; forming a magnetic free layer on the tunneling barrier layer, and the magnetic free layer includes CoFeB; the first antiferromagnetic layer includes a stacked structure composed of staggered deposited Co layers and Pt layers, and the material of the first coupling layer includes non-tantalum metal, and the second antiferromagnetic layer includes a stacked structure composed of staggered deposited Co layers and Pt layers, and the material of the second coupling layer includes non-tantalum metal; The method for forming the semiconductor structure further includes: forming a buffer layer on the alloy seed layer after forming the alloy seed layer and before forming the fixed magnetic layer.

2. The method for forming a semiconductor structure according to claim 1, wherein: The material of the alloy seed layer includes MoTa alloy.

3. The method for forming a semiconductor structure according to claim 2, wherein: In the step of forming the alloy seed layer, the atomic number ratio of Mo to Ta in the alloy seed layer is 1 to 5.

4. The method for forming a semiconductor structure according to claim 1, wherein: In the step of forming the alloy seed layer, the thickness of the alloy seed layer is to 5. The method for forming a semiconductor structure according to claim 1, wherein: The alloy seed layer is formed by a plasma enhanced atomic layer deposition process, a chemical vapor deposition process or a physical vapor deposition process.

6. The method for forming a semiconductor structure according to claim 1, wherein: The alloy seed layer is formed by adopting a radio frequency magnetron sputtering process or a direct current magnetron sputtering process.

7. The method for forming a semiconductor structure according to claim 1, wherein: The process parameters for forming the alloy seed layer by using the RF magnetron sputtering process or the DC magnetron sputtering process include: the sputtering ions include Ar, the target material includes Mo target material and Ta target material, or MoTa alloy target material, the process temperature is 20°C to 350°C, and the chamber pressure is 100mTorr to 500mTorr.

8. The method for forming a semiconductor structure according to claim 1, wherein: The method for forming the semiconductor structure further includes: after forming the magnetic tunnel junction stacked structure, performing an annealing process on the magnetic tunnel junction stacked structure.

9. A semiconductor structure, characterized in that: include: substrate; an electrode layer, located on the substrate; an alloy seed layer, located on the electrode layer; A magnetic tunnel junction unit is located on the alloy seed layer, the magnetic tunnel junction unit comprises: a fixed magnetic layer, a tunnel barrier layer located on the fixed magnetic layer, and a magnetic free layer located on the tunnel barrier layer, the magnetic free layer comprises CoFeB, the fixed magnetic layer comprises a first antiferromagnetic layer, a first coupling layer located on the first antiferromagnetic layer, a second antiferromagnetic layer located on the first coupling layer, a second coupling layer located on the second antiferromagnetic layer, and a pinned layer located on the second coupling layer, the material of the pinned layer comprises FeCoB, and the material of the tunnel barrier layer comprises MgO; The first antiferromagnetic layer comprises a stacked structure consisting of an alternately deposited Co layer and a Pt layer, the material of the first coupling layer comprises a non-tantalum metal, the second antiferromagnetic layer comprises a stacked structure consisting of an alternately deposited Co layer and a Pt layer, and the material of the second coupling layer comprises a non-tantalum metal; The semiconductor structure further includes a buffer layer located between the alloy seed layer and the fixed magnetic layer.

10. The semiconductor structure according to claim 9, wherein: The material of the alloy seed layer includes MoTa alloy.

11. The semiconductor structure according to claim 10, characterized in that The alloy seed layer contains Mo The atomic number ratio of Ta is 1 to 5.

12. The semiconductor structure according to claim 9, wherein: The thickness of the alloy seed layer is to 13. The semiconductor structure according to claim 9, wherein: The roughness of the alloy seed layer is less than

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