Low power supply detection circuit

Abstract

The present invention discloses a low-power power supply detection circuit, which includes a current source, a voltage divider switch activation circuit, a voltage divider circuit, and an ADC sampling equivalent circuit. External control signals are input into the voltage divider switch activation circuit and the voltage divider circuit respectively; a power supply voltage is input into the current source, and the current source provides a bias current for the entire circuit; the voltage divider switch activation circuit is respectively connected to the power supply voltage, the detection voltage, the voltage divider circuit, and the current source, and the voltage divider switch activation circuit provides a startup voltage for the voltage divider circuit; the voltage divider circuit is also connected to the detection voltage to provide a voltage divider voltage for the ADC sampling equivalent circuit, and the ADC sampling equivalent circuit outputs a sampled voltage value. The low-power power supply detection circuit of the present invention uses few components, has a simple circuit structure, has very low power consumption, and overcomes the problem of poor voltage resistance.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and more particularly to a low-power consumption power supply detection circuit. Background Art

[0002] Power supply detection circuits are essential components of modern electronic products, and their low-power, low-cost design is increasingly important. Low-cost integrated circuit designs often utilize conventional components, such as 3.3V IO devices, while the detection voltage VBAT supply range is often 5V or higher. Power supply voltages above 3.3V require a voltage-withstand design. This ensures that the gate-source voltage |VGS|, gate-drain voltage |VGD|, and source-drain voltage |VSD| of all CMOS devices in the circuit remain within the voltage ranges required by the process during operation and circuit shutdown. For example, for 3.3V IO devices, the general process requires these voltages to be within 3.3V ±10%. Failure to do so can result in reduced lifespan, leakage, or malfunction.

[0003] Specific as Figure 1 As shown, in Figure 1 In the figure, VBAT is the high voltage to be detected (the power supply voltage is greater than 5V), R1 and R2 are two voltage-dividing resistors, OPA is an operational amplifier, the power supply voltage AVD is 3.3V, OPA is the connection mode of the buffer, and its output is connected to the ADC circuit.

[0004] Here's how it works:

[0005] Resistors R1 and R2 divide the voltage to obtain a divided voltage, VDIV = VBAT × R2 / (R1 + R2). To avoid voltage withstand issues, the divided voltage VDIV must be less than 3.3V and meet the input voltage range of the OPA. The divided voltage is connected to the OPA via a buffer connection to obtain the output voltage VDIVO: VDIVO = VDIV + VOS, where VOS is the offset voltage of the OPA. The output voltage VDIVO is decoded by the ADC to obtain the decoded digital data VDATA, which is used to calculate the voltage value of the voltage to be measured, VBAT.

[0006] However, the above power detection circuit has the following problems:

[0007] 1. The design is relatively complex, including the design of a relatively complex operational amplifier circuit OPA, and there are relatively strict requirements on the input voltage range, noise, offset, etc. of the operational amplifier OPA;

[0008] 2. In order to prevent the occurrence of voltage resistance, the resistor voltage divider branch cannot be designed with a switch circuit using a conventional 3.3V CMOS device. Otherwise, when it is turned off, the switch tube voltage resistance problem will occur, so the current in the voltage divider branch will always exist, and low power consumption processing cannot be achieved;

[0009] 3. In order to reduce power consumption during use, the operational amplifier OPA is often switched on and off intermittently. The operational amplifier OPA requires a certain startup time. Before the ADC samples, it is necessary to ensure that it starts normally and stabilizes before sampling. The operational amplifier startup time further increases the power consumption of the circuit.

[0010] Therefore, it is necessary to provide a low-power power detection circuit with higher detection accuracy and lower power consumption to overcome the above-mentioned defects. Summary of the Invention

[0011] The purpose of the present invention is to provide a low-power power detection circuit. The low-power detection circuit of the present invention uses fewer components, has a simple circuit structure, has very low power consumption and overcomes the problem of poor withstand voltage.

[0012] The low-power power supply detection circuit of the present invention includes a current source, a voltage divider switch start-up circuit, a voltage divider circuit and an ADC sampling equivalent circuit, wherein an external control signal is respectively input into the voltage divider switch start-up circuit and the voltage divider circuit; a power supply voltage is input into the current source, and the current source provides a bias current for the entire circuit; the voltage divider switch start-up circuit is respectively connected to the power supply voltage, the detection voltage, the voltage divider circuit and the current source, and the voltage divider switch start-up circuit provides a starting voltage for the voltage divider circuit; the voltage divider circuit is also connected to the detection voltage to provide a voltage divider voltage for the ADC sampling equivalent circuit, and the ADC sampling equivalent circuit outputs a voltage value obtained by sampling.

[0013] Preferably, the voltage divider switch start-up circuit includes a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor and a first resistor; the first field effect transistor and the second field effect transistor form a mirror current mirror circuit, and the drain of the first field effect transistor is connected to the current source, and the drain of the second field effect transistor is connected to the source of the third field effect transistor; the external control signal is input into the gate of the third field effect transistor, and the drain of the third field effect transistor is connected to the source of the fourth field effect transistor; the power supply voltage is input into the gate of the fourth field effect transistor, the drain of the fourth field effect transistor is connected to one end of the first resistor, and the other end of the first resistor is connected to the detection voltage.

[0014] Preferably, the first field effect transistor and the second field effect transistor form a mirror current circuit, specifically: the drain and gate of the first field effect transistor are connected to the gate of the second field effect transistor, and the sources of the first field effect transistor and the second field effect transistor are both grounded.

[0015] Preferably, the voltage divider circuit includes a fifth field-effect transistor, a sixth field-effect transistor, a second resistor and a third resistor; an external control signal is input into the gate of the fifth field-effect transistor, the source of the fifth field-effect transistor is grounded, and the drain thereof is connected to one end of the second resistor; the other end of the second resistor is respectively connected to the ADC sampling equivalent circuit and one end of the third resistor; the other end of the third resistor is connected to the drain of the sixth field-effect transistor, the gate of the sixth field-effect transistor is connected to one end of the first resistor, and the detection voltage is input into the source of the sixth field-effect transistor.

[0016] Preferably, the third field effect transistor and the fifth field effect transistor are both switch transistors, and the fourth field effect transistor is a voltage-resistant transistor.

[0017] Preferably, the voltage value VP at one end of the first resistor satisfies the following relationship:

[0018] VBAT-3.3V≤Vp≤3.3V;

[0019] Wherein, VBAT is the voltage value of the detection voltage, and 3.3V is the withstand voltage value of each field effect tube.

[0020] Preferably, the first field effect transistor, the second field effect transistor, the third field effect transistor, the fourth field effect transistor and the fifth field effect transistor are all N-type field effect transistors, and the sixth field effect transistor is a P-type field effect transistor.

[0021] Compared with the prior art, the low-power power supply detection circuit of the present invention does not use an operational amplifier in the entire circuit, so that the entire circuit can be implemented using fewer devices, the circuit structure is simple, and the corresponding power consumption is also reduced; in addition, the voltage divider circuit is also connected to the detection voltage, so that the higher detection voltage is divided, and thus will not cause poor voltage resistance to various components in the circuit, thereby overcoming the problem of poor voltage resistance in the circuit.

[0022] The present invention will become more apparent from the following description taken in conjunction with the accompanying drawings, which are used to illustrate embodiments of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a circuit structure diagram of a power detection circuit in the prior art.

[0024] Figure 2 This is a circuit structure diagram of the low-power power supply detection circuit of the present invention. DETAILED DESCRIPTION

[0025] Embodiments of the present invention will now be described with reference to the accompanying drawings, in which like reference numerals represent like elements. As described above, the present invention provides a low-power power detection circuit. The low-power detection circuit of the present invention utilizes a small number of components, has a simple circuit structure, consumes very little power, and overcomes the problem of poor withstand voltage.

[0026] Please refer to Figure 2 , Figure 2 This is a circuit diagram of the low-power power detection circuit of the present invention. As shown in the figure, the low-power power detection circuit of the present invention includes a current source IS, a voltage divider switch activation circuit, a voltage divider circuit, and an ADC sampling equivalent circuit; an external control signal EN is input into the voltage divider switch activation circuit and the voltage divider circuit respectively; the power supply voltage AVD is input into the current source IS, and the current source IS provides a bias current for the entire circuit; the voltage divider switch activation circuit is connected to the power supply voltage AVD, the detection voltage VBAT, the voltage divider circuit, and the current source IS respectively, and the voltage divider switch activation circuit provides a startup voltage V for the voltage divider circuit. P The voltage divider circuit is also connected to the detection voltage VBAT to provide a voltage divider voltage V for the ADC sampling equivalent circuit. DIV , the ADC sampling equivalent circuit outputs the voltage value obtained by sampling (not shown). Among them, the bias current circuit is an essential circuit in the system design, which provides various bias currents for use by each module in the system branch, and in the low-power power supply detection circuit of the present invention, only one branch of the bias current circuit is used (that is, the branch where the current source IS is located), so no additional circuit is added. As mentioned above, in the present invention, since no operational amplifier is used in the entire circuit, the entire circuit can be implemented by using fewer devices, the circuit structure is simple, and the corresponding power consumption is also reduced; in addition, the voltage divider circuit is also connected to the detection voltage, so that the higher detection voltage is divided, and thus will not cause the impact of poor voltage resistance on the various devices in the circuit, thereby overcoming the problem of poor voltage resistance that may exist in the circuit.

[0027] Specifically, in the present invention, the voltage divider switch start-up circuit includes a first field effect transistor M1, a second field effect transistor M2, a third field effect transistor M3, a fourth field effect transistor M4 and a first resistor R1; the first field effect transistor M1 and the second field effect transistor M2 constitute a mirror current mirror circuit, specifically, the drain and gate of the first field effect transistor M1 are commonly connected to the gate of the second field effect transistor M2, and the sources of the first field effect transistor M1 and the second field effect transistor M2 are both grounded; and the drain of the first field effect transistor M1 is connected to the current source IS, and the drain of the second field effect transistor M2 is connected to the source of the third field effect transistor M3; the first field effect transistor M1 and the second field effect transistor M2 constitute a mirror current mirror circuit, specifically: the drain and gate of the first field effect transistor M1 are commonly connected to the gate of the second field effect transistor M2, and the sources of the first field effect transistor M1 and the second field effect transistor M2 are both grounded. An external control signal EN is input to the gate of the third field-effect transistor M3, and the drain of the third field-effect transistor M3 is connected to the source of the fourth field-effect transistor M4. A power supply voltage AVD is input to the gate of the fourth field-effect transistor M4, and the drain of the fourth field-effect transistor M4 is connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to the detection voltage VBAT. In this case, through the action of the current mirror circuit, assuming that the aspect ratio of the second field-effect transistor M2 to the first field-effect transistor M1 is K, the current I2 = K × I1. As a preferred embodiment of the present invention, the third field-effect transistor M3 and the fifth field-effect transistor M5 are switching transistors, and the fourth field-effect transistor M4 is a voltage-resistant transistor. When the control signal EN is at a high level AVD, each switching transistor is turned on. When the control signal EN is at a low level 0, each switching transistor is turned off. The power supply voltage AVD is directly input to the gate of the fourth field-effect transistor M4, so that the voltage drop across the first resistor R1 relative to the detection voltage VBAT is:

[0028] V DR1 =VBAT-Vp=I2×R1=K×I1×R1.

[0029] In the present invention, further, the voltage divider circuit includes a fifth field effect transistor M5, a sixth field effect transistor M6, a second resistor R2 and a third resistor R3; an external control signal EN is input to the gate of the fifth field effect transistor M5, the source of the fifth field effect transistor M5 is grounded, and its drain is connected to one end of the second resistor R2; the other end of the second resistor R2 is respectively connected to the ADC sampling equivalent circuit and one end of the third resistor R3; the other end of the third resistor R3 is connected to the drain of the sixth field effect transistor M6, the gate of the sixth field effect transistor M6 is connected to one end of the first resistor R1, and the detection voltage VBAT is input to the source of the sixth field effect transistor M6. As a preferred embodiment of the present invention, the third field effect transistor M3 and the fifth field effect transistor M5 are both switching transistors, and the fourth field effect transistor M4 is a voltage-proof tube. In the present invention, the current I2 generates a voltage drop after passing through the first resistor R1. This voltage drop is the turn-on voltage of the sixth field effect transistor M6. During the design, it is necessary to ensure that the gate-source voltage of the sixth field effect transistor M6 is |V SGM6 | Large enough to:

[0030] VBAT-3.3V≤Vp≤3.3V;

[0031] 3.3V is the withstand voltage of each field effect tube, which not only ensures the opening of the sixth field effect tube M6, but also prevents the field effect tubes from having poor withstand voltage problems, thereby ensuring the stable operation of the entire circuit.

[0032] In addition, to ensure the stability and accuracy of the low-power power detection circuit of the present invention, the first field-effect transistor M1, the second field-effect transistor M2, the third field-effect transistor M3, the fourth field-effect transistor M4 and the fifth field-effect transistor M5 are all N-type field-effect transistors, and the sixth field-effect transistor M6 is a P-type field-effect transistor.

[0033] In the ADC sampling equivalent circuit, Ron is the equivalent impedance when the sampling switch of the ADC sampling circuit is closed, and Cs is the equivalent capacitance when the ADC sampling circuit is sampling, which will not be described in detail here.

[0034] Please refer to the following Figure 2 , describing the working principle of the low-power power detection circuit of the present invention:

[0035] When the control signal EN is at a high level AVD, the third FET M3 and the fifth FET M5, which serve as switches, are turned on. The current I1 passes through the mirror circuit formed by the first FET M1 and the second FET M2 to generate the current I2. The current I2 generates a voltage drop after passing through the first resistor R1. This voltage drop is the turn-on voltage of the sixth FET M6. In the application process, the gate-source voltage of the sixth FET M6 must be guaranteed to be |V SGM6Big enough and satisfying

[0036] VBAT-3.3V≤Vp≤3.3V

[0037] Among them, 3.3V is the withstand voltage value of each field effect tube. Since Vp≤3.3V, Vp1 and Vp2 are less than 3.3V. Since M1 is powered by AVD, Vp3 is also less than 3.3V.

[0038] At this time, the sixth field effect transistor M6 can be equivalent to a switch transistor with very low impedance, and the gate-source voltage, drain-source voltage, and gate-drain voltage of M4, M3, and M2 are as follows:

[0039] |V GSM4 |=|AVD-Vp1|<3.3V

[0040] |V DSM4 |=|Vp-Vp1|<3.3V

[0041] |V GDM4 |=|Vp-AVD|<3.3V

[0042] |V GSM3 |=|AVD-Vp2|<3.3V(and EN high level is AVD)

[0043] |V DSM3 |=|Vp1-Vp2|<3.3V

[0044] |V GDM3 |=|Vp-AVD|<3.3V

[0045] |V GSM2 |=|Vp3|<3.3V

[0046] |V DSM4 |=|Vp2|<3.3V

[0047] |V GDM4 |=|Vp2-Vp3|<3.3V

[0048] As described above, the gate-source voltage, drain-source voltage, and gate-drain voltage of the fourth FET M4 , the third FET M3 , and the second FET M2 are all within 3.3V, thus avoiding the poor withstand voltage problem caused by the high voltage of the detection voltage VBAT.

[0049] The equivalent impedance of the sixth field effect tube M6 is R OM6 The resistance values ​​are as follows:

[0050]

[0051] Where kp is the process parameter of P-type MOS device, (W / L) M6 is the width-to-length ratio of the sixth field effect transistor M6, V THM6 is the threshold voltage of the sixth field effect transistor M6.

[0052] When the control signal EN is high (AVD), the fifth field effect transistor M5 also acts as a switch tube, and its equivalent impedance

[0053]

[0054] Where kn is the process parameter of N-type MOS device, (W / L) M5 is the width-to-length ratio of the fifth field effect transistor M5, V THM5 is the threshold voltage of the fifth field effect transistor M5.

[0055] Although the impedance of the sixth field effect transistor M6 and the fifth field effect transistor M5 as the switch tube is very small, and its value is much smaller than the second resistor R2 and the third resistor R3, in order to DIV Considering the accuracy, we can design

[0056]

[0057] So that the divided voltage V DIV More accurately, the divided voltage

[0058]

[0059] At this time, the divided voltage can be easily guaranteed by designing the second resistor R2 and the third resistor R3 to have the output voltage V of the voltage divider circuit. DIV Within the normal operating voltage and input range of the ADC sampling circuit, the gate-source voltage, drain-source voltage, and gate-drain voltage of the sixth field-effect transistor M6 and the fifth field-effect transistor M5 are all guaranteed to be within 3.3V, thereby avoiding the poor withstand voltage problem caused by the high voltage of the detection voltage VBAT.

[0060] When designing, ensure that the time constant [(R3+R ONM6 ) / / (R2+R ONM5 )]*Cs satisfies the voltage detection accuracy and ensures the robustness of the circuit design within the effective accuracy range of the ADC sampling circuit.

[0061] When the control signal EN is at a low level of 0, the third and fifth field-effect transistors M3 and M5, which serve as switching transistors, are turned off. At this time, since the gate of the fourth field-effect transistor M4 is connected to the power supply voltage AVD, the third field-effect transistor M3 is turned off and is in a high-resistance state. Its impedance is much greater than that of the first resistor R1. At this time, the voltage value of the voltage Vp is the detection voltage VBAT.

[0062] Since the gate of the fourth field effect transistor M4 is connected to the power supply voltage AVD,

[0063] Vp1=AVD-V GSM4 ,

[0064] During design, ensure that Vp-Vp1≤3.3V, that is, VBAT-AVD+V GSM4 ≤3.3V can satisfy the drain-source voltage, gate-source voltage, and gate-drain voltage of the fourth field effect transistor M4, which are all within the range of the power supply voltage AVD. The sum of the drain-source voltage of the second field effect transistor M2 and the third field effect transistor M3 is AVD-V GSM4 , which is lower than the power supply voltage AVD, thereby ensuring that the drain-source voltage, gate-source voltage, and gate-drain voltage of the second field effect transistor M2 and the third field effect transistor M3 are all within the range of the power supply voltage AVD, thereby avoiding the occurrence of voltage withstand problems. At the same time, since the voltage at the node VP is the detection voltage VBAT, the voltage of the control signal EN is 0, the fifth field effect transistor M5 and the sixth field effect transistor M6 are both turned off, and the output voltage V DIV At this time, the voltage is divided by the second resistor R2 and the third resistor R3, which easily ensures that the drain-source voltage of the fifth field effect transistor M5 and the sixth field effect transistor M6 are within the range of the power supply voltage AVD, while also ensuring that the gate-source voltage and the gate-drain voltage are within the range of the power supply voltage AVD.

[0065] From the above, it can be seen that in the present invention, it can be ensured that no matter when the control signal EN is at a high level and the circuit is working normally, or when the control signal EN is at a low voltage and the circuit is closed, conventional CMOS devices do not have any withstand voltage problems of drain-source voltage, gate-source voltage, and gate-drain voltage. The power consumption is calculated as follows:

[0066] Assume that the sampling time of the ADC sampling circuit is TS. During sampling, the control signal EN is at a high level. Ignoring the switching impedance of the fifth field-effect transistor M5 and the sixth field-effect transistor M6, the circuit power consumption at this time is:

[0067]

[0068] In actual circuit applications, voltage detection does not need to be performed continuously. It works in an intermittent detection mode, that is, after one detection is completed, it is detected again after a period of time. Assuming that the detection interval is TP, the average power consumption of the detection circuit is I RMS for

[0069]

[0070] In practical applications, the sampling time TS is in the order of microseconds, while the interval time TP is in the order of seconds. TS The power consumption is in the milliampere range, and after calculation, its average power consumption is in the nanoampere range, so the power consumption is extremely low.

[0071] To sum up, the low-power power supply detection circuit of the present invention does not use an operational amplifier in the entire circuit, so the entire circuit can be implemented using fewer devices, the circuit structure is simple, and the corresponding power consumption is also reduced; in addition, the voltage divider circuit is also connected to the detection voltage, so that the higher detection voltage is divided, and thus will not cause poor voltage resistance to the various components in the circuit, thereby overcoming the problem of poor voltage resistance in the circuit.

[0072] The present invention has been described above in conjunction with the best embodiments, but the present invention is not limited to the embodiments disclosed above, but should cover various modifications and equivalent combinations based on the essence of the present invention.

Claims

1. A low-power power detection circuit, characterized in that: The invention comprises a current source, a voltage divider switch start-up circuit, a voltage divider circuit, and an ADC sampling equivalent circuit, wherein external control signals are respectively input into the voltage divider switch start-up circuit and the voltage divider circuit; a power supply voltage is input into the current source, and the current source provides a bias current for the entire circuit; the voltage divider switch start-up circuit is respectively connected to the power supply voltage, the detection voltage, the voltage divider circuit, and the current source, and the voltage divider switch start-up circuit provides a startup voltage for the voltage divider circuit; the voltage divider circuit is also connected to the detection voltage to provide a divided voltage for the ADC sampling equivalent circuit, and the ADC sampling equivalent circuit outputs a sampled voltage value; the voltage divider switch start-up circuit comprises a first field effect transistor, a second field effect transistor, a third field effect transistor, a fourth field effect transistor, and a first resistor; the first field effect transistor and the second field effect transistor form a mirror current circuit, and the drain of the first field effect transistor is connected to the current source, and the drain of the second field effect transistor is connected to the source of the third field effect transistor; the external control signal is input into the gate of the third field effect transistor, and the drain of the third field effect transistor is connected to the source of the fourth field effect transistor; The power supply voltage is input to the gate of the fourth field effect transistor, the drain of the fourth field effect transistor is connected to one end of the first resistor, and the other end of the first resistor is connected to the detection voltage.

2. The low-power-consumption power supply detection circuit according to claim 1, wherein: The first field effect transistor and the second field effect transistor form a mirror current circuit, specifically: the drain and gate of the first field effect transistor are commonly connected to the gate of the second field effect transistor, and the sources of the first field effect transistor and the second field effect transistor are both grounded.

3. The low power consumption power supply detection circuit according to claim 1, wherein: The voltage divider circuit includes a fifth field-effect transistor, a sixth field-effect transistor, a second resistor and a third resistor; an external control signal is input into the gate of the fifth field-effect transistor, the source of the fifth field-effect transistor is grounded, and the drain thereof is connected to one end of the second resistor; the other end of the second resistor is respectively connected to the ADC sampling equivalent circuit and one end of the third resistor; the other end of the third resistor is connected to the drain of the sixth field-effect transistor, the gate of the sixth field-effect transistor is connected to one end of the first resistor, and the detection voltage is input into the source of the sixth field-effect transistor.

4. The low-power consumption power supply detection circuit according to claim 3, wherein: The third field effect tube and the fifth field effect tube are both switch tubes, and the fourth field effect tube is a voltage-resistant tube.

5. The low-power-consumption power supply detection circuit according to claim 4, wherein: The voltage value VP at one end of the first resistor satisfies the following relationship: VBAT-3.3V≤Vp≤3.3V; Wherein, VBAT is the voltage value of the detection voltage, and 3.3V is the withstand voltage value of each field effect tube.

6. The low power consumption power supply detection circuit according to claim 3, wherein: The first field effect transistor, the second field effect transistor, the third field effect transistor, the fourth field effect transistor and the fifth field effect transistor are all N-type field effect transistors, and the sixth field effect transistor is a P-type field effect transistor.

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