Ferroelectric thin film structure and electronic device including the same

Abstract

Provided is a ferroelectric thin film structure and an electronic device including the ferroelectric thin film structure. The ferroelectric thin film structure includes a semiconductor substrate, a first ferroelectric layer on the semiconductor substrate, and a second ferroelectric layer on the semiconductor substrate. The second ferroelectric layer is spaced apart from the first ferroelectric layer and has a dielectric constant different from that of the first ferroelectric layer. The first ferroelectric layer and the second ferroelectric layer may differ from each other in terms of the amount of dopant contained therein and may exhibit different threshold voltages when applied to a transistor.

Description

Technical Field

[0001] The embodiments described herein relate to ferroelectric thin film structures and electronic devices including such ferroelectric thin film structures. Background Art

[0002] As integrated circuit devices are scaled down, the space occupied by electronic devices (such as transistors and capacitors) therein decreases rapidly.

[0003] To obtain ferroelectricity, HfO2 has recently been used because HfO2 is a material that can overcome such space limitations and exhibit good operating characteristics. When used with another element such as Zr, HfO2 exhibits ferroelectricity, causing a negative capacitance effect. Therefore, in electronic devices using HfO2 in transistors for logic devices, transistors for memory devices, etc., power consumption can be greatly reduced.

[0004] When various types of transistors are included in an integrated circuit, it is necessary to set a threshold voltage suitable for the transistors in the integrated circuit according to the use, thereby reducing the total power consumption of the integrated circuit. Summary of the Invention

[0005] Provided is a ferroelectric thin film structure for easily adjusting the threshold voltages of a plurality of transistors.

[0006] Additional aspects will be partially set forth in the description below, and will be partially apparent from the description, or may be learned by practice of the presented embodiments of the present disclosure.

[0007] According to one embodiment, a ferroelectric thin film structure includes a semiconductor substrate, a first ferroelectric layer on the semiconductor substrate, and a second ferroelectric layer on the semiconductor substrate. The second ferroelectric layer is spaced apart from the first ferroelectric layer. The second ferroelectric layer has a dielectric constant different from that of the first ferroelectric layer.

[0008] In some embodiments, the first ferroelectric layer and the second ferroelectric layer may include a HfO2-based dielectric material.

[0009] In some embodiments, the first ferroelectric layer may include Hf x Zr (1-x) O, where 0 < x < 1, and the second ferroelectric layer may include Hf x Zr (1-x) O doped with a dopant, where 0 < x < 1.

[0010] In some embodiments, the dopant may include one of Si, Hf, Zr, Al, La, Y, Sr, and Gd.

[0011] In some embodiments, the first ferroelectric layer may include at least one first atomic layer containing HfO2 and at least one second atomic layer containing ZrO2.

[0012] In some embodiments, the second ferroelectric layer may include at least one first atomic layer containing HfO2, at least one second atomic layer containing ZrO2, and at least one third atomic layer containing HfO2 doped with a dopant or ZrO2 doped with a dopant.

[0013] In some embodiments, the third atomic layer may have a thickness of about 10 nm or less.

[0014] In some embodiments, the amount of the dopant may be in the range of about 1% to about 10%.

[0015] According to another embodiment, an electronic device includes a semiconductor substrate, a first transistor, and a second transistor. The semiconductor substrate includes a first channel region, a first source and a first drain connected to the first channel region, a second channel region, and a second source and a second drain connected to the second channel region. The first transistor includes the first channel region, the first source, the first drain, a first ferroelectric layer on the first channel region, and a first gate electrode on the first ferroelectric layer. The second transistor includes the second channel region, the second source, the second drain, a second ferroelectric layer on the second channel region, and a second gate electrode on the second ferroelectric layer. The dielectric constant of the second ferroelectric layer is different from the dielectric constant of the first ferroelectric layer.

[0016] In some embodiments, the first ferroelectric layer and the second ferroelectric layer may include a HfO2-based dielectric material.

[0017] In some embodiments, the first ferroelectric layer may include Hf x Zr (1-x) O, where 0 < x < 1, and the second ferroelectric layer may include Hf doped with a dopant x Zr (1-x) O, where 0 < x < 1.

[0018] In some embodiments, the dopant may include one of Si, Al, La, Y, Sr, and Gd.

[0019] In some embodiments, the first ferroelectric layer may include at least one first atomic layer containing HfO2 and at least one second atomic layer containing ZrO2.

[0020] In some embodiments, the second ferroelectric layer may include at least one first atomic layer containing HfO2, at least one second atomic layer containing ZrO2, and at least one third atomic layer containing HfO2 doped with a dopant or ZrO2 doped with a dopant.

[0021] In some embodiments, among the first atomic layer, the second atomic layer, and the third atomic layer, the third atomic layer may be located closest to the second channel region.

[0022] In some embodiments, the third atomic layer may have a thickness of about 10 nm or less.

[0023] In some embodiments, the amount of dopant may be in the range of about 1% to about 10%.

[0024] In some embodiments, each of the first channel region and the second channel region may include at least one of Si, Ge, SiGe, III-V semiconductor, oxide semiconductor, nitride semiconductor, oxynitride semiconductor, two-dimensional (2D) material, quantum dot, and organic semiconductor.

[0025] In some embodiments, at least one of the first transistor and the second transistor may further include an insulating layer between the first channel region and the first ferroelectric layer or between the second channel region and the second ferroelectric layer.

[0026] In some embodiments, at least one of the first transistor and the second transistor may further include: an insulating layer between the first ferroelectric layer and the first gate electrode or between the second ferroelectric layer and the second gate electrode; and a conductive layer between the insulating layer and the first ferroelectric layer or between the insulating layer and the second ferroelectric layer.

[0027] In some embodiments, one of the first transistor and the second transistor may be a transistor for a logic device, and the other of the first transistor and the second transistor may be a transistor for a memory device.

[0028] According to one embodiment, a ferroelectric thin film structure includes a semiconductor substrate and a first ferroelectric layer and a second ferroelectric layer spaced apart from each other on the semiconductor substrate. Each of the first ferroelectric layer and the second ferroelectric layer includes a plurality of first atomic layers and a plurality of second atomic layers stacked on each other. The material of the plurality of first atomic layers is different from the material of the plurality of second atomic layers. The second ferroelectric layer further includes one or more third atomic layers having a dopant.

[0029] In some embodiments, the plurality of first atomic layers may include HfO2, the plurality of second atomic layers may include ZrO2, and the one or more third atomic layers may include HfO2 or ZrO2.

[0030] In some embodiments, the dopant may include one of Si, Hf, Zr, Al, La, Y, Sr, and Gd.

[0031] In some embodiments, each of the one or more third atomic layers may have a thickness of about 10 nm or less.

[0032] According to one embodiment, an electronic device may include a ferroelectric thin film structure, a first transistor including a first ferroelectric layer, and a second transistor including a second ferroelectric layer. The threshold voltage of the first transistor may be different from the threshold voltage of the second transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The above and other aspects, features, and advantages of certain embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0034] Figure 1 is a schematic cross-sectional view of an example of the structure of a ferroelectric thin film structure according to one embodiment;

[0035] Figure 2 schematically shows the manufacturing of Figure 1 a conceptual diagram of a method for a first ferroelectric layer included in a ferroelectric thin film structure;

[0036] Figure 3 schematically shows the manufacturing of Figure 1 a conceptual diagram of a method for a second ferroelectric layer included in a ferroelectric thin film structure;

[0037] Figures 4 to 6 and Figure 17 is Figure 1 a cross-sectional view of a modified example of the second ferroelectric layer of a ferroelectric thin film structure;

[0038] Figure 7 is a schematic cross-sectional view of a second ferroelectric layer that can be included in a ferroelectric thin film structure according to another embodiment; Figure 1 in

[0039] Figure 8 schematically shows the manufacturing of Figure 7 a conceptual diagram of a method for a second ferroelectric layer;

[0040] Figures 9 to 11 and Figures 18 to 20 is Figure 7 a cross-sectional view of a modified example of the second ferroelectric layer;

[0041] Figure 12 is a schematic cross-sectional view of an electronic device according to one embodiment;

[0042] Figure 13 and Figure 14 conceptually shows Figure 12 a graph showing that two transistors have different threshold voltages; and

[0043] Figure 15 and Figure 16 is a schematic cross-sectional view of an electronic device according to another embodiment. Specific embodiments

[0044] Reference will now be made in detail to the embodiments, examples of which are illustrated in the accompanying drawings, wherein like reference numerals always refer to like elements. In this regard, the present embodiments may have different forms and should not be construed as limited to the description set forth herein. Accordingly, the embodiments are described below only by referring to the accompanying drawings to explain various aspects. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of...", when following a list of elements, modify the entire list of elements and not a single element of the list. For example, "at least one of A, B, and C", "at least one of A, B, or C", "one of A, B, C, or a combination thereof", and "one of A, B, C, and a combination thereof" can be interpreted as covering any of the following combinations, respectively: A; B; A and B; A and C; B and C; and A, B, and C.

[0045] Hereinafter, the embodiments will be described in detail with reference to the accompanying drawings. The embodiments described below are merely examples and various modifications can be made thereto. In the drawings, like reference numerals denote like elements, and for clarity and convenience of description, the dimensions of each element may be enlarged.

[0046] It will be understood that when an element is referred to as being "on" or "above" another element, the element may be in direct contact with the other element or not in contact with the other element on the other element.

[0047] The terms "first", "second", etc. may be used to describe various elements, but are used herein only to distinguish one element from another. These terms are not intended to limit the material or structure of the elements.

[0048] As used herein, singular expressions are also intended to include the plural forms unless the context clearly indicates otherwise. It will be understood that when an element is referred to as "comprising" another element, the element may also include other elements unless otherwise mentioned.

[0049] As used herein, terms such as "unit", "module", etc. denote a unit for processing at least one function or operation, which may be implemented by hardware, software, or a combination of hardware and software.

[0050] The terms "the" and similar indicators may be understood to include both the singular and plural forms.

[0051] Unless it is explicitly stated that the operations of the method should be performed in the order described below, the operations may be performed in a suitable order. In addition, all terms indicating examples (e.g., etc.) are only for the purpose of describing the technical idea in detail, and thus the scope of the present inventive concept is not limited by these terms unless limited by the claims.

[0052] Figure 1 is a schematic cross-sectional view of an example of the structure of a ferroelectric thin film structure according to an embodiment.

[0053] The ferroelectric thin film structure 1000 includes a semiconductor substrate 10, a first ferroelectric layer 100 on the semiconductor substrate 10, and a second ferroelectric layer 200 provided on the semiconductor substrate 10 to be spaced apart from the first ferroelectric layer 100 and having a dielectric constant different from that of the first ferroelectric layer 100.

[0054] The first ferroelectric layer 100 and the second ferroelectric layer 200 may be formed of a material exhibiting ferroelectricity.

[0055] The first ferroelectric layer 100 and the second ferroelectric layer 200 may include a HfO2-based dielectric material. The HfO2-based dielectric thin film may exhibit ferroelectricity depending on the crystal phase of the thin film. The first ferroelectric layer 100 and the second ferroelectric layer 200 may be formed of a HfO2-based dielectric material to which a dopant is added. Si, Al, Zr, Y, La, Gd, Sr, Hf, or Ce may be used as the dopant. Different dopants may be added to the HfO2-based dielectric material of the first ferroelectric layer 100 and the HfO2-based dielectric material of the second ferroelectric layer 200 such that the first ferroelectric layer 100 and the second ferroelectric layer 200 may exhibit ferroelectricity but may have different electrical characteristics, such as different dielectric constants.

[0056] The first ferroelectric layer 100 and the second ferroelectric layer 200 may include, for example, Hf x Zr (1-x) O (0 < x < 1). However, the embodiment is not limited thereto, and the first ferroelectric layer 100 and the second ferroelectric layer 200 may include at least one of HfO, ZrO, SiO, AlO, CeO, YO, LaO, and perovskite compounds, and also include dopants such as Si, Al, Zr, Y, La, Gd, Sr, Hf, or Ce.

[0057] The first ferroelectric layer 100 and the second ferroelectric layer 200 include a HfO2-based material to which a dopant is added to exhibit ferroelectricity, and the ferroelectricity varies according to a specific crystal phase of this material. This is because the crystal structure can be affected by the material chemically formed inside the thin film. Therefore, the characteristics of the ferroelectric thin film can be specifically controlled by adjusting the dopant to be added, the amount of the dopant, etc.

[0058] The first ferroelectric layer 100 and the second ferroelectric layer 200 can exhibit different ferroelectric properties, and their materials can be set to have different dielectric constants. For example, when used in a transistor, the first ferroelectric layer 100 and the second ferroelectric layer 200 can exhibit different threshold voltage characteristics.

[0059] The first ferroelectric layer 100 may include Hf x Zr (1-x) O (0 < x < 1), and the second ferroelectric layer 200 may include Hf doped with a dopant x Zr (1-x) O (0 < x < 1). The dopant incorporated into the second ferroelectric layer 200 may include Si, Al, Y, La, Gd, Sr, or Ce.

[0060] The first ferroelectric layer 100 and the second ferroelectric layer 200 can be formed by an atomic layer deposition (ALD) process and have a structure in which multiple atomic layers are sequentially stacked as shown Figure 1 in the figure.

[0061] The first ferroelectric layer 100 may include at least one first atomic layer 110 containing HfO2 (A) and at least one second atomic layer 120 containing ZrO2 (B). The first atomic layer 110 and the second atomic layer 120 may be alternately stacked. However, Figure 1 the number of times or the order of repeated stacking of the first atomic layer 110 and the second atomic layer 120 in the figure is only an example. The number of times or the order of repeated stacking of the first atomic layer 110 and the second atomic layer 120 can vary according to the desired content ratio of Hf and Zr in the first ferroelectric layer 100. For example, for a condition where the content ratio of Hf and Zr is 1:4, one first atomic layer 110 and four second atomic layers 120 can be alternately and repeatedly stacked, or any structure with a ratio of the total number of stacked first atomic layers 110 to the total number of stacked second atomic layers 120 of 1:4 can be used.

[0062] The second ferroelectric layer 200 may include at least one first atomic layer 210 containing HfO2 (A), at least one second atomic layer 220 containing ZrO2 (B), and at least one third atomic layer 230 containing HfO2 (A) doped with a dopant C.

[0063] However, the number of times or the order of repeated stacking of the first atomic layer 210, the second atomic layer 220, and the third atomic layer 230 is only an example. The number of times or the order of stacking of the first atomic layer 210, the second atomic layer 220, and the third atomic layer 230 can vary according to the desired content ratio of Hf and Zr in the second ferroelectric layer 200 and the content ratio of the dopant in the second ferroelectric layer 200.

[0064] The content ratios of Hf and Zr in the first ferroelectric layer 100 and the second ferroelectric layer 200 may be similar or almost the same. However, the embodiments are not limited thereto, and the content ratios of Hf and Zr may be set to be different.

[0065] Figure 1 The ratio of dopants such as Al contained in the third atomic layer 230 in is only an example and is not limited thereto. The third atomic layer 230 is shown as the lowermost layer of the second ferroelectric layer 200, but is not limited thereto, and its position may be changed. When the position of the third atomic layer 230 is changed, although the amount of dopants in the second ferroelectric layer 200 is the same, specific ferroelectric properties of the second ferroelectric layer 200 may be changed. For example, the dielectric constant may be changed and the threshold voltage of a transistor employing the second ferroelectric layer 200 may be changed.

[0066] The thickness of the third atomic layer 230 may be appropriately determined in consideration of atomic layer deposition (ALD) process conditions. For example, the thickness of the third atomic layer 230 may be determined in units of one deposition cycle determined by certain process conditions including temperature and time. The unit of one deposition cycle may be appropriately determined for fine adjustment of the thickness of the second ferroelectric layer 200. The thickness of the third atomic layer 230 may be about 10 nm or less. The thickness of the third atomic layer 230 may be in the range of about 0.05 nm to about 10 nm. The thickness of the third atomic layer 230 may be about 0.1 nm to about 0.9 nm.

[0067] The amount of dopants in the third atomic layer 230 may be set such that the second ferroelectric layer 200 exhibits other significant properties compared to the ferroelectricity of the first ferroelectric layer 100. For example, the amount of dopants may be between 1% and 10%.

[0068] The ferroelectric thin film structure 1000 according to an embodiment includes ferroelectric layers 100 and 200 on the same semiconductor substrate 10. The ferroelectric layers 100 and 200 are based on similar materials but may exhibit different characteristics. Therefore, it is easy to apply structures with various threshold voltages in one integrated circuit.

[0069] Figure 2 is a conceptual diagram schematically showing a method of manufacturing Figure 1 the first ferroelectric layer 100 included in the ferroelectric thin film structure 1000.

[0070] In operation S1, a HfO2 atomic layer is formed. Operation S1 can be defined as the unit of a deposition cycle in which the HfO2 atomic layer is formed. First, a target substrate is placed in a reaction chamber and the reaction chamber is heated to a specific temperature for applying a hafnium (Hf) source for forming hafnium (Hf). A hafnium (Hf) precursor can be used for depositing hafnium (Hf). The hafnium (Hf) on the target substrate reacts with an oxidant to generate a HfO2 atomic layer. A purge process can be performed before and / or after the oxidation reaction after supplying the hafnium (Hf) source. The purge process is a process of discharging by-products that do not contribute to the oxidation reaction or are generated after the oxidation reaction to the outside of the reaction chamber. In the purge process, an inert gas such as Ar, He, or Ne or N2 gas can be used.

[0071] In operation S2, a ZrO2 atomic layer is formed. After the HfO2 atomic layer is formed, a source for forming zirconium (Zr) is applied thereon. The reaction chamber is heated to a specific temperature and a source for forming zirconium (Zr) is supplied. A zirconium (Zr) precursor can be used for depositing zirconium (Zr). The Zr deposited on the HfO2 atomic layer reacts with an oxidant to generate ZrO2. That is, a ZrO2 atomic layer is formed on the HfO2 atomic layer. A purge process can be performed before and / or after the oxidation reaction after supplying the Zr source to discharge by-products to the outside of the reaction chamber after supplying the zirconium (Zr) source.

[0072] A structure in which the ZrO2 atomic layer is stacked on the HfO2 atomic layer can be provided by operations S1 and S2. Next, operations S1 and S2 can be repeated as needed. The number of times of repeating operation S1 and the number of times of repeating operation S2 can be different. Optionally, immediately after operation S2, operation S1 can be not performed and operation S2 can be performed again. This can be determined according to the content ratio between Hf and Zr. Figure 1 The first ferroelectric layer 100 of the ferroelectric thin film structure 1000 or a modified form thereof can be formed according to the repetition pattern and the number of repetitions of operations S1 and S2.

[0073] Figure 3 is a schematic diagram showing the manufacturing Figure 1 of the method for the second ferroelectric layer included in the ferroelectric thin film structure.

[0074] In operation S3, a HfO2 atomic layer doped with a dopant Al is formed. First, a target substrate is placed in a chamber and heated to a specific temperature to deposit hafnium (Hf) from a hafnium (Hf) precursor on the target substrate. Next, aluminum (Al) is deposited on the target substrate from an aluminum precursor. Next, when the resulting structure reacts with an oxidant, a HfO2 atomic layer doped with aluminum (Al) is formed. For example, it can be formed such as Figure 1layer of the third atomic layer 230. The purge process is a process of discharging reaction by-products from the chamber and can be performed after at least one of the following: supplying an Hf source; supplying an Al source; and an oxidation reaction.

[0075] In operation S2, a ZrO2 atomic layer is formed, and operation S2 is substantially the same as that described above with reference to Figure 2 By performing operation S2 on the HfO2 atomic layer doped with aluminum (Al), a structure in which the ZrO2 atomic layer is stacked on the HfO2 layer doped with aluminum (Al) can be formed. Next, operations S1 and S2 can be additionally performed. By performing operations S3, S2, S1, and S2, a structure in which the HfO2 atomic layer and the ZrO2 atomic layer are repeatedly stacked can be provided on the structure in which the HfO2 layer doped with aluminum (Al) and the ZrO2 atomic layer are stacked. Operations S1 and S2 can be repeated as needed. The number of times of repeating operation S1 and the number of times of repeating operation S2 can be different. Optionally, immediately after operation S2, operation S1 can be not performed and operation S2 can be performed again. This can be determined according to the content ratio between Hf and Zr. Operation S3 can be added as needed. Operation S3 can be performed at different cycle positions. Figure 1 The second ferroelectric layer 200 of the ferroelectric thin film structure 1000 or its modified form can be formed according to the pattern and number of times of repeating operations S1 and S2.

[0076] Figures 4 to 6 and Figure 17 is Figure 1 A cross-sectional view of a modified example of the second ferroelectric layer of the ferroelectric thin film structure.

[0077] Referring to Figure 4 , the second ferroelectric layer 201 includes a first atomic layer 210 containing HfO2 (A), a second atomic layer 220 containing ZrO2 (B), and a third atomic layer 230 containing HfO2 (A) doped with a dopant C. The third atomic layer 230 can be the uppermost layer of the second ferroelectric layer 201.

[0078] Referring to Figure 5 , the second ferroelectric layer 202 includes a first atomic layer 210 containing HfO2 (A), a second atomic layer 220 containing ZrO2 (B), and a third atomic layer 230 containing HfO2 (A) doped with a dopant C. The third atomic layer 230 can be located in the middle of the second ferroelectric layer 202.

[0079] Referring to Figure 6, the second ferroelectric layer 203 includes a first atomic layer 210 containing HfO2 (A), a second atomic layer 220 containing ZrO2 (B), and a third atomic layer 230 containing HfO2 (A) doped with dopant C. The third atomic layer 230 can be provided as multiple layers. Although two third atomic layers 230 are shown to be located in the middle of the second ferroelectric layer 203, three or more third atomic layers 230 can be provided, or the positions of the two third atomic layers 230 can be changed. The second ferroelectric layer 203 can be further modified. For example, as Figure 17 shown, the second ferroelectric layer 203' can be the same as the second ferroelectric layer 203 in Figure 6 , but the second ferroelectric layer 203' includes one or more atomic layers 230' containing HfO2 (A) doped with dopant D. Dopants C and D can include different dopants among Si, Al, Y, La, Gd, Sr, or Ce.

[0080] Figure 7 is a schematic cross-sectional view of a second ferroelectric layer that can be included in the ferroelectric thin film structure according to another embodiment in Figure 1 .

[0081] The second ferroelectric layer 300 can include at least one first atomic layer 310 containing HfO2 (A), at least one second atomic layer 320 containing ZrO2 (B), and at least one third atomic layer 330 containing ZrO2 (B) doped with dopant C.

[0082] The number of times or the order of repeated stacking of the first atomic layer 310, the second atomic layer 320, and the third atomic layer 330 is only an example. The number of times or the order of repeated stacking of the first atomic layer 310, the second atomic layer 320, and the third atomic layer 330 can be changed according to the desired content ratio of Hf and Zr in the second ferroelectric layer 300 and the content ratio of the dopant in the second ferroelectric layer 300.

[0083] The third atomic layer 330 is shown as the lowermost layer of the second ferroelectric layer 300, but is not limited thereto, and its position can be changed. When the position of the third atomic layer 330 is changed, although the amount of the dopant in the second ferroelectric layer 300 is the same, specific ferroelectric characteristics of the second ferroelectric layer 300 can be changed.

[0084] The thickness of the third atomic layer 330 can be appropriately determined in consideration of ALD process conditions. For example, the thickness of the third atomic layer 330 can be determined in units of one deposition cycle determined by specific process conditions including temperature and time. The unit of one deposition cycle can be appropriately determined according to the fine adjustment of the thickness of the second ferroelectric layer 300. The thickness of the third atomic layer 330 can be about 10 nm or less, for example, it can be in the range of 0.05 nm to 10 nm, and can be, for example, about 0.1 nm to about 0.9 nm.

[0085] The amount of dopant in the third atomic layer 330 can be set such that the second ferroelectric layer 300 exhibits other significant properties compared to the ferroelectricity of the first ferroelectric layer 100. For example, the amount of dopant can be between about 1% and about 10%.

[0086] Figure 8 is a conceptual diagram schematically showing a method of manufacturing Figure 7 the second ferroelectric layer 300.

[0087] In operation S4, a ZrO2 atomic layer doped with dopant Al is formed. First, the target substrate is placed in the chamber and heated to a specific temperature to deposit zirconium (Zr) from a zirconium (Zr) precursor onto the target substrate. Next, aluminum (Al) is deposited on the target substrate from an aluminum precursor. Next, when the resulting structure reacts with an oxidant, a ZrO2 atomic layer doped with Al is formed. For example, a layer such as Figure 7 the third atomic layer 330 can be formed. The purge process is a process of discharging reaction by-products outside the chamber, and can be performed after supplying zirconium (Zr) and / or after supplying aluminum (Al) and / or after the oxidation reaction.

[0088] In operation S1, an HfO2 atomic layer is formed, and operation S1 is substantially the same as described above with reference to Figure 2 By performing operation S1 on the ZrO2 atomic layer doped with aluminum (Al), a structure in which the ZrO2 atomic layer doped with aluminum (Al) and the HfO2 atomic layer are stacked can be formed. Next, operations S1 and S2 can be performed. By performing operations S4, S1, S2, S1,... a structure in which the ZrO2 atomic layer and the HfO2 atomic layer are repeatedly stacked can be provided on the structure in which the ZrO2 atomic layer doped with aluminum (Al) and the HfO2 atomic layer are stacked. Operations S1 and S2 can be repeated as needed. The number of times operation S1 is repeated and the number of times operation S2 is repeated can be different. Optionally, immediately after operation S1, operation S2 may not be performed and operation S1 can be performed again. This can be determined according to the content ratio between Hf and Zr. Operation S4 can be added as needed. Operation S4 can be performed at different cycle positions. Figure 7The second ferroelectric layer 300 shown or its modified form can be formed according to the pattern and number of repetitions of operations S1, S2, and S4.

[0089] Figures 9 to 11 and Figures 18 to 20 is Figure 7 A cross-sectional view of a modified example of the second ferroelectric layer 300.

[0090] Referring to Figure 9 , the second ferroelectric layer 301 includes a first atomic layer 310 containing HfO2(A), a second atomic layer 320 containing ZrO2(B), and a third atomic layer 330 containing ZrO2 doped with dopant C. The third atomic layer 330 can be the uppermost layer of the second ferroelectric layer 301.

[0091] Referring to Figure 10 , the second ferroelectric layer 302 includes a first atomic layer 310 containing HfO2(A), a second atomic layer 320 containing ZrO2(B), and a third atomic layer 330 containing ZrO2 doped with dopant C. The third atomic layer 330 can be located in the middle of the second ferroelectric layer 302.

[0092] Referring to Figure 11 , the second ferroelectric layer 303 includes a first atomic layer 310 containing HfO2(A), a second atomic layer 320 containing ZrO2(B), and a third atomic layer 330 containing ZrO2(B) doped with dopant C. The third atomic layer 330 can be provided as multiple layers. Although two third atomic layers 330 are shown to be located in the middle of the second ferroelectric layer 303, three or more third atomic layers 330 can be provided, or these two third atomic layers 330 can be provided at different positions. The second ferroelectric layer 303 can be modified in various ways. For example, as Figure 18 shown, the second ferroelectric layer 303' can be the same as the second ferroelectric layer 303 in Figure 11 , but can include one or more third atomic layers 330' that include ZrO2(B) doped with a dopant D different from dopant C. As Figure 19 shown, the second ferroelectric layer 304 can include one or more atomic layers 340 containing HfO2(A) doped with dopant E. Dopants C, D, and E can include different dopants among Si, Al, Y, La, Gd, Sr, or Ce. In addition, as Figure 20 shown, the second ferroelectric layer 305 can be the same as the second ferroelectric layer 302 in Figure 10 , except that the second ferroelectric layer 305 can include an atomic layer 230 containing HfO2(A) doped with dopant C.

[0093] Figure 12It is a schematic cross-sectional view of an electronic device according to an embodiment.

[0094] The electronic device 2000 includes a semiconductor substrate 20, a first ferroelectric layer 100 on the semiconductor substrate 20, a first gate electrode G1 on the first ferroelectric layer 100, a second ferroelectric layer 200 provided on the semiconductor substrate 20 and spaced apart from the first ferroelectric layer 100, and a second gate electrode G2 on the second ferroelectric layer 200.

[0095] The semiconductor substrate 20 includes a first channel region CH1, a first source electrode S1 and a first drain electrode D1 connected to the first channel region CH1, a second channel region CH2, and a second source electrode S2 and a second drain electrode D2 connected to the second channel region CH2. The first ferroelectric layer 100 is provided on the first channel region CH1, and the second ferroelectric layer 200 is provided on the second channel region CH2.

[0096] The semiconductor substrate 20 may be a silicon (Si) substrate. However, the embodiment is not limited thereto, and the semiconductor substrate 20 may include at least one of other materials (such as Ge, SiGe, III-V group semiconductors, oxide semiconductors, nitride semiconductors, oxynitride semiconductors, two-dimensional (2D) materials, quantum dots, and organic semiconductors).

[0097] Each of the first channel region CH1 and the second channel region CH2 may include at least one of Si, Ge, SiGe, III-V group semiconductors, oxide semiconductors, nitride semiconductors, oxynitride semiconductors, 2D materials, quantum dots, and organic semiconductors.

[0098] The first source electrode S1 and the first drain electrode D1 may be electrically connected to opposite sides of the first channel region CH1 spaced apart from each other, and the second source electrode S2 and the second drain electrode D2 may be electrically connected to two sides of the second channel region CH2 spaced apart from each other. These regions may be formed by implanting impurities into multiple different regions of the semiconductor substrate 20 and may be high-concentration semiconductor regions.

[0099] The first channel region CH1, the first source electrode S1, the first drain electrode D1, the first ferroelectric layer 100, and the first gate electrode G1 form a first transistor TR1. The second channel region CH2, the second source electrode S2, the second drain electrode D2, the second ferroelectric layer 200, and the second gate electrode G2 form a second transistor TR2.

[0100] One of the first transistor TR1 and the second transistor TR2 may be a transistor for a logic device, and the other may be a transistor for a memory device. The first transistor TR1 and the second transistor TR2 may have different threshold voltages.

[0101] To this end, the first ferroelectric layer 100 of the first transistor TR1 and the second ferroelectric layer 200 of the second transistor TR2 include materials or components having, for example, different dielectric constants, such that the first ferroelectric layer 100 and the second ferroelectric layer 200 can have ferroelectricity but have different electrical characteristics.

[0102] As described above, the first ferroelectric layer 100 and the second ferroelectric layer 200 include HfO2-based dielectric materials and may also include different dopants. For example, the first ferroelectric layer 100 may include Hf x Zr (1-x) O (0 < x < 1), and the second ferroelectric layer 200 may include Hf doped with a dopant x Zr (1-x) O (0 < x < 1).

[0103] In the second transistor TR2, the second ferroelectric layer 200 is shown to have Figure 1 the structure shown, but is not limited thereto and may have Figures 4 - 7 , Figures 9 - 11 and Figures 17 - 20 the structures shown, or modified examples thereof.

[0104] Ferroelectricity can cause a negative capacitance effect, and thus can greatly reduce the power consumption of electronic devices using ferroelectric materials.

[0105] The power consumption of the electronic device 2000 is related to the threshold voltage of each transistor included in the electronic device 2000. Theoretically, when measuring the gate voltage and drain current characteristics of an existing metal-oxide-semiconductor field-effect transistor (MOSFET), it is difficult to reduce the subthreshold swing (SS) to less than about 60 mV / dec in the subthreshold region below the threshold voltage. Therefore, as the device becomes smaller in size, the operating voltage cannot be reduced to a specific value or less, which affects the increase in power consumption of the integrated circuit. However, it is known that when a ferroelectric material is used in a transistor as in an embodiment, the threshold voltage can be reduced by domain switching that occurs when an electric field is applied to the ferroelectric material. This effect is called the negative capacitance effect.

[0106] In the case of an integrated device having a plurality of transistors (such as the electronic device 2000 according to an embodiment), it is necessary for each transistor to have a suitable threshold voltage to reduce the total power consumption. For example, the transistors of SRAM may have a high threshold voltage, and the transistors of logic devices may have a low threshold voltage.

[0107] The electronic device 2000 according to the embodiment includes a first transistor TR1 and a second transistor TR2 having different threshold voltages, and one of the first transistor TR1 and the second transistor TR2 can be used for a memory device and the other can be used for a logic device, thereby effectively reducing the total power consumption of the electronic device 2000.

[0108] In the electronic device 2000 according to the embodiment, a first ferroelectric layer 100 and a second ferroelectric layer 200 on the same semiconductor substrate 20 are formed of a dielectric material based on the same material to achieve ferroelectricity but are different in the type or amount of dopant, thereby easily obtaining two transistors having different threshold voltages.

[0109] Generally, a method of adjusting the doping concentration of a silicon channel is used to provide multiple transistors having different low threshold voltages in one chip. For example, in this method, first, the entire silicon substrate is doped to a suitable doping concentration to achieve a desired threshold voltage, and then, in order to achieve different threshold voltages, the corresponding channel regions are additionally doped. In this method, the threshold voltage of the transistor is determined by the additional doping of the silicon substrate. Therefore, as the device becomes smaller in size, there are difficulties such as the need for a more precise doping technique to control the distribution of the doping concentration.

[0110] In one embodiment, transistors are formed based on the same semiconductor substrate 20, and the doping of the first channel region CH1 and the second channel region CH2 does not need to be separately and finely controlled. That is, the first channel region CH1 and the second channel region CH2 can have the same physical properties and the same doping concentration, and the first transistor TR1 and the second transistor TR2 using the first channel region CH1 and the second channel region CH2 but having different threshold voltages can be obtained.

[0111] Figure 13 and Figure 14 conceptually shows Figure 12 a graph in which two transistors have different threshold voltages.

[0112] Figure 13 shows the threshold voltage V t1 . Figure 14 shows the threshold voltage V t2 obtained from the second ferroelectric layer 200. As shown in the graph, the same ferroelectric material based on HfZrO has different threshold voltages depending on whether aluminum (Al) is doped.

[0113] In addition, by adjusting the type or amount of dopant, the doping position, etc., the change range of the threshold voltage can be additionally adjusted, and a desired threshold voltage suitable for the device to which the transistor is to be applied can be obtained.

[0114] Figure 15 is a schematic cross-sectional view of an electronic device according to another embodiment.

[0115] Figure 15 The electronic device 2001 Figure 12 differs from the electronic device 2000 in that the first transistor TR1 further includes a first insulating layer 170 between the first ferroelectric layer 100 and the first channel region CH1 and the second transistor TR2 further includes a second insulating layer 270 between the second ferroelectric layer 200 and the second channel region CH2.

[0116] The first insulating layer 170 and the second insulating layer 270 may be layers for suppressing or preventing electrical leakage. Si oxide (SiO), Al oxide (AlO), Hf oxide (HfO), Zr oxide (ZrO), or a 2D insulator may be used as the first insulating layer 170 and the second insulating layer 270. A material such as hexagonal boron nitride (h-BN) may be used as the 2D insulator. However, the materials of the first insulating layer 170 and the second insulating layer 270 are not limited thereto.

[0117] Although both the first transistor TR1 and the second transistor TR2 are shown as further including insulating layers 170 and 270, the embodiment is not limited thereto, and only one of them may further include an insulating layer. In other words, the first insulating layer 170 or the second insulating layer 270 may be omitted.

[0118] Figure 16 is a schematic cross-sectional view of an electronic device according to another embodiment.

[0119] Referring to Figure 16 , the first transistor TRl and the second transistor TR2 included in the electronic device 2002 are different from those of the Figure 12 electronic device 2000 in terms of specific structure.

[0120] The first transistor TR1 includes a first ferroelectric layer 100, a first conductive layer 190, a first insulating layer 180, and a first gate electrode G1 that are sequentially disposed on the first channel region CH1.

[0121] The second transistor TR2 includes a second ferroelectric layer 200, a second conductive layer 290, a second insulating layer 280, and a second gate electrode G2 that are sequentially disposed on the second channel region CH2.

[0122] Si oxide (SiO), Al oxide (AlO), Hf oxide (HfO), Zr oxide (ZrO), or a 2D insulator may be used as the first insulating layer 180 and the second insulating layer 280. A material such as hexagonal boron nitride (h-BN) may be used as the 2D insulator. However, the materials of the first insulating layer 180 and the second insulating layer 280 are not limited thereto.

[0123] The first conductive layer 190 and the second conductive layer 290 may include metals including TiN, W, Mo, Ni, etc., conductive oxides including RuO2, SrRuO3, ITO, etc., or 2D materials including graphene. The first conductive layer 190 may also include metal nitrides or metal oxynitrides. However, the materials of the first conductive layer 190 and the second conductive layer 290 are not limited thereto.

[0124] In the drawings, both the first transistor TR1 and the second transistor TR2 are shown as additionally including an insulating layer and a conductive layer, but are not limited thereto. For example, the first transistor TR1 or the second transistor TR2 may be changed to Figure 15 or Figure 12 the first transistor TR1 or the second transistor TR2 shown.

[0125] The above-described electronic devices 2000, 2001, and 2002 may form parts of integrated devices and integrated circuits. In addition to the first transistor TR1 and the second transistor TR2 shown, the electronic devices 2000, 2001, and 2002 may each include other transistors, capacitors, etc., and employ ferroelectric materials, whose threshold voltage can be easily adjusted, and whose size can be reduced and power consumption can be lowered, and whose performance can be improved.

[0126] By adjusting the dopant added to the HfO2-based dielectric material, the above ferroelectric thin film structure can exhibit ferroelectric characteristics with different dielectric constants.

[0127] Such a ferroelectric thin film structure can be applied to electronic devices using multiple transistors with different threshold voltages.

[0128] When the terms "about" or "substantially" are used in conjunction with a numerical value in this specification, it is intended that the relevant numerical value include manufacturing or operating tolerances (e.g., ±10%) around the stated numerical value. Moreover, when the words "generally" and "substantially" are used in conjunction with a geometry, it is intended that the geometry not require precision, but the tolerance of the shape is within the scope of the present disclosure. In addition, whether a numerical value or a shape is modified as "about" or "substantially", it will be understood that these numerical values and shapes should be interpreted as including manufacturing or operating tolerances (e.g., ±10%) around the stated numerical value or shape.

[0129] It should be understood that the embodiments described herein should be considered only in a descriptive sense and not for purposes of limitation. The description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, those of ordinary skill in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope defined by the appended claims.

[0130] This application claims the benefit of Korean Patent Application No. 10-2020-0026794, filed on Mar. 3, 2020, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety.

Claims

1. A ferroelectric thin film structure, comprising: A semiconductor substrate; A first ferroelectric layer on the semiconductor substrate; And A second ferroelectric layer on the semiconductor substrate, the second ferroelectric layer being spaced apart from the first ferroelectric layer, and the dielectric constant of the second ferroelectric layer being different from the dielectric constant of the first ferroelectric layer, wherein The first ferroelectric layer comprises Hf x Zr (1-x) O, where 0 < x < 1, and The second ferroelectric layer comprises Hf doped with a dopant x Zr (1-x) O, where 0 < x < 1.

2. The ferroelectric thin film structure according to claim 1, wherein the dopant comprises one of Si, Hf, Zr, Al, La, Y, Sr, and Gd.

3. The ferroelectric thin film structure according to claim 1, wherein the first ferroelectric layer comprises: At least one first atomic layer containing HfO2; And At least one second atomic layer containing ZrO2.

4. The ferroelectric thin film structure according to claim 1, wherein the second ferroelectric layer comprises: At least one first atomic layer containing HfO2; At least one second atomic layer containing ZrO2; And At least one third atomic layer containing HfO2 doped with the dopant or ZrO2 doped with the dopant.

5. The ferroelectric thin film structure according to claim 4, wherein the at least one third atomic layer has a thickness of 10 nm or less.

6. The ferroelectric thin film structure according to claim 1, wherein the amount of the dopant is in the range of 1% to 10%.

7. An electronic device, comprising: A semiconductor substrate, comprising a first channel region, a first source and a first drain each connected to the first channel region, a second channel region, and a second source and a second drain each connected to the second channel region; A first transistor, comprising the first channel region, the first source, the first drain, a first ferroelectric layer on the first channel region, and a first gate electrode on the first ferroelectric layer; And A second transistor, comprising the second channel region, the second source, the second drain, a second ferroelectric layer on the second channel region, and a second gate electrode on the second ferroelectric layer, the dielectric constant of the second ferroelectric layer being different from the dielectric constant of the first ferroelectric layer, wherein The first ferroelectric layer includes Hf x Zr (1-x) O, where 0 < x < 1, and The second ferroelectric layer comprises Hf doped with a dopant x Zr (1-x) O, where 0 < x < 1.

8. The electronic device according to claim 7, wherein the dopant comprises one of Si, Al, La, Y, Sr, and Gd.

9. The electronic device according to claim 7, wherein the first ferroelectric layer comprises: At least one first atomic layer containing HfO2; And At least one second atomic layer containing ZrO2.

10. The electronic device according to claim 7, wherein the second ferroelectric layer comprises: At least one first atomic layer containing HfO2; At least one second atomic layer containing ZrO2; And At least one third atomic layer containing HfO2 doped with the dopant or ZrO2 doped with the dopant.

11. The electronic device according to claim 10, wherein among the at least one first atomic layer, the at least one second atomic layer, and the at least one third atomic layer, the at least one third atomic layer is located closest to the second channel region.

12. The electronic device according to claim 10, wherein the at least one third atomic layer has a thickness of 10 nm or less.

13. The electronic device according to claim 7, wherein the amount of the dopant is in the range of 1% to 10%.

14. The electronic device according to claim 7, wherein each of the first channel region and the second channel region includes at least one of Si, Ge, SiGe, III-V semiconductor, oxide semiconductor, nitride semiconductor, oxynitride semiconductor, two-dimensional (2D) material, quantum dot, and organic semiconductor.

15. The electronic device according to claim 7, wherein at least one of the first transistor and the second transistor further includes an insulating layer between the first channel region and the first ferroelectric layer or between the second channel region and the second ferroelectric layer.

16. The electronic device according to claim 7, wherein at least one of the first transistor and the second transistor further includes: an insulating layer between the first ferroelectric layer and the first gate electrode or between the second ferroelectric layer and the second gate electrode; and a conductive layer between the insulating layer and the first ferroelectric layer or between the insulating layer and the second ferroelectric layer.

17. The electronic device according to claim 7, wherein one of the first transistor and the second transistor is a transistor for a logic device, and the other of the first transistor and the second transistor is a transistor for a memory device.

18. A ferroelectric thin film structure, comprising: a semiconductor substrate; and a first ferroelectric layer and a second ferroelectric layer spaced apart from each other on the semiconductor substrate, each of the first ferroelectric layer and the second ferroelectric layer includes a plurality of first atomic layers and a plurality of second atomic layers stacked on each other, the material of the plurality of first atomic layers is different from the material of the plurality of second atomic layers, and the second ferroelectric layer further includes one or more third atomic layers having a dopant.

19. The ferroelectric thin film structure according to claim 18, wherein the plurality of first atomic layers include HfO2, the plurality of second atomic layers include ZrO2, and the one or more third atomic layers include HfO2 or ZrO2.

20. The ferroelectric thin film structure according to claim 18, wherein the dopant includes one of Si, Hf, Zr, Al, La, Y, Sr, and Gd.

21. The ferroelectric thin film structure according to claim 18, wherein each of the one or more third atomic layers has a thickness of 10 nm or less.

22. An electronic device, comprising: the ferroelectric thin film structure according to claim 18; a first transistor including the first ferroelectric layer; and a second transistor including the second ferroelectric layer, wherein the threshold voltage of the first transistor is different from the threshold voltage of the second transistor.

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