A standard error device for calibrating a DC transformer tester

Abstract

The invention relates to a standard error device for calibrating a direct current transformer tester, comprising: a first operational amplifier unit for realizing impedance matching; a second operational amplifier unit for performing voltage ratio conversion to realize voltage matching; a third operational amplifier unit for fine-tuning a voltage ratio coefficient; an input analog voltage signal is sequentially output after voltage fine-tuning through the first operational amplifier unit, the second operational amplifier unit and the third operational amplifier unit; based on a multi-stage series proportional technology of an active operational amplifier, a voltage ratio circuit of the active operational amplifier and a precision series resistor network of a three-stage decimal structure are combined to realize a finely adjustable high-accuracy and high-stability voltage ratio output, and an analog standard error in the range of ±0%-±1% can be output, and the minimum adjustment resolution of the standard error is 0.001%. The device can be used in the calibration of a direct current transformer tester, and as a standard error output device, the standard error value traceability problem of the direct current transformer tester is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of transformer calibration, and more particularly to a standard error device for calibrating a direct current transformer tester. Background Art

[0002] With the rapid development of domestic DC transmission projects and the realization of localized operation and maintenance management of DC converter stations, as an important equipment for DC transformer calibration and testing, DC transformer testers have also been widely used, and the problem of calibration and detection of DC transformer testers has become more prominent. In the calibration of DC transformer testers, the realization of standard error and standard digital protocol messages are two key issues that need to be solved. At present, domestic and foreign research mainly focuses on the calibration technology of transformer testers in the AC field, and there is less research on the calibration technology and equipment of DC transformer testers.

[0003] A method and system for checking a DC transformer calibrator (201811277781.3) proposes a calibration scheme for a DC transformer calibrator, which uses an analog differential superposition unit to superimpose an analog standard error adjustable from ±0.01% to ±1% on the input signal. The invention patent applied for by China Electric Power Research Institute - a calibration device and method for an electronic transformer calibrator based on a digital source (patent number: ZL201210436816.X) uses a standard digital source based on a mathematical method to generate a standard IEC61850 data frame to realize the digital quantity traceability of the electronic transformer calibrator. The standard digital source signal can be output synchronously with the standard analog source after superimposing the ratio difference and the angle difference; the invention patent jointly applied for by Jiangsu Electric Power Company and China Electric Power Research Institute - a calibration device and method for an electronic transformer harmonic calibrator (patent number: ZL201410187562.1) also uses a mathematical formula method to realize the standard digital source that outputs IEC61850 data frames, and cooperates with a harmonic generator that can be traced back to the national harmonic standard to realize the overall calibration of the electronic transformer harmonic calibrator; the standard errors in the above patents are mostly digital standard errors generated based on mathematical formulas, and the analog standard errors do not provide specific technical implementation solutions. Summary of the invention

[0004] The present invention provides a standard error device for calibrating a DC transformer tester to solve the problem of how to solve the error calibration of the DC transformer tester.

[0005] In order to solve the above problem, according to one aspect of the present invention, a standard error device for calibrating a DC transformer tester is provided, the device comprising: a first-stage operational amplifier unit, a second-stage operational amplifier unit and a third-stage operational amplifier unit connected in series in sequence; wherein,

[0006] The first-stage operational amplifier unit is used to achieve impedance matching; the second-stage operational amplifier unit is used to perform voltage ratio conversion to achieve voltage matching; the third-stage operational amplifier unit is used to fine-tune the voltage ratio coefficient; the input analog voltage signal passes through the first-stage operational amplifier unit, the second-stage operational amplifier unit and the third-stage operational amplifier unit in sequence to achieve voltage fine-tuning before output.

[0007] Preferably, the output voltage is:

[0008] U 0 =k 1 ×(1+ε 0 )×U n ,

[0009]

[0010] Among them, U n is the amplitude of the input analog voltage signal; k 1 is the voltage proportional conversion coefficient of the second stage operational amplifier unit; the voltage proportional coefficient of the third stage operational amplifier unit is k 2 =1+ε 0 , ε 0 is the differential coefficient.

[0011] Preferably, the first stage operational amplifier unit comprises: a first operational amplifier A 1 The second operational amplifier unit comprises: a second operational amplifier A 2 , the first resistor R 1 and the second resistor R 2 The third operational amplifier unit comprises: a third operational amplifier A 3 , the third resistor R 3 , the fourth resistor R 4 and the fifth resistor R 5 Among them, A 1 The non-inverting input terminal of the A is connected to the voltage input terminal. 1 The inverting input and output terminals are connected to R 1 One end of R is connected; 1 The other end is connected to R 2 One end and A 2 The inverting input terminal of A is connected; 2 The output terminals are connected to R 2 The other end and R 3 One end of R is connected; 3 The other end is connected to R 4 One end and A 3 The inverting input terminal is connected; R 4 The other end of R 5One end of A is connected; 3 The output terminals are connected to R 5 The other end of A is connected to the voltage output terminal; 3 The non-inverting input terminal and A 2 The non-inverting input terminals are grounded.

[0012] Preferably, the voltage conversion coefficient of the first-stage operational amplifier unit is 1;

[0013] The voltage proportionality coefficient of the second stage operational amplifier unit is: k 1 =R 2 / R 1 ; Voltage proportionality coefficient k 1 is 0.1, 1 or 10, by adjusting R 2 The resistance value is realized;

[0014] The voltage proportionality coefficient of the third-stage operational amplifier unit is: k 2 =(R 4 +R 5 ) / R 3 ; The differential coefficient of the third-stage operational amplifier unit is: ε 0 =(R 4 +R 5 ) / R 3 -1.

[0015] Preferably, the fourth resistor R 4 , including: the first sub-resistance R 4a , the second sub-resistance R 4b and the first polarity switch S 1 The fifth resistor R 5 Including: the first differential resistor R 6 , the second differential resistor R 7 、The third differential resistor R 8 , the second polarity switch S 2 , the third polarity switch S 3 , the fourth polarity switch S 4 , the first differential adjustment switch S A , the second differential adjustment switch S B And the third differential adjustment switch S C ;

[0016] Among them, R 4a One end of R is connected to the other end of R3. 4a The other end is connected to R 4b One end and S 1 One end of R is connected; 4b The other end of S 1 One end of S 1The other end, S A , R 6 , S 2 , R 7 , S 3 , R 8 and S 4 Connect in sequence, the S 4 The output end of is connected to the output end of A3 and the voltage output end respectively;

[0017] The fourth resistor R 4 The size is adjusted by controlling the switch S 1 Implementation; The fifth resistor R 5 The size is adjusted by controlling S 2 , S 3 , S 4 , S A , S B , S C The differential coefficient ε of the third stage operational amplifier unit is realized; 0 The value and polarity are adjusted by adjusting R 4 and R 5 accomplish.

[0018] Preferably, the first differential resistor R 6 , comprising: a first preset number of first resistor units connected in series; the second differential resistor R 7 , comprising: a second preset number of second resistor units connected in series, the third differential resistor R 8 , including: a third preset number of third resistance units connected in series.

[0019] Preferably, the first preset number is 9, the second preset number is 9, the third preset number is 10, and the resistance ratio of the first resistance unit, the second resistance unit and the third resistance unit is 100:10:1. 2 , S 3 , S 4 and S A , S B , S C For resistor R 5 The value of R 5 The adjustment range is 0-1000R 0 , R 0 is the resistance value of the third resistance unit.

[0020] Preferably, the fifth resistor R 5 Adopting three-level decimal structure, respectively by controlling S A , S B and S C Realize the resistor R 5Three-level resolution adjustment control, micro-difference adjustment switch S A , S B and S C The effective contacts of are 10, 10 and 11 respectively, and the contact numbers are 0-9, 0-9 and 0-10 respectively. A It can realize the resistance R 5 Adjust the resolution to 100R 0 ; S B It can realize the resistance R 5 Adjust the resolution to 10R 0 ; S C It can realize the resistance R 5 Adjust the resolution to R 0 .

[0021] Preferably, R is set 4a The resistance is 99000R 0 , R 4b The resistance is 1000R 0 , R 3 The resistance is 100000R 0 , control the differential adjustment switch S A , S B and S C Switch to contact n respectively 1 、n 2 and n 3 , where n 1 、n 2 ∈{0, 1, 2, 3, ... 9}, n 3 ∈{0, 1, 2, 3, ..., 10},

[0022] When the control polarity switch S 1 , S 2 , S 3 and S 4 When switching to contact a at the same time, there is resistance R 4 =100000R 0 , resistor R 5 =100n 1 R 0 +10n 2 R 0 +n 3 R 0 , according to the differential coefficient formula ε 0 =(R 4 +R 5 ) / R 3 -1, the differential coefficient can be calculated as:

[0023] ε 0 =0.1%n 1 +0.01%n2 +0.001%n 3 ,

[0024] When the control polarity switch S 1 , S 2 , S 3 and S 4 When switching to contact b at the same time, there is resistance R 4 =99000R 0 , R 5 =1000R 0 -(100n 1 R 0 +10n 2 R 0 +n 3 R 0 ), the differential coefficient can be calculated as:

[0025] ε 0 =-(0.1%n 1 +0.01%n 2 +0.001%n 3 ),

[0026] By controlling S 1 , S 2 , S 3 and S 4 Adjust the polarity of the differential to control S A , S B and S C The value of the micro-difference is adjusted within a range of ±1%, achieving three levels of adjustment resolution, namely 0.1%, 0.01% and 0.001%.

[0027] Preferably, S A , S B and S C It is a mechanical rotary switch or a programmable digital switch. A With R 6 , S B With R 7 and S C With R 8 Ring distribution is adopted between them, R 6 , R 7 and R 8 The resistors are evenly distributed in the middle of the switch contacts, so that the resistors and contacts are compactly distributed in a ring-like staggered pattern.

[0028] The invention provides a standard error device for calibrating a DC transformer tester, comprising: a first operational amplifier unit for realizing impedance matching; a second operational amplifier unit for performing voltage ratio conversion to realize voltage matching; a third operational amplifier unit for fine-tuning a voltage ratio coefficient; an input analog voltage signal is sequentially output after voltage fine-tuning through the first operational amplifier unit, the second operational amplifier unit and the third operational amplifier unit; a multi-stage series ratio technology based on an active operational amplifier is combined with a voltage ratio circuit of the active operational amplifier and a precision series resistor network of a three-stage decimal structure to realize fine-tunable high-accuracy and high-stability voltage ratio output, and can output an analog standard error in the range of ±0%-±1%, with a minimum adjustment resolution of the standard error of 0.001%. The device can be used in the calibration of a DC transformer tester as a standard error output device in a calibration device, and solves the problem of standard error value traceability of the DC transformer tester. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] A more complete understanding of exemplary embodiments of the present invention may be obtained by referring to the following drawings:

[0030] Figure 1 It is a result schematic diagram of a standard error device 100 for calibrating a DC transformer tester according to an embodiment of the present invention;

[0031] Figure 2 An exemplary diagram of a standard error device for calibrating a DC transformer tester according to an embodiment of the present invention;

[0032] Figure 3 A schematic diagram of a three-level decade series resistor network according to an embodiment of the present invention;

[0033] Figure 4 Schematic diagram of a compact annular staggered distribution structure of resistors and switch contacts according to an embodiment of the present invention. DETAILED DESCRIPTION

[0034] Now, exemplary embodiments of the present invention are described with reference to the accompanying drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. These embodiments are provided to disclose the present invention in detail and completely and to fully convey the scope of the present invention to those skilled in the art. The terms used in the exemplary embodiments shown in the accompanying drawings are not intended to limit the present invention. In the accompanying drawings, the same units / elements are marked with the same reference numerals.

[0035] Unless otherwise specified, the terms (including technical terms) used herein have the commonly understood meanings to those skilled in the art. In addition, it is understood that the terms defined in commonly used dictionaries should be understood to have the same meanings as those in the context of the relevant fields, and should not be understood as idealized or overly formal meanings.

[0036] Figure 1 Schematic diagram of the results of the standard error device 100 for calibrating a DC transformer tester according to an embodiment of the present invention. Figure 1 As shown, the standard error device for calibrating a DC transformer tester provided by the embodiment of the present invention is based on the multi-stage series proportional technology of an active operational amplifier. By combining the voltage proportional circuit of the active operational amplifier with the precision series resistor network of the three-stage decimal structure, it can achieve a fine-tunable high-accuracy and high-stability voltage proportional output, and can output a simulated standard error in the range of ±0.01%-±1%. The minimum adjustment resolution of the standard error is 0.001%, which can be used in the calibration of a DC transformer tester as an output device of the standard error in the calibration device to solve the problem of tracing the standard error value of the DC transformer tester. The standard error device 100 for calibrating a DC transformer tester provided by the embodiment of the present invention includes: a first-stage operational amplifier unit 101, a second-stage operational amplifier unit 102, and a third-stage operational amplifier unit 103 connected in series in sequence.

[0037] Preferably, the first-stage operational amplifier unit 101 is used to achieve impedance matching; the second-stage operational amplifier unit 102 is used to perform voltage ratio conversion to achieve voltage matching; the third-stage operational amplifier unit 103 is used to fine-tune the voltage ratio coefficient; the input analog voltage signal is sequentially passed through the first-stage operational amplifier unit, the second-stage operational amplifier unit and the third-stage operational amplifier unit to achieve voltage fine-tuning before output.

[0038] Preferably, the output voltage is:

[0039] U 0 =k 1 ×(1+ε 0 )×U n ,

[0040]

[0041] Among them, U n is the amplitude of the input analog voltage signal; k 1 is the voltage proportional conversion coefficient of the second stage operational amplifier unit; the voltage proportional coefficient of the third stage operational amplifier unit is k 2 =1+ε 0 , ε 0 is the differential coefficient.

[0042] Preferably, wherein

[0043] The first-stage operational amplifier unit adopts a voltage follower circuit structure;

[0044] The second-stage operational amplifier unit adopts an inverting amplifier circuit structure;

[0045] The third-stage operational amplifier unit adopts an inverting amplifier circuit structure.

[0046] Specifically, combined Figure 2 As shown, the standard error device for calibrating a DC transformer tester of the present invention is mainly composed of three operational amplifier units, and the three operational amplifier units are connected in series. The main function of the first-stage operational amplifier unit is impedance matching; the main function of the second-stage operational amplifier unit is voltage ratio conversion to achieve voltage matching; the main function of the third-stage operational amplifier unit is voltage ratio coefficient fine adjustment, and the voltage ratio coefficient fine adjustment is achieved by adjusting the differential coefficient. The first-stage operational amplifier unit adopts a voltage follower circuit structure, and the second and third-stage operational amplifier units adopt an inverting amplifier circuit structure.

[0047] The main function of the standard error device used for calibrating the DC transformer tester is to output the input analog voltage signal after the voltage following of the first-stage operational amplifier unit, the voltage ratio conversion of the second-stage operational amplifier unit, and the voltage ratio fine-tuning of the third-stage operational amplifier unit. Assume that the amplitude of the analog voltage signal input to the standard error device is U n , the voltage proportional conversion coefficient of the second stage operational amplifier unit is k 1 , the voltage proportionality coefficient of the third stage operational amplifier unit is k 2 =1+ε 0 , ε 0 is the differential coefficient, then the standard error device output is U 0 =k 1 ×(1+ε 0 )×U n , the differential coefficient is:

[0048]

[0049] Preferably, the first stage operational amplifier unit comprises: a first operational amplifier A 1 The second operational amplifier unit comprises: a second operational amplifier A 2 , the first resistor R 1 and the second resistor R 2 The third operational amplifier unit comprises: a third operational amplifier A 3 , the third resistor R3 , the fourth resistor R 4 and the fifth resistor R 5 Among them, A 1 The non-inverting input terminal of the A is connected to the voltage input terminal. 1 The inverting input and output terminals are connected to R 1 One end of R is connected; 1 The other end is connected to R 2 One end and A 2 The inverting input terminal of A is connected; 2 The output terminals are connected to R 2 The other end and R 3 One end of R is connected; 3 The other end is connected to R 4 One end and A 3 The inverting input terminal is connected; R 4 The other end of R 5 One end of A is connected; 3 The output terminals are connected to R 5 The other end of A is connected to the voltage output terminal; 3 The non-inverting input terminal and A 2 The non-inverting input terminals are grounded.

[0050] Preferably, the voltage conversion coefficient of the first-stage operational amplifier unit is 1;

[0051] The voltage proportionality coefficient of the second stage operational amplifier unit is: k 1 =R 2 / R 1 ; Voltage proportionality coefficient k 1 is 0.1, 1 or 10, by adjusting R 2 The resistance value is realized;

[0052] The voltage proportionality coefficient of the third-stage operational amplifier unit is: k 2 =(R 4 +R 5 ) / R 3 ; The differential coefficient of the third-stage operational amplifier unit is: ε 0 =(R 4 +R 5 ) / R 3 -1.

[0053] Combination Figure 2 As shown, in the present invention, the first stage operational amplifier unit is mainly composed of an operational amplifier chip (first operational amplifier) ​​A 1 The voltage conversion coefficient is 1; the second stage operational amplifier unit is mainly composed of an operational amplifier chip (second operational amplifier) ​​A 2 , resistor R1 and R 2 Composition, its voltage proportionality coefficient k 1 =R 2 / R 1 The third stage operational amplifier unit is mainly composed of an operational amplifier chip (third operational amplifier) ​​A 3 , resistor R 3 , R 4 and R 5 Composition, its voltage proportionality coefficient k 2 =(R 4 +R 5 ) / R 3 , where the resistor R 1 , R 2 , R 3 , R 4 and R 5 It can be a single resistor or composed of multiple resistors.

[0054] The voltage proportionality factor of the second stage operational amplifier unit can be adjusted by adjusting the resistor R 2 The voltage proportionality coefficient k 1 It can be adjusted to 0.1, 1 or 10. The differential coefficient ε of the third stage operational amplifier unit 0 =(R 4 +R 5 ) / R 3 -1, its adjustment range is ±1%, then its voltage proportional coefficient adjustment range is 1±1%, and its differential coefficient adopts three-level adjustment, and the adjustment resolutions of the three-level differential coefficient adjustment are 0.1%, 0.01% and 0.001% respectively.

[0055] Preferably, the fourth resistor R 4 , including: the first sub-resistance R 4a , the second sub-resistance R 4b and the first polarity switch S 1 The fifth resistor R 5 Including: the first differential resistor R 6 , the second differential resistor R 7 、The third differential resistor R 8 , the second polarity switch S 2 , the third polarity switch S 3 , the fourth polarity switch S 4 , the first differential adjustment switch S A , the second differential adjustment switch S B And the third differential adjustment switch S C ;

[0056] Among them, R 4a One end of R is connected to the other end of R3.4a The other end is connected to R 4b One end and S 1 One end of R is connected; 4b The other end of S 1 One end of S 1 The other end, S A , R 6 , S 2 , R 7 , S 3 , R 8 and S 4 Connect in sequence, the S 4 The output end of is connected to the output end of A3 and the voltage output end respectively;

[0057] The fourth resistor R 4 The size is adjusted by controlling the switch S 1 Implementation; The fifth resistor R 5 The size is adjusted by controlling S 2 , S 3 , S 4 , S A , S B , S C The differential coefficient ε of the third stage operational amplifier unit is realized; 0 The value and polarity are adjusted by adjusting R 4 and R 5 accomplish.

[0058] Preferably, the first differential resistor R 6 , comprising: a first preset number of first resistor units connected in series; the second differential resistor R 7 , comprising: a second preset number of second resistor units connected in series, the third differential resistor R 8 , including: a third preset number of third resistance units connected in series.

[0059] Preferably, the first preset number is 9, the second preset number is 9, the third preset number is 10, and the resistance ratio of the first resistance unit, the second resistance unit and the third resistance unit is 100:10:1. 2 , S 3 , S 4 and S A , S B , S C For resistor R 5 The value of R 5 The adjustment range is 0-1000R 0 , R 0 is the resistance value of the third resistance unit.

[0060] Preferably, the fifth resistor R 5 Adopting three-level decimal structure, respectively by controlling S A , S B and S C Realize the resistor R 5 Three-level resolution adjustment control, micro-difference adjustment switch S A , S B and S C The effective contacts of are 10, 10 and 11 respectively, and the contact numbers are 0-9, 0-9 and 0-10 respectively. A It can realize the resistance R 5 Adjust the resolution to 100R 0 ; S B It can realize the resistance R 5 Adjust the resolution to 10R 0 ; S C It can realize the resistance R 5 Adjust the resolution to R 0 .

[0061] Preferably, R is set 4a The resistance is 99000R 0 , R 4b The resistance is 1000R 0 , R 3 The resistance is 100000R 0 , control the differential adjustment switch S A , S B and S C Switch to contact n respectively 1 、n 2 and n 3 , where n 1 、n 2 ∈{0, 1, 2, 3, ... 9}, n 3 ∈{0, 1, 2, 3, ..., 10},

[0062] When the control polarity switch S 1 , S 2 , S 3 and S 4 When switching to contact a at the same time, there is resistance R 4 =100000R 0 , resistor R 5 =100n 1 R 0 +10n 2 R 0 +n 3 R 0 , according to the differential coefficient formula ε 0 =(R 4 +R5 ) / R 3 -1, the differential coefficient can be calculated as:

[0063] ε 0 =0.1%n 1 +0.01%n 2 +0.001%n 3 ,

[0064] When the control polarity switch S 1 , S 2 , S 3 and S 4 When switching to contact b at the same time, there is resistance R 4 =99000R 0 , R 5 =1000R 0 -(100n 1 R 0 +10n 2 R 0 +n 3 R 0 ), the differential coefficient can be calculated as:

[0065] ε 0 =-(0.1%n 1 +0.01%n 2 +0.001%n 3 ),

[0066] By controlling S 1 , S 2 , S 3 and S 4 Adjust the polarity of the differential to control S A , S B and S C The value of the micro-difference is adjusted within a range of ±1%, achieving three levels of adjustment resolution, namely 0.1%, 0.01% and 0.001%.

[0067] In the present invention, the differential coefficient ε of the third-stage operational amplifier unit is 0 The value and polarity are adjusted by adjusting the resistor R 4 and resistor R 5 Achieved. Figure 3 As shown, the resistor R 4 By the resistor R 4a , R 4b and switch S 1 Composition, resistance R 5 By the resistor R 6 , R 7 , R 8 and switch S 2 , S3 , S 4 , S A , S B , S C Composition. Resistor R 4 The regulation is achieved by controlling the switch S 1 Realized; resistance R 5 The regulation is achieved by controlling the switch S 2 , S 3 , S 4 , S A , S B , S C The switch S 1 , S 2 , S 3 and S 4 For polarity switch, switch S A , S B and S C For the differential adjustment switch, the resistor R 6 , R 7 , R 8 is a micro differential resistor.

[0068] Differential coefficient ε 0 The polarity adjustment is achieved by controlling four polarity switches S 1 , S 2 , S 3 and S 4 The four polarity switches are controlled in linkage and can be switched to contact a or contact b at the same time. When the differential coefficient is adjusted to positive polarity, the four polarity switches are controlled to switch to contact a at the same time. At this time, the resistor R 4 =R 4a +R 4b ; When the differential coefficient is adjusted to negative polarity, the four polarity switches are controlled to switch to contact b at the same time. At this time, the resistor R 4 =R 4a .

[0069] Differential coefficient ε 0 The value is adjusted by adjusting the resistor R 5 By controlling the three differential adjustment switches S A , S B and S C The contact position is used to adjust the resistance R 5 value, thereby realizing the adjustment of the differential coefficient.

[0070] The resistor R 5 In the middle, the differential resistor R 8 The resistance is R 0 The resistors are connected in series, and the differential resistor R 7 It is composed of 9 resistors with a value of 10R0 The resistors are connected in series, and the differential resistor R 6 It is composed of 9 resistors with a value of 100R 0 The resistors are connected in series. By controlling the polarity of the switch S 2 , S 3 , S 4 And three differential adjustment switches S A , S B , S C For resistor R 5 The value of the resistor R 5 The adjustment range is 0-1000R 0 .

[0071] Resistor R 5 The three-level decimal structure is adopted, and three differential adjustment switches S are controlled respectively. A , S B and S C Realize the resistor R 5 Three-level resolution adjustment control. Micro differential adjustment switch S A , S B and S C The effective contacts of are 10, 10 and 11 respectively, and the contact numbers are 0-9, 0-9 and 0-10 respectively. A The achievable resistance R 5 Adjust the resolution to 100R 0 ; Control switch S B The achievable resistance R 5 Adjust the resolution to 10R 0 ; Control switch S C The achievable resistance R 5 Adjust the resolution to R 0 .

[0072] The differential adjustment principle of the standard error device used for calibration of DC transformer tester is as follows: 4a The resistance is 99000R 0 , R 4b The resistance is 1000R 0 , R 3 The resistance is 100000R 0 . Control the differential adjustment switch S A , S B and S C Switch to contact n respectively 1 、n 2 and n 3 When n 1 、n 2 ∈{0, 1, 2, 3, ... 9}, n 3∈{0, 1, 2, 3...10}, when the control polarity switch S 1 , S 2 , S 3 and S 4 At the same time, they switch to contact a, then there is resistance R 4 =100000R 0 , resistor R 5 =100n 1 R 0 +10n 2 R 0 +n 3 R 0 , according to the differential coefficient formula ε 0 =(R 4 +R 5 ) / R 3 -1, the differential coefficient can be calculated:

[0073] ε 0 =0.1%n 1 +0.01%n 2 +0.001%n 3 (1)

[0074] When the control polarity switch S 1 , S 2 , S 3 and S 4 At the same time, it switches to contact b, then there is resistance R 4 =99000R 0 , R 5 =1000R 0 -(100n 1 R 0 +10n 2 R 0 +n 3 R 0 ), the differential coefficient can be calculated:

[0075] ε 0 =-(0.1%n 1 +0.01%n 2 +0.001%n 3 ) (2)

[0076] By controlling the polarity switch S 1 , S 2 , S 3 and S 4 Adjust the polarity of the micro-difference; control the micro-difference adjustment switch S A , S B and S CThe adjustment range of the differential value is ±1%, with three levels of adjustment resolution, namely 0.1%, 0.01% and 0.001%. By optimizing the temperature coefficient and precision of each resistor, a differential coefficient with high accuracy and high stability can be obtained.

[0077] Preferably, S A , S B and S C It is a mechanical rotary switch or a programmable digital switch. A With R 6 , S B With R 7 and S C With R 8 Ring distribution is adopted between them, R 6 , R 7 and R 8 The resistors are evenly distributed in the middle of the switch contacts, so that the resistors and contacts are compactly distributed in a ring-like staggered pattern.

[0078] like Figure 4 As shown, in the present invention, the resistor R 5 In the middle, the differential adjustment switch S A , S B and S C It is a mechanical rotary switch or a programmable digital switch. A With the differential resistor R 6 , switch S B With the differential resistor R 7 , switch S C With the differential resistor R 8 Adopting annular distribution (similar to the attached Figure 3 , attached Figure 3 For S C With R 8 Distribution diagram of the differential resistor R 6 , R 7 , R 8 The resistors are distributed in the middle of the switch contacts, so that the resistors and contacts are compactly distributed in a ring-shaped staggered pattern, reducing the influence of the lead resistance.

[0079] The standard error device for calibrating a DC transformer tester of the present invention is based on the multi-stage series proportional technology of active operational amplifiers, and realizes a standard differential output with a range of ±1% and a minimum adjustment resolution of 0.001%. The device can be used in the calibration of a DC transformer tester as an output device of the standard error in the calibration device, and solves the problem of tracing the standard error value of the DC transformer tester.

[0080] The standard error device for DC transformer calibration in this patent is generally used in the calibration of DC transformer calibrators. As a standard device for standard analog differential output in the calibration device, it solves the problem of standard error value traceability of DC transformer calibrators. The standard error device is also suitable for error compensation and error adjustment devices of DC transformers with analog output on site. It can perform error compensation or error indication on DC transformers with abnormal errors, facilitating the operation and maintenance of DC transformers on site.

[0081] The invention has been described above with reference to a few embodiments. However, it is readily apparent to a person skilled in the art that other embodiments than the ones disclosed above are equally within the scope of the invention, as defined by the appended patent claims.

[0082] Generally, all terms used in the claims are to be interpreted according to their ordinary meaning in the technical field, unless explicitly defined otherwise herein. All references to "a / said / the [means, components, etc.]" are to be openly interpreted as at least one instance of the means, components, etc., unless explicitly stated otherwise. The steps of any method disclosed herein do not necessarily have to be performed in the exact order disclosed, unless explicitly stated otherwise.

[0083] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0084] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0085] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0086] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0087] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the relevant field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A standard error device for calibrating a DC transformer tester, characterized in that: The device comprises: a first-stage operational amplifier unit, a second-stage operational amplifier unit and a third-stage operational amplifier unit connected in series in sequence; wherein, The first-stage operational amplifier unit is used to achieve impedance matching; the second-stage operational amplifier unit is used to perform voltage ratio conversion to achieve voltage matching; the third-stage operational amplifier unit is used to fine-tune the voltage ratio coefficient; the input analog voltage signal is sequentially output after voltage fine-tuning through the first-stage operational amplifier unit, the second-stage operational amplifier unit and the third-stage operational amplifier unit; Wherein, the first-stage operational amplifier unit includes: a first operational amplifier A1; the second-stage operational amplifier unit includes: a second operational amplifier A2, a first resistor R1 and a second resistor R2; the third-stage operational amplifier unit includes: a third operational amplifier A3, a third resistor R3, a fourth resistor R4 and a fifth resistor R5; wherein the in-phase input terminal of A1 is connected to the voltage input terminal, and the inverting input terminal and the output terminal of A1 are both connected to one end of R1; the other end of R1 is respectively connected to one end of R2 and the inverting input terminal of A2; The output end of A2 is connected to the other end of R2 and one end of R3 respectively; the other end of R3 is connected to one end of R4 and the inverting input end of A3 respectively; the other end of R4 is connected to one end of R5; the output end of A3 is connected to the other end of R5 and the voltage output end respectively; the in-phase input end of A3 and the in-phase input end of A2 are both grounded; the voltage proportional coefficient of the third-stage operational amplifier unit is: k2=(R4+R5) / R3; the differential coefficient of the third-stage operational amplifier unit is: ε0=(R4+R5) / R3-1; The fourth resistor R4 includes: a first sub-resistance R 4a , the second sub-resistance R 4b and a first polarity switch S1; the fifth resistor R5 includes: a first differential resistor R6, a second differential resistor R7, a third differential resistor R8, a second polarity switch S2, a third polarity switch S3, a fourth polarity switch S4, a first differential adjustment switch S A , the second differential adjustment switch S B And the third differential adjustment switch S C ; Among them, R 4a One end of R is connected to the other end of R3. 4a The other end is connected to R 4b One end of R is connected to one end of S1; 4b The other end of S1 is connected to one end of S1; the other end of S1, S A , R6, S2, R7, S3, R8 and S4 are connected in sequence, and the output end of S4 is connected to the output end of A3 and the voltage output end respectively; The size of the fourth resistor R4 is adjusted by controlling the switch S1; the size of the fifth resistor R5 is adjusted by controlling S2, S3, S4, S A , S B , S C Implementation: The value and polarity adjustment of the differential coefficient ε0 of the third-stage operational amplifier unit are achieved by adjusting R4 and R5.

2. The device according to claim 1, characterized in that The output voltage is: U0=k1×(1+ε0)×U n , Among them, U n is the amplitude of the input analog voltage signal; k1 is the voltage proportional conversion coefficient of the second-stage operational amplifier unit; the voltage proportional coefficient of the third-stage operational amplifier unit is k2=1+ε0, ε0 is the differential coefficient.

3. The device according to claim 1, characterized in that The voltage conversion coefficient of the first-stage operational amplifier unit is 1; The voltage proportionality coefficient of the second-stage operational amplifier unit is: k1=R2 / R1; the voltage proportionality coefficient k1 is 0.1, 1 or 10, which is achieved by adjusting the resistance value of R2.

4. The device according to claim 1, characterized in that The first differential resistor R6 includes: a first preset number of first resistor units connected in series; the second differential resistor R7 includes: a second preset number of second resistor units connected in series; the third differential resistor R8 includes: a third preset number of third resistor units connected in series.

5. The device according to claim 4, characterized in that The first preset number is 9, the second preset number is 9, the third preset number is 10, and the resistance ratio of the first resistance unit, the second resistance unit and the third resistance unit is 100:10:

1. A , S B , S C The value of the resistor R5 is adjusted to achieve an adjustment range of R5 of 0-1000R0, where R0 is the resistance value of the third resistor unit.

6. The device according to claim 1, characterized in that The fifth resistor R5 adopts a three-level decimal structure, respectively by controlling S A , S B and S C Realize the three-level resolution adjustment control of resistor R5 and the micro-difference adjustment switch S A , S B and S C The effective contacts of are 10, 10 and 11 respectively, and the contact numbers are 0-9, 0-9 and 0-10 respectively. A The resistor R5 can adjust the resolution to 100R0; S B The resistor R5 can adjust the resolution to 10R0; S C The resistor R5 can adjust the resolution to R0.

7. The device according to claim 1, characterized in that Setting up R 4a The resistance value is 99000R0, R 4b The resistance of R is 1000R0, the resistance of R3 is 100000R0, and the control differential adjustment switch S A , S B and S C Switch to contacts n1, n2 and n3 respectively, where n1, n2∈{0, 1, 2, 3...9}, n3∈{0, 1, 2, 3...10}, When the control polarity switches S1, S2, S3 and S4 are switched to contact a at the same time, there is resistance R4 = 100000R0, resistance R5 = 100n1R0 + 10n2R0 + n3R0, according to the differential coefficient formula ε0 = (R4 + R5) / R3-1, the differential coefficient can be calculated as: ε0=0.1%n1+0.01%n2+0.001%n3, When the control polarity switches S1, S2, S3 and S4 are switched to contact b at the same time, there are resistances R4 = 99000R0, R5 = 1000R0-(100n1R0+10n2R0+n3R0), and the differential coefficient can be calculated as: <h2 style=";text-align:left;direction:ltr">ε0 = -(0.1%n1+0.01%n2+0.001%n3), By controlling S1, S2, S3 and S4, the polarity of the differential can be adjusted. A , S B and S C The value of the micro-difference is adjusted within a range of ±1%, achieving three levels of adjustment resolution, namely 0.1%, 0.01% and 0.001%.

8. The device according to claim 1, characterized in that S A , S B and S C It is a mechanical rotary switch or a programmable digital switch. A With R6, S B With R7 and S C A ring distribution is adopted between R6, R7 and R8, and each resistor in R6, R7 and R8 is evenly distributed in the middle position of the switch contact, so that the resistor and the contact are compactly distributed in a ring-like staggered manner.

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