A server motherboard monitoring management system and method based on FPGA

Abstract

The present invention discloses a server motherboard monitoring management system and method based on FPGA, the system includes an FPGA module and a server motherboard, the server motherboard is provided with a power module, a PWM modulation module, a motherboard fan and a plurality of data processing modules located in different areas on the server motherboard; each of the data processing modules includes a power management chip, a CPU processor, a voltage acquisition module and a temperature sensor; the FPGA module is used to adjust the voltage output by the power management chip to the CPU processor; at the same time, according to the information collected by the temperature sensor in each data processing module, the output duty cycle of the PWM control module is controlled, thereby adjusting the speed of the motherboard fan. The present invention can monitor and manage the temperature and power supply voltage of each CPU in the server motherboard during the operation of the server motherboard, and ensure the normal operation of the server motherboard.

Description

Technical Field

[0001] The present invention relates to FPGA, and in particular to a server mainboard monitoring management system and method based on FPGA. Background Art

[0002] With the rapid development of my country's economy, computer communication and application technology are widely used in all walks of life, providing a strong basic driving force for the sustainable development of my country's economy. Therefore, computer communication and application technology has developed from the initial basic data processing and numerical calculation to an application technology with artificial intelligence, edge computing, industrial control and other intelligent technologies.

[0003] With the continuous development of computer communication and application technology, the industry using servers is becoming more and more extensive. The environment in which they are used is also becoming more diverse and complex. At present, during the operation of the server motherboard, it is impossible to adjust the server motherboard well according to the specific situation for monitoring and management, which is not conducive to the normal and stable operation of the server motherboard. Summary of the invention

[0004] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a server motherboard monitoring management system and method based on FPGA, which can monitor and manage the temperature and power supply voltage of each CPU in the server motherboard during the operation of the server motherboard to ensure the normal operation of the server motherboard.

[0005] The object of the present invention is achieved through the following technical solutions: a server motherboard monitoring and management system based on FPGA, comprising an FPGA module and a server motherboard, wherein the server motherboard is provided with a power supply module, a PWM modulation module, a motherboard fan and a plurality of data processing modules located in different areas on the server motherboard;

[0006] Each of the data processing modules includes a power management chip, a CPU processor, a voltage acquisition module and a temperature sensor; the power supply input end of the power management chip is connected to the power module, and the power supply output end of the power management chip is respectively connected to the CPU processor and the temperature processor; the voltage acquisition module is used to collect the voltage output by the power management chip to the CPU processor and transmit it to the FPGA module; the temperature sensor is used to collect the temperature information of the CPU processor and transmit it to the FPGA module; the power supply input end of the PWM modulation module is connected to the power module, and the output end of the PWM modulation module is connected to the mainboard fan; the FPGA module is also respectively connected to the control input end of the power management chip and the control input end of the PWM modulation module;

[0007] The FPGA module is used to save the power supply range of the CPU processor in each data processing module, and when receiving the actual power supply voltage from the voltage acquisition module in any data processing module, it determines whether the CPU processor in the data processing module is undervoltage or overvoltage. When undervoltage or overvoltage occurs, the voltage output by the power management chip to the CPU processor is adjusted; at the same time, according to the information collected by the temperature sensor in each data processing module, the output duty cycle of the PWM control module is controlled, thereby adjusting the speed of the mainboard fan.

[0008] A server motherboard monitoring and management method based on FPGA includes the following steps:

[0009] S1. Before the server motherboard starts working, the FPGA module is programmed so that the FPGA module saves the normal temperature parameters of the CPU and the normal power supply voltage range of the CPU processor in each data processing module;

[0010] S2. During the operation of the server motherboard, the CPU temperature information collected by the temperature sensor in each data processing module and the CPU power supply voltage information collected by the voltage acquisition module are transmitted to the FPGA module in real time;

[0011] S3. The FPGA module transmits the received information together with the real-time clock information to the management background through the communication module, and performs CPU temperature monitoring and power supply monitoring management.

[0012] Furthermore, the temperature monitoring management described in step S3 includes the following sub-steps:

[0013] A01.FPGA module counts the temperature information collected by the temperature sensors in each data processing module;

[0014] Assume that the normal temperature parameters of the CPU include: standard temperature value x a , maximum temperature value x max and the minimum temperature x min ;The standard duty cycle of the PWM modulation module is K1;

[0015] The temperature information collected by the temperature sensors in each data processing module are x1, x2, ..., x N , where N represents the number of data processing modules;

[0016] A02. Determine x1, x2, …, x N Is there a value greater than x? max Temperature value:

[0017] If yes, the FPGA module outputs a control instruction to control the output duty cycle of the PWM modulation module so that the output duty cycle of the PWM is 100%;

[0018] If not, go to step A03;

[0019] A03. Determine x1, x2, …, x N Is there a value less than x? min Temperature value:

[0020] If yes, the FPGA module outputs a control instruction to control the output duty cycle of the PWM modulation module so that the output duty cycle of the PWM is 0%;

[0021] If not, go to step A04;

[0022] A04. Calculate x1, x2, …, x N The average

[0023]

[0024] A05. Calculate the average value With the standard temperature value x a The temperature error α between:

[0025]

[0026] A06. Calculate the target duty cycle K2 based on the standard duty cycle K1 and the temperature error α:

[0027] K2 = K1*(1+α);

[0028] A07.FPGA module outputs control instructions to control the output duty cycle of the PWM modulation module, so that the output duty cycle of PWM is K2;

[0029] A08. At different times when the server motherboard is working, repeat steps A01 to A07 to achieve continuous temperature management during the working process.

[0030] Furthermore, the power supply monitoring management described in step S3 includes the following sub-steps:

[0031] B01. For any CPU processor, assume that the normal power supply voltage range is m1 to m2, and the voltage collected by the voltage acquisition module in the data processing module where the CPU processor is located is m;

[0032] B02. When m is lower than m1, the FPGA module considers that an undervoltage condition has occurred, and generates a control instruction to control the power management chip to increase the power supply voltage output to the CPU processor so that m is between m1 and m2; when m is higher than m2, the FPGA module considers that an overvoltage condition has occurred, and generates a control instruction to control the power management chip to reduce the power supply voltage output to the CPU processor so that m is between m1 and m2;

[0033] B03 for each CPU processor, repeat steps B01 ~ B02, to achieve power supply monitoring management of the CPU processor in each data processing module;

[0034] B04. Repeat steps B01 to B03 at different times when the server motherboard is working, and continuously monitor and manage the power supply during the operation of the server motherboard.

[0035] The beneficial effects of the present invention are as follows: the present invention can monitor and manage the temperature and power supply voltage of each CPU in the server mainboard during the operation of the server mainboard, thereby ensuring the normal operation of the server mainboard; at the same time, the FPGA module can transmit the received CPU temperature information, voltage information and information collected by the three-dimensional acceleration sensor to the management background through the communication module, thereby facilitating the management background to perform comprehensive analysis. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a system principle block diagram of the present invention;

[0037] Figure 2 The present invention is a flow chart of the method. DETAILED DESCRIPTION

[0038] The technical solution of the present invention is further described in detail below in conjunction with the accompanying drawings, but the protection scope of the present invention is not limited to the following.

[0039] like Figure 1 As shown, a server motherboard monitoring and management system based on FPGA includes an FPGA module and a server motherboard, wherein the server motherboard is provided with a power supply module, a PWM modulation module, a motherboard fan and a plurality of data processing modules located in different areas of the server motherboard;

[0040] Each of the data processing modules includes a power management chip, a CPU processor, a voltage acquisition module and a temperature sensor; the power supply input end of the power management chip is connected to the power module, and the power supply output end of the power management chip is respectively connected to the CPU processor and the temperature processor; the voltage acquisition module is used to collect the voltage output by the power management chip to the CPU processor and transmit it to the FPGA module; the temperature sensor is used to collect the temperature information of the CPU processor and transmit it to the FPGA module; the power supply input end of the PWM modulation module is connected to the power module, and the output end of the PWM modulation module is connected to the mainboard fan; the FPGA module is also respectively connected to the control input end of the power management chip and the control input end of the PWM modulation module;

[0041] The FPGA module is used to save the power supply range of the CPU processor in each data processing module, and when receiving the actual power supply voltage from the voltage acquisition module in any data processing module, it determines whether the CPU processor in the data processing module is undervoltage or overvoltage. When undervoltage or overvoltage occurs, the voltage output by the power management chip to the CPU processor is adjusted; at the same time, according to the information collected by the temperature sensor in each data processing module, the output duty cycle of the PWM control module is controlled, thereby adjusting the speed of the mainboard fan.

[0042] In an embodiment of the present application, the server motherboard monitoring and management system further includes a real-time clock module, which is connected to the FPGA module to provide real-time clock information; the server motherboard monitoring and management system further includes a communication module, which is connected to the FPGA module, and the FPGA module sends the data collected by the voltage acquisition module and the temperature sensor in each data processing module together with the real-time clock information to the remote management background through the output communication module. The communication module includes a 3G or 4G communication module. A three-dimensional acceleration sensor is also provided on the server motherboard, and the output end of the three-dimensional acceleration sensor is connected to the FPGA module, and the FPGA module sends the information collected by the three-dimensional acceleration sensor together with the real-time clock information to the remote management background; the power supply input end of the three-dimensional acceleration sensor is connected to the power module.

[0043] like Figure 2 As shown, a server motherboard monitoring and management method based on FPGA includes the following steps:

[0044] S1. Before the server motherboard starts working, the FPGA module is programmed so that the FPGA module saves the normal temperature parameters of the CPU and the normal power supply voltage range of the CPU processor in each data processing module;

[0045] S2. During the operation of the server motherboard, the CPU temperature information collected by the temperature sensor in each data processing module and the CPU power supply voltage information collected by the voltage acquisition module are transmitted to the FPGA module in real time;

[0046] S3. The FPGA module transmits the received information together with the real-time clock information to the management background through the communication module, and performs CPU temperature monitoring and power supply monitoring management.

[0047] The temperature monitoring management described in step S3 includes the following sub-steps:

[0048] A01.FPGA module counts the temperature information collected by the temperature sensors in each data processing module;

[0049] Assume that the normal temperature parameters of the CPU include: standard temperature value x a , maximum temperature value x max and the minimum temperature x min ;The standard duty cycle of the PWM modulation module is K1;

[0050] The temperature information collected by the temperature sensors in each data processing module are x1, x2, ..., x N , where N represents the number of data processing modules;

[0051] A02. Determine x1, x2, …, x N Is there a value greater than x? max Temperature value:

[0052] If yes, the FPGA module outputs a control instruction to control the output duty cycle of the PWM modulation module so that the output duty cycle of the PWM is 100%;

[0053] If not, go to step A03;

[0054] A03. Determine x1, x2, …, x N Is there a value less than x? min Temperature value:

[0055] If yes, the FPGA module outputs a control instruction to control the output duty cycle of the PWM modulation module so that the output duty cycle of the PWM is 0%;

[0056] If not, go to step A04;

[0057] A04. Calculate x1, x2, …, x N The average

[0058]

[0059] A05. Calculate the average value With the standard temperature value x a The temperature error α between:

[0060]

[0061] A06. Calculate the target duty cycle K2 based on the standard duty cycle K1 and the temperature error α:

[0062] K2 = K1*(1+α);

[0063] A07.FPGA module outputs control instructions to control the output duty cycle of the PWM modulation module, so that the output duty cycle of PWM is K2;

[0064] A08. At different times when the server motherboard is working, repeat steps A01 to A07 to achieve continuous temperature management during the working process.

[0065] The power supply monitoring management described in step S3 includes the following sub-steps:

[0066] B01. For any CPU processor, assume that the normal power supply voltage range is m1 to m2, and the voltage collected by the voltage acquisition module in the data processing module where the CPU processor is located is m;

[0067] B02. When m is lower than m1, the FPGA module considers that an undervoltage condition has occurred, and generates a control instruction to control the power management chip to increase the power supply voltage output to the CPU processor so that m is between m1 and m2; when m is higher than m2, the FPGA module considers that an overvoltage condition has occurred, and generates a control instruction to control the power management chip to reduce the power supply voltage output to the CPU processor so that m is between m1 and m2;

[0068] B03 for each CPU processor, repeat steps B01 ~ B02, to achieve power supply monitoring management of the CPU processor in each data processing module;

[0069] B04. Repeat steps B01 to B03 at different times when the server motherboard is working, and continuously monitor and manage the power supply during the operation of the server motherboard.

[0070] The above description shows and describes a preferred embodiment of the present invention, but as mentioned above, it should be understood that the present invention is not limited to the form disclosed herein, and should not be regarded as excluding other embodiments, but can be used in various other combinations, modifications and environments, and can be modified within the scope of the invention concept described herein through the above teachings or the technology or knowledge of the relevant field. And the changes and modifications made by those skilled in the art do not depart from the spirit and scope of the present invention, and should be within the scope of protection of the claims attached to the present invention.

Claims

1. A server motherboard monitoring and management system based on FPGA, characterized in that: It includes an FPGA module and a server mainboard, wherein the server mainboard is provided with a power supply module, a PWM modulation module, a mainboard fan and a plurality of data processing modules located in different areas of the server mainboard; Each of the data processing modules includes a power management chip, a CPU processor, a voltage acquisition module and a temperature sensor; the power supply input end of the power management chip is connected to the power module, and the power supply output end of the power management chip is respectively connected to the CPU processor and the temperature processor; the voltage acquisition module is used to collect the voltage output by the power management chip to the CPU processor and transmit it to the FPGA module; the temperature sensor is used to collect the temperature information of the CPU processor and transmit it to the FPGA module; the power supply input end of the PWM modulation module is connected to the power module, and the output end of the PWM modulation module is connected to the mainboard fan; the FPGA module is also respectively connected to the control input end of the power management chip and the control input end of the PWM modulation module; The FPGA module is used to save the power supply range of the CPU processor in each data processing module, and when receiving the actual power supply voltage from the voltage acquisition module in any data processing module, it determines whether the CPU processor in the data processing module is undervoltage or overvoltage. When undervoltage or overvoltage occurs, the voltage output by the power management chip to the CPU processor is adjusted; at the same time, according to the information collected by the temperature sensor in each data processing module, the output duty cycle of the PWM control module is controlled, thereby adjusting the speed of the mainboard fan: The FPGA module counts the temperature information collected by the temperature sensors in each data processing module; Assume that the normal temperature parameters of the CPU include: standard temperature value x a , maximum temperature value x max and the minimum temperature x min ;The standard duty cycle of the PWM modulation module is K1; The temperature information collected by the temperature sensors in each data processing module are x1, x2, ..., x N , where N represents the number of data processing modules; Determine x1,x2,…,x N Is there a value greater than x? max Temperature value: If yes, the FPGA module outputs a control instruction to control the output duty cycle of the PWM modulation module so that the output duty cycle of the PWM is 100%; If not, go to the next step and judge x1, x2, ..., x N Is there a value less than x? min Temperature value: If yes, the FPGA module outputs a control instruction to control the output duty cycle of the PWM modulation module so that the output duty cycle of the PWM is 0%; If not, go to the next step and calculate x1, x2, …, x N The average Calculate the average With the standard temperature value x a The temperature error α between: According to the standard duty cycle K1 and the temperature error α, the target duty cycle K2 is calculated: K2 = K1*(1+α); The FPGA module outputs a control instruction to control the output duty cycle of the PWM modulation module, so that the output duty cycle of the PWM is K2; Repeated adjustments are performed at different times when the server motherboard is working to achieve continuous temperature management during the working process.

2. The FPGA-based server motherboard monitoring and management system according to claim 1, characterized in that: The server motherboard monitoring and management system further comprises a real-time clock module, which is connected to the FPGA module and is used to provide real-time clock information.

3. The FPGA-based server motherboard monitoring and management system according to claim 2, characterized in that: The server motherboard monitoring and management system also includes a communication module, which is connected to the FPGA module. The FPGA module sends the data collected by the voltage acquisition module and the temperature sensor in each data processing module together with the real-time clock information to the remote management background through the output communication module.

4. The FPGA-based server motherboard monitoring and management system according to claim 3, characterized in that: The communication module includes a 3G or 4G communication module.

5. The FPGA-based server motherboard monitoring and management system according to claim 2, characterized in that: The server mainboard is also provided with a three-dimensional acceleration sensor, the output end of which is connected to the FPGA module, and the FPGA module sends the information collected by the three-dimensional acceleration sensor together with the real-time clock information to the remote management background; The power supply input terminal of the three-dimensional acceleration sensor is connected to the power supply module.

6. A server motherboard monitoring and management method based on FPGA, based on the system according to any one of claims 1 to 5, characterized in that: The following steps are involved: S1. Before the server motherboard starts working, the FPGA module is programmed so that the FPGA module saves the normal temperature parameters of the CPU and the normal power supply voltage range of the CPU processor in each data processing module; S2. During the operation of the server motherboard, the CPU temperature information collected by the temperature sensor in each data processing module and the CPU power supply voltage information collected by the voltage acquisition module are transmitted to the FPGA module in real time; S3. The FPGA module transmits the received information together with the real-time clock information to the management background through the communication module, and performs CPU temperature monitoring and power supply monitoring management.

7. The FPGA-based server motherboard monitoring and management method according to claim 6, characterized in that: The temperature monitoring management described in step S3 includes the following sub-steps: A01.FPGA module counts the temperature information collected by the temperature sensors in each data processing module; Assume that the normal temperature parameters of the CPU include: standard temperature value x a , maximum temperature value x max and the minimum temperature x min ;The standard duty cycle of the PWM modulation module is K1; The temperature information collected by the temperature sensors in each data processing module are x1, x2, ..., x N , where N represents the number of data processing modules; A02. Determine x1, x2, …, x N Is there a value greater than x? max Temperature value: If yes, the FPGA module outputs a control instruction to control the output duty cycle of the PWM modulation module so that the output duty cycle of the PWM is 100%; If not, go to step A03; A03. Determine x1, x2, …, x N Is there a value less than x? min Temperature value: If yes, the FPGA module outputs a control instruction to control the output duty cycle of the PWM modulation module so that the output duty cycle of the PWM is 0%; If not, go to step A04; A04. Calculate x1, x2, …, x N The average A05. Calculate the average value With the standard temperature value x a The temperature error α between: A06. Calculate the target duty cycle K2 based on the standard duty cycle K1 and the temperature error α: K2 = K1*(1+α); A07.FPGA module outputs control instructions to control the output duty cycle of the PWM modulation module, so that the output duty cycle of PWM is K2; A08. At different times when the server motherboard is working, repeat steps A01 to A07 to achieve continuous temperature management during the working process.

8. The FPGA-based server motherboard monitoring and management method according to claim 6, characterized in that: The power supply monitoring management described in step S3 includes the following sub-steps: B01. For any CPU processor, assume that the normal power supply voltage range is m1 to m2, and the voltage collected by the voltage acquisition module in the data processing module where the CPU processor is located is m; B02. When m is lower than m1, the FPGA module considers that an undervoltage condition has occurred, and generates a control instruction to control the power management chip to increase the power supply voltage output to the CPU processor so that m is between m1 and m2; when m is higher than m2, the FPGA module considers that an overvoltage condition has occurred, and generates a control instruction to control the power management chip to reduce the power supply voltage output to the CPU processor so that m is between m1 and m2; B03 for each CPU processor, repeat steps B01 ~ B02, to achieve power supply monitoring management of the CPU processor in each data processing module; B04. Repeat steps B01 to B03 at different times when the server motherboard is working, and continuously monitor and manage the power supply during the operation of the server motherboard.

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