Reference current determination method, device and storage medium for non-volatile storage unit

Abstract

The present invention discloses a reference current determination method, device and storage medium of a non-volatile storage unit, wherein the reference current determination method comprises: receiving a test reference current instruction sent by a test machine, the test reference current instruction comprises a minimum gear number; generating a plurality of reference current values ​​of different gears; traversing the reference current values ​​to perform a read operation on a storage chip, and respectively performing a read operation verification on the storage chip, recording the gear number, maximum reference current value and minimum reference current value of the reference current value that can pass the verification; when the gear number is greater than or equal to the minimum current gear number, determining the best reference current value applied to the storage chip according to the maximum reference current value and the minimum reference current value. The method of the present invention can be applied to enable storage chips with different production processes to set reference current values ​​according to their own internal actual conditions, thereby compensating for the performance differences caused by factors such as production process fluctuations and improving the reliability of the chip.

Description

Technical Field

[0001] The present invention relates to the technical field of memory chips, and in particular to a method and device for determining a reference current of a non-volatile memory unit and a storage medium. Background Art

[0002] When performing a read operation on a memory cell of a non-volatile memory chip, a reference current is usually used to compare with the read current of the memory cell to indicate the data stored in the memory cell (for example, when the read current of the memory cell is greater than the reference current, it indicates that the stored data is 1, and when the read current of the memory cell is less than the reference current, it indicates that the stored data is 0). Therefore, the setting of the reference current is crucial to the correct reading of the data. Under the prior art, the reference current is usually set during the CP test (Circuit Probing Test) phase of mass production of memory chips. First, a circuit is designed in the memory chip to generate a series of reference current values. Then, a relatively good reference current for the read operation is obtained based on the batch chip engineering test data and the experience of engineers, and it is used as the reference current for the factory setting of this batch of memory chips.

[0003] However, due to differences in production processes, actual optimal reference current values ​​of different memory chips are not the same. Using the above setting method will make the reference current values ​​of some memory chips not optimal, affecting the accuracy of the read operation. Summary of the invention

[0004] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0005] The embodiments of the present invention provide a method, device and storage medium for determining the reference current of a non-volatile storage unit, so that each storage chip can set the reference current value according to its own internal actual situation, thereby compensating for the performance differences caused by factors such as production process fluctuations and improving the reliability of the chip.

[0006] In a first aspect, an embodiment of the present invention provides a reference current determination method, which is applied to a mass production test phase of a memory chip. The reference current determination method includes:

[0007] Receiving a test reference current instruction sent by a test machine, wherein the test reference current instruction includes a minimum number of gears;

[0008] Generate a number of different reference current values;

[0009] Traversing the reference current values ​​to perform a read operation on the storage chip, and performing a read operation check on the storage chip respectively, recording the number of gears of the reference current value that can pass the check, the maximum reference current value that can pass the check, and the minimum reference current value that can pass the check;

[0010] When the gear number is greater than or equal to the minimum current gear number, an optimal reference current value applied to the memory chip is determined according to the maximum reference current value and the minimum reference current value.

[0011] The reference current determination method provided by the embodiment of the present invention has at least the following beneficial effects: a minimum number of gears is set in the test reference current instruction, so that during the test process, the memory chips are screened in a manner such that the number of gears of the reference current value that passes the data verification meets the minimum number of gears; on the other hand, for the memory chips that meet the minimum number of gears, the optimal reference current value is determined based on the maximum reference current value and the minimum reference current value that can pass the verification, and the optimal reference current value obtained is suitable for the current memory chip. Therefore, the problems caused by the traditional batch setting of reference current values ​​according to the experience of engineers can be avoided, so that memory chips with different production processes can set the reference current value according to their own internal actual conditions, thereby compensating for the performance differences caused by factors such as production process fluctuations and improving the reliability of the chip.

[0012] In some embodiments, the test reference current instruction further includes a verification data instruction code, and the verification data instruction code is used to instruct writing data for read operation verification into the memory chip.

[0013] In some embodiments, the reference current values ​​of the several different gears vary linearly in magnitude.

[0014] In some embodiments, the traversing the reference current values ​​to perform a read operation on a memory chip and performing a read operation verification on each memory chip include:

[0015] Start traversing from the reference current value of the lowest gear;

[0016] Each time through, the currently selected reference current value is used as the current reference current value, a read operation is performed on the storage chip with the current reference current value, and a data check is performed on the read data.

[0017] In some embodiments, the recording of the number of gears of the reference current value that can pass the verification, the maximum reference current value that can pass the verification, and the minimum reference current value that can pass the verification includes:

[0018] When the read operation corresponding to the current reference current value passes the check, the number of gears is increased by one;

[0019] If the read operation check corresponding to the current reference current value is the first read operation check passed during this traversal process, the current reference current value is recorded as the minimum reference current value and the maximum reference current value;

[0020] If the current reference current value is greater than the maximum reference current value, the current reference current value is recorded as the maximum reference current value.

[0021] In some embodiments, determining the optimal reference current value applied to the memory chip according to the maximum reference current value and the minimum reference current value includes:

[0022] Determine a median gear between the maximum reference current value and the minimum reference current value according to the gear of the reference current value;

[0023] offsetting the median gear position according to a preset offset rule;

[0024] The reference current value obtained by the offset is used as the optimal reference current value.

[0025] In some embodiments, after obtaining the optimal reference current value, the method further includes:

[0026] receiving a reference current value solidification instruction sent by the test machine;

[0027] The optimal reference current value is fixed to the parameter configuration area of ​​the memory chip according to the reference current value fixing instruction.

[0028] In some embodiments, it also includes:

[0029] When the number of gears is less than the minimum number of current gears, an error message is returned to the testing machine.

[0030] In a second aspect, an embodiment of the present invention further provides a reference current determination device, comprising at least one processor and a memory for communicating with the at least one processor; the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the reference current determination method as described in the first aspect.

[0031] In a third aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute the reference current determination method as described in the first aspect.

[0032] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The accompanying drawings are used to provide a further understanding of the technical solution of the present invention and constitute a part of the specification. Together with the examples of the present invention, they are used to explain the technical solution of the present invention and do not constitute a limitation on the technical solution of the present invention.

[0034] Figure 1 is an overall flow chart of a reference current determination method provided by an embodiment of the present invention;

[0035] Figure 2 is a flow chart of a method for traversing reference current values ​​provided by an embodiment of the present invention;

[0036] Figure 3 is a flow chart for recording the number of gear positions, the minimum reference current value and the maximum reference current value provided by an embodiment of the present invention;

[0037] Figure 4 is a flow chart of a method for determining an optimal reference current value provided by an embodiment of the present invention;

[0038] Figure 5 is a flow chart of a method for curing an optimal reference current value provided by an embodiment of the present invention;

[0039] Figure 6 is an overall flow chart of a reference current determination method provided by an example of the present invention;

[0040] Figure 7 It is a schematic diagram of module connections of a reference current determination device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0041] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0042] An embodiment of the present invention provides a method, device and storage medium for determining the reference current of a non-volatile memory cell. The method calculates the optimal reference current value suitable for the current memory cell based on the maximum reference current value and the minimum reference current value tested in the memory cell, thereby compensating for the performance differences caused by factors such as production process fluctuations and improving the reliability of the chip.

[0043] The embodiments of the present invention are further described below in conjunction with the accompanying drawings.

[0044] Reference Figure 1 An embodiment of the present invention provides a reference current determination method, which is applied to the mass production test stage of a memory chip. The reference current determination method includes but is not limited to the following steps S100, S200, S300 and S400.

[0045] Step S100, receiving a test reference current instruction sent by a test machine, the test reference current instruction including a minimum gear number;

[0046] Step S200, generating a plurality of different reference current values;

[0047] Step S300, traversing the reference current values ​​to perform a read operation on the storage chip, and performing a read operation verification on the storage chip respectively, recording the number of gears of the reference current value that can pass the verification, the maximum reference current value that can pass the verification, and the minimum reference current value that can pass the verification;

[0048] Step S400: When the number of gears is greater than or equal to the minimum number of current gears, determine the best reference current value applied to the memory chip according to the maximum reference current value and the minimum reference current value.

[0049] Non-volatile memory units are widely used in current mainstream storage products. Non-volatile memory units are produced through semiconductor processes. During the production process, multiple memory chips are divided from a wafer. After the memory chips pass the test, they are shipped out of the factory and assembled into storage products.

[0050] During the mass production test of memory chips, the tester contacts the memory chips for mass production test. For example, metal needles contact the contacts on the memory chips. The tester sends test instructions to the memory chips and receives the results returned by the memory chips to determine whether the memory chips pass the test. The above test is usually called CP test (Circuit Probing Test). During the CP test, one of the links is to set the reference current for the memory chip. At present, the reference current is usually set based on the test data of the batch memory chips in the CP test and the experience of engineers, and the reference current is applied to the memory chips in the batch. Obviously, even for the same batch of memory chips, due to the influence of the production process, the optimal reference current suitable for different memory chips is not the same. The reference current set above is not optimal for some memory chips, which affects the read operation of these memory chips.

[0051] In order to solve the above-mentioned problem of inaccurate reference current, the present application determines the optimal reference current value according to the maximum reference current value and the minimum reference current value recorded by each memory chip during the test during the CP test process. Specifically, when the memory chip is connected to the test machine, a test reference current instruction sent by the test machine is received, and the reference current test is started according to the test reference current instruction. Among them, the test reference current instruction can be composed according to the following instruction format:

[0052] Instruction code + verification data selection code + minimum number of gears

[0053] The instruction code is used to store chip identification test items, the verification data selection code is used to store the chip to generate corresponding verification data (related to the pre-processed written custom data), and judge whether the data read out by the read operation is correct based on the verification data. The minimum gear number is used for the storage chip to judge whether the gear number verified by the read operation meets the requirements.

[0054] It is understandable that the memory chip undergoing CP test must first undergo a pre-processing process before the reference current test; the pre-processing process includes multiple cycles of erasing and writing of the entire chip, writing of test data, and high-temperature baking. For example, in some cases, multiple cycles of erasing and writing include multiple erasing and programming of all memory cells of the memory chip, and the number of cycles usually ranges from a few to hundreds of times depending on the requirements; writing of test data is based on different requirements, such as writing all 0 data, all 1 data, or random data; high-temperature baking is based on different requirements to set different baking temperatures and baking times, such as baking at 250 degrees Celsius for 2 hours. After the above pre-processing, the memory chip can be connected to the test machine to start testing.

[0055] After receiving the test reference current instruction, the memory chip generates several different reference current values ​​in the internal circuit. The reference current values ​​change according to a certain rule. For example, the reference current values ​​are linearly changed in an arithmetic progression. The reference current value of the lowest gear is 1mA, and the reference current value of the highest gear is 20mA. The reference current value is divided into 20 gears according to the difference of 1mA between each gear, which are 1mA, 2mA, 3mA, 4mA, ..., 20mA. The above gear division is conducive to the subsequent sequential traversal of the reference current values.

[0056] Among them, each gear reference current value is used for the read operation of the storage chip, and the data obtained by each read operation is compared with the verification data generated by the verification data selection code. Passing the verification indicates that the reference current value of the current gear is valid. It can be seen that when a read operation and a read operation verification are performed on the reference current values ​​of all gears, it is possible to determine which reference current values ​​have passed the verification, thereby determining the gear number, maximum reference current value and minimum reference current value of the reference current values ​​that have passed the verification.

[0057] It is understandable that, since the test reference current instruction specifies the minimum number of gears, after traversing all reference current values, if it is found that the number of gears of the reference current that has passed the verification is less than the minimum number of gears, it indicates that there is a serious problem with the current memory chip, and an error message needs to be returned to the tester. If it is found that the number of gears of the reference current that has passed the verification is greater than or equal to the minimum number of gears, it indicates that the current memory chip has passed the data verification, and then the optimal reference current value is determined based on the maximum reference current value and the minimum reference current value. It is understandable that the optimal reference current value obtained in this test is related to the maximum reference current value and the minimum reference current value of the current memory chip. Therefore, the optimal reference current value is applicable to the current memory chip, and is obtained by considering the influence of factors such as the production process. It is the reference current value that is most suitable for read operations that matches the current memory chip, and ensures the accuracy of the memory chip when performing read operations.

[0058] In step S300, the reference current value is traversed to perform a read operation on the memory chip, and the read operation verification is performed on the memory chip respectively. Figure 2 , specifically including but not limited to the following steps S310 and S320:

[0059] Step S310, traversing from the lowest reference current value;

[0060] Step S320 , each time the currently selected reference current value is used as the current reference current value, a read operation is performed on the storage chip with the current reference current value, and a data check is performed on the read data.

[0061] Since the reference current value changes linearly, in order to facilitate the determination of the maximum reference current value and the minimum reference current value, step S310 is used to traverse from low to high according to the reference current value. Each time the reference current value of the current gear is read and verified, the reference current value of the current gear is used as the current reference current value; after completing the read operation and read operation verification corresponding to the current reference current value, increase the reference current value by one gear, and use the reference current value after increasing by one gear as the current reference current value until the maximum reference current value is reached.

[0062] It is understandable that in step S300, the number of gears of the reference current value that can pass the verification, the maximum reference current value that can pass the verification, and the minimum reference current value that can pass the verification are recorded. Figure 3 , specifically including but not limited to the following steps S330, S340 and S350:

[0063] Step S330, when the read operation corresponding to the current reference current value passes the verification, the number of gears is increased by one;

[0064] Step S340, if the read operation check corresponding to the current reference current value is the first read operation check passed during this traversal process, the current reference current value is recorded as the minimum reference current value and the maximum reference current value;

[0065] Step S350: if the current reference current value is greater than the maximum reference current value, the current reference current value is recorded as the maximum reference current value.

[0066] According to the traversal method of the aforementioned steps S310 and S320, a read operation and a read operation verification are performed each time a reference current value is selected, and the verification result of the reference current value of the current gear is obtained and recorded at the same time. If the verification result is passed, the number of gears increases by one; in the process of traversing the reference current values, the verification result is passed for the first time, and the current reference current value is set as the minimum reference current value and the maximum reference current value at the same time. Since the reference current value of the subsequent gear must be higher than the reference current value used when the first verification passes, the maximum reference current value is updated during the verification process of the subsequent gears; if the subsequent gears cannot pass the verification, it means that only one reference current has passed the test, and the minimum reference current value and the maximum reference current value are equal at this time; if the reference current value of the subsequent gear has passed the verification, the maximum reference current value is updated once each time the verification passes until the current reference current value reaches the highest gear.

[0067] Reference Figure 4 After obtaining the minimum reference current value and the maximum reference current value, the optimal reference current value may be determined in the following manner, that is, in step S400, the optimal reference current value applied to the memory chip is determined according to the maximum reference current value and the minimum reference current value, including but not limited to the following steps S410, S420 and S430:

[0068] Step S410, determining a median gear between a maximum reference current value and a minimum reference current value according to the gear of the reference current value;

[0069] Step S420, shifting the median gear position according to a preset shift rule;

[0070] Step S430 , the reference current value obtained by shifting is used as the optimal reference current value.

[0071] First, the median gear is determined according to the minimum reference current value and the maximum reference current value. The median gear can be the average of the minimum reference current value and the maximum reference current value, or the gear in the middle position can be selected according to the gear distribution; after the median gear is selected, the gear is adjusted according to the preset offset rule. For example, the 20 gear reference current values ​​from small to large are 1mA, 2mA, 3mA, 4mA, ..., 20mA. When the minimum reference current value and the maximum reference current value are 9mA and 14mA respectively, and the median The gear uses the average of the minimum reference current value and the maximum reference current value, so the median gear is 11.5mA. In order to match the initial setting gear, the median gear is offset by 0.5mA and rounded to 11mA or 12mA; or, when the minimum reference current value and the maximum reference current value are the following 5 gears: 10mA, 11mA, 12mA, 13mA and 14mA, then the 12mA in the middle can be used as the median gear, and then offset by 1mA to obtain the best reference current gear. It can be understood that the offset value can be any value including 0, and engineers can choose a reasonable offset value according to the test situation, so that the offset median gear is closer to the actual best reference current value of the memory chip.

[0072] Reference Figure 5 It can be understood that after obtaining the optimal reference current value in step S400, the following steps are also included:

[0073] Step S500, receiving a reference current value solidification instruction sent by a test machine;

[0074] Step S600 , fixing the optimal reference current value to the parameter configuration area of ​​the memory chip according to the reference current value fixing instruction.

[0075] After determining the optimal reference current value of the memory chip, the optimal reference current value needs to be solidified; when determining that the current memory chip has passed the test, the tester receives the information that the memory chip has passed the test, and the tester sends a reference current value solidification instruction to the memory chip. After the memory chip receives the reference current value solidification instruction, the calculated optimal reference current value is written into the parameter configuration area of ​​the memory chip. After that, the optimal reference current value is read out to set the memory chip each time the memory chip is powered on.

[0076] Through the above-mentioned reference current determination method, different optimal reference currents can be determined for different memory chips, which makes up for the performance differences caused by fluctuations in the production process of the memory chip and improves the reliability of the chip. On the other hand, since the determination of the optimal reference current is calculated inside the memory chip, and does not need to be calculated by the tester and then sent to the memory chip for curing, the workload of the tester is reduced. Therefore, the reference current determination method of the present application is also applicable to testers with different performances.

[0077] The embodiment of the present invention is described below with a practical example:

[0078] During the CP test phase, the memory chip receives a test reference current instruction sent by the tester. The format of the test reference current instruction is instruction code + verification data selection code + minimum gear number, where the minimum gear number is used to provide the memory chip with a standard for determining whether it can pass the read operation verification.

[0079] Reference Figure 6 After receiving the test reference current instruction, the pre-processed storage chip generates several different reference current values ​​through the internal circuit. The generated reference current values ​​change linearly according to the size relationship. For each reference current value, a read operation and data verification are performed, that is, data is read according to the reference current value of the current gear, and the read data is compared with the verification data to determine whether the reference current value of the current gear is suitable for the read operation; if the verification fails, it indicates that the reference current value of the current gear does not meet the requirements; if the verification passes, it indicates that the reference current value of the current gear meets the requirements. At this time, the number of gears is increased by one. If the reference current value of the current gear corresponds to the first time passing the verification, the minimum reference current value and the maximum reference current value are set as the reference current value of the current gear; if the reference current value of the current gear does not correspond to the first time passing the verification, the maximum reference current value is updated.

[0080] It is understandable that each time a reference current value is tested, a gear is added for the next test until the reference current value reaches the highest gear. When all reference current values ​​are tested, the number of gears, the minimum reference current value and the maximum reference current value corresponding to the current memory chip can be obtained; when the number of gears is greater than or equal to the minimum number of gears, the memory chip is considered qualified, and the optimal current value is determined based on the median gear between the minimum reference current value and the maximum reference current value and the offset. If the number of gears is less than the minimum number of gears, an error message is returned.

[0081] After determining the optimal reference current value, the memory chip returns the test result to the tester, and the tester returns the curing instruction to the memory chip after receiving the test result. After receiving the curing instruction, the memory chip writes the optimal reference current value into the parameter configuration area of ​​the memory chip.

[0082] The optimal reference current value is determined and solidified by the above method, and can be set for different memory chips. Compared with the traditional method of setting reference current in batches, the present application compensates for the impact of production process differences and improves the reliability of memory chips under read operations.

[0083] An embodiment of the present invention also provides a reference current determination device, comprising at least one processor and a memory for communicating with the at least one processor; the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the aforementioned reference current determination method.

[0084] Reference Figure 7 , taking the control processor 1001 and memory 1002 in device 1000 as an example that can be connected via a bus. Memory 1002, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer executable programs. In addition, memory 1002 may include a high-speed random access memory, and may also include a non-transitory memory, such as at least one disk memory, a flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory 1002 may optionally include a memory remotely arranged relative to control processor 1001, and these remote memories may be connected to device 1000 via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0085] Those skilled in the art will understand that Figure 7 The device structure shown in the figure does not constitute a limitation on the apparatus 1000 , and may include more or less components than shown in the figure, or combine certain components, or arrange the components differently.

[0086] The embodiment of the present invention further provides a computer-readable storage medium, which stores computer-executable instructions, and the computer-executable instructions are executed by one or more control processors, for example, Figure 7 The one or more control processors 1001 in the embodiment of the present invention may be executed to enable the one or more control processors to execute the reference current determination method in the above method embodiment, for example, to execute the above described Figure 1 Steps S100 to S400 of the method, Figure 2 Steps S310 to S320 of the method, Figure 3 Steps S330 to S350 of the method, Figure 4 Steps S410 to S430 of the method and Figure 5 The method comprises steps S500 to S600.

[0087] The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separated, that is, they may be located in one place or distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0088] It will be appreciated by those skilled in the art that all or some of the steps and systems in the disclosed method above may be implemented as software, firmware, hardware and appropriate combinations thereof. Some physical components or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor or a microprocessor, or may be implemented as hardware, or may be implemented as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or a non-transitory medium) and a communication medium (or a temporary medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage or other magnetic storage devices, or any other medium that may be used to store desired information and may be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media typically embodies computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0089] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the above-mentioned implementation mode. Technical personnel familiar with the field can also make various equivalent deformations or substitutions without violating the spirit of the present invention. These equivalent deformations or substitutions are all included in the scope defined by the claims of the present invention.

Claims

1. A method for determining a reference current of a non-volatile memory cell, applied to a mass production test phase of a memory chip, the method comprising: Receiving a test reference current instruction sent by a test machine, wherein the test reference current instruction includes a minimum number of gears; Generate a number of different reference current values; Starting from the lowest gear, traversing the reference current values, performing a read operation on the storage chip, and performing a read operation verification on the storage chip respectively, recording the number of gears of the reference current value that can pass the verification, the maximum reference current value that can pass the verification, and the minimum reference current value that can pass the verification; When the number of gears is greater than or equal to the minimum number of current gears, determining an optimal reference current value applied to the memory chip according to the maximum reference current value and the minimum reference current value; When the number of gears is less than the minimum number of current gears, an error message is returned to the testing machine.

2. The reference current determination method according to claim 1, characterized in that: The test reference current instruction also includes a verification data instruction code, and the verification data instruction code is used to instruct writing data for read operation verification into the storage chip.

3. The reference current determination method according to claim 1, characterized in that: The reference current values ​​of the plurality of gears which are different from each other vary linearly in magnitude.

4. The reference current determination method according to any one of claims 1 to 3, characterized in that: The step of traversing the reference current values ​​from the lowest level to perform a read operation on the memory chip and performing a read operation check on the memory chip respectively includes: Start traversing from the reference current value of the lowest gear; Each time through, the currently selected reference current value is used as the current reference current value, a read operation is performed on the storage chip with the current reference current value, and a data check is performed on the read data.

5. The reference current determination method according to claim 4, characterized in that: The recording of the number of gears of the reference current value that can pass the verification, the maximum reference current value that can pass the verification, and the minimum reference current value that can pass the verification includes: When the read operation corresponding to the current reference current value passes the check, the number of gears is increased by one; If the read operation check corresponding to the current reference current value is the first read operation check passed during this traversal process, the current reference current value is recorded as the minimum reference current value and the maximum reference current value; If the current reference current value is greater than the maximum reference current value, the current reference current value is recorded as the maximum reference current value.

6. The reference current determination method according to claim 1, characterized in that: The determining the optimal reference current value applied to the memory chip according to the maximum reference current value and the minimum reference current value comprises: Determine a midpoint between the maximum reference current value and the minimum reference current value according to the reference current value; offsetting the median gear position according to a preset offset rule; The reference current value obtained by the offset is used as the optimal reference current value.

7. The reference current determination method according to claim 1, characterized in that: After obtaining the optimal reference current value, the method further includes: receiving a reference current value solidification instruction sent by the test machine; The optimal reference current value is fixed to the parameter configuration area of ​​the memory chip according to the reference current value fixing instruction.

8. A reference current determination device, characterized in that: comprising at least one processor and a memory for communicatively connecting to the at least one processor; The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the reference current determination method according to any one of claims 1 to 7.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute the reference current determination method according to any one of claims 1 to 7.

Images