Technology used to process the device

Abstract

Embodiments of the present application relate to techniques for processing devices. Representative techniques provide process steps for forming a microelectronic assembly, including preparing microelectronic components such as dies, wafers, substrates, etc. for bonding. One or more surfaces of the microelectronic components are formed and prepared as bonding surfaces. The microelectronic components are stacked and bonded at the prepared bonding surfaces without adhesives.

Description

[0001] Divisional Application Instructions

[0002] This application is a divisional application of a Chinese invention patent application with an international application date of January 31, 2019, which entered the Chinese national phase on August 14, 2020, with national application number 201980013695.8 and title “Technology for Processing Devices”.

[0003] Priority claims and cross-references to related applications

[0004] This application claims the benefit under 35 USC §119(e)(1) of U.S. Non-Provisional Patent Application No. 16 / 262,489, filed on January 30, 2019, and U.S. Provisional Patent Application No. 62 / 631,216, filed on February 15, 2018, which are hereby incorporated by reference in their entirety. Technical Field

[0005] The following description relates to integrated circuits ("ICs"). More particularly, the following description relates to manufacturing IC dies and wafers. Background Art

[0006] Microelectronic components typically include a thin plate of semiconductor material such as silicon or gallium arsenide, which is commonly referred to as a semiconductor wafer. The wafer can be formed to include multiple integrated chips or dies on the surface of the wafer and / or partially embedded in the wafer. The dies separated from the wafer are usually provided as separate pre-packaged units. In some packaging designs, the dies are mounted to a substrate or chip carrier, which is then mounted on a circuit panel such as a printed circuit board (PCB). For example, many dies are provided in a package suitable for surface mounting.

[0007] Packaged semiconductor dies may also be provided in a "stacked" arrangement, where one package is provided, for example, on a circuit board or other carrier, and another package is mounted on top of the first package. These arrangements may allow multiple different dies to be mounted within a single footprint on a circuit board, and may further facilitate high speed operation by providing short interconnections between packages. Typically, this interconnection distance may be only slightly greater than the thickness of the die itself. In order to achieve interconnections within the die package stack, interconnect structures for mechanical and electrical connections may be provided on both sides (e.g., faces) of each die package (except the topmost package).

[0008] Additionally, the die or wafers may be stacked in a three-dimensional arrangement as part of various microelectronic packaging schemes. This may include stacking one or more layers of die, devices, and / or wafers on a larger base die, device, wafer, substrate, etc., stacking multiple die or wafers in a vertical or horizontal arrangement, and various combinations of both. The die or wafers may be bonded in a stacked arrangement using a variety of bonding techniques, including direct dielectric bonding, non-adhesive techniques such as or a combination of techniques such as Both technologies are available from Invensas Bonding Technologies, Inc. (formerly Ziptronix, Inc.), an Xperi Corporation (see, e.g., U.S. Patents 6,864,585 and 7,485,968, which are incorporated herein by reference in their entireties).

[0009] There may be a variety of challenges in achieving stacked die and wafer arrangements. When stacked die are bonded using direct bonding or hybrid bonding techniques, it is generally desirable that the surfaces of the die to be bonded be extremely flat, smooth, and clean. For example, generally speaking, the surface should have very low surface topology variance and have a low content of impurities, particles, or other residues. Removal of particles or residues can improve the cleanliness and flatness of the surface and the reliability of bonding between layers, however, removal of particles and residues can sometimes be problematic. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The detailed description is set forth with reference to the accompanying drawings. In the figures, the leftmost digit(s) of a reference number identifies the figure in which the reference number first appears. The use of the same reference numerals in different figures indicates similar or identical items.

[0011] For this discussion, the devices and systems shown in the figures are shown as having multiple components. As described herein, various embodiments of the devices and / or systems may include fewer components and still be within the scope of the present disclosure. Alternatively, other embodiments of the devices and / or systems may include additional components or various combinations of the described components and still be within the scope of the present disclosure.

[0012] Figure 1A An exemplary cross-sectional view of a substrate and two dies is shown before the dies are bonded to the substrate.

[0013] Figure 1B An exemplary cross-sectional view of a substrate and two dies after bonding the dies to the substrate is shown.

[0014] Figure 1C An exemplary cross-sectional view of a substrate and bonding multiple dies to the substrate is shown.

[0015] Figure 2is a flow chart illustrating an exemplary process for preparing a substrate for bonding according to an embodiment.

[0016] Figure 3 is a flow chart illustrating an exemplary process for preparing a die for bonding according to an embodiment.

[0017] Figure 4 is a flow chart illustrating another exemplary process for preparing a die for bonding according to an embodiment.

[0018] Figure 5 is a flow chart illustrating another exemplary process for preparing a die for bonding according to an embodiment.

[0019] Fig. 6A is a flow chart illustrating an exemplary process for preparing a substrate for bonding according to an embodiment.

[0020] Figure 6B is a flow chart illustrating an exemplary process for preparing a die for bonding according to an embodiment.

[0021] Fig. 7A is a flow chart illustrating another exemplary process for preparing a substrate for bonding according to an embodiment.

[0022] Figure 7B is a flow chart illustrating another exemplary process for preparing a die for bonding according to an embodiment. Summary of the invention

[0023] Representative techniques and devices are disclosed, including process steps for forming novel microelectronic assemblies. The process includes preparing microelectronic components, such as dies, wafers, substrates, etc., for bonding. In various embodiments, one or more surfaces of the microelectronic components are formed and prepared as bonding surfaces. The microelectronic components can be stacked and bonded at the prepared bonding surfaces without the need for adhesives.

[0024] In various embodiments, a method for forming a microelectronic assembly includes preparing a bonding surface of a first substrate, including planarizing the bonding surface of the first substrate to have a first predetermined minimum surface variance, and plasma activating the bonding surface of the first substrate. The method also includes preparing the first bonding surface of a second substrate, including planarizing the first bonding surface of the second substrate to have a second predetermined minimum surface variance.

[0025] In an embodiment, the method includes mounting a second substrate to a dicing sheet or a dicing tape held by a dicing frame, and singulating the second substrate into a plurality of dies while mounting the second substrate to the dicing sheet or the dicing tape. Each of the plurality of dies has a first bonding surface formed by a portion of the first bonding surface of the second substrate.

[0026] The method may include handling the plurality of dies while mounting the plurality of dies to a dicing sheet or a dicing tape, selecting a die from the plurality of dies using a pick and place tool, and directly bonding a first bonding surface of the die to a bonding surface of a first substrate without an adhesive and without activating the first bonding surface of the die.

[0027] In additional embodiments, techniques and methods include preparing a second substrate or a backside of multiple dies (or a single die) for bonding an additional die (or multiple additional dies) to the bonded die.

[0028] In some embodiments, a unique set of processing steps is used to clean the bonding surface of the first substrate and / or the second substrate or the die. For example, in some embodiments, one or more unique formulations may be used for cleaning. In other embodiments, a megasonic transducer and / or a mechanical brush may be used to assist in cleaning.

[0029] In alternative embodiments, the bonding surface of one or more of the substrate or the die may be coated with one or more protective coatings during processing. For example, in one embodiment, a separate protective coating may render the bonding surface hydrophobic or hydrophilic. The coating may prevent contamination of the bonding surface, damage to the bonding surface during processing, etc. One or more of the coatings may be removed during other process steps. Additionally, one or more of the processing tools for processing components may be coated or formed to be hydrophobic as a technique to prevent contamination of the cleaning components during processing.

[0030] The present invention discusses various specific implementations and arrangements with reference to electrical and electronic components and variable carriers. Although specific components (i.e., tube core, wafer, integrated circuit (IC), chip tube core, substrate, etc.) are mentioned, this is not intended to be limiting, but for the convenience of discussion and explanation. The techniques and devices discussed with reference to wafers, tube cores, substrates, etc. are applicable to any type or quantity of electronic components, circuits (e.g., integrated circuits (IC), hybrid circuits, ASICs, memory devices, processors, etc.), component groups, packaged components, structures (e.g., wafers, panels, boards, PCBs, etc.), etc., which can be coupled to each other and to external circuits, systems, carriers, etc. Each of these different components, circuits, groups, packages, structures, etc. can be collectively referred to as "microelectronic components". For simplicity, unless otherwise specified, a component that is coupled to another component will be referred to as a "tube core" in this article, and another component to which the tube core is coupled will be referred to as a "substrate" in this article.

[0031] The embodiments are explained in more detail below using a number of examples.Although various embodiments and examples are discussed here and below, other embodiments and examples are possible by combining features and elements of the various embodiments and examples. DETAILED DESCRIPTION

[0032] Overview

[0033] See also Figure 1A-Figure 1C In various examples, techniques for processing devices to be stacked and directly or closely bonded are disclosed. The present disclosure describes an exemplary process including bonding one or more dies 102 to a substrate 104. However, the process can also be used to bond wafer to wafer, die to die, die to wafer, etc. The schematic diagrams in the accompanying drawings show some processes for forming and preparing a substrate 104 (and in particular a bonding surface 108 of the substrate 104) for bonding, and other processes for forming and preparing one or more dies 102 (and in particular bonding surfaces 106 and 110 of the dies 102) for bonding to the substrate 104 and to other dies 102. At the end of these processes, one or more dies 102 are bonded (e.g., directly bonded without an adhesive) to the substrate 104 or another die 102. Bonding is a spontaneous process that occurs under ambient conditions when two surfaces (106 and 108 and / or 106 and 110) are brought together.

[0034] A cross-sectional view showing an exemplary die 102 and an exemplary substrate 104 is shown in FIG. Figure 1A-Figure 1C Shown at. Figure 1A shows the die 102 and substrate 104 prior to bonding, and Figure 1B The die 102 and substrate 104 are shown after bonding. Figure 1C Multiple dies 102 are shown bonded to substrate 104 after die 102A is bonded to substrate 104, such as by stacking and bonding die 102B to die 102A. Additional dies 102 (CN) may be stacked and bonded to die 102B in a similar manner as desired.

[0035] In various embodiments, the exemplary die 102 or the exemplary substrate 104 may include one or more conductive traces or interconnects (not shown) surrounded by an insulating material (e.g., oxide) on the bonding surface (106, 110) of the die 102 or the bonding surface 108 of the substrate 104. For example, the die 102 or the substrate 104 may include multiple conductive layers and insulating layers (not shown) to determine the functionality (e.g., memory, processing, programmable logic, etc.) of the die 102 or the substrate 104. The exposed interconnects on the bonding surface (106, 108, or 110) may be electrically continuous with the various conductive layers and provide an interface for the die 102 or the substrate 104.

[0036] When the die 102 is bonded to the substrate 104 (or die to die, die to wafer, wafer to wafer, etc.) using direct bonding or hybrid bonding techniques, it is generally desirable that the surfaces of the die 102 and substrate 104 to be bonded are extremely flat and smooth. For example, in general, the bonding surfaces (106 and 108, and 106 and 110) should have very low surface topological variance (i.e., nanoscale variance, e.g., less than 2 nm, and preferably less than 0.5 nm) so that the bonding surfaces (106 and 108, and 106 and 110) can fit tightly to form a durable bond. It is also generally desirable that the bonding surfaces (106 and 108, and 106 and 110) are clean and have a low content of impurities, particles, or other residues that are large enough to cause bonding voids, which can cause electrical continuity failures or other bonding defects.

[0037] For example, particles and residues left over from processing steps can create voids at the bonding interface between stacked die 102 and substrate 104. Voids may be acceptable if they are significantly smaller than the metal electrical interconnect dimensions. However, particles that cause bonding defects with dimensions approaching or exceeding the electrical interconnect dimensions are generally not tolerated. Additionally, temporarily bonding dies, wafers, and substrates for processing or operation (e.g., using polymer layers or inorganic layers, etc. for temporary bonding) may also be problematic because temporary carriers and substrates may leave bonding residues when removed (which may persist even after cleaning).

[0038] The residue from the temporary adhesive layer (which may be composed of a high temperature polymer, etc.) may be discontinuous, with different thicknesses (e.g., thicknesses may range from 10 nm to 50 um) on the die surfaces 106 and 110 or the substrate surface 108. Plasma cleaning (such as ashing with oxygen plasma) may be used to remove thin residues, but even long oxygen plasma ashing steps (e.g., more than 40 minutes) may not be effective for removing the thickest residues. In addition, long oxygen ashing processes tend to oxidize conductive features on the bonding surfaces (106, 110, and / or 108) and reduce the planarity of the cleaned surfaces.

[0039] For example, the bonding surface (106, 110 and / or 108) may include a recessed conductive feature structure, wherein the nominal conductive layer recess is about 1nm to 20nm below the surface of the adjacent dielectric layer or surface. After a long period of oxygen ashing of the wafer or die surface, the previously recessed conductive feature structure may change significantly to interfere with the formation of a bonding or post-bonding metal interconnect. For example, the previously recessed conductive feature structure may now protrude above the surface of the adjacent dielectric region. In some cases, depending on the ashing process parameters, the protrusion of the conductive feature structure may change from 3nm to 30nm. These conductive protrusions above the bonding surface (106, 110 and / or 108) may hinder or prevent close fit of the bonding layer or surface.

[0040] In such cases, high temperature (e.g., over 50° C.) wet processes are sometimes used to remove thick residues; however, such processes may be incompatible with other die 102 or substrate 104 layers or materials. For example, high temperature wet processes may degrade the polished metal layers of the die 102 or substrate 104, thereby reducing device yield. In addition, high temperatures may be incompatible with some die 102 or substrate 104 handling components (e.g., plastic dicing tape, clamping rings, etc.).

[0041] In some conventional wafer cleaning processes, wet chemical cleaning solutions, including aggressive cleaning solutions, can effectively remove organic residues from the wafer surface. For example, cleaning the wafer with a mixture of hydrogen peroxide in a solution of ammonium hydroxide, sulfuric acid, or hydrochloric acid, and various combinations thereof, at temperatures between 50° C. and 80° C. can produce a pristine wafer surface. However, such aggressive cleaning steps are generally impractical for cleaning the bonding surfaces 106 and 110 of the die 102, because these aggressive wet chemicals will not only clean polymer residues and particles, they can also dissolve most of the actual conductive features, which are typically composed of materials such as silver, copper, nickel, and various alloys thereof.

[0042] Representative process

[0043] Figure 2-7BRepresentative processes 200-750 for forming and preparing a microelectronic component (such as die 102 and substrate 104) for bonding (such as for direct bonding without an adhesive) are shown. Processes 200-750 include providing bonding surfaces (such as bonding surfaces 106, 110, and 108) on the microelectronic component, or in some examples providing two bonding surfaces (such as bonding surfaces 106 and 110 on a single die 102), planarizing the bonding surfaces, cleaning and activating (in some examples) the bonding surfaces, etc.

[0044] The order in which processes 200-750 are described is not intended to be construed as limiting, and any number of the described process blocks in any of processes 200-750 may be combined in any order to implement that process or an alternative process. Additionally, individual blocks may be deleted from any of the processes without departing from the spirit and scope of the subject matter described herein. Furthermore, processes 200-750 may be implemented in any suitable hardware, software, firmware, or a combination thereof without departing from the scope of the subject matter described herein.

[0045] In alternative embodiments, other techniques may be included in processes 200-750 in various combinations and still be within the scope of the present disclosure.

[0046] Exemplary Techniques for Forming and Preparing Substrates

[0047] The exemplary substrate 104 formation process 200 is Figure 2 . In various embodiments, substrate 104 may be composed of silicon, germanium, a dielectric surface, a direct or indirect gap semiconductor material or layer, or another suitable material. At block 202, the process includes fabricating substrate 104. Briefly, forming substrate 104 may include fabricating devices in substrate 104, such as front end of line (FEOL), multilayer back end of line (BEOL), and other structures of interest, cleaning the surface of substrate 104, and the like.

[0048] At block 204, the process includes forming a direct bonding layer on the first (front) surface 108 of the substrate 104. The material for the bonding layer may be deposited or formed on the first surface 108 and may be composed of a layer of an inorganic dielectric material such as an oxide, nitride, oxynitride, oxycarbide, carbide, nitride carbide, diamond, diamond-like material, glass, ceramic, glass ceramic, etc. or a combination of an inorganic dielectric layer and one or more metallic features. In some embodiments, the metallic features may be slightly recessed from the dielectric surface, for example 1 nm to 20 nm below the dielectric surface. In some embodiments, forming the direct bonding layer may be incorporated into the wafer manufacturing process (such as block 202) as the last metal layer formed. In one embodiment, the planar surface of the last metallized dielectric layer may include the bonding surface 108, and an additional metallized dielectric coating to form the bonding layer 108 may be unnecessary.

[0049] Forming the direct bonding layer includes trimming the first surface 108 (i.e., bonding surface) to meet the dielectric roughness specification and the metal layer (e.g., copper, etc.) recess specification to prepare the surface 108 for direct bonding. In other words, the bonding surface 108 is formed to be as flat and smooth as possible, with very small surface topological variance. Various conventional processes such as chemical mechanical polishing (CMP) can be used to achieve low surface roughness. The metal layer can be configured to provide an electrical path and / or a thermal path, or alternatively can be configured to balance the metallization by using so-called dummy pads, traces, patterns, etc.

[0050] At block 206 , the bonding surface 108 of the substrate 104 is cleaned and / or activated in preparation for direct bonding, as described below.

[0051] Exemplary Techniques for Forming and Preparing Dies

[0052] Figure 3 An exemplary process 300 is shown for forming a single-sided or double-sided die 102 from a wafer (which may also be referred to as a "second substrate" and which may be composed of similar or identical materials and formed with similar or identical processes and techniques as described above with reference to substrate 104). In an embodiment, at blocks 202 and 204 of process 200, process steps 302 and 304 of fabricating a wafer and forming a (front) bonding surface 106 are substantially the same as described above with reference to substrate 104, depending on the surface topology requirements of the bonding surface.

[0053] At box 306, after planarizing the bonding surface 106 of the wafer to achieve the desired topology (e.g., by a CMP process), a protective coating (such as a resist or other suitable material) is applied to the bonding surface of the wafer to protect the bonding surface 106 from contamination, protect the exposed metal layer from corrosion, and protect the bonding surface 106 during the singulation operation, which often generates debris on the front and side surfaces of the tube core 102.

[0054] Additionally or alternatively, the back surface of the wafer may be processed (eg, through-die conductor exposure, planarization, etc.) to form a back bonding surface 110 on the die 102 , which may also be coated with a protective coating, etc.

[0055] In some embodiments, more than one type of protective layer may be applied to the wafer surface. For example, the first protective layer may include a hydrophobic protective layer, and overlying the hydrophobic layer may be a hydrophilic protective layer. In this example, the underlying hydrophobic layer allows for the use of aggressive etching chemicals during cleaning of the side surfaces of the die 102, and also increases the shelf life of the prepared surfaces 106 and 110. In some cases, the overlying hydrophilic layer receives or is impregnated with particles, debris, dicing tape, adhesives, etc. generated during the dicing process. The hydrophilic layer is removed along with the particles and debris. The hydrophobic layer may remain intact temporarily to protect the surface 106 (and / or 110) during subsequent processing or storage.

[0056] In some cases, as shown at block 308, the wafer is thinned from the unprotected side to achieve a desired thickness. At block 310, the wafer is mounted on a dicing tape on a frame and singulated (block 312) to form die 102. The wafer may be singulated into a number of die 102 using a saw, a laser (e.g., an invisible laser), a plasma etching process, or other suitable technique. In various examples, the die 102 are singulated while the wafer is mounted on a dicing sheet or dicing layer or dicing tape (or the like) held by a frame.

[0057] After dicing, if necessary, the diced wafer on the dicing tape can be expanded and mounted in a holding ring. In various examples, the frame or holding ring can be composed of plastic parts, metal parts, combinations thereof, etc. The dicing tape can be any type of dicing tape commonly used in the industry. An exemplary dicing tape includes UV stripping tape. In some examples, the die 102 can be transported while on the holding ring or dicing frame.

[0058] Forming and Preparing the Die – Double-Sided Die Example

[0059] Figure 4An exemplary process 400 is shown for forming a double-sided die 102, wherein both surfaces (106 and 110) of the die 102 are to be bonded to a substrate 104 or another die 102, such as utilizing multiple die-to-die or die-to-wafer applications (e.g., Figure 1C ). At block 402, the process includes fabricating a wafer for die 102, which may include fabricating through silicon vias (TSVs) at desired locations throughout die 102 for future through-device connections. In various embodiments, the wafer may be made of silicon, germanium, or another suitable material.

[0060] At block 404, the process includes forming a direct bonding layer on the first (front) surface 106 of the die 102. The material for the bonding layer may be deposited or formed on the first surface 106 and may be composed of an inorganic dielectric material layer or a combination of an inorganic dielectric layer and one or more metal features, as described in reference to FIG. Figure 2 Similarly, as previously discussed, the planar surface of the last metallized dielectric layer may comprise the bonding surface 106, and an additional metallized dielectric coating forming the bonding layer 106 may not be necessary.

[0061] Forming the direct bonding layer includes trimming the first surface 106 (i.e., bonding surface) to meet the dielectric roughness specification and the metal layer (e.g., copper, etc.) recess specification to prepare the surface 106 for direct bonding. In other words, the bonding surface 106 is formed to be as flat and smooth as possible, with very small surface topology variance. Various conventional processes such as chemical mechanical polishing (CMP) can be used to achieve low surface roughness.

[0062] In an embodiment, at block 406, the prepared front surface of the wafer to be singulated into die 102 is directly bonded to a support wafer (e.g., a "silicon carrier" in one example, although carriers of other materials may also be used) for handling the wafer during fabrication of the second (back) bonding surface 110. In one example, the first surface of the wafer is bonded to a silicon wafer using the Zibond direct bonding technique as described above.

[0063] In various embodiments, directly bonding a silicon carrier to a wafer has a number of advantages. For example, the technique removes any temperature limitations for backside wafer processing. Additionally, the silicon carrier may have a similar or closely matched coefficient of thermal expansion (CTE), thereby reducing or eliminating warping of the wafer during processing. This may improve the success and reliability of direct bonding to the wafer. Additionally, direct bonding of the silicon carrier enables ultra-thin wafers to be directly bonded to other dies, wafers, substrates, etc., which would otherwise be impossible.

[0064] At block 408, the silicon substrate may be thinned and the TSVs exposed before forming and polishing the second bonding surface 110. The second bonding surface 110 of the die 102 on the back side of the wafer is formed and trimmed (as described above) to meet maximum dielectric roughness specifications and metal layer (e.g., copper, etc.) recess specifications with minimum surface topology variance. In addition, a protective coating may be applied to the polished second bonding surface 110.

[0065] At block 410, the second surface 110 of the wafer may then be bonded to a temporary support wafer using an adhesive to process the wafer for front side 106 processing. At block 412, the silicon support wafer is removed from the first surface 106 of the wafer using one or more techniques including etching, dissolving, grinding, etc. The removal process is performed to ensure that the first surface 106 retains the dielectric layer and any conductive layers for future direct bonding or hybrid bonding after the support wafer has been removed.

[0066] At block 414, one or more protective coatings may be applied to the exposed first surface 106. In some embodiments, more than one type of protective layer may be applied to the first surface 106. For example, the first protective layer may include a hydrophobic protective layer, and overlying the hydrophobic layer may be a hydrophilic protective layer (as described above).

[0067] At block 416, the temporary carrier and temporary bonding adhesive are removed from the back surface 110 of the wafer. At block 418, the completed double-sided wafer is then mounted on a dicing tape on a frame and singulated to form a quantity of double-sided dies 102 (block 420). Optionally, the singulated wafer may be transferred to a holding ring (block 422) in preparation for bonding (block 424).

[0068] See also Figure 5 In an alternative embodiment shown in process 500, a direct bonding technique is not used to bond the silicon carrier to the wafer. Instead, in the process described above with reference to Figure 4 Following the fabrication (block 502) and forming / trimming of the first bonding surface (block 504), the first surface 106 is bonded to a support carrier (block 506) using a temporary bonding adhesive for fabrication of the second (backside) 110 bonding surface.

[0069] At block 508, the wafer may be thinned as needed to expose the TSVs. The second bonding layer 110 is formed and trimmed as described above. At block 510, one or more protective coatings may be applied to the prepared bonding surfaces (106 and / or 110) prior to dicing. After forming and trimming the second bonding surface 110, the temporary carrier and temporary adhesive material are removed (block 512). The completed double-sided wafer is then mounted to a dicing tape or dicing layer, such as on a frame (block 514), and segmented (block 516) to form a quantity of double-sided dies 102. Optionally, the diced wafer may be transferred to a clamping ring (block 518) to prepare for bonding (block 520).

[0070] Cleaning and preparing substrates

[0071] Fig. 6A and Figure 6B The diagrams of illustrative processes 600 and 650, respectively, describe cleaning and preparing substrate 104 (process 600) and die 102 (process 650) for bonding. Likewise, although the diagrams (and associated descriptions) describe bonding die 102 to substrate 104, the processes may be used to bond wafer to wafer, die to die, die to wafer, etc. Furthermore, substrate 104 as described in these processes may also refer to the backside 110 of a die 102 that has been mounted to another die 102 or to a larger substrate (such as a wafer).

[0072] See also Fig. 6A , shows a process 600 for preparing the bonding surface 108 of the substrate 104. In some embodiments, the process 600 follows Figure 2 The process 200 shown may be summarized in or within block 206. For example, at block 602, the bonding surface 108 of the substrate 104 is cleaned by a wet process, such as with a solvent. This is followed by block 604, which includes a dry cleaning process with oxygen plasma (commonly referred to as ashing) or other plasma chemistry to remove any inorganic and organic contaminants. The plasma may be provided, for example, by an atmospheric, downstream, or reactive ion etching (RIE) process.

[0073] The substrate 104 may then be re-cleaned, including scrubbing with deionized or moderately alkaline water or other suitable solution to remove any particles from the ashing process. At block 606, the bonding surface 108 is activated using a nitrogen plasma process, for example, to prepare the substrate surface 108 for bonding. In various examples, the activation process is known to improve the bond strength of the bonded die 102 to the substrate 104. Similarly, the activation step may be provided by, for example, an atmospheric, downstream, or reactive ion etching (RIE) process. The substrate 104 may also be rinsed with deionized water to remove particles from the activation process, as shown at block 608.

[0074] Cleaning and preparing the die

[0075] See also Figure 6B , showing a process 650 for preparing the first bonding surface 106 of the die 102. In some embodiments, the process 650 follows the steps of Figure 3 , Figure 4 and Figure 5 316, 424, or 520, etc., or summarized within these blocks. For example, at block 652, preparing the first bonding surface 106 of the die 102 includes removing the protective layer from the bonding surface 106. At blocks 654 and 656, the bonding surface 106 is cleaned. For example, one or more alternative or optional process stages (including wet cleaning with solvents, dry cleaning with oxygen plasma (commonly referred to as ashing), or using other plasma chemistries, etc.) can be used to remove any inorganic and organic contaminants. Dry cleaning can be performed by a plasma process such as an atmospheric, downstream, or RIE process.

[0076] In some cases, the protective layer can be cleaned from the die 102 while the die 102 is held on the dicing tape by a frame or a clamping ring (e.g., via a wet process), which also cleans the debris generated by the dicing process. When a UV stripping tape is used, UV exposure can be performed to reduce the adhesion strength between the die 102 and the tape to strip the die 102, if necessary, before the die cleaning process or after the die cleaning process.

[0077] In various embodiments, the die 102 is cleaned with a chemical (e.g., a solvent, an etchant, water, etc.) that can remove the protective coating without corroding the underlying metal layer (e.g., copper). For example, the cleaning chemical can include a mixture of hydrogen peroxide in a solution of ammonium hydroxide or an acid. Metal passivating compounds (e.g., triazole moieties) can be used to inhibit metal etching of conductive features such as silver, copper, nickel, and their various alloys. These chemicals and passivating compounds can be cleaned or rinsed from the metal portions of the bonding surface 106.

[0078] During the dicing process, wafer particles (e.g., silicon particles) may be embedded in the dicing tape by the mechanical action of the cutting wheel or wire. During the pick and place direct die transfer from the dicing tape to the bonding layer, these embedded particles may contaminate the edges and surfaces of the cleaned die 102, including the bonding surface 106. Therefore, it is very important to reduce or eliminate embedded particles from the cleaned bonding surface 106. In one example, the die 102 can be remounted on a sheet of new dicing tape of the same or similar material or another suitable material, thereby discarding the initial dicing tape. Doing so can remove embedded contaminants or enable the use of chemicals that are incompatible with the initial dicing tape.

[0079] Alternatively, contaminants trapped in the dicing tape may be removed by more vigorous cleaning of the die 102, including megasonic shaking, mechanical brushing, and / or high pressure cleaning. Vigorous cleaning (including megasonic shaking, mechanical brushing, and high pressure cleaning) also cleans the edges of the die 102 to remove particles and organic contaminants at the edges.

[0080] While on a dicing tape held by a frame or clamping ring, the die 102 may be dry cleaned using a plasma process, such as an oxygen plasma, and re-cleaned using a wet process to remove any remaining remnants of the protective layer or additional contaminants resulting from some process steps and to improve the bonding surface 106. However, in some cases, the dicing tape may react with the plasma process and may potentially cause the bonding surface 106 to be re-contaminated by its reaction products.

[0081] In some cases, shielding the exposed bands beyond the die 102 and minimizing the exposed bands between the die 102 (e.g., using a narrow cutting blade and not stretching the bands) and shortening the plasma process duration can reduce contamination. In some cases, an oxygen-based reactive ion etching (RIE) plasma process is preferred to shorten the ashing process. In various embodiments, a short ashing process in a RIE plasma chamber can cause less surface re-contamination than a long ashing process in a less intense plasma chamber. Re-cleaning can include rinsing the die 102 with deionized water, which can be combined with mechanical brushing, megasonic shaking, and / or high pressure cleaning.

[0082] At block 658, the die 102 may be activated. A nitrogen-based RIE process or downstream plasma method or other plasma cleaning step (including atomic layer cleaning methods) may be used to activate the die surface 106 and / or clean any remaining residue or undesirable materials from the surface of interest. At block 660, the die 102 may be optionally rinsed with deionized water for a final clean.

[0083] At the end of the die 102 formation and preparation process, the die 102 may be bonded to the prepared bonding surface 108 (eg, Figure 1B For example, Figure 1C For the illustrated multi-die 102 stacking arrangement, after each die 102A is placed on the substrate 104 (or the previous die 102N), the second bonding surface 110 (backside) of the placed die 102A may be planarized, cleaned, and activated (in some embodiments, as desired and as discussed above) before the bonding surface 106 of the next die 102B is directly bonded to the backside surface 110 of the previous die 102A. Any added die 102N may have prepared bonding surfaces 106 and / or 110, one or both of which may or may not be activated.

[0084] In some cases, nitrogen-based plasma processes can be very reactive with the dicing tape and cause contamination of the bonding surface, which can offset the benefits of plasma activation. Plasma processes (such as for ashing and activation) can also react with metal device layers on the die 102 or substrate 104 and alter the recessed portion of the metal layer from the dielectric surface. Some of the compounds formed due to the interaction of the nitrogen plasma with the polymer dicing tape can adsorb on the bonding surface of interest and contaminate the bonding surface (106, 108, and in some embodiments 110).

[0085] Thus, in some embodiments, at least one of the binding surfaces 106 and / or 110 may not be activated. In some embodiments, when the dicing tape is present or in close proximity, various combinations of milder oxygen or nitrogen plasmas are preferred to modify the surfaces (106, 108, and in some embodiments, 110). Similarly, the activated surfaces (106, 108, and in some embodiments, 110) may be further cleaned. The cleaning step may include rinsing with deionized water, which may be combined with mechanical brushing, megasonic cleaning, and / or high pressure cleaning.

[0086] In various embodiments, some die process steps may be modified or eliminated compared to the process steps described herein.

[0087] Cleaning and activating dies on pick and place tools

[0088] In an embodiment, the die 102 is selected by a pick and place tool (generally including a pick tool and a bonding or placement tool) that can pass the die 102 through a cleaning process during placement of the die 102 on a prepared substrate 104 for bonding. In an embodiment, the die 102 is activated while on the pick and / or place tool. Such cleaning and activation steps performed while the die 102 is on the tool may be in addition to or in lieu of certain processes in the above-described processes, but certain details of the above-described steps may be performed in a similar manner.

[0089] For example, the die 102 may be carried by a pick and place tool, through a wet cleaning station, an atmospheric plasma, a laser blast, etc. to the substrate 104. In some embodiments, the die 102 is not rinsed after activation and before bonding. In other embodiments, the die 102 may be rinsed with deionized water, a prepared formulation, etc. at a process step before bonding. In some embodiments, the die 102 is picked up from the dicing tape and flipped by a pick tool to present the back surface 110 of the die 102 to the bonding tool. The face of the pick tool may be in direct contact with the surface 106 to be bonded. The bonding tool head is coupled to the back side 110 of the die 102 and brings the prepared surface 106 of the die 102 to the prepared surface 108 of the substrate 104 for bonding.

[0090] In yet other embodiments, the prepared surface 106 of the known good die 102 is picked up from the dicing tape and flipped over by a pick-up tool to present the back side 110 of the die 102 to the bonding tool. The face of the pick-up tool may be in direct contact with the surface 106 to be bonded. The bonding tool head is coupled to the back side 110 of the die 102 and the prepared face 106 (such as the back side 110 of the die 102) is flipped over by a pick-up tool. Figure 1C The die 102B at the stack is brought to a known good die 102 (such as Figure 1C The exposed prepared surface 110 of the die 102A) is provided for bonding.

[0091] For example, after cleaning and activating the second surface 110 of the first die 102A and the first surface 108 of the substrate 104, the prepared first surface 106 of the second known good die 102B can be similarly picked up from the sawing layer and bonded to the prepared second surface 110 of the first die 102A. Multiple known good dies 102 (AN) can be stacked on the substrate 104 or on top of each other, or a combination thereof.

[0092] In another embodiment, the prepared die 102 is picked up from the dicing tape and flipped over by a pick tool to present the back side 110 of the die 102 to the bonding tool. The bonding tool head is coupled to the back side 110 of the die 102, and an electrostatic device may be used to remove particles from the bonding surface 106 before attaching the prepared face 106 of the die 102 to the prepared surface 108 of the substrate 104 for bonding. In addition, the pick and place tool may have a porous surface for contacting the bonding surface.

[0093] In other examples, carbon dioxide particles or compressed gas (e.g., nitrogen) may be applied to the prepared surface 106 at a glancing angle to remove pseudo-particles from the prepared surface 106 prior to bonding. In some applications, hot compressed gas (e.g., hot nitrogen) may be applied immediately prior to the bonding operation to remove pseudo-particles or excess moisture from the prepared surface 106. The pressure of the compressed nitrogen may be in the range of 20 psi to 300 psi, and preferably in the range of 50 psi to 150 psi. Similarly, the temperature of the compressed gas (e.g., nitrogen) may be in the range of 25°C to 100°C, and preferably in the range of 50°C to 90°C. The fluid surface cleaning time may be in the range of 2 milliseconds to 1000 milliseconds, and preferably below 200 milliseconds.

[0094] Activate a binding surface

[0095] In most of the examples described above, the prepared surface 108 of the substrate 104 and the prepared surface 106 of the die 102 are each plasma cleaned (ashing with oxygen plasma is the most common process) and activated prior to bonding the die 102 to the substrate 104. However, in certain embodiments, only one of these bonding surfaces (e.g., the prepared surface 108 of the substrate 104 or the prepared surface 106 of the die 102) is plasma cleaned and / or activated prior to bonding the die 102 to the substrate 104.

[0096] In an embodiment, eliminating the surface ashing and activation process on the die 102 or on the substrate 104 can reduce process-related defects and improve yield, as well as reduce the cost of forming the bonding surface. For example, eliminating process steps can result in eliminating contamination of the bonding surface 106 by cutting tape / plasma interaction products and reducing or eliminating metal loss in the wiring layer. In addition, damage to the cutting frame or clamping ring can be minimized, thereby extending the frame or clamping ring life. In addition, when one surface (106, 108) is activated instead of two surfaces (106, 108), the throughput can be improved with fewer process steps and the bonding energy is not reduced. The total cost of ownership is also reduced by eliminating the plasma chamber used for the cleaning of the die 102.

[0097] Cleaning and Preparing Substrates - Alternative Embodiments

[0098] Fig. 7A and Figure 7BThe diagrams of illustrative processes 700 and 750, respectively, describe alternative processes for cleaning and preparing substrate 104 (process 700) and die 102 (process 750) for bonding. Likewise, although the diagrams (and associated descriptions) describe bonding die 102 to substrate 104, the processes may be used to bond wafer to wafer, die to die, die to wafer, etc. Furthermore, substrate 104 as described in these processes may also refer to the backside of a die 102 that has been mounted to another die 102 or a larger substrate (such as a wafer).

[0099] See also Fig. 7A , a process 700 for preparing a bonding surface 108 of a substrate 104 is shown. At block 702, the substrate 104 is manufactured and at block 704, a bonding surface 108 of a substrate 104 is prepared. Figure 2 The bonding surface 108 is formed on the substrate 104 in a similar manner as described in the process 200 at . For example, the bonding surface 108 is prepared for direct bonding without an adhesive. In some embodiments as previously disclosed, the manufacture of the substrate 104 may also include forming the bonding surface 108.

[0100] At frame 706, the bonding surface 108 of substrate 104 is cleaned, for example, by a wet method, etc., with a solvent. Then frame 708 is followed, including a dry cleaning process with oxygen plasma (commonly referred to as ashing) or other plasma chemicals to remove any inorganic and organic contaminants. Plasma can be provided by, for example, an atmospheric, downstream or reactive ion etching (RIE) process. The substrate 104 can be re-cleaned, including scrubbing with deionized or moderately alkaline water or other suitable solutions to remove any particles from the ashing process. In some embodiments, before storing the substrate 104 for subsequent use or before the activation step, the bonding surface 108 of the substrate 104 can be made hydrophobic by a cleaning method. At frame 710, the bonding surface 108 is activated using a nitrogen plasma process, for example, to prepare the substrate surface 108 for bonding. In various examples, it is known that the activation process will increase the bonding strength. If necessary, the substrate 104 can also be rinsed with deionized water to remove potential contamination particles from the activation process.

[0101] Cleaning and Preparing the Die – Alternative Implementation

[0102] See also Figure 7B , a process 750 for preparing the bonding surface 106 and / or 110 of the die 102 is shown. At block 752, the die 102 is fabricated on a wafer, and at block 754, the bonding surface 106 is formed and prepared on the surface of the die 102, as previously described with respect to Figure 3For example, the bonding surface 106 is prepared for direct bonding without an adhesive. At block 756, one or more protective layers may be added to the bonding surface 106, also as described above, and at block 758, the wafer is singulated into a plurality of dies 102.

[0103] At block 760, the process includes removing the protective layer from the bonding surface 106. At block 762, the bonding surface 106 is cleaned using a chemical formulation, as further described below. In some cases, the protective layer can be cleaned from the die 102 while the die 102 is held on the dicing tape by a frame or a clamping ring, which also cleans the debris generated by the dicing process. When a UV stripping tape is used, if necessary, UV exposure can be performed before the die cleaning process or after the die cleaning process to reduce the adhesion strength between the die 102 and the tape to strip the die 102.

[0104] Advantages of process 750 (including cleaning (or otherwise treating) die 102 while on a frame or holding ring or on a polymer sheet) include: elimination of polymer residues from oxygen and nitrogen plasma steps; reduction of processing steps and cycle times for manufacturing; die 102 may not need to be activated when substrate 104 is already activated; the bonding energy of the process (including the case where the die is not activated) is comparable to a similar process in which die 102 is activated in conjunction with substrate 104 activation; and higher throughput of devices manufactured.

[0105] Exemplary Chemical Formulas

[0106] See also Figure 7B After cleaning the protective layer from the singulated die 102 (and optionally after cleaning the die 102 with a plasma process), the die 102 may be exposed to a chemical formulation for a predetermined time to clean and prepare the die surface 106 and / or 110 for bonding. In this embodiment, the prepared formulation comprises hydrofluoric acid diluted with glycerol or buffered hydrofluoric acid or ammonium fluoride, an organic acid, and deionized water, with or without stabilizing additives. In some embodiments, the formulation may comprise an inorganic acid or an organic acid containing fluoride ions. The content of fluoride ions is preferably less than 2%, and preferably less than 0.5%, and in some cases preferably less than 0.1%. Examples of fluoride ion sources may include hydrofluoric acid, buffered oxide etch, ammonium fluoride, or tetrabutylammonium fluoride.

[0107] The formulation may also include aliphatic or non-aliphatic organic acids, and more than one organic acid may be used in the formulation. The organic acid content in the formulation may generally be less than 2%, and preferably less than 1%, and preferably less than 0.1%. Examples of organic acids may include formic acid, acetic acid, methanesulfonic acid, etc. In some embodiments, a mineral acid (e.g., a very small amount of sulfuric acid) may be used. However, the amount used should not roughen the surface of the metal layer at the bonding surface 106.

[0108] In various embodiments, glycerol is incorporated into the formulation, wherein the content of glycerol may vary between 0.5% and 25% of the formulation, and is preferably less than 10%. In other applications, very small amounts of amides, amines, butylated hydroxyanisole (BHA), butylated hydroxytoluene, or organic carbonates may be added to the formulation. In other embodiments, the formulation may be moderately alkaline, with a pH preferably less than 9.5, and preferably less than 8.5. The total content of these additional additives is preferably less than 5%, and preferably less than 1%.

[0109] It is also desirable to incorporate into the formulation a complexing agent that inhibits removal or etching or roughening of the surface of the metal layer at the bonding surface 106. In the case of copper, for example, a suitable copper complexing agent having one or more triazole moieties may be used. In some cases, the concentration of the complexing agent may be less than 2%, and preferably less than 1%, 0.2%, and less than 100 ppm and less than 5 ppm. After exposure to the formulation, the die 102 is placed by a pick-up tool and bonded to the substrate 104 without activation (and optionally without ashing).

[0110] After cleaning with the recipe, the die 102 can be rinsed (e.g., with deionized water) and can be activated. A nitrogen-based RIE process or downstream plasma method or other plasma cleaning steps (including atomic layer cleaning methods) can be used to activate the die surface 106 and / or clean any remaining residues or undesirable materials from the surface of interest. Alternatively, the die 102 can be rinsed with deionized water after activation.

[0111] At the end of the die 102 formation and preparation process, the die 102 may be bonded to the prepared bonding surface 108 (eg, Figure 1B For example, Figure 1CFor the multi-die stacking arrangement shown, after each die 102A is placed on the substrate 104 (or another die 102N), the second bonding surface 110 (backside) of the placed die 102A may be planarized, cleaned, and activated (as needed and discussed above) before the next die 102B is directly bonded to the backside surface 110 of the previous die 102A. Any added die 102 (AN) may have prepared bonding surfaces 106 and / or 110, which may or may not be activated.

[0112] Forming a hydrophobic binding surface

[0113] In another embodiment, the surface of the die 102 or substrate 104 or both can be made hydrophobic by one or more of the above cleaning steps. One advantage of making the surface (106, 108 and / or 110) itself hydrophobic is that the hydrophobic surface may be less susceptible to particle contamination and is easy to clean with compressed fluids such as nitrogen, carbon dioxide or carbon dioxide particles. The bonding surface 106 or 110 of the die 102 (for example, when in a cutting frame) or the bonding surface 108 of the substrate 104 can be made hydrophobic by exposing its unactivated surface (106, 108 and / or 110) to the above-mentioned formulation containing very dilute fluoride, and then rinsing and drying the exposed surface (106, 108 and / or 110). According to this technique, the clean, unactivated die 102 with the hydrophobic surface 106 and / or 110 can be attached to the surface 108 of the prepared activated substrate 104 (or to another die 102) for bonding. Similarly, a clean, non-activated substrate 104 having a hydrophobic surface 108 can be bonded to the surface 106 of one or more activated dies 102. Generally, nitrogen activation of the surfaces (106, 108, and / or 110) tends to render the surfaces (106, 108, and / or 110) hydrophilic. Annealing the mating surfaces (106, 108, and / or 110) improves the bonding energy between the mated materials. Generally, the higher the bonding temperature, the higher the energy required to separate the mated materials.

[0114] Fewer additional process steps

[0115] In other embodiments, after cleaning the protective layer from the singulated die 102, the die 102 is placed by a pick and place tool and bonded to the substrate 104 without exposure to formulation, ashing, or activation. In various embodiments, the bonding energy (or bonding strength) of the resulting direct bonding is sufficient for the DBI formation process, with the substrate 104 activated and the die 102 not activated. For example, in some embodiments, the bonding energy is about 1000 mJ / m 2, which meets the minimum bonding energy requirements for suitable direct bonding according to some specifications. In addition, eliminating certain oxygen and nitrogen RIE steps eliminates dicing tape / plasma reaction byproducts that can be deposited on the surface of the die 102, as well as the cost and time of additional process steps.

[0116] annealing

[0117] As a final step in the bonding process for all embodiments discussed, the die 102 and substrate 104 may be heated to above ambient temperature (annealing) to form a metal-metal joint. In these embodiments, the high temperature of the annealing process causes the metal (e.g., Cu) in the bonding layer (106, 108, and / or 110) to expand more than the dielectric material (e.g., oxide) surrounding the metal. The difference in CTE allows the metal layer, which may be recessed below the bonding surface (106, 108, and / or 110) at room temperature, to expand to bridge the gap between the two mating surfaces of the dielectric material and form a conductive joint during the annealing.

[0118] In one embodiment, the multi-die stack is not annealed after each die 102 is placed, but rather the entire stack is annealed once all of the dies 102 of the stack are placed. Alternatively, a low temperature anneal may be used after each die 102 is placed. Additionally, the back surface 110 of the die 102 is cleaned and prepared for bonding to receive an additional cleaned die 102 or die stack. The substrate 104 with the multi-die stack may be thermally annealed at a higher temperature for tight mating of opposing metal features at various bonding interfaces.

[0119] In some embodiments, after the disclosed process, substrate 104 can be singulated by known methods to form a new structure composed of die 102, which is directly bonded to a smaller singulated substrate 104 (not shown). In one embodiment, the bonding surface area of ​​die 102 is smaller than the bonding surface of singulated substrate 104.

[0120] Pick and place tool preparation

[0121] In various embodiments, the pick-and-place tools are designed or treated to minimize the chance of contaminating the die 102. The pick-and-place tools (or portions thereof) may be formed of (or coated with) a material selected for desired hydrophobic properties. For example, the tools may be coated with a material such as polytetrafluoroethylene (PTFE) or another hydrophobic material.

[0122] In addition, the tool can be prepared (e.g., with structural design, with predetermined treatments, etc.) to tolerate contaminants or avoid contaminants from being transferred to the tube core 102. Therefore, the surface pick process (e.g., picking up the tube core 102 at the prepared bonding surface 106 and / or 110) does not reduce the bonding quality when picking from the tube core surface 106 and / or 110 to be bonded. Alternatively, the surface 106 and / or 110 of the tube core 102 can be chemically treated to have hydrophobic properties, thereby minimizing particles from the pick-up tool to adhere to the surface 106 and / or 110. In addition, the surface of the pick-up and place tool can be cleaned at desired intervals to remove potential sources of tube core surface contaminants. One or more surfaces of the tool can be porous.

[0123] The techniques, components and devices described herein are not limited to Figure 1A-Figure 7B , and may be applied to other designs, types, arrangements, and configurations, including with other electronic components, without departing from the scope of the present disclosure. In some cases, additional or alternative components, techniques, sequences, or processes may be used to implement the techniques described herein. Furthermore, the components and / or techniques may be arranged and / or combined in various combinations while producing similar or substantially the same results.

[0124] in conclusion

[0125] Although the embodiments of the present disclosure have been described using language specific to structural features and / or methodological acts, it should be understood that these embodiments are not necessarily limited to the specific features or acts described. Rather, the specific features and acts are disclosed as representative forms of implementing exemplary devices and techniques.

Claims

1. A method of forming a microelectronic assembly, comprising: preparing a bonding surface of a first substrate, including activating the bonding surface of the first substrate with a first plasma based on a first gas; forming a bonding surface of a second substrate; mounting the second substrate to the cutting layer; singulating the second substrate into a plurality of dies while the second substrate is mounted to the dicing layer, each of the plurality of dies having a bonding surface including a portion of the bonding surface of the second substrate; processing the plurality of dies while the plurality of dies are mounted to the sawing layer, including cleaning the bonding surfaces of the dies with a second plasma based on a second gas different from the first gas; selecting a die from the plurality of dies; as well as The bonding surface of the die is directly bonded to the bonding surface of the first substrate without an adhesive and without activating the bonding surface of the die while the die is mounted to the dicing layer. 2 . The method of claim 1 , further comprising applying a protective coating to the bonding surface of the second substrate before singulating the second substrate. 3 . The method of claim 1 , further comprising cleaning one or more surfaces of the plurality of dies or the first substrate using a chemical agent, a megasonic transducer, and / or a mechanical brush. 4 . The method of claim 1 , further comprising processing the die while held by a pick and place tool, the processing comprising in-situ cleaning of the bonding surface of the die. 5 . The method of claim 1 , further comprising picking up the die by contacting the bonding surface of the die with a pick-and-place tool formed of or coated with a hydrophobic material. The method of claim 1 , wherein the first plasma comprises nitrogen plasma. The method of claim 1 , wherein the second plasma comprises oxygen plasma.

8. A method of forming a microelectronic assembly, comprising: preparing a bonding surface of a first substrate; preparing a bonding surface of a second substrate; mounting the second substrate to the cutting layer; singulating the second substrate into a plurality of dies while the second substrate is mounted to the dicing layer, each of the plurality of dies having a bonding surface including a portion of the bonding surface of the second substrate; processing the plurality of dies while the plurality of dies are mounted to the dicing layer; selecting a die from the plurality of dies and removing the die from the cutting layer; activating one of the bonding surface of the first substrate or the bonding surface of the die; as well as The bonding surface of the die is directly bonded to the bonding surface of the first substrate without an adhesive and without activating the other of the bonding surface of the first substrate or the bonding surface of the die. 9 . The method of claim 8 , further comprising cleaning the other of the bonding surface of the first substrate or the bonding surface of the die using oxygen plasma.

10. The method of claim 8, wherein the bonding surface of the first substrate or the bonding surface of the die is activated using nitrogen plasma.

11. The method of claim 8, wherein the bonding surface of the die is a first bonding surface of the die, and wherein the die includes a second bonding surface opposite the first bonding surface of the die, the method further comprising: activating the second bonding surface of the die, the first bonding surface of the additional die, or the second bonding surface of the die and the first bonding surface of the additional die using nitrogen plasma; as well as The first bonding surface of the additional die is bonded directly to the second bonding surface of the die without an adhesive.

12. A method of forming a microelectronic assembly, comprising: preparing a bonding surface of a first substrate; preparing a bonding surface of a second substrate; mounting the second substrate to the cutting layer; singulating the second substrate into a plurality of dies while the second substrate is mounted to the dicing layer, each of the plurality of dies having a bonding surface including a portion of the bonding surface of the second substrate; cleaning the bonding surface of the first substrate or one of the bonding surfaces of one or more dies of the plurality of dies using a first plasma based on a first gas; activating the bonding surface of the first substrate or another of the bonding surfaces of the one or more dies in the plurality of dies with a second plasma based on a second gas; as well as The bonding surface of the one or more dies is directly bonded to the bonding surface of the first substrate without an adhesive.

13. The method of claim 12, further comprising cleaning the plurality of dies while the plurality of dies are mounted to the cutting layer, wherein activating the bonding surfaces of the one or more dies among the plurality of dies is performed while the one or more dies are mounted to the cutting layer or after the one or more dies are removed from the cutting layer.

14. The method of claim 12, further comprising rendering the bonding surface of the die hydrophobic prior to directly bonding the bonding surface of the die to the bonding surface of the first substrate.

15. The method of claim 12, further comprising applying a megasonic cleaner to clean the plurality of dies or the first substrate or both the plurality of dies and the first substrate. 16 . The method of claim 12 , wherein the first substrate and the bonding surfaces of the die include corresponding conductive features that are in contact when the first substrate and the bonding surfaces of the die are directly bonded.

17. The method of claim 16, further comprising annealing the first substrate and the die at an elevated temperature after the direct bonding to permanently bond the conductive features in contact.

18. The method of claim 12, wherein the microelectronic assembly comprises a stack of a plurality of directly bonded dies of the plurality of dies, and wherein the microelectronic assembly is annealed after placing the plurality of dies on the stack.

19. The method of claim 12, wherein the first plasma comprises oxygen plasma.

20. The method of claim 12, wherein the second plasma comprises nitrogen plasma.

21. A method of forming a microelectronic assembly, comprising: forming a bonding surface of a first substrate; forming a bonding surface of a second substrate, the second substrate having a footprint smaller than a footprint of the first substrate, wherein forming the bonding surface of the second substrate includes cleaning the bonding surface of the second substrate while the second substrate is mounted on the layer; activating the bonding surface of the first substrate, the bonding surface of the second substrate, or the bonding surface of the first substrate and the bonding surface of the second substrate; as well as The bonding surface of the second substrate is directly bonded to the bonding surface of the first substrate without an adhesive.

22. The method of claim 21, wherein the activating comprises exposing the bonding surface of the first substrate, the bonding surface of the second substrate, or the bonding surfaces of the first substrate and the second substrate to plasma or an ionized gas while the second substrate is mounted to the layer or after the second substrate is removed from the layer.

23. The method of claim 22, wherein the plasma or ionized gas comprises oxygen or nitrogen plasma.

24. The method of claim 21, wherein the layer comprises a clamping ring, a cutting blade, or a cutting layer.

25. The method of claim 21, further comprising annealing the first and second substrates at an elevated temperature after the direct bonding to mate conductive features at the bonding surfaces of the first and second substrates to permanently bond.

26. The method of claim 21, wherein the bonding surface of the second substrate is a first bonding surface of the second substrate, and wherein the second substrate includes a second bonding surface opposite to the first bonding surface of the second substrate, the method further comprising: activating one of the second bonding surface of the second substrate or the first bonding surface of an additional substrate; as well as The first bonding surface of the additional substrate is directly bonded to the second bonding surface of the second substrate without an adhesive.

27. A method of forming a microelectronic assembly, comprising: forming a bonding surface of a first substrate; forming a first bonding surface of a second substrate, the second substrate having a footprint smaller than a footprint of the first substrate, wherein forming the first bonding surface of the second substrate includes cleaning the first bonding surface of the second substrate while the second substrate is mounted on the layer; removing the second substrate from the layer and forming a second bonding surface of the second substrate opposite the first bonding surface of the second substrate; activating the bonding surface of the first substrate or the first bonding surface and the second bonding surface of the second substrate; directly bonding the first bonding surface of the second substrate to the bonding surface of the first substrate without an adhesive; as well as The first bonding surface of an additional substrate is bonded to the second bonding surface of the second substrate.

28. The method of claim 27, wherein the additional substrate is bonded to the second bonding surface of the second substrate using a direct bonding method without an adhesive.

29. The method of claim 27, further comprising annealing the microelectronic assembly at a temperature higher than an ambient temperature of the microelectronic assembly to mate conductive features at the bonding surfaces of the first and second substrates into permanent bonding.

30. A method of forming a microelectronic assembly, the method comprising: preparing a bonding surface of a first substrate; preparing a bonding surface of a second substrate; mounting the second substrate to a cutting support structure; singulating the second substrate into a plurality of dies while the second substrate is mounted to the dicing support structure, each die in the plurality of dies having a bonding surface including a portion of the bonding surface of the second substrate; activating the bonding surface of the first substrate; as well as The bonding surfaces of dies of the plurality of dies are directly bonded to the bonding surface of the first substrate without an adhesive, wherein the bonding surfaces of the dies are not activated while the dies are mounted to the dicing support structure and prior to the direct bonding.

31. The method of claim 30, further comprising processing the plurality of dies while mounted to the dicing support structure, including cleaning the bonding surfaces of the dies.

32. The method of claim 31, wherein activating the bonding surface of the first substrate comprises activating the bonding surface of the first substrate using a first plasma based on a first gas.

33. The method of claim 32, wherein processing the plurality of dies comprises cleaning the bonding surfaces of the dies with an inactive second plasma based on a second gas different from the first gas.

34. The method of claim 33, wherein the first plasma comprises a nitrogen plasma.

35. The method of claim 34, wherein the second plasma comprises oxygen plasma.

36. The method of claim 31, further comprising applying a protective coating to the bonding surface of the second substrate prior to singulating the second substrate.

37. The method of claim 36, wherein cleaning the bonding surface of the die comprises removing the protective coating from the bonding surface of the die.

38. The method of claim 36, further comprising applying a protective coating to the bonding surface of the first substrate.

39. The method of claim 30, further comprising picking up the die by contacting the bonding surface of the die with a pick and place tool.

40. The method of claim 39, further comprising contacting a back surface of the die with a bonding tool, and directly bonding the bonding surface of the die to the bonding surface of the first substrate using the bonding tool, the back surface being opposite to the bonding surface of the die.

41. A method of forming a microelectronic assembly, the method comprising: preparing a first bonding surface of a first substrate, wherein the first substrate comprises a first bonding layer, the first bonding layer forming the first bonding surface and comprising one or more metal features exposed at the first bonding surface and a first inorganic dielectric layer; contacting a second bonding surface of the die with a pick and place tool and removing the die from the support, wherein the die comprises a second bonding layer forming the second bonding surface and comprising a second inorganic dielectric layer and one or more metal features; contacting a back surface of the die with a bonding tool, the back surface being opposite to the second bonding surface; activating only one of the first binding surface and the second binding surface; as well as The first bonding surface of the first substrate is directly bonded to the second bonding surface of the die using the bonding tool without an adhesive and without activating the other of the first bonding surface and the second bonding surface, wherein the one or more metal features of the first bonding layer are directly bonded to the one or more metal features of the second bonding layer.

42. The method of claim 41, further comprising preparing a bonding surface of a second substrate, and after preparing the bonding surface of the second substrate, mounting the second substrate to the support, and singulating the second substrate into a plurality of dies, the plurality of dies including the die.

43. The method of claim 42, further comprising processing the plurality of dies while mounted to the support, including cleaning the bonding surfaces of the dies.

44. The method of claim 43, wherein activating comprises activating with a first plasma based on a first gas, and wherein processing the plurality of dies comprises cleaning the bonding surfaces of the dies with an unactivated second plasma based on a second gas different from the first gas.

45. The method of claim 44, wherein the first plasma comprises a nitrogen plasma, and wherein the second plasma comprises an oxygen plasma.

46. ​​The method of claim 42, further comprising applying a protective coating to the bonding surface of the second substrate prior to singulating the second substrate.

47. A bonding structure comprising: a first substrate that is hybrid bonded directly to a die along a bonding interface without an intervening adhesive, the die having a footprint that is smaller than a footprint of the first substrate, wherein the first substrate comprises one or more metal features, wherein the die comprises one or more metal features, and wherein the one or more metal features of the first substrate are directly bonded to the one or more metal features of the die at the bonding interface, One of the die and the first substrate includes a characteristic profile that has been activated using an activation species prior to bonding, and the other of the die and the first substrate lacks the characteristic profile that has been activated using the activation species prior to bonding.

48. The bonded structure of claim 47, wherein the activated species comprises nitrogen.

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