Neuromorphic devices and their driving methods
By using the resistor lines and capacitor structure of the neuromorphic device, efficient analog computation is achieved, solving the problems of low efficiency and high energy consumption in multiplication and addition operations, and improving the reliability and power efficiency of neural network processing.
Patent Information
- Application Number
- CN202011399511.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-03-25
- Filing Date
- 2020-12-02
- Publication Date
- 2025-12-02
- Estimated Expiration
- 2040-12-02
AI Technical Summary
Existing neural network processing methods are inefficient and energy-intensive when performing multiplication and addition operations, making them difficult to implement efficiently using digital computers.
A neuromorphic device is used, which utilizes series-connected resistors and capacitors to perform analog calculations by controlling current flow and voltage measurement, simplifying multiplication and accumulation operations.
It improves the reliability and power efficiency of analog computation in neural network processing and simplifies the execution of multiplication-accumulation-addition operations.
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Figure CN113449844B_ABST
Abstract
Description
[0001] This application claims the benefit of Korean Patent Application No. 10-2020-0036433, filed on March 25, 2020, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference for all purposes. Technical Field
[0002] The disclosure relates to a neuromorphic device and its driving method. Background Technology
[0003] The processing of neural networks in a neural network device includes a multiplicative-accumulative (MAC) operation involving repeated multiplication and addition. The operation of multiplying the node values of the previous layer with the weights mapped to them, adding the results, and then applying an appropriate activation function to the sum can be performed at a specific node of the neural network. To perform this operation, memory access operations for loading appropriate inputs and weights at desired time points, and the MAC operation of multiplying and adding the loaded inputs with the weights, can be repeated. Instead of using well-known digital computers to process neural networks, various methods have been implemented to efficiently perform neural network processing (such as MAC operations) using other hardware architectures. Summary of the Invention
[0004] This summary is provided to introduce, in a simplified form, the selection of concepts further described below in the detailed description. This summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended to help determine the scope of the claimed subject matter.
[0005] A neuromorphic device with improved reliability and power efficiency in analog computing is provided, as well as an electronic system including said neuromorphic device.
[0006] In one general aspect, a neuromorphic device includes: a first resistor line including a plurality of first resistors connected in series with each other; a second resistor line including a plurality of second resistors connected in series with each other; one or more current sources configured to control the current flowing in each of the first and second resistor lines to a respective current value; a first capacitor configured to be electrically connected to the first resistor line; and a second capacitor configured to be electrically connected to the second resistor line.
[0007] The neuromorphic device may further include a switch configured to connect a first capacitor in parallel to a second capacitor.
[0008] The neuromorphic device may further include a voltmeter configured to measure the voltage difference between the two ends of each of the first and second capacitors, in the case that the first and second capacitors are connected in parallel.
[0009] The one or more current sources may include a plurality of current sources, the plurality of current sources including at least one first current source connected to a first resistor line and at least one second current source connected to a second resistor line.
[0010] The one or more current sources may include a current source that is commonly connected to the first resistor line and the second resistor line.
[0011] The neuromorphic device may further include a controller configured to apply inputs and weights to the plurality of first resistors and the plurality of second resistors.
[0012] The one or more current sources can also be configured to control the first current flowing in the first resistor line and the second current flowing in the second resistor line to the same current value.
[0013] The neuromorphic device may further include: a controller configured to apply inputs and weights to the plurality of first resistors and the plurality of second resistors, and the controller may be configured to: independently control the inputs to be applied to the plurality of first resistors and the inputs to be applied to the plurality of second resistors.
[0014] The first capacitor and the second capacitor can have the same capacitance.
[0015] The neuromorphic device may further include: a first switch disposed between the first capacitor and the first resistor line; and a second switch disposed between the second capacitor and the second resistor line.
[0016] Each of the plurality of resistors may include a magnetic storage device having a plurality of resistance values.
[0017] The first terminal of the first capacitor and the first terminal of the second capacitor can be electrically connected to each other.
[0018] In another general aspect, a method of driving a neuromorphic device includes: applying a current having a current value to each of a first resistor line comprising a plurality of first resistors connected in series with each other and a second resistor line comprising a plurality of second resistors connected in series with each other; sampling a first voltage of the first resistor line using a first capacitor connected to the first resistor line, and sampling a second voltage of the second resistor line using a second capacitor connected to the second resistor line; and measuring the voltage between the two ends of each of the first and second capacitors when the first and second capacitors are connected in parallel by switching the first terminals of the first capacitors and the first terminals of the second capacitors to be connected in parallel with each other.
[0019] The method may further include: calculating the sum of the products of the inputs applied to the plurality of first resistors and the plurality of second resistors and their weights based on the measured voltages.
[0020] The method may further include: applying a resistance value to a variable resistor included in each of the plurality of first resistors and the plurality of second resistors.
[0021] The steps of sampling the first voltage and the second voltage may include: sampling the second voltage after sampling the first voltage.
[0022] In another general aspect, a neuromorphic device includes: a resistor line, each of a plurality of resistors connected in series to the resistor line; and a current source configured to apply current to the resistor line, wherein each of the plurality of resistors includes at least two variable resistors connected in parallel with each other and a switch connected in series with the variable resistors respectively.
[0023] Each of the plurality of resistors may include a pair of variable resistors, each of the pair of variable resistors being a variable resistor device having a first resistance value or a second resistance value, and when one of the variable resistors in each pair of variable resistors has a first resistance value, the other variable resistor may have a second resistance value.
[0024] The neuromorphic device may further include: a first weight line and a second weight line, electrically connected to the two ends of each of the variable resistors.
[0025] The neuromorphic device may further include a voltmeter configured to measure the voltage of a resistor line.
[0026] The neuromorphic device may further include: a controller configured to apply inputs and weights to the plurality of resistors, wherein the sum of the inputs and weights applied to the plurality of resistors can be calculated based on voltages measured by a voltmeter.
[0027] In another general aspect, a method of driving a neuromorphic device includes: applying input and weights to each of a plurality of resistors, each of the plurality of resistors including at least two variable resistors connected in parallel with each other and switches connected in series with the variable resistors respectively; applying current to a resistor line in which the plurality of resistors are connected in series; and obtaining the sum of the products of the input and weights applied to the plurality of resistors based on the voltage generated in the resistor line by the applied current.
[0028] Each of the plurality of resistors may include a pair of variable resistors, and the step of applying inputs and weights to each of the plurality of resistors may include: applying inputs and weights such that the pair of variable resistors included in the plurality of resistors are respectively set to have different resistance values.
[0029] The step of applying current may include applying current by closing at least one of the switches included in each of the plurality of resistors to allow current to flow through one of the variable resistors included in the plurality of resistors.
[0030] In another general aspect, an electronic system includes: a neural network device, including a neuromorphic device; and a central processing unit (CPU), including a processor core and configured to control the function of the neural network device, wherein the neuromorphic device includes: a first resistor line including a plurality of first resistors connected in series with each other; a second resistor line including a plurality of second resistors connected in series with each other; one or more current sources configured to control the current flowing in each of the first and second resistor lines to a respective current value; a first capacitor configured to be electrically connected to the first resistor line; and a second capacitor configured to be electrically connected to the second resistor line.
[0031] The neuromorphic device may also include a switch configured to connect the first capacitor in parallel to the second capacitor.
[0032] The neuromorphic device may also include a voltmeter configured to measure the voltage difference between the two ends of each of the first and second capacitors, in the case that the first and second capacitors are connected in parallel.
[0033] In another general aspect, an electronic system includes: a neural network device, including a neuromorphic device; and a central processing unit (CPU), including a processor core and configured to control the function of the neural network device, wherein the neuromorphic device includes: a resistor line, each of a plurality of resistors connected in series to the resistor line; and a current source configured to apply current to the resistor line, wherein each of the plurality of resistors includes at least two variable resistors connected in parallel with each other and a switch connected in series with the variable resistors respectively.
[0034] Each of the plurality of resistors may include a pair of variable resistors, each of the pair of variable resistors being a variable resistor device having a first resistance value or a second resistance value, and when one of the variable resistors in each pair of variable resistors has a first resistance value, the other variable resistor may have a second resistance value.
[0035] The neuromorphic device may also include: a first weight line and a second weight line, electrically connected to the two ends of each of the variable resistors.
[0036] The neuromorphic device may also include a voltmeter configured to measure the voltage of a resistor line.
[0037] In another general aspect, a neuromorphic device includes: a first capacitor configured to be connected to a first resistor line via a first switch and to sample the total voltage of the first resistor line in a first state where the first switch is closed; a second capacitor configured to be connected to a second resistor line via a second switch and to sample the total voltage of the second resistor line in a first state where the second switch is closed; a third switch configured to connect the first capacitor and the second capacitor in parallel in a second state where the first switch is open and the second switch is open; and a voltmeter configured to measure a first voltage across the first capacitor and a second voltage across the second capacitor, and to output an output value based on the sum of the first voltage and the second voltage.
[0038] The output value can be the sum of the product of the inputs applied to the resistors included in each of the first and second resistor lines and their weights.
[0039] The first terminal of the first capacitor can be connected to the first resistor line in the first state, the first terminal of the second capacitor can be connected to the second resistor line in the first state, and the third switch can be connected between the first terminal of the first capacitor and the first terminal of the second capacitor.
[0040] The first terminal of the first capacitor can be connected to the first resistor line in the first state, the first terminal of the second capacitor can be connected to the second resistor line in the first state, and the third switch can be connected to the second terminal of the first capacitor and the second terminal of the second capacitor.
[0041] Other features and aspects will become clear from the following detailed description, the accompanying drawings, and the claims. Attached Figure Description
[0042] Figure 1 The diagram illustrates biological neurons and their operation.
[0043] Figure 2 An example of a neural network is shown.
[0044] Figure 3A and Figure 3B An example of a neuromorphic device is shown.
[0045] Figure 4 Showing the application to Figure 3A The structure and operation of the voltmeter of the neuromorphic device.
[0046] Figure 5A , Figure 5B and Figure 5C Showing the application to Figure 3A The structure and operation of the resistor in the neuromorphic device.
[0047] Figure 6 Showing the setting of weights to Figure 3A The structure and operation of the resistor in the neuromorphic device.
[0048] Figure 7 This shows when input and current are applied to Figure 3A The flow of electric current during the neuromorphic device.
[0049] Figure 8A and Figure 8B An example of the structure and operation of a neuromorphic device in which the same input is applied to two rows of resistor lines is shown.
[0050] Figure 9 It shows when current is applied to Figure 8B The operation of the neuromorphic device.
[0051] Figure 10A and Figure 10B An example of the structure and operation of a neuromorphic device that performs addition by multiplying the inputs applied to two rows of resistor lines with weights is shown.
[0052] Figure 11 It shows when current is applied to Figure 10B The operation of the neuromorphic device.
[0053] Figure 12A and Figure 12B An example of the structure and operation of a neuromorphic device is shown, which operates on the addition of the multiplication of the inputs applied to two rows of resistor lines with weights in the analog domain.
[0054] Figure 13A and Figure 13B An example of the structure and operation of a neuromorphic device is shown, which operates on the addition of the multiplication of the inputs applied to two rows of resistor lines with weights in the analog domain.
[0055] Figure 14 This is a chip block diagram of a neuromorphic device based on an example.
[0056] Figure 15 It is a block diagram of the electronic system based on the example.
[0057] Throughout the accompanying drawings and detailed embodiments, unless otherwise described or provided, the same reference numerals will be understood to denote the same elements, features, and structures. The drawings may not be to scale, and for clarity, illustration, and convenience, the relative dimensions, scale, and depiction of elements in the drawings may be exaggerated. Detailed Implementation
[0058] The following detailed embodiments are provided to aid the reader in gaining a comprehensive understanding of the methods, apparatus, and / or systems described herein. However, various changes, modifications, and equivalents of the methods, apparatus, and / or systems described herein will become apparent upon understanding this disclosure. For example, the order of operations described herein is merely illustrative and is not limited to the order set forth herein; rather, the order of operations may be altered, as will become clear upon understanding this disclosure, except for operations that must occur in a specific order. Furthermore, for clarity and conciseness, descriptions of features known upon understanding this disclosure may be omitted.
[0059] The features described herein may be implemented in different forms and should not be construed as limited to the examples described herein. Rather, the examples described herein have been provided merely to illustrate some of the many feasible ways of implementing the methods, apparatus, and / or systems described herein that will be clear upon understanding the disclosure of this application.
[0060] Throughout this specification, when a component is described as "connected to" or "attached to" another component, that component may be directly "connected to" or "attached to" that other component, or there may be one or more other components in between. Conversely, when an element is described as "directly connected to" or "directly attached to" another element, there may be no other elements in between. Similarly, similar expressions (e.g., "between" and "immediately between," and "adjacent to" and "closely adjacent to") should be interpreted in the same manner. As used herein, the term "and / or" includes any one of the associated listed items and any combination of any two or more.
[0061] Although terms such as “first,” “second,” and “third” may be used herein to describe various components, assemblies, regions, layers, or parts, these components, assemblies, regions, layers, or parts should not be limited by these terms. Rather, these terms are used only to distinguish one component, assembly, region, layer, or part from another. Thus, without departing from the teaching of the examples described herein, the first component, first assembly, first region, first layer, or first part referred to as the first component, first assembly, first region, first layer, or first part may also be referred to as the second component, second assembly, second region, second layer, or second part.
[0062] The terminology used herein is for the purpose of describing various examples only and is not intended to limit disclosure. Unless the context clearly indicates otherwise, the singular form is intended to include the plural form as well. The terms “comprising,” “including,” and “having” indicate the presence of the features, quantities, operations, components, elements, and / or combinations thereof stated therein, but do not preclude the presence or addition of one or more other features, quantities, operations, components, elements, and / or combinations thereof.
[0063] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains and based on the understanding derived from the disclosure of this application. Unless expressly defined herein, terms (such as those defined in a general dictionary) shall be interpreted as having the same meaning as they have in the relevant field and in the context of the disclosure of this application, and shall not be interpreted ideally or overly formally. The use of the term “may” herein in reference to examples or embodiments (e.g., regarding what an example or embodiment may include or implement) indicates the existence of at least one example or embodiment that includes or implements such a feature, while not all examples are limited thereto.
[0064] The examples described below relate to the technical field of neuromorphic devices (e.g., neuromorphic processors), and detailed descriptions of matters well known to those skilled in the art are omitted.
[0065] Unlike general-purpose digital computers that exchange information using a common data bus, neuromorphic devices may be equipped with analog circuitry for processing multiplication and addition operations, and examples are described below with reference to the accompanying drawings.
[0066] Figure 1 The biological neuron 10 and its operation are shown.
[0067] Reference Figure 1 The biological neuron 10 can represent a cell in the human nervous system and can be one of the basic biological computing objects. The human brain can include approximately 100 billion biological neurons and approximately 100 trillion interconnections between biological neurons.
[0068] The biological neuron 10 is a single cell and may include a neuron cell body containing a nucleus and various organelles. These organelles include mitochondria, numerous dendrites radiating from the neuron cell body, and axons that terminate in numerous branching extensions.
[0069] Typically, axons transmit signals from one neuron to another, and dendrites receive signals from other neurons. For example, when different neurons are connected to each other, signals transmitted through the axons of one neuron can be received by the dendrites of another neuron. In this case, signals between neurons are transmitted through dedicated connections called synapses, and some neurons connect to each other to form a neural network. Neurons that secrete neurotransmitters based on synapses are called presynaptic neurons, and neurons that receive information transmitted via neurotransmitters are called postsynaptic neurons.
[0070] The human brain learns and remembers vast amounts of information by transmitting and processing various signals through neural networks formed by interconnected neurons. Attempts to develop computing devices that can efficiently process large amounts of information by simulating biological neural networks continue.
[0071] Figure 2 An example of a neural network is shown.
[0072] Reference Figure 2 An example of an artificial neural network (i.e., neural network 20) simulating the biological neural network described above is shown. Neural network 20 may correspond to an example of a deep neural network (DNN). Although neural network 20 is shown as including two hidden layers (e.g., hidden layer 1 and hidden layer 2) for ease of explanation, neural network 20 may include a variety of numbers of hidden layers. Furthermore, although Figure 2 The neural network 20 is shown to include an input layer 21 for receiving input data, but the input data can be directly fed into the hidden layer.
[0073] In neural network 20, artificial nodes in layers other than the output layer can be connected to artificial nodes in the next layer via links for sending output signals. The output of an activation function, which is a weighted input to the artificial nodes included in the previous layer, can be input to the artificial nodes included in the current layer via links. The weighted input is the product of the artificial node's input (node value) and its weights, with the input corresponding to the axon values and the weights corresponding to the synaptic weights. The weights can be referred to as the parameters of neural network 20. Activation functions can include sigmoid, hyperbolic tangent, and ReLU functions; nonlinearity can be formed in neural network 20 through activation functions.
[0074] The output of any node 22 in the neural network 20 can be represented as shown in Equation 1 below.
[0075] Equation 1:
[0076]
[0077] Equation 1 can represent the output value y of the i-th node 22 in any layer for m input values. i x j w can represent the output value of the j-th node in the previous layer. j,i Let f represent the weight applied from node j to node i in the current layer. f() can represent the activation function. As shown in Equation 1, the input value x... j With weight w j,i The sum of the products can be used with respect to the activation function. In other words, the appropriate input value x is applied at the desired time point. j With weight w j,i The MAC operation of multiplication and addition can be repeated. Besides the uses mentioned above, there are various other application areas that require MAC operations. Therefore, neuromorphic devices capable of processing MAC operations in the analog domain can be used.
[0078] Figure 3A and Figure 3B An example of a neuromorphic device 100 is shown.
[0079] Figure 3A The architecture of a neuromorphic device 100 according to an example is shown. Figure 3B An example shows the need for... Figure 3A The neural network performs operations on the neuromorphic device.
[0080] Reference Figure 3A The neuromorphic device 100 may include a plurality of resistors (e.g., a first resistor R) connected in series with each other. 11 Second resistor R 12 and the third resistor R 13 ), providing applied resistors R from the first resistor to the third resistor. 11 R 12 and R 13 The current source 130 for the current I, and the measuring resistors R from the first resistor to the third resistor. 11 R 12 and R 13 The total voltage V of the resistor lines connected in series T1 The voltmeter reads 150. Total voltage V. T1 It includes the first to third resistors R in the resistor line. 11 R 12 and R 13 The voltage difference V between their respective ends 11 V 12 and V 13The sum of the values of the resistors is the voltage. Although there is no specific limit to the number of resistors connected in series, the number can range from 64 to 256. For ease of explanation, three resistors connected in series (i.e., the first resistor to the third resistor R) are... 11 R 12 and R 13 The structure of ) is described as an example.
[0081] Reference Figure 3B A neural network in which the first layer 170 has three nodes and the second layer 190 has two nodes is shown as an example. The first layer 170 can be... Figure 2 The second layer 190 can receive a value obtained by multiplying the output value by the weights of the first layer 170, and has the result of inputting the received value into the activation function as a node value, which can be provided as input to the next layer. Specifically, as shown in Equation 2, in the first node a1 of the second layer 190, three multiplication operations are performed, multiplying the output value of the first layer 170 by the weights corresponding to each link, and an addition operation is performed to sum the results of the multiplications. For ease of explanation, a description of the activation function is omitted.
[0082] Equation 2:
[0083] a1=x1·w 11 +x2·w 21 +x3·w 31
[0084] Figure 3A The neuromorphic device 100 is a device that can be used for the operation of Equation 2. (See reference...) Figure 3A The first resistor to the third resistor R 11 R 12 and R 13 Each of these can have a different resistance value relative to the current source 130. 11 This could be the first resistor corresponding to the first node of the first layer 170. Similarly, R 12 and R 13 These can be a second resistor corresponding to the second node of the first layer 170 and a third resistor corresponding to the third node of the first layer 170, respectively.
[0085] First resistor to third resistor R 11 R 12 and R 13 The resistance value relative to the current source 130 can be determined by the resistance applied to the first resistor through the third resistor R respectively. 11 R 12 and R 13 The inputs x1, x2, and x3 (or X1, X2, and X3) and the weights w11 w 21 and w 31 (or W) 11 W 21 and W 31 ) Determine. Input x1 can be the output value or node value of the first node (first layer 170) and the value applied to the first resistor R. 11 The input. Similarly, input x2 can represent the output value or node value of the second node and the value applied to the second resistor R. 12 The input, x3, can represent the output value or node value of the third node and the value applied to the third resistor R. 13 The input. In the weight w 11 In the diagram, the "1" on the left represents the first node of the first layer (170), and the "1" on the right represents the first node of the second layer (190). Weight w 11 It is the weight of the link between the first node of the first layer 170 and the first node a1 of the second layer 190, and it is the weight applied to the first resistor R. 11 The weights. Similarly, the weight w 21 and weight w 31 These are applied to the second resistor R. 12 The weights and the third resistor R 13 The weight.
[0086] The following description involves connecting the first resistor to the third resistor R. 11 R 12 and R 13 The resistance value relative to the current source 130 is set to have a value that can be represented by applying resistances R to the first to the third resistors respectively. 11 R 12 and R 13 The inputs x1, x2, and x3 and the weights w 11 w 21 and w 31 The method of obtaining the sum of the product of the input and the weights by multiplying the values obtained.
[0087] Assume that the inputs x1, x2, and x3 each have a value of 1 or -1, and the weights w 11 w 21 and w 31 Each also has a value of 1 or -1. An input of 1 or -1 indicates the value applied to each node of the first layer 170 or the first resistor through the third resistor R. 11 R 12 and R 13 Each input in the array is either 1 or -1. The weights w 11 w 21 and w 31A value of 1 or -1 can indicate the weight of the link assigned to each node in the first layer 170 and each node in the second layer 190, or the weight applied to the first resistor through the third resistor R. 11 R 12 and R 13 Each element has a weight of 1 or -1. The weight w 11 w 21 and w 31 It can be a value determined through training, or a value that is modified to meet conditions (such as the structure of the neural network, the type of input, etc.).
[0088] Since the inputs x1, x2, and x3 are related to the weights w 11 w 21 and w 31 The product can have a value of 1 or -1, therefore the first resistor to the third resistor R 11 R 12 and R 13 It is configured to have two resistance values that are different from each other. In other words, when one resistance value can be set to correspond to the product of the input and a weight of 1, the other resistance value can be set to correspond to the product of the input and a weight of -1. Various devices capable of changing resistance values (e.g., phase change devices, magnetic tunnel junction (MTJ) devices, etc.) can be used as resistors.
[0089] For example, when the product of the input and the weight is 1, the first resistor to the third resistor R... 11 R 12 and R 13 Each resistor in the series has a resistance value of 20Ω, and the first to third resistors R are set to 20Ω when the product of the input and the weight is -1. 11 R 12 and R 13 The case where the resistance value of each resistor is 5Ω is described as an example. When considering the first resistor R... 11 weight w 11 When both input x1 and weight w are 1, the input x1 and weight w are... 11 The product of and is 1. Therefore, the first resistor R 11 It can be set to have a resistance value of 20Ω relative to the current source 130. Optionally, when for the first resistor R... 11 weight w 11 When -1 and 1 are applied as input x1, the input x1 and the weight w 11 The product of and is -1. Therefore, the first resistor R 11 It can be set to have a resistance value of 5Ω relative to the current source 130. The above inputs x1, x2, and x3 are related to the weight w. 11 w 21 and w 31and the first to third resistors R 11 R 12 and R 13 The relationship between the resistance values can be summarized in Table 1 below.
[0090] Table 1
[0091] enter Weight Input × Weight Resistance value (Ω) 1 1 1 20 1 -1 -1 5 -1 1 -1 5 -1 -1 1 20
[0092] Regarding the first to third resistors R 11 R 12 and R 13 The inputs x1, x2, and x3 and the weights w 11 w 21 and w 31 As shown in Table 2, the method of operating the neuromorphic device 100 is described below.
[0093] Table 2
[0094] resistor enter Weight <![CDATA[First resistor R 11 > <![CDATA[x1=1]]> <![CDATA[w 11 =1]]> <![CDATA[Second resistor R 12 > <![CDATA[x2=1]]> <![CDATA[w 21 =-1]]> <![CDATA[Third resistor R 13 > <![CDATA[x3=-1]]> <![CDATA[w 31 =-1]]>
[0095] First resistor R 11 In the context, when 1 is used as input x1 and weight w is applied simultaneously... 11 When set to 1, the input x1 and weight w 11 The product of is 1·1 = 1. Therefore, referring to Table 1, the first resistor R 11 The resistance value relative to current source 130 was determined to be 20Ω. In the second resistor R... 12 In the middle, when 1 is used as input x2 and weight w is applied simultaneously 21 When set to -1, the input x2 and weight w 21 The product of these is 1·-1=-1. Therefore, the second resistor R 12 The resistance value relative to current source 130 was determined to be 5Ω. In the third resistor R... 13 In the above, when -1 is applied as input x3 and weight w is applied simultaneously... 31 When set to -1, the input x3 and weight w 31 The product of these is -1·-1 = 1. Therefore, the third resistor R... 13 The resistance value relative to the current source 130 was determined to be 20Ω.
[0096] When the first resistor to the third resistor R 11 R 12 and R 13 The resistance value relative to current source 130 is determined based on inputs x1, x2, and x3, and weight w. 11 w 21 and w 31When determined, a current with a specific current value (e.g., 1A) is obtained by using current source 130 through the first resistor to the third resistor R. 11 R 12 and R 13 A current flows through the series-connected resistors, and the voltage difference generated by the current is measured using a voltmeter 150. According to Ohm's law (V = I × R), when a current of 1 A flows through the first resistor to the third resistor R... 11 R 12 and R 13 Each of the resistors generates a voltage difference across its terminals equal to the resistance value. In this state, when the total voltage across the resistor lines (i.e., the third resistor R) is... 13 The lower end is connected to the first resistor R 11 The voltage difference V between the upper ends T1 When being measured, resistance is applied to the corresponding first to third resistors R. 11 R 12 and R 13 The total voltage, sum of the voltage differences, can be obtained. Furthermore, since the current intensity (e.g., 1A) is known, the corresponding first to third resistors R, connected in series with each other, are set... 11 R 12 and R 13 The sum of the resistance values can be obtained and applied to the corresponding first to third resistors R. 11 R 12 and R 13 The sum of the products of the input and the weights can be obtained from this. In other words, the combined resistance value can be obtained from the total voltage V across the resistor lines using Ohm's law (V = IR). T1 The measured values are obtained, and the combined resistance value can be connected in series with the corresponding first to third resistors R. 11 R 12 and R 13 The sum of their resistance values is the same. Furthermore, each resistance value represents the resistance applied to the first through third resistors R. 11 R 12 and R 13 The product of each input and its weight is applied to the corresponding first to third resistors R. 11 R 12 and R 13 The sum of the products of the input and the weights can be obtained from the total voltage. The relationship between the total voltage and the sum of the products of the input and the weights can be summarized in Table 3 below.
[0097] Table 3
[0098] Total voltage (V) The sum of the products of the input and the weights 15 -3 30 -1 45 1 60 3
[0099] When the total voltage based on a 1A current is 45V, referring to Table 3, the sum of the products of the input and the weights is 1. Alternatively, when another weight and another input are applied and the measured total voltage is 15V, even when the applied input and weights are unknown, the sum of the products can be seen to be -3. Tables 1 and 2 are used for resistors R from the first resistor to the third resistor. 11 R 12 and R 13 The inputs and weights of each element, as well as the relationship between current and voltage, can be summarized in Table 4 below.
[0100] Table 4
[0101]
[0102]
[0103] Figure 4 Showing applications Figure 3A The structure and operation of the voltmeter of the neuromorphic device 100.
[0104] Reference Figure 4 The voltmeter 150 performs the application of the voltage to the voltage. Figure 3A First resistor to third resistor R 11 R 12 and R 13 The method of summing the products of each input and weight is described as an example.
[0105] Voltmeter 150 may include a reference voltage generator 151 and a comparator 153, and operates in a manner that finds the portion to which the measured voltage belongs by comparing whether the measured voltage is higher or lower than the reference voltage. Voltmeter 150 may be implemented by an analog-to-digital converter (ADC) or a multi-stage sense amplifier (MLSA), but the configuration is not limited to these.
[0106] Figure 4 The voltmeter 150 may include a reference voltage generator 151 and three comparators 153. The reference voltage generator 151 provides three reference voltages (e.g., 22.5V, 37.5V, and 52.5V), and the three comparators 153 output the comparison results between the reference voltages and the measured voltage. However, for ease of interpretation, the graph of the reference voltage is arbitrary, and the reference voltage is not limited to this, and may be set to other graphs. To measure the total voltage V applied to the resistor line... T1 The circuit can be configured such that the total voltage V T1 A reference voltage (V) is applied to one input of each comparator 153, and different reference voltages (e.g., 22.5V, 37.5V, and 52.5V) provided by the reference voltage generator 151 are applied to the other input of each comparator 153. This is related to the total voltage V.T1 The corresponding part can be used Figure 4 The comparator 153 is classified into four parts. Specifically, this classification can be divided into four parts: the total voltage V... T1 The first part ≥52.5V, 52.5V>V T1 The second part ≥37.5V, 37.5V>V T1 The third part ≥22.5V and 22.5V>V T1 Part Four.
[0107] The output of voltmeter 150 belongs to which part of this section based on the total voltage V? T1 The measurement results are determined, and the sum of the products of the input and weights can be output. For example, when the total voltage V is measured... T1 When it belongs to the first part, 3 can be output as the result value, and when the total measured voltage V T1 When it belongs to the second part, 1 can be output as the result value. The above description can be summarized in Table 5 below. The voltage range of each part depends on the intensity of the applied current and the resistance value of the resistor. Therefore, the voltage range of each part can vary depending on the applied current and resistance.
[0108] When the total voltage V is measured T1 When it is 45V, due to the measured total voltage V T1 Belonging to the second part, therefore referring to Table 5, voltmeter 150 outputs a result value of 1. The result value 1 is related to the values applied to the first resistor through the third resistor R. 11 R 12 and R 13 The sum of the products of the inputs and weights for each voltmeter is the same. The output value of voltmeter 150 can be a digital value or a binary number. For example, when the output value of voltmeter 150 is 3, the binary number "11" can be output. The output value may include a binary number that includes a separate sign bit indicating the sign.
[0109] Table 5
[0110] part Voltage range Input × Sum of weights Part One <![CDATA[V T ≥52.5V]]> 3 Part Two <![CDATA[52.5V>V T ≥37.5V]]> 1 Part Three <![CDATA[37.5V>V T ≥22.5V]]> -1 Part Four <![CDATA[22.5V>In T ]]> -3
[0111] Figures 5A to 5C Showing applications Figure 3A Structure and operation of the resistor in the neuromorphic device 100.
[0112] Reference Figure 5A The structure of the resistor is described below. Figure 5AThe resistive memory cell may include a pair of variable resistors Ra and Rb comprising MTJ devices connected in parallel, and a pair of transistors Sa and Sb connected in series with the variable resistors Ra and Rb, respectively. The variable resistor implemented by the MTJ may have a resistance value that varies according to the strength and direction of the supplied current (or voltage), and may exhibit non-volatile characteristics that maintain the resistance value even when the input current (or voltage) is cut off.
[0113] The MTJ device may include a pinned layer L3, a free layer L1, and a tunnel layer L2 situated therebetween. The magnetization direction of the pinned layer L3 is fixed, while the magnetization direction of the free layer L1 may be the same as or different from the magnetization direction of the pinned layer L3, depending on the conditions. For example, to fix the magnetization direction of the pinned layer L3, layers for forming an antiferromagnetic layer and / or synthesizing an antiferromagnetic layer may be further provided.
[0114] The magnetization direction of the free layer L1 can be changed by electromagnetic factors disposed inside and / or outside the resistive memory cell. The free layer L1 may comprise a material with a changeable magnetization direction (e.g., a ferromagnetic material). The free layer L1 may comprise, for example, CoFeB, FeB, Fe, Co, Ni, Gd, Dy, CoFe, NiFe, MnAs, MnBi, MnSb, CrO2, MnOFe2O3, FeOFe2O3, NiOFe2O3, CuOFe2O3, MgOFe2O3, EuO, Y3Fe5O 12 and / or combinations thereof.
[0115] The tunnel layer L2 may have a thickness thinner than the spin diffusion distance and may include non-magnetic materials (e.g., oxides of magnesium (Mg), titanium (Ti), aluminum (Al), magnesium zinc (MgZn) and magnesium boron (MgB), titanium (Ti), vanadium (V) and / or combinations thereof).
[0116] The pinning layer L3 may have a magnetization direction fixed by the antiferromagnetic layer. The pinning layer L3 may comprise a ferromagnetic material (e.g., CoFeB, FeB, Fe, Co, Ni, Gd, Dy, CoFe, NiFe, MnAs, MnBi, MnSb, CrO2, MnOFe2O3, FeOFe2O3, NiOFe2O3, CuOFe2O3, MgOFe2O3, EuO, Y3Fe5O). 12 and / or a combination thereof).
[0117] As described above, in order to fix the magnetization direction of the pinning layer L3, the MTJ device may further include an antiferromagnetic layer and / or a synthetic antiferromagnetic layer. The antiferromagnetic layer may include an antiferromagnetic material (e.g., PtMn, IrMn, MnO, MnS, MnTe, MnF2, FeC). l2 ,FeO,CoC l2 CoO, NiC l2 The synthetic antiferromagnetic layer may include spacers and pinning layers. Spacers may include Cu, Ru, Ir, and / or combinations thereof, and pinning layers may have strong magnetic anisotropy. Pinning layers may include alloys or multiple layers of ferromagnetic materials (such as Co, Ni, Fe, etc.) and antiferromagnetic materials (such as Pt, Pd, Cr, Ir, etc.). Figure 5A In this context, X and X' can represent inputs.
[0118] Figure 5B and Figure 5C Showing according to the stored Figure 5A The magnetization direction of the MTJ device in the resistor data.
[0119] The resistance value of the MTJ device can be varied according to the magnetization direction of the free layer L1. The intensity of the write current used to vary the magnetization direction of the free layer L1 can be much greater than the intensity of the drive current. When the magnetization direction of the free layer L1 is determined to give the MTJ device a specific resistance value, this direction can be determined by supplying the write current. Then, the drive current (or read current) provided to use or read the resistance value of the MTJ device can be much smaller than the write current so as not to change the already determined magnetization direction of the free layer L1.
[0120] Figure 5B The magnetization directions of the free layer L1 and the pinned layer L3 in the MTJ device are shown to be parallel to each other. When the magnetization directions are parallel as shown above, the MTJ device can have a low resistance value (e.g., a resistance value of 5 Ω). Figure 5C The magnetization directions of the free layer L1 and pinned layer L3 in the MTJ device are shown to be antiparallel to each other. When the magnetization directions are antiparallel as shown above, the MTJ device can have a high resistance value (e.g., a resistance value of 20 Ω).
[0121] Figure 6 Showing the setting of weights to Figure 3A Structure and operation of the resistor in the neuromorphic device 100.
[0122] In the following description, refer to Figure 6 Detailed description of applying weights and inputs to the included Figure 3A Method of resistors in neuromorphic device 100.
[0123] Reference Figure 6The first resistor to the third resistor R 11 R 12 and R 13 Each of the resistors may have a structure comprising a pair of variable resistors connected in parallel and a pair of switches connected in series with each variable resistor. However, the number and configuration of the variable resistors in each resistor are not limited thereto, and each resistor may include more than two variable resistors connected in parallel. For ease of explanation, Figure 6 The variable resistor device can have a resistance value of 20Ω or 5Ω depending on the direction of the voltage applied between its two ends. Specifically, when a potential exceeding a specific voltage greater than the voltage at the second end is applied to the first end, the variable resistor R... 11a R 11b R 12a R 12b R 13a and R 13b Each of the resistors can be set to have a resistance value of 20Ω, but when a potential exceeding a specific voltage greater than the voltage at the first terminal is applied to the second terminal, the variable resistor R... 11a R 11b R 12a R 12b R 13a and R 13b Each of them can be set to have a resistance value of 5Ω. For example, refer to Figure 6 When +100V is applied to the first resistor R 11 The first variable resistor R 11a When the first variable resistor R is at both ends, 11a It was set to 20Ω. However, when -100V was applied to the first resistor R... 11 The first variable resistor R 11a When the first variable resistor R is at both ends, 11a It is set to 5Ω.
[0124] In this example, a pair of variable resistors included in a single resistor can be complementaryly set to have different values. For example, when the first variable resistor R... 11a When set to 20Ω, the second variable resistor R 11b It can be set to 5Ω when the first variable resistor R 11a When set to 5Ω, the second variable resistor R 11b It can be set to 20Ω.
[0125] The first variable resistor R 11a Whether to set it to 20Ω or 5Ω can be determined by applying a resistor R to the first resistor. 11 The weight value is determined by the value applied to the first resistor R. 11 weight w11 It is 1 or -1, and is applied to the first resistor R. 11 When the weight is 1, the first variable resistor R 11a It can be set to have 20Ω. In this state, because the second variable resistor R... 11b With the first variable resistor R 11a The second variable resistor R is set up complementaryly. 11b It is set to 5Ω. Similarly, when applied to the first resistor R... 11 weight w 11 When the value is -1, the first variable resistor R 11a It can be set to 5Ω, and the second variable resistor R 11b It can be set to work with the first variable resistor R 11a Complementary 20Ω.
[0126] Second resistor R 12 and the third resistor R 13 In, such as in the first resistor R 11 As in the example, when the applied weight is 1, the first variable resistor R... 12a and R 13a It can be set to 20Ω, and the second variable resistor R 12b and R 13b It can be set to 5Ω. Furthermore, when the applied weight is -1, the first variable resistor R... 12a and R 13a It can be set to 5Ω, and the second variable resistor R 12b and R 13b It can be set to 20Ω.
[0127] A pair of switches included in a resistor can be designed to operate according to resistors R applied to the first to the third resistor respectively. 11 R 12 and R 13 The inputs x1, x2, and x3 operate complementaryly. Specifically, when the first switch S... 11a S 12a and S 13a When closed, the second switch S 11b S 12b and S 13b It can be designed to be open when the first switch S 11a S 12a and S 13a When disconnected, the second switch S 11b S 12b and S 13bIt can be designed to be closed. Because the above switches (without limitation) can be implemented in various ways using metal-oxide-semiconductor field-effect transistors (MOSFETs) and simple circuits, a detailed description of the structure of complementary operation switches is omitted.
[0128] Which switch will be opened or closed can be determined by applying resistors R to the first through third resistors respectively. 11 R 12 and R 13 The inputs x1, x2, and x3 are determined. They are applied from the first resistor to the third resistor R. 11 R 12 and R 13 Each of the inputs can be 1 or -1. When the input is 1, the first switch S can be configured to... 11a S 12a and S 13a Can be closed and the second switch S 11b S 12b and S 13b It can be disconnected. Similarly, when applied to the first resistor to the third resistor R... 11 R 12 and R 13 When each input in the array is -1, the first switch S can be configured to... 11a S 12a and S 13a Disconnect and the second switch S 11b S 12b and S 13b closure.
[0129] Additionally, when the first resistor R 11 When the input x1 is 1, the circuit can be designed such that the first switch S 11a Close and the second switch S 11b Disconnect to allow current to flow through the first variable resistor R 11a Flow in. Conversely, when the first resistor R 11 When the input x1 is -1, the circuit can be designed to make the second switch S 11b Close and the first switch S 11a Disconnect to allow current to flow through the second resistor R. 11b Flowing in the middle. With the first resistor R 11 Similarly, the second resistor R 12 and the third resistor R 13 It can be configured such that: when the applied inputs x2 and x3 are 1, the first switch S 12a and S 13a Close and the second switch S 12b and S 13b Disconnect when the applied inputs x2 and x3 are -1, and the first switch S is open.12a and S 13a Disconnect and the second switch S 12b and S 13b closure.
[0130] Figure 6 The circuit structure shown may correspond to a portion of the circuit design provided in the neuromorphic device 100. Therefore, the neuromorphic device 100 may include... Figure 6 The circuit structures described herein, and each circuit structure can be implemented to be interconnected and combined with each other in the neuromorphic device 100.
[0131] Figure 7 This shows when input and current are applied to Figure 3A The flow of electric current during the neuromorphic device.
[0132] In the following description, refer to Figure 6 and Figure 7 Describes the computation of inputs x1, x2, and x3 with weights w. 11 w 21 and w 31 The handling of the sum of products.
[0133] First, the weight to be applied to each resistor is set. Referring to the example in Table 4, the weight applied to the first resistor R... 11 weight w 11 The value is 1, applied to the second resistor R. 12 weight w 21 -1 is applied to the third resistor R. 13 weight w 31 It is -1.
[0134] As described above, due to the application to the first resistor R 11 weight w 11 The value is 1, therefore the first resistor R 11 The first variable resistor R 11a It is set to 20Ω, and the second variable resistor R 11b It is set to 5Ω. When the first variable resistor R 11a The second variable resistor R is 5Ω. 11b When set to 20Ω, the resistance value can be changed. This is for setting and checking the variable resistor R. 11a and R 11b The resistance value is determined by setting a first weight line WL1 and a second weight line WL2 on one side of the resistor lines. In one example, the first weight line may be electrically connected to one end of each variable resistor, and the second weight line may be electrically connected to the other end of each variable resistor. First, when the switch S... 11a S R1 and S R12When a potential 100V greater than that of the second weighting line WL2 is applied to the first weighting line WL1 at the same time the circuit is closed, a voltage V1 of +100V is applied to the first variable resistor R. 11a The two ends, and the first variable resistor R 11a The current is set to 20Ω due to the voltage V1. The driving of the switch used to set the weights and the application of the voltage / current can be performed by a separate weight controller. Similarly, when in switch S... 11b S R1 and S R12 When a potential 100V lower than that applied to the second weighting line WL2 is applied to the first weighting line WL1 at the same time the circuit is closed, a voltage V1 of -100V is applied to the second variable resistor R. 11b The two ends, and the second variable resistor R 11b It is set to 5Ω.
[0135] The process of checking whether the variable resistor is properly set can be performed separately. For example, the setting of the first variable resistor R can be checked by the following method. 11a Resistance value: via switch S 11a S R1 and S R12 By closing the circuit and grounding the second weighted line WL2, a specific current (test current) is allowed to flow in the first weighted line WL1 to measure the voltage generated in the first weighted line WL1. Similarly, the second variable resistor R can be checked by the following method. 11b Resistance value: via switch S 11b S R1 and S R12 While closing and grounding the second weight line WL2, test current is allowed to flow in the first weight line WL1 to measure the voltage generated in the first weight line WL1.
[0136] When the first resistor R 11 weight w 11 When the setting is complete, the second resistor R 12 weight w 21 It can be set. This is due to the application of a second resistor R. 12 weight w 21 The value is -1, therefore the second resistor R 12 The first variable resistor R 12a It is set to 5Ω, and the second variable resistor R 12b It is set to 20Ω. When the first variable resistor R 12a It is set to 20Ω and the second variable resistor R 12b When set to 5Ω, the variable resistor's setting can be changed. The method for changing the variable resistor's resistance value is similar to that of the first resistor R.11 The method described in the text is omitted here for its detailed description. In the second resistor R... 12 During the weighting test, the voltage on the second weighting line WL2 can be measured by allowing the first weighting line WL1 to be grounded and allowing test current to flow in the second weighting line WL2. When the second resistor R... 12 The weight w in 21 When the setting is complete, the third resistor R 13 weight w 31 It is set. Due to the application of the third resistor R 13 weight w 31 The value is -1, therefore the third resistor R 13 The first variable resistor R 13a It is set to 5Ω, and the second variable resistor R 13b It is set to 20Ω. Since the setting method is similar to that of the first resistor, its detailed description is omitted. The resistance values of the resistors described above can be summarized in Table 6 below.
[0137] Table 6
[0138]
[0139] When the first resistor to the third resistor R 11 R 12 and R 13 weight w 11 w 21 and w 31 When the setup is complete, inputs x1, x2, and x3 are applied from the first resistor to the third resistor R. 11 R 12 and R 13 . Reference Figure 6 Due to the first resistor R 11 The input x1 is 1, therefore the first switch S 11a Close and the second switch S 11b Disconnect. Similarly, due to the second resistor R 12 The input x2 is 1, therefore the first switch S 12a Close and the second switch S 12b Disconnect. Furthermore, due to the third resistor R... 13 The input x3 is -1, therefore the first switch S 13a Disconnect and the second switch S 13b closure.
[0140] When the weight w 11 w 21 and w 31 And inputs x1, x2, and x3 are applied to the first resistor through the third resistor R.11 R 12 and R 13 At the completion of each step, a constant current (e.g., 1A) is applied from current source 130 to the resistor line. Figure 7 As shown, the applied current flows through the first resistor R. 11 The first variable resistor R 11a Second resistor R 12 The first variable resistor R 12a and the third resistor R 13 The second variable resistor R 13b Then, the total voltage generated in the resistor wires due to the current is measured. The total voltage can be calculated using Ohm's law and Equation 3. In this state, the resistance and voltage drop due to the switching and wiring are very small and can be ignored.
[0141] Equation 3
[0142] V T1 =I1×R 11a +I1×R 12a +I1×R 13b
[0143] In equation 3, since I1 is 1A, and R 11a R 12a and R 13b The Ω values are 20Ω, 5Ω, and 20Ω respectively, so V T1 It can be calculated as 45V. It can be seen that, through the use of... Figure 4 A voltmeter 150 measures the total voltage V. T1 Furthermore, referring to Table 5, the measured voltage corresponds to the second part, and the sum of the product of the input applied to the resistor line and the weight is 1.
[0144] Figure 8A and Figure 8B An example of the structure and operation of a neuromorphic device in which the same input is applied to two rows of resistor lines is shown.
[0145] In the following description, refer to Figure 8A and Figure 8B The structure and operation of a neuromorphic device that operates on inputs and weights applied to two nodes are described as an example.
[0146] exist Figure 8A In the example, a neural network with a first layer 170 having three nodes and a second layer 190 having two nodes is shown. In the first node a1 of the second layer 190, as in Equation 2, the inputs x1, x2, and x3 from the first layer 170 are coupled with their weights w. 11 w 21 and w31 The three multiplication operations and the addition operation that sums the results of the multiplications can be performed. Similarly, in the second node a2 of the second layer 190, as in Equation 4, the inputs x1, x2, and x3 from the first layer 170 are combined with their weights w. 12 w 22 and w 32 (or W) 12 W 22 and W 32 The three multiplication operations and the addition operation that sums the results of the multiplications can be performed.
[0147] Equation 4
[0148] a2=x1·w 12 +x2·w 22 +x3·w 32
[0149] Since the above describes in detail the method for driving the neuromorphic device used to perform operations in the first node a1, its redundant description is omitted.
[0150] Reference Figure 8B Two rows of resistor lines, including a first resistor line RL1 and a second resistor line RL2, are configured. The first resistor line RL1 performs an operation on a first node a1, and the second resistor line RL2 performs an operation on a second node a2. As shown, it is possible to configure such that the same input is applied to the resistors configured in the same row. For example, although the first resistor R applied to the first resistor line RL1... 11 The first resistor R of the second resistor line RL2 21 The weights are different from each other, but the same input can be applied to the first resistor R. 11 and the first resistor R 21 The voltmeter 150 can be individually located at each resistor line, or it can be configured to measure the voltage of the first resistor line RL1 and the second resistor line RL2 by using only one voltmeter that utilizes the time difference. Figure 8B An example using a voltmeter 150 is shown. Furthermore, Figure 8B An example is shown where current sources 131 and 133 are respectively located at the first resistor line RL1 and the second resistor line RL2, but the configuration is not limited to this, and a structure in which current is sequentially applied to the first resistor line RL1 and the second resistor line RL2 using a single current source can be used. In one example, at least one current source 131 may be connected to the first resistor line RL1, and at least one current source 133 may be connected to the second resistor line RL2.
[0151] Figure 9 It shows when current is applied to Figure 8B The operation of the neuromorphic device.
[0152] In the following description, refer to Figure 9 describe Figure 8B The operation of the neuromorphic device. For ease of explanation, the inputs x1, x2, and x3, and the weight w, are related to the first resistor line RL1. 11 w 21 and w 31 The inputs and weights are the same as in Table 2. The inputs x1, x2, and x3 related to the second resistor line RL2 are common to the inputs of the first resistor line RL1, and the weight w of the second resistor line RL2 is the same. 12 w 22 and w 32 Make w 12 =-1, w 22 =-1 and w 32 An example of 1 is described.
[0153] First, weights are set for the first resistor line RL1 and the second resistor line RL2. The variable resistors included in the first resistor line RL1 are set as described above and are the same as those in Table 6. The method for setting the variable resistors included in the second resistor line RL2 is the same as the method described above and can be summarized in Table 7 below.
[0154] Table 7
[0155]
[0156]
[0157] When the weights of the first resistor line RL1 and the second resistor line RL2 are set, inputs x1, x2, and x3 can be applied to the first resistor line RL1 and the second resistor line RL2 simultaneously or sequentially. Inputs x1, x2, and x3 can be applied to the first resistor line RL1 and the second resistor line RL2 by operating a switch included in the first resistor line RL1 and the second resistor line RL2, where switch S... 21a S 21b S 22a S 22b S 23a and S 23b The operation method is the same as described above. Due to the applied input, the three switches S of the second resistor line RL2... 21a S 22a and S 23b Close, and the three switches S of the second resistor line RL2 are closed. 21b S 22b and S 23a Disconnect. (See reference) Figure 9 Since the inputs x1, x2, and x3 applied to the first resistor line RL1 and the second resistor line RL2 are the same, it can be seen that the current flows through the first resistor line RL1 and the second resistor line RL2 through the same path.
[0158] When inputs x1, x2, and x3 are applied to the first resistor line RL1 and the second resistor line RL2, current is applied to each of the first resistor line RL1 and the second resistor line RL2, and the total voltage is measured at the top of each of the resistor lines RL1 and RL2. Although the currents I1 and I2 applied to the first resistor line RL1 and the second resistor line RL2 may be the same or different from each other, in the example described below, the same current (i.e., 1A) is applied.
[0159] As described above, the total voltage generated in the first resistor line RL1 due to the 1A current is 45V, and the total voltage in the second resistor line RL2 is 15V. Therefore, referring to Table 3, voltmeter 150 can output as inputs x1, x2, and x3 applied to the second resistor line RL2, along with weight w. 12 w 22 and w 32 The sum of the products is -3. The inputs, weights, and voltages of each resistor due to the current source for the second resistor line RL2 can be summarized in Table 8 below.
[0160] Table 8
[0161] Second resistor line RL2 enter Weight Input × Weight Resistance (Ω) Current (A) Voltage (V) <![CDATA[First resistor R 21 > 1 -1 -1 5 1 5 <![CDATA[Second resistor R 22 > 1 -1 -1 5 1 5 <![CDATA[Third resistor R 23 > -1 1 -1 5 1 5 resistor wire n / a n / a n / a 15 1 15
[0162] Figure 10A and Figure 10B An example of the structure and operation of a neuromorphic device that performs addition by multiplying the inputs applied to two rows of resistor lines with weights is shown.
[0163] In the following description, refer to Figure 10A and Figure 10B Neuromorphic devices and their driving methods that can be used even when the number of applied inputs exceeds the number of resistors included in a resistor line are described.
[0164] Reference Figure 10A A network with a first layer 270 having six nodes and a second layer 290 having two nodes is shown as an example. In the first node a1 of the second layer 290, as in Equation 5, the inputs x1, x2, x3, x4, x5, and x6 (or referred to as X1, X2, X3, X4, X5, and X6) from the first layer 270 are coupled with their weights w. 11 w 21 w 31 w 41 w51 and w 61 (or W) 11 W 21 W 31 W 41 W 51 and W 61 The six multiplication operations and the addition operation that sums the results of the multiplications can be performed. In one example, similar to the first node a1, in the second node a2 of the second layer 290, the inputs X1, X2, X3, X4, X5, and X6 from the first layer 270 are combined with their weights W. 12 W 22 W 32 W 42 W 52 and W 62 The six multiplication operations and the addition operation that sums the results of multiplication can be performed.
[0165] Equation 5
[0166] a1=x1·w 11 +x2·w 21 +x3·w 31 +x4·w 41 +x5·w 51 +x6·w 61
[0167] Figure 10B An example of the structure of a neuromorphic device for operations performed in the first node a1 is shown. (Refer to...) Figure 10B The neuromorphic device may include two rows of resistor lines RL1 and RL2, current sources 231 and 233, and a voltmeter 250, and first to third resistors R. 11 R 12 and R 13 and the first to third resistors R 14 R 15 and R 16 Connected in series to the two resistor lines RL1 and RL2 respectively, current sources 231 and 233 are used to apply current to the corresponding resistor lines RL1 and RL2, and voltmeter 250 is used to measure the total voltage applied to each of the resistor lines RL1 and RL2. (Refer to...) Figure 10B and Figure 8B The difference between the described examples lies in the fact that the inputs applied to resistors arranged in the same row are independent of each other. For example, due to the first resistor R applied to the first resistor line RL1... 11 The input x1 and the first resistor R applied to the second resistor line RL2 14 The inputs x4 are independent of each other, so different values can be applied to the first resistor R. 11and the first resistor R 14 In other words, when input x1 is 1, input x4 is -1. Therefore, different values can be input to resistor R located in the same row. 11 and R 14 To independently apply the input, the input is applied to the first resistor to the third resistor R, which are included in the first resistor line RL1. 11 R 12 and R 13 The input line (not shown, for example, the gate line of a switch connected in series with a variable resistor) and the first to third resistors R included in the second resistor line RL2 for applying the input. 14 R 15 and R 16 The input lines can be configured to be controlled independently. The application of the input can be controlled by a separate controller (not shown). In this state, the controller for controlling the application of the input and the controller for controlling the application of the weights can be implemented by a separate device or a single device.
[0168] Despite Figure 10A The number of multiplication operations required in the first node a1 of the second layer 290 is 6, but the number of resistors included in a single resistor line is 3. Therefore, when multiple multiplication operations are not processed in a single resistor line, Figure 10B The structure can be used.
[0169] exist Figure 10A and Figure 10B In the example description, an example is described where the number of requested multiplication operations is the same as the number of resistors included in the two resistor lines, and the value required to describe the operation assumed to be performed in the first node a1 is the same as the value shown in Table 9.
[0170] Table 9
[0171]
[0172] The operation of Equation 5 performed at the first node a1 can be divided into operations performed on the first resistor line RL1 as in Equation 6, and operations performed on the second resistor line RL2 as in Equation 7. The final result can be obtained by summing the results of each operation.
[0173] Equation 6
[0174] First resistor line RL1: x1·w 11 +x2·w 21 +x3·w 31
[0175] Equation 7
[0176] Second resistor line RL2: x4·w 41 +x5·w 51 +x6·w 61
[0177] To perform the calculation, a weight is set for each resistor, an input is applied to each resistor, and then current is applied to each resistor line. The current I1 supplied to the first resistor line RL1 and the current I2 supplied to the second resistor line RL2 can be the same value or different values. As an example, suppose the current I1 in the first resistor line RL1 is 1A and the current I2 in the second resistor line RL2 is 2A. Figure 10B Examples of separate current sources 231 and 233 applying current to the first resistor line RL1 and the second resistor line RL2 respectively are shown, but the configuration is not limited to this, and a current source may apply current to each resistor line by utilizing a time difference.
[0178] Figure 11 It shows when current is applied to Figure 10B The operation of the neuromorphic device.
[0179] Reference Figure 11 Since the input values applied to the resistors included in each of the first resistor line RL1 and the second resistor line RL2 are different from each other, it can be seen that the paths of current flow in each resistor line are different from each other.
[0180] In the summary of the values calculated using the first resistor line RL1 and the second resistor line RL2, since Equation 6 is set to be the same as Equation 2, the result for the first resistor line RL1 is the same as the result in Table 4. The result for the second resistor line RL2, summarized in a similar manner, is shown in Table 10 below.
[0181] Table 10
[0182] Second resistor line RL2 enter Weight Input × Weight Resistance (Ω) Current (A) Voltage (V) <![CDATA[First resistor R 14 > 1 -1 -1 5 2 10 <![CDATA[Second resistor R 15 > -1 1 -1 5 2 10 <![CDATA[Third resistor R 16 > -1 1 -1 5 2 10 resistor wire n / a n / a n / a 15 2 30
[0183] Thus, the total voltage measured at the upper end of the second resistor line RL2 corresponds to 30V, and this value corresponds to the fourth part of Table 11, which indicates the results for the various parts with respect to the 2A current. Therefore, it can be seen that the result of Equation 7 is -3.
[0184] [Table 11]
[0185] part Voltage range for each section Input × Sum of weights Part One <![CDATA[V T ≥105V]]> 3 Part Two <![CDATA[105V>In T ≥75V]]> 1 Part Three <![CDATA[75V>In T ≥45V]]> -1 Part Four <![CDATA[45V>In T ]]> -3
[0186] Therefore, it can be seen that the values corresponding to the calculation results of Equations 6 and 7 are obtained, and the result value of Equation 5, which is the result of the operation performed in the first node a1 of the second layer 290, is -2, which is the value obtained by summing the result values of Equations 6 and 7. Although the calculation of summing the result values of Equations 6 and 7 can be performed in the digital circuit domain, the configuration is not limited to this.
[0187] exist Figures 8A to 11 In the examples described, for ease of explanation, an example is presented where the number of resistors included in a single resistor line is three and the number of resistor lines is two. However, the configuration is not limited to this, and the number of resistors included in a single resistor line and the number of resistor lines used for operation can be changed. For example, as referenced... Figures 10A to 11 As described in the example, when the number of multiplication operations required for a particular node is greater than the number of resistors included in a single resistor line, the multiplication operations can be performed by using two or more resistor lines.
[0188] As the number of resistors included in a neuromorphic device becomes limited while the amount of input processed in the neuromorphic device increases, as referenced Figures 10A to 11 The use of structures like those described in the example is likely to occur frequently. Specifically, when the total voltage is measured after current is applied to a series-connected resistor line, the maximum voltage that can be applied to the resistor line increases with the number of input lines (i.e., with the number of series-connected resistors). However, the number of series-connected resistors may be limited because the maximum voltage that can be applied to the resistor line may not exceed the supply voltage of the current source. Furthermore, noise increases with the number of series-connected resistors, potentially leading to reliability issues. Therefore, when an input greater than the number of series-connected resistors is applied, the operation may not be able to be processed simultaneously using a single resistor line. Instead, the input may be divided and applied to multiple resistor lines, or the input may be divided and applied to a single resistor line with a time difference for partial calculation, and the results can then be summed.
[0189] Figure 12A and Figure 12B An example of the structure and operation of a neuromorphic device is shown, which operates on the addition of the multiplication of the inputs applied to two rows of resistor lines with weights in the analog domain.
[0190] In the following description, refer to Figure 12A and Figure 12B The summation of the results of Equations 6 and 7 in the examples described above, performed in the analog circuit domain, is described.
[0191] and Figure 10BCompared to the neuromorphic device shown in the figure, Figure 12A The neuromorphic device shown may further include a first capacitor C1 electrically connected to a first resistor line RL1 and a second capacitor C2 electrically connected to a second resistor line RL2, and may include a voltmeter 350 configured to measure the voltage between the terminals of each of the first capacitor C1 and the second capacitor C2. The first capacitor C1 and the second capacitor C2 may have the same capacitance. The capacitance may have a value, for example, from 0.1 fF to 100 fF.
[0192] exist Figure 12A and Figure 12B In this embodiment, it is assumed that the inputs and weights are the same as those in Table 9, and the first current I1 and the second current I2 are the same as 1A. As mentioned above, separate current sources can be arranged to supply the current flowing in each resistor line, but the configuration is not limited to this, and a current source can sequentially apply current to each resistor line. The inputs, weights, and voltages for the first resistor line RL1 are the same as those in Table 4, and the inputs, weights, and voltages for the second resistor line RL2 are the same as those in Table 12.
[0193] Table 12
[0194]
[0195]
[0196] In the following description, via Figure 12A and Figure 12B The example describes a method for performing the sum of the products of the inputs and weights of resistors applied to different resistor lines included in the analog circuit domain.
[0197] First, weights and inputs are applied to each resistor, and the same amount of current is applied to each resistor line. In this state, the voltage generated at the top of each resistor line is sampled by a different capacitor.
[0198] The total voltage V across the first resistor line RL1 T1 The total voltage V across the second resistor line RL2 is sampled from the first capacitor C1. T2 The sample is taken from the second capacitor C2. One end of the first capacitor C1 is electrically connected to the upper end of the first resistor line RL1, therefore the total voltage V across the first resistor line RL1 is... T1 The voltage across one end of the first capacitor C1 can be sampled. Similarly, one end of the second capacitor C2 is electrically connected to the upper end of the second resistor line RL2, therefore the total voltage V across the second resistor line RL2 is also sampled. T2 The voltage at one end of the same second capacitor C2 can be sampled.
[0199] like Figure 12A As shown, during sampling, since the first capacitor C1 is electrically connected to the upper end of the first resistor line RL1, the first capacitor switch S located between the first capacitor C1 and the first resistor line RL1... c1 The circuit is closed, and since the second capacitor C2 is electrically connected to the upper end of the second resistor line RL2, the second capacitor switch S located between the second capacitor C2 and the second resistor line RL2 is activated. C2 It is also closed. The electrical connection between the capacitors, the switch S between the first capacitor C1 and the second capacitor C2. C12 Disconnect. Thus, the state in which the first capacitor C1 and the second capacitor C2 are electrically connected to the first resistor line RL1 and the second resistor line RL2, respectively, to sample the voltage, can be referred to as the first state. The upper end of each of the first capacitor C1 and the second capacitor C2 is grounded. Therefore, in the first state, due to the total voltage V across the first resistor line RL1... T1 The voltage across the first capacitor C1 and the total voltage V across the first resistor line RL1 T1 The same applies, and due to the total voltage V across the second resistor line RL2. T2 The voltage across the second capacitor C2 and the total voltage V across the second resistor line RL2 T2 The same. Therefore, according to Q = CV, the amount of charge Q charged in the first capacitor C1 is... 11 For C×V T1 Similarly, the amount of charge Q charged in the second capacitor C2 12 For C×V T2 .
[0200] After sampling, such as Figure 12B As shown, the first capacitor switch S C1 Second capacitor switch S C2 Disconnect, switch S C12 Closed. The state in which the first capacitor C1 and the second capacitor C2 are connected in parallel (i.e., the voltage at one end of the first capacitor C1 and the second capacitor C2 is kept constant (grounded) and the other ends of the first capacitor C1 and the second capacitor C2 are electrically connected to each other and are floating) can be called the second state. In the second state, since the charge charged in the first capacitor C1 and the second capacitor C2 does not move to the outside, the amount of charge is held, and since the charge moves between the first capacitor C1 and the second capacitor C2, a specific voltage is formed at the floating end. This specific voltage is called the summation voltage Vx. In the second state, the amount of charge Q charged in the first capacitor C1... 21 The amount of charge Q charged in the second capacitor C2 is C×Vx. 22 It is C×Vx.
[0201] Voltmeter 350 measures the voltage across each of the first capacitor C1 and the second capacitor C2.
[0202] According to the law of conservation of charge, as shown in Equation 8, the total voltage V across the first resistor line RL1 is... T1 The total voltage V of the second resistor line RL2 T2 The sum can be seen from the measured voltage across each of the first capacitor C1 and the second capacitor C2. When the current is 1A, the result of Equation 5 can be obtained from that value.
[0203] Equation 8
[0204] First state: Q 11 =C×V T1 Q 12 =C×V T2
[0205] Second state: Q 21 =C×Vx,Q 22 =C×Vx
[0206] Charge conservation: Q 11 +Q 12 =Q 21 +Q 22
[0207] V T1 +V T2 =2×Vx
[0208] The relationship between the summed voltage Vx and the output value of the calculation result of Equation 5 can be summarized in Table 13 below.
[0209] Table 13
[0210] part Measuring voltage Output value Part One Vx≥56.25 6 Part Two 56.25>Vx≥48.75 4 Part Three 48.75 > Vx ≥ 41.25 2 Part Four 41.25>Vx≥33.75 0 Part Five 33.75 > Vx ≥ 26.25 -2 Part Six 26.25 > Vx ≥ 18.75 -4 Part Seven 18.75>Vx -6
[0211] When the summing voltage Vx is 30V, the voltmeter 350 can output -2 as the sum of the products of the inputs applied to the resistors included in each of the first resistor line RL1 and the second resistor line RL2 and their weights.
[0212] Figure 12A and Figure 12B This demonstrates that even when the number of inputs exceeds the number of resistors included in the resistor lines, the operation can still be performed using capacitors in the analog domain, even when multiple resistor lines are used. Figure 12AFor ease of explanation, an example of a structure operating in the analog domain, which is the sum of the products of the inputs applied to two rows of resistor lines and their weights, is described. However, the configuration is not limited to this, and the structure can be similarly employed even when the neuromorphic device is configured with various numbers of resistor lines (e.g., three or more rows of resistor lines (e.g., five rows, ten rows, etc.)). A capacitor electrically connected to each resistor line samples the voltage of each resistor line, and the sampled voltages can be measured by connecting them in parallel and then summed.
[0213] although Figure 12A The diagram illustrates a structure where the sum of the products of the input applied to the entire resistor line and the weights is operated; however, the configuration is not limited to this, and only some of the multiple resistor lines that need to be summed are connected to the capacitor and selectively operated. Furthermore, although... Figure 12A The diagram shows a structure with only one capacitor connected to a resistor line, but considering various factors (such as capacitance, device layout, etc.), multiple capacitors (e.g., four capacitors) can be connected to a resistor line.
[0214] exist Figure 12A and Figure 12B In the example described, the upper ends of the first capacitor C1 and the second capacitor C2 are grounded, and in the second state, the lower ends of the first capacitor C1 and the second capacitor C2 are floating. However, the voltage in the second state can be measured by connecting them in parallel in various other ways, as described in reference... Figure 13A and Figure 13B Describe it.
[0215] Figure 13A and Figure 13B An example of the structure and operation of a neuromorphic device is shown, which operates on the addition of the multiplication of the inputs applied to two rows of resistor lines with weights in the analog domain.
[0216] Reference Figure 13A In the first state, by closing the common voltage switch S CM and the first capacitor switch S C1 Second capacitor switch S C2 The upper ends of the first capacitor C1 and the second capacitor C2 are fixed to a common voltage V. CM Therefore, the first voltage V T1 Second voltage V T2 Samples were taken from the first capacitor C1 and the second capacitor C2.
[0217] Reference Figure 13B In the second state, by disconnecting the common voltage switch S CM The upper ends of the first capacitor C1 and the second capacitor C2 are floated, and the first capacitor switch S is turned off.C1 Second capacitor switch S C2 And close switch S C1V and S C2V The lower ends of the first capacitor C1 and the second capacitor C2 are fixed to the second voltage V. Y In the second state, by measuring the voltage difference between the upper and lower ends of the first capacitor C1 and the second capacitor C2, the sum of the product of the inputs applied to the two resistor lines RL1 and RL2 and their weights can be obtained in the analog circuit domain.
[0218] As digital computation increases, the frequency of digital-to-analog converter (ADC) usage increases, potentially leading to increased quantization errors and deteriorating power efficiency. Therefore, as described above, efficient computation can be performed by using neuromorphic devices capable of operating in the analog circuit domain on the sum of the products of inputs applied to multiple resistor lines and their weights.
[0219] Figure 14 This is a chip block diagram based on the example neuromorphic device 500.
[0220] Reference Figure 14 The diagram illustrates the hardware configuration of a neuromorphic device 500 according to an example. The neuromorphic device 500 may include a resistor array 510, a controller 520, a row decoder 530, a column decoder 540, a weight driver 550, a current source controller 560, a voltmeter 580, and a data buffer 570. Figure 14 The neuromorphic device 500 shown includes the constituent elements relevant to this example. However, the configuration is not limited to this, and the neuromorphic device 500 may also include, in addition to, the following: Figure 14 General constituent elements other than those shown in the diagram.
[0221] The controller 520 can decode instructions required for driving and operating the neuromorphic device 500. For example, the controller 520 decodes instructions such as weight setting, weight setting test, input application, voltage measurement, etc., and sends signals to the elements required to execute these instructions. In one example, the controller 520 can apply inputs and weights to resistors included in the resistor array 510.
[0222] Resistor array 510 can be an array of resistors including, for example, the variable resistors and switches described above. In this case, the variable resistors can be MTJ devices with magnetic material.
[0223] The line decoder 530 can receive a line address and an input signal, and apply the input value to the resistor array 510. The line decoder 530 may include a digital-to-analog converter (DAC) and can apply a drive voltage to a switch connected in series with a variable resistor based on the input value. Furthermore, the line decoder 530 can change the resistance value of the variable resistor included in the resistor array 510. In this state, the line decoder 530 can apply a drive voltage to the relevant switch for selecting a target variable resistor during weighting.
[0224] The column decoder 540 receives column address and weight setting signals and applies voltage / current to a variable resistor. The column decoder 540 can select the resistor line requiring voltage measurement and the weight line connected to the resistor requiring weight setting.
[0225] During weight setting, weight driver 550 can send weight data to a resistor selected by row decoder 530 and column decoder 540. Weight driver 550 can drive the weight lines connected to column decoder 540 based on data received from data buffer 570, and perform weight setting and testing of the set weights. Weight driver 550 may include a current source for applying a test current to the weight lines to test whether the desired resistance value is set to the variable resistor.
[0226] The current source controller 560 can receive signals from the controller 520 to drive the current source and apply current to the resistor line.
[0227] The voltmeter 580 measures the voltage across a resistor line or a capacitor connected to one end of a resistor line and stores the measured value in an external memory (not shown). The voltmeter 580 may include an ADC that outputs the measured value as a digital value.
[0228] Figure 15 It is a block diagram based on the example electronic system 800.
[0229] Reference Figure 15 The electronic system 800 can extract useful information by analyzing input data based on a neural network device 830, which includes neuromorphic devices, and determine the situation or control the components of the electronic device equipped with the electronic system 800. For example, the electronic system 800 can be applied to robotic devices (such as drones), advanced driver assistance systems (ADAS), smart TVs, smartphones, medical devices, mobile devices, image display devices, measuring devices, IoT devices, etc., and can be installed on various other types of electronic devices.
[0230] In addition to the neural network device 830, the electronic system 800 may also include a CPU 810, RAM 820, memory 840, sensor module 850, and communication module (transmit / receive module) 860. Furthermore, the electronic system 800 may also include input / output modules, security modules, power control devices, etc. Some hardware configurations of the electronic system 800 may be mounted on a semiconductor chip. The neural network device 830 may be a device implemented as an on-chip neuromorphic device of the type described in the accompanying drawings, or a device that includes, as a part, the neuromorphic device described in the accompanying drawings.
[0231] CPU 810 controls the overall operation of electronic system 800. CPU 810 may include one processor core (single-core) or multiple processor cores (multi-core). CPU 810 can process or execute programs and / or data stored in memory 840. CPU 810 can control the functions of neural network device 830 by executing programs stored in memory 840. The functions of CPU 810 may be implemented by graphics processing unit (GPU), application processor (AP), etc.
[0232] RAM 820 can temporarily store programs, data, or instructions. For example, programs and / or data stored in memory 840 can be temporarily stored in RAM 820 according to the control or boot code of CPU 810. RAM 820 can be implemented by memory devices such as dynamic RAM (DRAM), static RAM (SRAM), etc.
[0233] The neural network device 830 can perform neural network operations based on received input data and generate information signals based on the operation results. The neural network device 830 may include the neuromorphic devices described above in the accompanying drawings. The neural network may include convolutional neural networks (CNNs), recurrent neural networks (RNNs), deep belief networks, restricted Boltzmann machines, etc., but the configuration is not limited to these. The neural network device 830 may correspond to a dedicated hardware accelerator for neural networks.
[0234] Information signals may include various types of recognition signals (such as voice recognition signals, object recognition signals, image recognition signals, biometric information recognition signals, etc.). For example, the neural network device 830 may receive frame data included in a video stream as input data and generate recognition signals about objects included in an image represented by the frame data. Depending on the type or function of the electronic device equipped with the electronic system 800, the neural network device 830 may receive various types of input data and generate recognition signals based on the input data.
[0235] The memory 840, serving as a storage location for data, can store an operating system (OS), various programs, and various data. The memory 840 may include volatile or non-volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory, phase-change RAM (PRAM), magnetic RAM (MRAM), resistive RAM (RRAM), ferroelectric RAM (FRAM), etc. Volatile memory may include dynamic RAM (DRAM), static RAM (SRAM), synchronous DRAM (SDRAM), etc. The memory 840 may include, for example, hard disk drives (HDDs), solid-state drives (SSDs), compact flash memory (CF) cards, secure digital cards (SD cards), micro-secure digital cards (Micro-SD cards), mini-secure digital cards (Mini-SD cards), extreme digital cards (xD cards), Memory Sticks, etc.
[0236] The sensor module 850 can collect information about the surroundings of the electronic device equipped with the electronic system 800. The sensor module 850 can sense or receive signals (e.g., video signals, voice signals, magnetic signals, biosignals, touch signals, etc.) from outside the electronic device and convert the sensed or received signals into data. For this purpose, the sensor module 850 can be various types of sensing devices (e.g., microphones, imaging devices, image sensors, light detection and ranging (LIDAR) sensors, ultrasonic sensors, infrared sensors, biosensors, touch sensors, etc.).
[0237] The sensor module 850 can provide the converted data as input data to the neural network device 830. For example, the sensor module 850 may include an image sensor that generates a video stream by capturing images of the external environment of the electronic device and sequentially provides consecutive data frames of the video stream as input data to the neural network device 830. However, the configuration is not limited to this, and the sensor module 850 can provide various types of data to the neural network device 830.
[0238] The communication module 860 may be equipped with various wired or wireless interfaces for communicating with external devices. For example, the communication module 860 may include communication interfaces that can be connected to wired local area networks (LANs), wireless local area networks (WLANs) (such as Wi-Fi), wireless personal area networks (WPANs) (such as Bluetooth), wireless universal serial buses (USB), Zigbee, near field communication (NFC), radio frequency identification (RFID), power line communication (PLC), or mobile cellular networks (such as third-generation (3G), fourth-generation (4G), long-term evolution (LTE), fifth-generation (5G)).
[0239] The electronic system 800 may include a processor, memory for storing and executing program data, permanent storage units (such as disk drives), communication terminals for handling communication with external devices, and user interface devices (including touchpads, buttons, and keypads). When software modules or algorithms are involved, these software modules may be stored as processor-executable program instructions or computer-readable code on a computer-readable recording medium.
[0240] The specific embodiments shown and described herein are illustrative examples and are not intended to limit the scope of disclosure in any way. For brevity, conventional electronic equipment, control systems, software development, and other functional aspects of the system are not described in detail. Furthermore, the connecting lines or connectors shown in the various figures are intended to represent functional relationships and / or physical or logical connections between various components.
[0241] Based on the example, the reliability of neuromorphic devices can be improved.
[0242] According to the example, by using capacitors to expand the range of operations in the analog circuit domain, the power efficiency of neural network devices and electronic systems, including neuromorphic devices, can be improved.
[0243] While this disclosure includes specific examples, it will be clear upon understanding this disclosure that various changes in form and detail may be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered descriptive only and not for limiting purposes. The description of features or aspects in each example is to be considered applicable to similar features or aspects in other examples. Suitable results may be achieved if the described techniques are performed in a different order, and / or if components in the described system, architecture, apparatus, or circuit are combined in a different manner, and / or replaced or supplemented by other components or their equivalents. Therefore, the scope of the disclosure is not limited by the specific embodiments but by the claims and their equivalents, and all variations within the scope of the claims and their equivalents should be construed as included in the disclosure.
Claims
1. A neuromorphic device, comprising: The first resistor line includes a plurality of first resistors connected in series with each other; The second resistor line includes a plurality of second resistors connected in series with each other; One or more current sources are configured to control the current flowing in each of the first resistor line and the second resistor line to their respective predetermined current values. A first capacitor is configured to be electrically connected to a first resistor line and to sample the total voltage across the first resistor line; The second capacitor is configured to be electrically connected to the second resistor line and to sample the total voltage of the second resistor line; and A voltmeter is configured to measure a first voltage across the first capacitor and a second voltage across the second capacitor when the first capacitor and the second capacitor are connected in parallel, and to output an output value corresponding to the sum of the first voltage and the second voltage based on the sum of the first voltage and the second voltage.
2. The neuromorphic device according to claim 1, further comprising: A switch is configured to connect the first capacitor in parallel to the second capacitor.
3. The neuromorphic device according to claim 1 or 2, wherein, The one or more current sources include a plurality of current sources, the plurality of current sources including at least one first current source connected to a first resistor line and at least one second current source connected to a second resistor line.
4. The neuromorphic device according to claim 1 or 2, wherein, The one or more current sources include a current source that is commonly connected to the first resistor line and the second resistor line.
5. The neuromorphic device according to claim 1 or 2, further comprising: The controller is configured to apply inputs and weights to the plurality of first resistors and the plurality of second resistors.
6. The neuromorphic device according to claim 1 or 2, wherein, The one or more current sources are configured to control the first current flowing in the first resistor line and the second current flowing in the second resistor line to the same current value.
7. The neuromorphic device according to claim 1 or 2, further comprising: The controller is configured to apply inputs and weights to the plurality of first resistors and the plurality of second resistors. The controller is configured to independently control the inputs to be applied to the plurality of first resistors and the inputs to be applied to the plurality of second resistors.
8. The neuromorphic device according to claim 1 or 2, wherein, The first capacitor and the second capacitor have the same capacitance.
9. The neuromorphic device according to claim 1 or 2, further comprising: The first switch is located between the first capacitor and the first resistor line; and The second switch is located between the lines of the second capacitor and the second resistor.
10. The neuromorphic device according to claim 1 or 2, wherein, Each of the plurality of first resistors and the plurality of second resistors includes a magnetic storage device having a plurality of resistance values.
11. The neuromorphic device according to claim 1 or 2, wherein, The first terminal of the first capacitor and the first terminal of the second capacitor are electrically connected to each other.
12. A method for driving a neuromorphic device, the method comprising: A current having a predetermined current value is applied to each of a first resistor line, which includes a plurality of first resistors connected in series with each other, and a second resistor line, which includes a plurality of second resistors connected in series with each other. A first voltage of the first resistor line is sampled by using a first capacitor connected to the first resistor line, and a second voltage of the second resistor line is sampled by using a second capacitor connected to the second resistor line. The voltage between the two ends of the first capacitor and the second capacitor is measured when the first capacitor and the second capacitor are connected in parallel by switching the first terminal of the first capacitor and the first terminal of the second capacitor. and The output value is based on the sum of the voltages between the two ends of the first capacitor and the voltages between the two ends of the second capacitor.
13. The method of claim 12, further comprising: The sum of the products of the inputs applied to the plurality of first resistors and the plurality of second resistors and their weights is calculated based on the measured voltage.
14. The method according to claim 12 or 13, further comprising: The resistance value is set to a variable resistor included in each of the plurality of first resistors and the plurality of second resistors.
15. The method according to claim 12 or 13, wherein, The steps of sampling the first voltage and the second voltage include: sampling the second voltage after sampling the first voltage.
16. A neuromorphic device, comprising: Resistor wire, in which multiple resistors are connected in series; The second resistor line contains multiple second resistors connected in series. A current source is configured to apply current to a resistor line and to a second resistor line; The first capacitor is configured to be electrically connected to the resistor line and to sample the total voltage across the resistor line; The second capacitor is configured to be electrically connected to the second resistor line and to sample the total voltage of the second resistor line; and A voltmeter is configured to: measure a first voltage across the first capacitor and a second voltage across the second capacitor when the first and second capacitors are connected in parallel; and output a value corresponding to the sum of the first and second voltages based on the sum of the first and second voltages. Each of the plurality of resistors includes at least two variable resistors connected in parallel with each other and a switch connected in series with each of the at least two variable resistors.
17. The neuromorphic device according to claim 16, wherein, Each of the plurality of resistors includes a pair of variable resistors. Each of the pair of variable resistors is a variable resistor device having a first resistance value or a second resistance value, and When one variable resistor in each pair has a first resistance value, the other variable resistor has a second resistance value.
18. The neuromorphic device of claim 16, further comprising: A first weight line and a second weight line, wherein the first weight line is electrically connected to one end of each of the at least two variable resistors, and the second weight line is electrically connected to the other end of each of the at least two variable resistors.
19. The neuromorphic device of claim 16, further comprising: The controller is configured to apply inputs and weights to the plurality of resistors and the plurality of second resistors. The sum of the products of the inputs applied to the plurality of resistors and the plurality of second resistors and their weights is calculated based on the voltage measured by the voltmeter.
20. A method for driving a neuromorphic device, the method comprising: Input and weights are applied to each of a plurality of resistors, each of the plurality of resistors comprising at least two variable resistors connected in parallel with each other and switches connected in series with the at least two variable resistors respectively; A current is applied to a resistor line in which multiple resistors are connected in series. Apply the input and weights to each of the multiple second resistors; A current is applied to a second resistor line, in which a plurality of second resistors are connected in series; The total voltage across the resistor line is sampled by a first capacitor electrically connected to the resistor line. The total voltage of the second resistor line is sampled by a second capacitor electrically connected to the second resistor line; When the first capacitor and the second capacitor are connected in parallel, the first voltage across the first capacitor and the second voltage across the second capacitor are measured, and an output value corresponding to the sum of the first voltage and the second voltage is output based on the sum of the first voltage and the second voltage.
21. The method according to claim 20, wherein, Each of the plurality of resistors includes a pair of variable resistors, and The step of applying inputs and weights to each of the plurality of resistors includes: applying inputs and weights such that a pair of variable resistors, each included in each of the plurality of resistors, are set to have different resistance values.
22. The method according to claim 20 or 21, wherein, The step of applying current to a resistor line includes applying current by closing at least one of the switches included in each of the plurality of resistors to allow current to flow through one of the variable resistors included in each of the plurality of resistors.
23. An electronic system comprising: Neural network devices, including neuromorphic devices; and A central processing unit, including processor cores, is configured to control the functions of a neural network device. The neuromorphic device includes: The first resistor line includes a plurality of first resistors connected in series with each other; The second resistor line includes a plurality of second resistors connected in series with each other; One or more current sources are configured to control the current flowing in each of the first resistor line and the second resistor line to their respective predetermined current values. A first capacitor is configured to be electrically connected to a first resistor line and to sample the total voltage across the first resistor line; A second capacitor is configured to be electrically connected to a second resistor line and to sample the total voltage across the second resistor line; and A voltmeter is configured to measure a first voltage across the first capacitor and a second voltage across the second capacitor when the first capacitor and the second capacitor are connected in parallel, and to output an output value corresponding to the sum of the first voltage and the second voltage based on the sum of the first voltage and the second voltage.
24. The electronic system according to claim 23, wherein, The neuromorphic device also includes a switch configured to connect the first capacitor in parallel to the second capacitor.
25. An electronic system comprising: Neural network devices, including neuromorphic devices; and A central processing unit, including processor cores, is configured to control the functions of a neural network device. The neuromorphic device includes: Resistor wire, in which multiple resistors are connected in series; The second resistor line contains multiple second resistors connected in series. A current source is configured to apply current to a resistor line and to a second resistor line; The first capacitor is configured to be electrically connected to the resistor line and to sample the total voltage across the resistor line; A second capacitor is configured to be electrically connected to a second resistor line and to sample the total voltage across the second resistor line; and A voltmeter is configured to: measure a first voltage across the first capacitor and a second voltage across the second capacitor when the first and second capacitors are connected in parallel; and output a value corresponding to the sum of the first and second voltages based on the sum of the first and second voltages. Each of the plurality of resistors includes at least two variable resistors connected in parallel with each other and a switch connected in series with each of the at least two variable resistors.
26. The electronic system according to claim 25, wherein, Each of the plurality of resistors includes a pair of variable resistors. Each of the pair of variable resistors is a variable resistor device having a first resistance value or a second resistance value, and When one variable resistor in each pair has a first resistance value, the other variable resistor has a second resistance value.
27. The electronic system according to claim 25, wherein, The neuromorphic device further includes: a first weight line and a second weight line, the first weight line being electrically connected to one end of each of the at least two variable resistors, and the second weight line being electrically connected to the other end of each of the at least two variable resistors.
28. A neuromorphic device, comprising: The first capacitor is configured to be connected to the first resistor line via a first switch, and to sample the total voltage of the first resistor line in a first state where the first switch is closed; The second capacitor is configured to be connected to the second resistor line via a second switch, and to sample the total voltage of the second resistor line in a first state where the second switch is closed; The third switch is configured to connect the first capacitor and the second capacitor in parallel in a second state where the first switch is open and the second switch is open. and A voltmeter is configured to measure a first voltage across the first capacitor and a second voltage across the second capacitor when the first capacitor and the second capacitor are connected in parallel, and to output an output value corresponding to the sum of the first voltage and the second voltage based on the sum of the first voltage and the second voltage.
29. The neuromorphic device according to claim 28, wherein, The output value is the sum of the product of the input applied to the resistors included in the first resistor line and the weight.
30. The neuromorphic device according to claim 28 or 29, wherein, The first terminal of the first capacitor is connected to the first resistor line in the first state, the first terminal of the second capacitor is connected to the second resistor line in the first state, and the third switch is connected between the first terminal of the first capacitor and the first terminal of the second capacitor.
31. The neuromorphic device according to claim 28 or 29, wherein, The first terminal of the first capacitor is connected to the first resistor line in the first state, the first terminal of the second capacitor is connected to the second resistor line in the first state, and the third switch is connected to the second terminal of the first capacitor and the second terminal of the second capacitor.
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