Chip-on-film packaging structure
By using the deflection line carrier board and sculpture combination method in the packaging structure of the sensor chip, combined with the design of the protruding pattern and the virtual line pattern, it solves the problem that the thickness of the packaging is difficult to reduce and the manufacturing cost. Economic packaging structure, while ensuring efficient sensing performance.
Patent Information
- Application Number
- CN202010590302.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-03-25
- Filing Date
- 2020-06-24
- Publication Date
- 2025-01-24
- Estimated Expiration
- 2040-06-24
AI Technical Summary
The existing sensing chip packaging structure uses a hard line carrier board and wire bonding method, resulting in difficult reduction in the packaging thickness and high manufacturing cost.
The deflection line carrier board and crystallization combination method is used to expose the sensor area through the perforated holes on the deflection substrate, reducing the thickness of the packaging and reducing the manufacturing cost. At the same time, through the design of the protruding pattern and the virtual line pattern, the location of the packaging colloid is limited to prevent its overflow to the sensing area.
While reducing the thickness of the overall packaging and reducing the cost of manufacturing, it is necessary to ensure that the sensor chip reaches a better sensing quality, such as sensitivity and judgment ability to provide users with better experience.
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Figure CN113451253B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a packaging structure, in particular to a chip-on-film packaging structure. Background Art
[0002] With the advancement of technology, more and more electronic devices that need to identify user information have emerged. Further, a common sensor chip packaging structure mainly includes a circuit carrier, a sensor chip, a plurality of welding wires and a packaging colloid, wherein the sensing area used to identify the user information is mostly located on the active surface of the sensor chip, and the sensor chip is usually attached to the circuit carrier with its back, and the active surface of the sensor chip and the circuit carrier are electrically connected by welding wires through wire bonding. Therefore, when the packaging colloid is formed on the circuit carrier to cover the sensor chip, the packaging colloid will cover the welding wires and part of the sensor chip, and expose the sensing area on the active surface of the sensor chip. However, the circuit carrier used in this packaging structure is a hard carrier, which is not flexible, and because the height of the protruding welding wires makes it impossible to reduce the thickness of the packaging colloid, the overall thickness of the sensor chip packaging structure is difficult to reduce.
[0003] In order to solve the above-mentioned problem, another common sensor chip packaging structure is to set the sensor area used to identify user information on the back surface of the sensor chip, and electrically connect the active surface of the sensor chip and the circuit carrier by flip chip bonding, so that it is not necessary to electrically connect to the circuit carrier by wire bonding, thereby reducing the overall packaging thickness. However, in this arrangement, the sensor area must be electrically connected to the active surface of the sensor chip and the circuit carrier by through silicon vias (TSVs) with relatively expensive manufacturing costs, so it is difficult to reduce the manufacturing cost of the sensor chip packaging structure. Summary of the invention
[0004] The present invention is directed to a chip-on-film packaging structure, which can reduce the overall packaging thickness and manufacturing cost while ensuring that the sensor chip can effectively meet the strict requirements on sensing quality (such as sensing sensitivity and sensing interpretation capability) to bring users a better experience.
[0005] According to an embodiment of the present invention, a thin film flip chip packaging structure includes a flexible circuit carrier, a sensor chip and a packaging colloid. The flexible circuit carrier includes a flexible substrate, a plurality of pins and a virtual lead pattern. The flexible substrate has a chip bonding area and a through hole located in the chip bonding area. The pin is located on the flexible substrate and has an inner pin portion extending into the chip bonding area. The virtual lead pattern is located in the chip bonding area, between the inner pin portion and the through hole and surrounding the through hole. The sensor chip is arranged in the chip bonding area, and has an active surface facing the flexible substrate and a sensing area located on the active surface, and the through hole exposes the sensing area. The sensor chip includes a plurality of bumps and a convex pattern. The bump is arranged on the active surface, is located at the edge of the active surface and is electrically connected to the inner pin portion. The convex pattern is arranged on the active surface, surrounds the sensing area and is correspondingly connected to the virtual lead pattern. The packaging colloid is filled between the sensor chip and the flexible substrate to cover the bumps and the inner pins, wherein the packaging colloid is located outside the correspondingly connected convex patterns and the virtual lead patterns.
[0006] In the chip-on-film packaging structure according to the embodiment of the present invention, the material of the protrusion pattern is substantially the same as the material of the bump, and the material of the dummy lead pattern is substantially the same as the material of the lead.
[0007] In the chip-on-film packaging structure according to the embodiment of the present invention, the protrusion pattern is in a closed ring shape when viewed from above.
[0008] In the chip-on-film packaging structure according to the embodiment of the present invention, the above-mentioned virtual lead pattern is a closed ring in a top view.
[0009] In the chip-on-film packaging structure according to the embodiment of the present invention, the size of the through hole is larger than the size of the sensing area.
[0010] In the chip-on-film packaging structure according to the embodiment of the present invention, the size of the through hole is smaller than the size of the sensor chip.
[0011] In the chip-on-film packaging structure according to the embodiment of the present invention, the width of the dummy lead pattern is smaller than the width of the protrusion pattern.
[0012] In the chip-on-film packaging structure according to the embodiment of the present invention, the protrusion pattern and the dummy lead pattern separate the through hole from the packaging colloid.
[0013] In the chip-on-film packaging structure according to an embodiment of the present invention, the flexible circuit carrier further comprises a solder mask layer. The solder mask layer is disposed on the flexible substrate, partially covers the plurality of pins and exposes the chip bonding area.
[0014] In the chip-on-film packaging structure according to an embodiment of the present invention, the types of the above-mentioned sensor chips include photoelectric sensors, resistive sensors, capacitive sensors, inductive sensors, piezoelectric sensors, thermoelectric sensors, impedance sensors, magnetoelectric sensors, ultrasonic sensors and microwave sensors.
[0015] Based on the above, the sensor chip of the thin film flip chip packaging structure of the present invention is flip-chip bonded to the flexible substrate in a manner that the active surface faces the flexible substrate, and the sensing area located on the active surface of the sensor chip is exposed through the through hole on the flexible substrate, eliminating the need for wire bonding and silicon vias, thereby reducing the overall packaging thickness of the thin film flip chip packaging structure while reducing the manufacturing cost. In addition, by limiting the packaging colloid to the outside of the correspondingly connected convex pattern and the dummy lead pattern through the corresponding connection of the convex pattern and the dummy lead pattern, the packaging colloid can be prevented from overflowing to the sensing area and reducing the interpretation ability of the sensor chip, and the packaging colloid can be prevented from overflowing to the bottom of the through hole and contaminating the machine below or the components to be subsequently joined. Therefore, while reducing its overall packaging thickness and reducing manufacturing costs, it can also ensure that the sensor chip can effectively achieve better sensing quality (such as sensing sensitivity and sensing interpretation ability) to bring users a better use experience.
[0016] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below with reference to the accompanying drawings for detailed description. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 is a partial top view schematic diagram of a chip-on-film packaging structure according to an embodiment of the present invention;
[0018] Figure 2 yes Figure 1 A schematic top view of the active surface of the sensor chip;
[0019] Figure 3 yes Figure 1 Schematic diagram of the cross section along the section line AA'.
[0020] Description of Reference Numerals
[0021] 100: Chip-on-film packaging structure
[0022] 110: Flexible circuit board
[0023] 112: Flexible substrate
[0024] 1121: Chip bonding area
[0025] 1122:Through hole
[0026] 114: Pin
[0027] 1141: Inner pin
[0028] 116: Dashed line pattern
[0029] 116w, 124w: Width
[0030] 118: Solder mask
[0031] 120:Sensor chip
[0032] 120a: Active side
[0033] 122: Bump
[0034] 124: Raised pattern
[0035] 130: Encapsulation colloid
[0036] E: Edge
[0037] S: Sensing area DETAILED DESCRIPTION
[0038] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.
[0039] Figure 1 FIG. 1 is a partial top view of a chip-on-film packaging structure according to an embodiment of the present invention. Figure 2 yes Figure 1 Schematic diagram of a top view of the active surface of the sensor chip. Figure 3 yes Figure 1 Schematic diagram of the section along the section line A-A'. For the sake of clarity, Figure 1 The chip 120, the bump 122 and the protrusion pattern 124 are presented by perspective drawing, and Figure 1 The solder mask 118 and the packaging resin 130 are omitted from illustration.
[0040] Please also refer to Figures 1 to 3 In this embodiment, the chip-on-film packaging structure 100 includes a flexible circuit substrate 110, a sensor chip 120 and a packaging colloid 130. Figure 1 and Figure 3As shown, the flexible circuit carrier 110 includes a flexible substrate 112, a plurality of pins 114 and a virtual lead pattern 116. The flexible substrate 112 may have a chip bonding area 1121 and a through hole 1122 located in the chip bonding area 1121. The through hole 1122, for example, passes through from the upper surface to the lower surface of the flexible substrate 112. The material of the flexible substrate 112 may include polyimide (PI), polyethylene terephthalate (PET), polyether (PES), carbonate (PC) or other suitable flexible materials. The through hole 1122 may be pre-formed in the flexible substrate 112, and the formation position of the through hole 1122 will correspond to the sensing area S of the sensor chip 120 subsequently configured on the chip bonding area 1121. The through hole 1122 is pre-formed on the flexible substrate 112 by punching, for example, or pre-formed by chemical etching, so that the through hole 1122 can achieve higher precision, but the present invention is not limited thereto, and the through hole 1122 can be formed by other suitable methods.
[0041] A plurality of pins 114 are located on the flexible substrate 112, and the plurality of pins 114 have a plurality of inner pin portions 1141 extending into the chip bonding area 1121. The virtual lead pattern 116 is located in the chip bonding area 1121. The virtual lead pattern 116 is located between the plurality of inner pin portions 1141 and the through hole 1122 and surrounds the through hole 1122. In a top view, the virtual lead pattern 116 may have an annular profile. For example, the virtual lead pattern 116 may be a closed ring. In addition, in a top view, the virtual lead pattern 116 and the through hole 1122 may have similar shapes. Figure 1 As shown, in a top view, the dummy lead pattern 116 and the through hole 1122 are generally rectangular, but the present invention is not limited thereto, and the shapes of the dummy lead pattern 116 and the through hole 1122 can be determined according to actual design requirements. Here, the dummy lead pattern 116 can be a dummy pattern through which no signal passes.
[0042] In the present embodiment, the sensor chip 120 is disposed in the chip bonding area 1121 and has an active surface 120a facing the flexible substrate 112 and a sensing area S located on the active surface 120a. The through hole 1122 exposes the sensing area S so that the sensing area S senses and reads the signal through the through hole 1122. Therefore, the sensor chip 120 of the film flip chip packaging structure 100 of the present embodiment can be electrically connected to the flexible substrate 112 by flip chip bonding, and does not need to be electrically connected to the flexible substrate 112 by wire bonding, which can reduce the overall packaging thickness. In addition, the film flip chip packaging structure 100 of the present embodiment does not need to electrically connect the sensing area S and the active surface 120a through silicon vias, which are more expensive to manufacture, which can reduce the overall packaging thickness while reducing its manufacturing cost.
[0043] In this embodiment, if Figure 1 and Figure 3 As shown, the size of the through hole 1122 may be different from the size of the sensing area S. For example, the size of the through hole 1122 may be larger than the size of the sensing area S. In other words, the through hole 1122 may expose the entire sensing area S, reducing the difficulty of subsequent processing, but the present invention is not limited thereto. In addition, the size of the through hole 1122 may be smaller than the size of the sensor chip 120.
[0044] The sensor chip 120 may include a plurality of bumps 122 and a convex pattern 124, wherein the bumps 122 and the convex pattern 124 are disposed on the active surface 120a. For example, the bump 122 is located at the edge E of the active surface 120a and is electrically connected to the inner pin portion 1141, and the convex pattern 124 surrounds the sensing area S. In the present embodiment, the material of the convex pattern 124 and the material of the bump 122 may be substantially the same, and the convex pattern 124 and the bump 122 may be formed simultaneously in the same process. The material of the dummy lead pattern 116 and the material of the pin 114 may be substantially the same, and the dummy lead pattern 116 and the pin 114 may be formed simultaneously in the same process. For example, the material of the convex pattern 124 and the material of the bump 122 may include gold, and the material of the dummy lead pattern 116 and the material of the pin 114 may include tinned copper, so that the bump 122 and the pin 114 may form a gold-tin eutectic bond and be electrically connected to each other, but the present invention is not limited thereto.
[0045] In the present embodiment, the convex pattern 124 is connected to the corresponding virtual lead pattern 116, and the encapsulation colloid 130 is filled between the sensor chip 120 and the flexible substrate 112 to cover the plurality of bumps 122 and the plurality of inner pins 1141, wherein the encapsulation colloid 130 is located outside the corresponding convex pattern 124 and the virtual lead pattern 116 to prevent the encapsulation colloid 130 from overflowing to the sensing area S and reducing the interpretation ability of the sensor chip 120, so that the sensor chip 120 can effectively achieve better sensing sensitivity and interpretation ability. Further, the convex pattern 124 and the virtual lead pattern 116 can separate the through hole 1122 from the encapsulation colloid 130 to prevent the encapsulation colloid 130 from overflowing to the bottom of the through hole 1122 and thereby contaminating the machine below or the subsequent joined components. Here, the through hole 1122 can be located inside the corresponding convex pattern 124 and the virtual lead pattern 116.
[0046] In addition, in a top view, the raised pattern 124 and the virtual lead pattern 116 may have a similar annular profile. For example, in a top view, the raised pattern 124 may be a closed ring. The width 116w of the virtual lead pattern 116 may be different from the width 124w of the raised pattern 124. For example, the width 116w of the virtual lead pattern 116 may be smaller than the width 124w of the raised pattern 124, so that the raised pattern 124 may have an offset space when corresponding to the virtual lead pattern 116, thereby reducing the probability that the raised pattern 124 cannot effectively correspond to the virtual lead pattern 116. However, the present invention does not limit the width 116w of the virtual lead pattern 116 and the width 124w of the raised pattern 124, as long as the raised pattern 124 can correspond to the virtual lead pattern 116, it belongs to the protection scope of the present invention.
[0047] In this embodiment, in order to effectively maintain the electrical properties of the flexible circuit carrier 110, the flexible circuit carrier 110 may further include a solder mask 118. The solder mask 118 may be disposed on the flexible substrate 112. The solder mask 118 partially covers the plurality of pins 114 and exposes the chip bonding area 1121. Further, the encapsulation colloid 130 may be confined between the solder mask 118 and the correspondingly connected protrusion patterns 124 and the dummy lead patterns 116.
[0048] It should be noted that the sensor chip 120 can be of any suitable type. For example, the sensor chip 120 can include a photoelectric sensor, a resistive sensor, a capacitive sensor, an inductive sensor, a piezoelectric sensor, a pyroelectric sensor, an impedance sensor, a magnetoelectric sensor, an ultrasonic sensor, and a microwave sensor. However, the present invention does not limit the type of the sensor chip 120, and the type of the sensor chip 120 can be selected according to actual needs.
[0049] The sensor chip 120 of the film flip chip packaging structure 100 of the present embodiment is arranged in the chip bonding area 1121, and has an active surface 120a facing the flexible substrate 112 and a sensing area S located on the active surface 120a, and then the sensing area S is exposed by the through hole 1122, so that the sensing area S can sense and read the signal through the through hole 1122. Therefore, it can reduce the manufacturing cost while reducing the overall packaging thickness. In addition, the protruding pattern 124 is connected to the corresponding virtual lead pattern 116, and the packaging colloid 130 is located outside the correspondingly connected protruding pattern 124 and the virtual lead pattern 116 to prevent the packaging colloid 130 from overflowing to the sensing area S to reduce the reading ability of the sensor chip 120, so that the sensor chip 120 can effectively achieve better sensing and reading ability. Therefore, the chip-on-film packaging structure 100 of this embodiment can reduce the overall packaging thickness and manufacturing cost while ensuring that the sensor chip 120 can effectively meet the strict requirements on sensing quality (such as sensing sensitivity and sensing interpretation capability) to bring users a better user experience.
[0050] In summary, the sensor chip of the thin film flip chip packaging structure of the present invention is flip-chip bonded to the flexible substrate in a manner that the active surface faces the flexible substrate, and the sensing area located on the active surface of the sensor chip is exposed through the through hole on the flexible substrate, eliminating the need for wire bonding and silicon vias, thereby reducing the overall packaging thickness of the thin film flip chip packaging structure while reducing manufacturing costs. In addition, by limiting the packaging colloid to the outside of the correspondingly connected convex pattern and the dummy lead pattern through the corresponding connection of the convex pattern and the dummy lead pattern, the packaging colloid can be prevented from overflowing to the sensing area and reducing the interpretation ability of the sensor chip, and the packaging colloid can be prevented from overflowing to the bottom of the through hole and contaminating the machine below or the components to be subsequently joined. Therefore, while reducing the overall packaging thickness and manufacturing costs, it is possible to ensure that the sensor chip can effectively achieve better sensing quality (such as sensing sensitivity and sensing interpretation ability).
[0051] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A chip-on-film packaging structure, characterized in that: include: Flexible circuit board, including: A flexible substrate having a chip bonding area and a through hole located in the chip bonding area; A plurality of pins are located on the flexible substrate, the plurality of pins having a plurality of inner pin portions extending into the chip bonding area; and a virtual lead pattern located in the chip bonding area, the virtual lead pattern being located between the plurality of inner lead portions and the through hole and surrounding the through hole; A sensor chip is disposed in the chip bonding area and has an active surface facing the flexible substrate and a sensing area located on the active surface, wherein the through hole exposes the sensing area, and the sensor chip comprises: A plurality of bumps are disposed on the active surface, the plurality of bumps are located at the edge of the active surface and are electrically connected to the plurality of inner pins; and a convex pattern disposed on the active surface and surrounding the sensing area, the convex pattern correspondingly connected to the virtual lead pattern, wherein the flexible substrate has an upper surface facing the active surface, and the virtual lead pattern is disposed between the convex pattern and the upper surface; and The packaging colloid is filled between the sensor chip and the flexible substrate to cover the plurality of bumps and the plurality of inner pins, wherein the packaging colloid is located outside the correspondingly connected convex patterns and the virtual lead patterns.
2. The chip-on-film packaging structure according to claim 1, characterized in that: The material of the protrusion pattern is substantially the same as that of the plurality of bumps, and the material of the dummy lead pattern is substantially the same as that of the plurality of pins.
3. The chip-on-film packaging structure according to claim 1, characterized in that: In a plan view, the protruding pattern is in a closed ring shape.
4. The chip-on-film packaging structure according to claim 1, wherein: In a top view, the virtual lead pattern is a closed ring.
5. The chip-on-film packaging structure according to claim 1, wherein: The size of the through hole is larger than the size of the sensing area.
6. The chip-on-film packaging structure according to claim 1, characterized in that: The size of the through hole is smaller than the size of the sensor chip.
7. The chip-on-film packaging structure according to claim 1, wherein: The width of the dummy lead pattern is smaller than the width of the protrusion pattern.
8. The chip-on-film packaging structure according to claim 1, characterized in that: The protrusion pattern and the dummy lead pattern separate the through hole from the packaging colloid.
9. The chip-on-film packaging structure according to claim 1, wherein: The flexible circuit carrier also includes a solder mask layer disposed on the flexible substrate. The solder mask layer partially covers the plurality of pins and exposes the chip bonding area.
10. The chip-on-film packaging structure according to claim 1, wherein: The types of sensor chips include photoelectric sensors, resistive sensors, capacitive sensors, inductive sensors, piezoelectric sensors, thermoelectric sensors, impedance sensors, magnetoelectric sensors, ultrasonic sensors and microwave sensors.
Citation Information
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Chip-on-film package structure and flexible circuit board thereof
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