Dynamic Control Switching Circuit

Abstract

The present disclosure relates to the field of semiconductor technology, and in particular to a dynamic control conversion circuit. The circuit includes: a dynamic control unit, which is used to generate a dynamic control signal according to a received input signal; a first semiconductor switch, wherein the control end of the first semiconductor switch is connected to the first signal output end of the dynamic control unit, and the first end of the first semiconductor switch is connected to the first voltage end; a second semiconductor switch, wherein the control end of the second semiconductor switch is connected to the second signal output end of the dynamic control unit; a circuit output unit, wherein the first control end of the circuit output unit is connected to the second end of the first semiconductor switch and the first end of the second semiconductor switch; and the second control end of the circuit output unit is connected to the second end of the second semiconductor switch and the third signal output end of the dynamic control unit. The circuit can effectively avoid the problem of switch competition, and can realize dynamic conversion control of potential signals with only a small area occupation and a very low production cost.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and in particular to a dynamic control conversion circuit. Background Art

[0002] When designing integrated circuits, it is often necessary to convert the potential of voltage signals. For example, when the working voltage requirements are different, the voltage signal needs to be converted and adjusted in a timely manner. The prior art generally uses a conversion chip with a complex structure as an intermediate transmission circuit to achieve potential conversion. However, traditional conversion chips not only have high production costs, but also occupy a large area, which seriously affects the performance of integrated circuits. Summary of the invention

[0003] The purpose of the present disclosure is to provide a dynamic control conversion circuit, thereby overcoming the technical problems such as complex circuit structure, high production cost, large occupied area, etc. caused by the limitations and defects of related technologies at least to a certain extent.

[0004] According to one aspect of the present disclosure, a dynamic control conversion circuit is provided, the circuit comprising:

[0005] A dynamic control unit, the dynamic control unit is used to generate a dynamic control signal according to a received input signal;

[0006] a first semiconductor switch, wherein a control end of the first semiconductor switch is connected to a first signal output end of the dynamic control unit, and a first end of the first semiconductor switch is connected to a first voltage end;

[0007] a second semiconductor switch, wherein a control end of the second semiconductor switch is connected to a second signal output end of the dynamic control unit;

[0008] A circuit output unit, wherein the first control end of the circuit output unit is connected to the second end of the first semiconductor switch and the first end of the second semiconductor switch; the second control end of the circuit output unit is connected to the second end of the second semiconductor switch and the third signal output end of the dynamic control unit.

[0009] In some exemplary embodiments of the present disclosure, based on the above technical solution, the potential of the power supply of the dynamic control unit is lower than the potential of the first voltage terminal.

[0010] In some exemplary embodiments of the present disclosure, based on the above technical solution, the second signal output terminal outputs the same control signal as the first signal output terminal, and the third signal output terminal outputs a control signal different from the first signal output terminal.

[0011] In some exemplary embodiments of the present disclosure, based on the above technical solution, the circuit output unit includes:

[0012] a third semiconductor switch, wherein a control end of the third semiconductor switch serves as a first control end of the circuit output unit, a first end of the third semiconductor switch is connected to a third voltage end, and a second end of the third semiconductor switch serves as an output end of the circuit output unit;

[0013] A fourth semiconductor switch, wherein the control end of the fourth semiconductor switch serves as the second control end of the circuit output unit, the first end of the third semiconductor switch is connected to the fourth voltage end, and the second end of the third semiconductor switch serves as the output end of the circuit output unit.

[0014] In some exemplary embodiments of the present disclosure, based on the above technical solution, the third voltage terminal has the same potential as the first voltage terminal, and the fourth voltage terminal is a ground voltage terminal.

[0015] In some exemplary embodiments of the present disclosure, based on the above technical solution, the dynamic control unit includes:

[0016] An AND gate element, wherein a first input terminal of the AND gate element is used to receive an input reset signal, a second input terminal of the AND gate element is used to receive an input control signal, and an output terminal of the AND gate element serves as a first signal output terminal and a second signal output terminal of the dynamic control unit;

[0017] A NAND gate element, wherein the first input terminal of the NAND gate element is used to receive the input reset signal, the second input terminal of the NAND gate element is used to receive the input control signal, and the output terminal of the NAND gate element serves as the third signal output terminal of the dynamic control unit.

[0018] In some exemplary embodiments of the present disclosure, based on the above technical solution, the dynamic control unit further includes:

[0019] An inverter, wherein the input end of the inverter is used to receive the input reset signal, and the output end of the inverter serves as the fourth signal output end of the dynamic control unit, and the fourth signal output end is connected to the third control end of the circuit output unit.

[0020] In some exemplary embodiments of the present disclosure, based on the above technical solution, the circuit output unit includes:

[0021] a third semiconductor switch, wherein a control end of the third semiconductor switch serves as a first control end of the circuit output unit, a first end of the third semiconductor switch is connected to a third voltage end, and a second end of the third semiconductor switch serves as an output end of the circuit output unit;

[0022] a fourth semiconductor switch, wherein a control end of the fourth semiconductor switch serves as a second control end of the circuit output unit, a first end of the fourth semiconductor switch is connected to a fourth voltage end, and a second end of the fourth semiconductor switch serves as an output end of the circuit output unit;

[0023] A fifth semiconductor switch, wherein the control end of the fifth semiconductor switch serves as the third control end of the circuit output unit, the first end of the fifth semiconductor switch is connected to the fifth voltage end, and the second end of the fifth semiconductor switch serves as the output end of the circuit output unit.

[0024] In some exemplary embodiments of the present disclosure, based on the above technical solution, the third voltage terminal has the same potential as the first voltage terminal, and the fourth voltage terminal and the fifth voltage terminal are ground voltage terminals.

[0025] In some exemplary embodiments of the present disclosure, based on the above technical solution, the first end of the first semiconductor switch is connected to the first voltage end through a sixth semiconductor switch; wherein the control end of the sixth semiconductor switch is connected to the output end of the circuit output unit, the first end of the sixth semiconductor switch is connected to the first voltage end, and the second end of the sixth semiconductor switch is connected to the first end of the first semiconductor switch.

[0026] In the technical solution provided by the exemplary embodiment of the present disclosure, by configuring the first semiconductor switch and the second semiconductor switch that can switch states alternately, the problem of switch competition can be effectively avoided, and the dynamic conversion control of the potential signal can be realized with only a small area occupation and a very low production cost. Moreover, the dynamic control conversion circuit has the characteristics of simple structure, which can improve the stability and reliability of the integrated circuit.

[0027] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification are used to explain the principles of the present disclosure. Obviously, the accompanying drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without creative work.

[0029] Figure 1 The circuit structure diagram of the dynamic control conversion circuit in some exemplary embodiments of the present disclosure is schematically shown.

[0030] Figure 2The circuit structure diagram of the dynamic control conversion circuit in some other exemplary embodiments of the present disclosure is schematically shown.

[0031] Figure 3 The schematic diagram shows the signal change state of the output signal Output following the input control signal Input.

[0032] Figure 4 The circuit structure diagram of the dynamic control conversion circuit in some other exemplary embodiments of the present disclosure is schematically shown.

[0033] The following are the descriptions of the reference numerals:

[0034] 110- dynamic control unit;

[0035] 130-circuit output unit;

[0036] 111-AND gate element;

[0037] 112-NAND gate element;

[0038] 113-inverter;

[0039] 121-a first semiconductor switch;

[0040] 122- a second semiconductor switch;

[0041] 123- a third semiconductor switch;

[0042] 124- a fourth semiconductor switch;

[0043] 125- a fifth semiconductor switch;

[0044] 126-sixth semiconductor switch;

[0045] VX-first voltage terminal;

[0046] VY-second voltage terminal;

[0047] VZ-third voltage terminal;

[0048] VO1- fourth voltage terminal;

[0049] VO2-fifth voltage terminal. DETAILED DESCRIPTION

[0050] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that the present invention will be comprehensive and complete and fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their detailed description will be omitted.

[0051] Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship of one component of the illustration to another component, these terms are used in this specification only for convenience, such as according to the orientation of the examples described in the drawings. It is understood that if the device of the illustration is turned upside down, the component described as "upper" will become the component "lower". When a structure is "on" other structures, it may mean that the structure is formed integrally on the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.

[0052] The terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express an open-ended inclusive meaning and mean that additional elements / components / etc. may exist in addition to the listed elements / components / etc.; the terms "first", "second" and "third" etc. are used merely as labels and are not intended to limit the quantity of their objects.

[0053] Figure 1 The circuit structure diagram of the dynamic control conversion circuit in some exemplary embodiments of the present disclosure is schematically shown. Figure 1 As shown, the dynamic control conversion circuit may mainly include: a dynamic control unit 110 , a first semiconductor switch 121 , a second semiconductor switch 122 and a circuit output unit 130 .

[0054] The dynamic control unit 110 is used to generate a dynamic control signal according to the received input control signal Input. The dynamic control unit 110 can output a first control signal Ctrl A through a first signal output terminal, a second control signal Ctrl B through a second signal output terminal, and a third control signal Ctrl C through a third signal output terminal.

[0055] The first semiconductor switch 121 has a control terminal, a first terminal, and a second terminal, and can be, for example, a PMOS transistor. The control terminal of the first semiconductor switch 121 is connected to the first signal output terminal of the dynamic control unit 110, and the first terminal of the first semiconductor switch 121 is connected to the first voltage terminal VX. The first control signal Ctrl A outputted from the first signal output terminal can be used to control the conduction and disconnection of the first semiconductor switch 121.

[0056] The second semiconductor switch 122 has a control terminal, a first terminal, and a second terminal, and can be, for example, an NMOS transistor. The control terminal of the second semiconductor switch 122 is connected to the second signal output terminal of the dynamic control unit 110, and the second control signal Ctrl B outputted by the second signal output terminal can be used to control the conduction and disconnection of the second semiconductor switch 122.

[0057] The circuit output unit 130 has a first control terminal, a second control terminal and an output terminal. The first control terminal of the circuit output unit 130 is connected to the second terminal of the first semiconductor switch 121 and the first terminal of the second semiconductor switch 122; the second control terminal of the circuit output unit 130 is connected to the second terminal of the second semiconductor switch 122 and the third signal output terminal of the dynamic control unit 110. The circuit output unit 130 can receive the third control signal Ctrl C output by the third signal output terminal or receive another control signal transmitted through the second semiconductor switch 122 through its second control terminal. The output terminal of the circuit output unit 130 is used to generate an output signal Output.

[0058] The second voltage terminal VY is the power supply of the dynamic control unit 110. In some optional embodiments, the potential of the power supply is lower than the potential of the first voltage terminal, thereby achieving a signal conversion effect from a lower potential input to a higher potential output.

[0059] In the technical solution provided by the exemplary embodiment of the present disclosure, by configuring the first semiconductor switch and the second semiconductor switch that can switch states alternately, the problem of switch competition can be effectively avoided, and the dynamic conversion control of the potential signal can be realized with only a small area occupation and a very low production cost. Moreover, the dynamic control conversion circuit has the characteristics of simple structure, which can improve the stability and reliability of the integrated circuit.

[0060] Figure 2 The circuit structure diagram of the dynamic control conversion circuit in other exemplary embodiments of the present disclosure is schematically shown. Figure 2 As shown, based on the above embodiments, the dynamic control unit 110 may mainly include: an AND gate element 111 and a NAND gate element 112 .

[0061] The AND gate element 111 has a first input terminal, a second output terminal and an output terminal. The first input terminal of the AND gate element 111 is used to receive the input reset signal Rst, and the second input terminal of the AND gate element 111 is used to receive the input control signal Input; the output terminal of the AND gate element 111 is simultaneously used as the first signal output terminal and the second signal output terminal of the dynamic control unit 110, and is used to output the same first control signal Ctrl A and the second control signal Ctrl B. It should be noted that in some other embodiments, the first control signal and the second control signal may also be different control signals, and the present disclosure does not specifically limit this.

[0062] The NAND gate element 112 has a first input terminal, a second output terminal and an output terminal. The first input terminal of the NAND gate element 112 is used to receive the input reset signal Rst, the second input terminal of the NAND gate element 112 is used to receive the input control signal Input, and the output terminal of the NAND gate element 112 is used as the third signal output terminal of the dynamic control unit 110 to output the third control signal Ctrl C.

[0063] exist Figure 2 In the illustrated embodiment, the second signal output terminal outputs the same control signal as the first signal output terminal, that is, the second control signal Ctrl B is the same as the first control signal Ctrl A; the third signal output terminal outputs a control signal different from the first signal output terminal, that is, the third control signal Ctrl C is different from the first control signal Ctrl A. For example, when the first control signal Ctrl A is a high-potential control signal, the second control signal Ctrl B is also a high-potential control signal, and the third control signal Ctrl C is a low-potential control signal; when the first control signal Ctrl A is a low-potential control signal, the second control signal Ctrl B is also a low-potential control signal, and the third control signal Ctrl C is a high-potential control signal.

[0064] Continue to refer Figure 2 As shown, the circuit output unit 130 may mainly include: a third semiconductor switch 123 and a fourth semiconductor switch 124 .

[0065] The third semiconductor switch 123 has a control terminal, a first terminal, and a second terminal, and can be, for example, a PMOS transistor. The control terminal of the third semiconductor switch 123 serves as the first control terminal of the circuit output unit 130, and is used to receive a control signal transmitted through the first semiconductor switch 121 or the second semiconductor switch 122; the first terminal of the third semiconductor switch 123 is connected to the third voltage terminal VZ; the second terminal of the third semiconductor switch 123 serves as the output terminal of the circuit output unit 130, and can generate an output signal Output when the switch is turned on.

[0066] The fourth semiconductor switch 124 has a control terminal, a first terminal and a second terminal, and can be, for example, an NMOS transistor. The control terminal of the fourth semiconductor switch 124 serves as the second control terminal of the circuit output unit 130, and is used to receive the control signal transmitted through the second semiconductor switch 122 or receive the third control signal Ctrl C output by the third signal output terminal of the dynamic control unit 110; the first terminal of the fourth semiconductor switch 124 is connected to the fourth voltage terminal VO1, and the second terminal of the fourth semiconductor switch 124 serves as the output terminal of the circuit output unit 130, and can generate an output signal Output when the switch is turned on.

[0067] In some optional implementations, the third voltage terminal VZ may have the same potential as the first voltage terminal VX, and the fourth voltage terminal VO1 may be a ground voltage terminal.

[0068] In some optional embodiments, such as Figure 2 As shown, the first end of the first semiconductor switch 121 is connected to the first voltage terminal VX through the sixth semiconductor switch 126. The sixth semiconductor switch 126 has a control end, a first end and a second end, and can be, for example, a PMOS transistor. The control end of the sixth semiconductor switch 126 is connected to the output end of the circuit output unit 130, the first end of the sixth semiconductor switch 126 is connected to the first voltage terminal VX, and the second end of the sixth semiconductor switch 126 is connected to the first end of the first semiconductor switch 121. By configuring the sixth semiconductor switch 126, real-time feedback of the output signal Output can be achieved.

[0069] Combine the following Figure 2 The control conversion principle of the dynamic control conversion circuit in each of the above embodiments is described in detail.

[0070] like Figure 2 As shown, the second voltage terminal VY can provide a high potential signal. When the input control signal Input changes, the dynamic control unit 110 can automatically switch the on and off states of the first semiconductor switch 121 and the second semiconductor switch 122 according to the signal change, thereby controlling the conversion output signal. For example:

[0071] When the input reset signal Rst is at a high potential, when the input control signal Input is at a high potential, the first control signal Ctrl A and the second control signal Ctrl B outputted by the AND gate element 111 are both high potential control signals. Under the control of the high potential control signal, the first semiconductor switch 121 is in an off state (the resistance between the first end and the second end thereof increases), and the second semiconductor switch 122 is in an on state (the resistance between the first end and the second end thereof decreases); at the same time, the third control signal Ctrl C outputted by the NAND gate element 112 is a low potential signal, which is transmitted to the control end of the third semiconductor switch 123 and the control end of the fourth semiconductor switch 124 at the same time. Under the control of the low potential third control signal Ctrl C, the third semiconductor switch 123 is in an on state, and the fourth semiconductor switch 124 is in an off state. On this basis, the high potential signal provided by the first voltage terminal VX can form a high potential output signal Output after being transmitted by the third semiconductor switch 123.

[0072] When the Rst signal is at a high potential, when the input control signal Input is at a low potential, the first control signal Ctrl A and the second control signal Ctrl B outputted by the AND gate element 111 are both low potential control signals. Under the control of the low potential control signal, the first semiconductor switch 121 is in a conducting state, and the second semiconductor switch 122 is in a disconnected state; at the same time, the third control signal Ctrl C outputted by the NAND gate element 112 is a high potential signal, which will be transmitted to the control end of the fourth semiconductor switch 124. Under the control of the high potential third control signal Ctrl C, the fourth semiconductor switch 124 is in a conducting state. On this basis, the low potential signal provided by the fourth voltage terminal VO1 can form a low potential output signal Output after being transmitted by the fourth semiconductor switch 124.

[0073] When the output signal needs to be reset, the input reset signal Rst can be adjusted to a low potential, at which point the output signal Output is reset to a low potential and is not affected by the potential change of the input control signal Input. After the reset is completed, the input reset signal Rst can be adjusted to a high potential again, at which point the output signal Output can continue to be controlled by the input control signal Input.

[0074] Figure 3 The schematic diagram shows the signal change state of the output signal Output following the input control signal Input. Figure 3 As shown, the dynamic control conversion circuit provided by the exemplary embodiment of the present disclosure can effectively realize the potential conversion of the signal.

[0075] Figure 4 The circuit structure diagram of the dynamic control conversion circuit in other exemplary embodiments of the present disclosure is schematically shown. Figure 4 As shown, based on the above embodiments, the dynamic control unit 110 may mainly include: an AND gate element 111 , a NAND gate element 112 and an inverter 113 .

[0076] The AND gate element 111 has a first input terminal, a second output terminal and an output terminal. The first input terminal of the AND gate element 111 is used to receive the input reset signal Rst, the second input terminal of the AND gate element 111 is used to receive the input control signal Input, and the output terminal of the AND gate element 111 serves as the first signal output terminal and the second signal output terminal of the dynamic control unit 110, and is used to output the same first control signal Ctrl A and the second control signal Ctrl B. It should be noted that, in some other embodiments, the first control signal and the second control signal may also be different control signals, and the present disclosure does not specifically limit this.

[0077] The NAND gate element 112 has a first input terminal, a second output terminal and an output terminal. The first input terminal of the NAND gate element 112 is used to receive the input reset signal Rst, the second input terminal of the NAND gate element 112 is used to receive the input control signal Input, and the output terminal of the NAND gate element 112 is used as the third signal output terminal of the dynamic control unit 110 to output the third control signal Ctrl C.

[0078] The input end of the inverter 113 is used to receive the input reset signal Rst, and the output end of the inverter 113 serves as the fourth signal output end of the dynamic control unit 110. The fourth signal output end is connected to the third control end of the circuit output unit 130 and is used to output the fourth control signal Ctrl D to the circuit output unit 130.

[0079] Continue to refer Figure 4 The circuit output unit 130 may mainly include: a third semiconductor switch 123 , a fourth semiconductor switch 124 and a fifth semiconductor switch 125 .

[0080] The third semiconductor switch 123 has a control terminal, a first terminal, and a second terminal, and can be, for example, a PMOS transistor. The control terminal of the third semiconductor switch 123 serves as the first control terminal of the circuit output unit 130, and is used to receive a control signal transmitted through the first semiconductor switch 121 or the second semiconductor switch 122; the first terminal of the third semiconductor switch 123 is connected to the third voltage terminal VZ; the second terminal of the third semiconductor switch 123 serves as the output terminal of the circuit output unit 130, and can generate an output signal Output when the switch is turned on.

[0081] The fourth semiconductor switch 124 has a control terminal, a first terminal and a second terminal, and can be, for example, an NMOS transistor. The control terminal of the fourth semiconductor switch 124 serves as the second control terminal of the circuit output unit 130, and is used to receive the control signal transmitted through the second semiconductor switch 122 or receive the third control signal Ctrl C output by the third signal output terminal of the dynamic control unit 110; the first terminal of the fourth semiconductor switch 124 is connected to the fourth voltage terminal VO1, and the second terminal of the fourth semiconductor switch 124 serves as the output terminal of the circuit output unit 130, and can generate an output signal Output when the switch is turned on.

[0082] The fifth semiconductor switch 125 has a control terminal, a first terminal and a second terminal, and can be, for example, an NMOS transistor. The control terminal of the fifth semiconductor switch 125 serves as the third control terminal of the circuit output unit 130, and is used to receive the fourth control signal Ctrl D output by the fourth signal output terminal of the dynamic control unit 110; the first terminal of the fifth semiconductor switch 125 is connected to the fifth voltage terminal VO2, and the second terminal of the fifth semiconductor switch 125 serves as the output terminal of the circuit output unit, and can generate an output signal Output when the switch is turned on.

[0083] In some optional implementations, the third voltage terminal VZ and the first voltage terminal VX may have the same potential, and the fourth voltage terminal VO1 and the fifth voltage terminal VO2 may be ground voltage terminals.

[0084] exist Figure 4 In the dynamic control conversion circuit shown, the output signal Output can be quickly and efficiently reset or set to an initial state by configuring the reset control signal Rst. For example:

[0085] When the reset control signal Rst is at a low potential, the fourth control signal Ctrl D output by the inverter 113 is a high potential control signal, and under the control of the high potential control signal, the fifth semiconductor switch 125 is in a conducting state. On this basis, the low potential signal provided by the fifth voltage terminal VO2 can be transmitted by the fifth semiconductor switch 125 to form a low potential output signal Output, thereby resetting the output signal.

[0086] When the reset control signal Rst is at a high level, the fourth control signal Ctrl D output by the inverter 113 is a low level control signal. Under the control of this low level control signal, the fifth semiconductor switch 125 is in a disconnected state. At this time, the output signal Output follows the conversion control of the input control signal Input. Figure 2 The control principle of the circuit shown is the same and will not be repeated here.

[0087] In addition, it should be noted that in the above exemplary embodiments, NMOS transistors and PMOS transistors are used as examples to illustrate various switch devices, but the present disclosure is not limited thereto. Various switch devices can be selected from BJT devices, SCR devices or CMOS devices, etc. as needed.

[0088] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any modification, use or adaptation of the present disclosure, which follows the general principles of the present disclosure and includes common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present disclosure are indicated by the appended claims.

Claims

1. A dynamic control conversion circuit, characterized in that: include: A dynamic control unit, the dynamic control unit is used to generate a dynamic control signal according to a received input signal; a first semiconductor switch, wherein a control end of the first semiconductor switch is connected to a first signal output end of the dynamic control unit, and a first end of the first semiconductor switch is connected to a first voltage end; a second semiconductor switch, wherein a control end of the second semiconductor switch is connected to a second signal output end of the dynamic control unit; A circuit output unit, wherein the first control end of the circuit output unit is connected to the second end of the first semiconductor switch and the first end of the second semiconductor switch; the second control end of the circuit output unit is connected to the second end of the second semiconductor switch and the third signal output end of the dynamic control unit; wherein, The dynamic control unit comprises: An AND gate element, wherein a first input terminal of the AND gate element is used to receive an input reset signal, a second input terminal of the AND gate element is used to receive an input control signal, and an output terminal of the AND gate element serves as a first signal output terminal and a second signal output terminal of the dynamic control unit; A NAND gate element, wherein the first input terminal of the NAND gate element is used to receive the input reset signal, the second input terminal of the NAND gate element is used to receive the input control signal, and the output terminal of the NAND gate element serves as the third signal output terminal of the dynamic control unit.

2. The dynamic control conversion circuit according to claim 1, characterized in that: The potential of the power supply of the dynamic control unit is lower than the potential of the first voltage terminal.

3. The dynamic control conversion circuit according to claim 1, characterized in that: The second signal output terminal outputs a control signal that is the same as that of the first signal output terminal, and the third signal output terminal outputs a control signal that is different from that of the first signal output terminal.

4. The dynamic control conversion circuit according to claim 1, characterized in that: The circuit output unit comprises: a third semiconductor switch, wherein a control end of the third semiconductor switch serves as a first control end of the circuit output unit, a first end of the third semiconductor switch is connected to a third voltage end, and a second end of the third semiconductor switch serves as an output end of the circuit output unit; A fourth semiconductor switch, wherein the control end of the fourth semiconductor switch serves as the second control end of the circuit output unit, the first end of the third semiconductor switch is connected to the fourth voltage end, and the second end of the third semiconductor switch serves as the output end of the circuit output unit.

5. The dynamic control conversion circuit according to claim 4, characterized in that: The third voltage terminal has the same potential as the first voltage terminal, and the fourth voltage terminal is a ground voltage terminal.

6. The dynamic control conversion circuit according to claim 1, characterized in that: The dynamic control unit also includes: An inverter, wherein the input end of the inverter is used to receive the input reset signal, and the output end of the inverter serves as the fourth signal output end of the dynamic control unit, and the fourth signal output end is connected to the third control end of the circuit output unit.

7. The dynamic control conversion circuit according to claim 6, characterized in that: The circuit output unit comprises: a third semiconductor switch, wherein a control end of the third semiconductor switch serves as a first control end of the circuit output unit, a first end of the third semiconductor switch is connected to a third voltage end, and a second end of the third semiconductor switch serves as an output end of the circuit output unit; a fourth semiconductor switch, wherein a control end of the fourth semiconductor switch serves as a second control end of the circuit output unit, a first end of the fourth semiconductor switch is connected to a fourth voltage end, and a second end of the fourth semiconductor switch serves as an output end of the circuit output unit; A fifth semiconductor switch, wherein the control end of the fifth semiconductor switch serves as the third control end of the circuit output unit, the first end of the fifth semiconductor switch is connected to the fifth voltage end, and the second end of the fifth semiconductor switch serves as the output end of the circuit output unit.

8. The dynamic control conversion circuit according to claim 7, characterized in that: The third voltage terminal has the same potential as the first voltage terminal, and the fourth voltage terminal and the fifth voltage terminal are ground voltage terminals.

9. The dynamic control conversion circuit according to any one of claims 1 to 8, characterized in that: The first end of the first semiconductor switch is connected to the first voltage end through the sixth semiconductor switch; wherein the control end of the sixth semiconductor switch is connected to the output end of the circuit output unit, the first end of the sixth semiconductor switch is connected to the first voltage end, and the second end of the sixth semiconductor switch is connected to the first end of the first semiconductor switch.

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