Stack Management

Abstract

A method of managing a stack, including detecting, by a stack manager of a processor, that a size of a frame to be allocated exceeds available space of a first stack. The first stack is used by a specific task executed at the processor. The method further includes designating a second stack for use by the specific task. The method further includes copying metadata associated with the first stack to the second stack. The metadata enables the stack manager to transition from the second stack to the first stack when detecting that the second stack is no longer used by the specific task. The method further includes allocating a frame in the second stack.

Description

[0001] Priority Statement

[0002] This application claims priority to co-owned U.S. Provisional Patent Application No. 62 / 811,403, filed on February 27, 2019, and U.S. Non-Provisional Patent Application No. 16 / 801,776, filed on February 26, 2020, the content of each of which is hereby incorporated by reference in its entirety. Technical Field

[0003] This disclosure generally relates to stack management. Background Art

[0004] Advances in technology have led to smaller and more powerful computing devices. For example, there are currently a variety of portable personal computing devices, including wireless telephones such as mobile and smart phones, tablet computers, and laptop computers, which are small in size, light in weight, and easy for users to carry. These devices can transmit voice and data packets over a wireless network. In addition, many such devices incorporate additional functions, such as digital cameras, digital video cameras, digital recorders, and audio file players. In addition, such devices can process executable instructions, including software applications that can be used to access the Internet, such as a web browser application. Thus, these devices can include significant computing power.

[0005] Computing devices include a processor, such as a digital signal processor (DSP). In a DSP, each task typically has an associated region of memory called a stack. In some DSPs, the average size of the stack associated with a task is 8 kilobytes (KB), but in some cases, the stack associated with a task can be as large as 128 KB. To protect software integrity, an exception is generated if a task attempts to use more space than the allocated stack. The size of the stack is typically adjusted to handle the worst-case scenario of a particular task. Thus, in normal (e.g., non-worst-case) scenarios, most of the allocated stack space remains unused. Summary of the Invention

[0006] In a particular aspect, a method of managing a stack includes a stack manager of a processor detecting that a size of a frame to be allocated exceeds available space of a first stack. The first stack is used by a particular task executing at the processor. The method further includes designating a second stack for use by the particular task. The method further includes copying metadata associated with the first stack to the second stack. The metadata enables the stack manager to transition from the second stack to the first stack when detecting that the second stack is no longer used by the particular task. The method further includes allocating the frame in the second stack.

[0007] In another particular aspect, a device includes a first memory, a second memory, and a stack manager of a processor. The first memory is configured to include a first stack. The second memory is configured to include a second stack. The stack manager is configured to detect that the size of a frame to be allocated exceeds the available space of the first stack. The first stack is used by a particular task executed at the processor. The stack manager is further configured to designate the second stack for use by the particular task. The stack manager is also configured to copy metadata associated with the first stack to the second stack. The metadata enables the stack manager to transition from the second stack to the first stack when it detects that the second stack is no longer being used by the particular task. The stack manager is further configured to allocate a frame in the second stack.

[0008] In another particular aspect, a computer-readable storage device stores instructions that, when executed by a processor, cause the processor to perform operations that include detecting that the size of a frame to be allocated exceeds the available space of the first stack. The first stack is used by a particular task executed at the processor. The operations further include designating a second stack for use by the particular task. The operations also include copying metadata associated with the first stack to the second stack. The metadata enables the stack manager to transition from the second stack to the first stack when it detects that the second stack is no longer being used by the particular task. The operations further include allocating a frame in the second stack.

[0009] Other aspects, advantages, and features of the present disclosure will become apparent after reading the entire application, including the following sections: the description of the drawings, the detailed description, and the claims. Description of the Drawings

[0010] Figure 1 is a block diagram of a particular illustrative aspect of a system operable to perform stack management;

[0011] Figure 2 is a diagram of a particular illustrative example of stack management;

[0012] Figure 3 is a diagram of a particular illustrative example of stack management;

[0013] Figure 4 is a diagram of a particular illustrative example of stack management;

[0014] Figure 5 is a diagram of a particular illustrative example of stack management;

[0015] Figure 6 is a diagram of a particular illustrative example of a stack management method; and

[0016] Figure 7 is a block diagram of a particular illustrative example of a device operable to perform stack management. Detailed Description

[0017] Reference Figure 1 , specific illustrative aspects of a system operable to perform stack management are disclosed, the system generally designated as 100. System 100 includes one or more processors 102, collectively referred to herein as "processors 102". Processor 102 includes cores 106, such as digital signal processor (DSP) cores, central processing unit (CPU) cores, or both. Processor 102 includes a memory management unit (MMU) 110, a stack manager 112, or both. In Figure 1 , the MMU 110 and the stack manager 112 are shown external to the core 106. In some implementations, the core 106 includes the MMU 110, the stack manager 112, or both. Processor 102 includes tightly coupled memory (TCM) 104, a cache 108 (e.g., a level 2 (L2) cache), or both.

[0018] Processor 102 is coupled to a memory 114 (e.g., double data rate (DDR) synchronous dynamic random access memory (SDRAM)). In a particular aspect, the memory 114 is configured to include a firmware (FW) stack 120 (e.g., a start stack), an FW stack 124 (e.g., an end stack), or both. In a particular aspect, the TCM 104 includes an FW stack 122. In a particular aspect, the FW stack 122 has a first latency (e.g., read latency, write latency, access latency, or a combination thereof) that is reduced (e.g., lower) compared to a second latency of the FW stack 120, a third latency of the FW stack 124, or both. In one example, the reduced latency is due to faster data access at the TCM 104 compared to the memory 114.

[0019] In certain aspects, the FW stack is used for firmware tasks, such as tasks performed by firmware to initialize the CPU core, memory, peripherals, graphics, etc. In certain aspects, the software (SW) stack is used for software tasks, such as software applications executed by the CPU. In certain implementations, firmware tasks may have a higher priority and may receive stack space in lower latency memory compared to software tasks. In certain aspects, the memory 114 includes a software (SW) stack 126 and one or more shared stacks 128. For example, the shared stack 128 includes a pool of available memory space that can be dynamically allocated to be used as a stack for tasks at the processor 102. As shown, the shared stack 128 includes stack 130, stack 132, and stack 134. Although three stacks (stack 130, stack 132, and stack 134) are shown, in other implementations, the shared stack 128 may include any number of stacks. In certain aspects, each of the shared stacks 128 is allocated an equal-sized block of the memory 114. For example, each of the shared stacks 128 may have a first specific size, and the first specific size may be greater than the size of the SW stack 126. Alternatively, the shared stacks 128 may have various sizes. For example, stack 130 may have a first size different from (e.g., greater than) a second size of stack 132.

[0020] In a conventional implementation of a dynamically allocated stack, when a task executed at the processor 102 exceeds its allocated stack, the MMU 110 may be configured to assist in allocating additional memory for use by the task's stack, such as by providing virtual-to-physical address translation (e.g., in the translation lookaside buffer (TLB)) when the stack crosses a memory page boundary. However, according to aspects of the present disclosure, the stack manager 112 is configured to perform stack management independently of the MMU 110, including dynamic allocation of stack space, as further described with reference to Figure 2 below.

[0021] The stack manager 112 includes an exception handler 142, a return handler 144, one or more registers for storing stack management values, or a combination thereof. The exception handler 142 is configured to enable the stack manager 112 to transition between different (e.g., non - contiguous) portions of memory that are used as a stack (referred to as a "split stack") by a single task in the following cases: when the task exceeds a first portion of the allocated stack memory (the "first stack" of the split stack of the task) and continues into the next portion of the allocated stack memory (the "second stack" of the split stack). For example, a firmware task can have a split stack that starts in the FW stack 120 (e.g., the task - setup portion of the stack) and extends into the FW stack 122 in the TCM 104 to enable faster access to the "hot" portion of the task. The exception handler 142 enables the stack manager 112 to transition from stack operations at the FW stack 120 to stack operations at the FW stack 122 when the stack of the firmware task exceeds the FW stack 120 (e.g., a stack overflow occurs), as described in more detail with reference to Figures 2 - 6 If the firmware task requires a stack larger than the combined size of the FW stack 120 and the FW stack 122, the exception handler 142 enables the stack manager 112 to transition from the FW stack 122 to a third stack, such as a stack in the FW stack 124 or the shared stack 128. In a particular aspect, the FW stack 120 corresponds to a first memory region of the memory 114, which is different from a second memory region of the memory 114 corresponding to the FW stack 124. As used herein, "different" includes at least one difference. For example, when there is at least one difference that distinguishes a first component from a second component (e.g., the "first component" and the "second component" are not different labels of the same component), the first component is different from the second component. As another example, a software task can start in the software stack 126, and when it exceeds the software stack 126 (e.g., a stack overflow), the exception handler 142 enables the stack manager 112 to transition to a second stack for the software task in the shared stack 128. By way of illustration, the exception handler 142 includes a metadata duplicator 146. The metadata duplicator 146 operates to copy metadata from the first stack to the second stack as part of the transition from the first stack to the second stack, as described in more detail with reference to Figure 2 Stack usage is linearly allocated to tasks using functions implemented in hardware, software, or both. A stack overflow can be detected in hardware or software. In a particular aspect, the stack manager 112 is implemented in software and does not use additional hardware to implement stack management using the stack manager 112 compared to the hardware used to implement stack management using the MMU 110.

[0022] The return handler 144 is configured to enable the stack manager 112 to transition from a second stack to a first stack during the management of a split stack of a task, independent of the MMU 110. For example, when the above firmware task returns from a first function in the FW stack 122, the return handler 144 enables the stack manager 112 to continue stack operations at the FW stack 120, as described in further detail with reference to Figures 2 - 6 As another example, when the above software stack returns from a first function of the stack of a software task in the shared stack 128, the return handler 144 enables the stack manager 112 to continue stack operations at the SW stack 126.

[0023] In some implementations, the software task does not have a stack portion in the TCM 104, and a portion (or all) of the TCM 104 is reserved for use by the stack of a firmware task (which typically may have a higher priority than the software task). In other implementations, one or more high-priority software tasks may receive stack space in the TCM 104. In other implementations, the TCM 104 is not used for the stack, and all stacks are implemented in the memory 114. Thus, the present disclosure is not limited to the above specific examples.

[0024] By using the exception handler 142 and the return handler 144 to transition between stacks implemented in a split stack, the size of the stack for an individual task can be increased or decreased without being limited to memory page boundaries and without using the MMU 110 for address translation. Thus, stack size allocation can be provided more flexibly based on specific task characteristics, and overall memory usage can be reduced. In addition, the stack manager 112 can track stack usage and, based on the execution of the return handler 144, can detect and deallocate unused stacks, thereby providing reduced complexity and time consumption compared to conventional stack deallocation using the MMU, which may include interrupting a task being executed and comparing the stack pointer of the task (e.g., the current stack pointer) with the memory address of the stack allocated to the task to determine whether the memory corresponding to the allocated stack can be freed.

[0025] Reference Figure 2 discloses a specific example of a first stack management, generally designated as 210, and a specific example of a second stack management, generally designated as 250. In a particular aspect, the first stack management 210 corresponds to a conventional implementation of an MMU such as the MMU 110 in combination with Figure 1 In a particular aspect, the second stack management 250 is performed by Figure 1is performed by the stack manager 112, the exception handler 142, the return handler 144, or a combination thereof. In a particular aspect, the first stack management 210 and the second stack management 250 are alternative implementations. In this regard, the MMU 110 performs the first stack management 210 or the stack manager 112 performs the second stack management 250.

[0026] In an example of the first stack management 210, the stack 212 includes a stack frame 214, a stack frame 216, and an unallocated stack 232. The stack frame 214 includes a link return (LR) value 220, a frame pointer (FP) value 222, and local data 224 of the first function called by the task. The stack frame 216 includes an LR value 226, an FP value 228, and local data 230 of the second function called by the task. The FP register 234 indicates the address of the memory location of the stack 212 where the stack frame 216 (e.g., the last stack frame) is stored. The stack pointer (SP) register 236 indicates the address of the memory location of the stack 212 after the stack frame 216. For example, the SP register 236 indicates that, in the case where the size of the stack frame does not exceed the size of the unallocated stack 232, the next stack frame can be stored at the memory location address of the stack 212. The frame limit 238 (e.g., the stack limit) indicates the last memory address of the stack 212 (e.g., the lowest memory address allocated to the stack 212). In a particular aspect, the frame limit 238 indicates the size of the stack 212.

[0027] The MMU is used in conjunction with performing dynamic allocation of the stack 212. For example, in response to determining that the size of the unallocated stack 232 is less than a threshold and data is to be written to the stack 212, the MMU allocates one or more memory pages as a second stack. In a particular aspect, the one or more memory pages of the second stack are not contiguous with the memory allocated to the stack 212. In a particular aspect, the translation lookaside buffer (TLB) is configured to map a first virtual address to a first memory location of the stack 212. The MMU updates the TLB to map a second virtual address to a second memory location of the second stack. In a particular aspect, the second virtual address is the next virtual address in the address sequence after the first virtual address.

[0028] In an example of the second stack management 250, the first stack 252 is included in the first memory. The second stack 254 is included in a second memory that can be different from the first memory. In a particular example, the first stack 252 is included in Figure 1 the FW stack 120 of the memory 114 of Figure 1in the FW stack 122 of the TCM 104. In another example, the first stack 252 is included in the FW stack 122 of the TCM 104, and the second stack 254 is included in the FW stack 124 of the memory 114. In a third example, the first stack 252 includes Figure 1 the SW stack 126, and the second stack 254 is included in Figure 1 the shared stack 128. For example, the second stack 254 may include Figure 1 the stack 130, the stack 132, or the stack 134.

[0029] The size of the first memory may be the same as the size of the second memory. Alternatively, the first memory may have a size different from that of the second memory (e.g., smaller or larger). In a particular aspect, the first memory has a reduced latency time (e.g., read latency time, write latency time, access latency time, or a combination thereof) compared to the second memory. In an alternative aspect, the first memory has the same latency time as the second memory. In a particular aspect, the first memory differs from the second memory in that at least one of the size, latency time, or memory region of the first memory is different from the corresponding one of the size, latency time, or memory region of the second memory. In a particular aspect, the first size of the first stack 252 is equal to the second size of the second stack 254. In an alternative aspect, the first size of the first stack 252 is different from the second size of the second stack 254 (e.g., larger or smaller). The frame limit 278 indicates the last memory address of the first stack 252 (e.g., the lowest memory address allocated to the first stack 252). In a particular aspect, the frame limit 278 indicates the size of the first stack 252. The frame limit 280 indicates the last memory address of the second stack 254 (e.g., the lowest memory address allocated to the second stack 254). In a particular aspect, the frame limit 280 indicates the size of the second stack 254.

[0030] During operation, a stack frame 256 corresponding to a first function call of a task is added to a first stack 252. For example, a first task (e.g., a process) is executing at core 106. In response to initialization of the first task, the stack manager 112 designates the first stack 252 for use by the first task executing at core 106. The stack manager 112 updates a frame limit register 292 that indicates a frame limit 278 of the first stack 252. As part of the execution of the first function call, the stack manager 112 adds the stack frame 256 to the first stack 252. The stack frame 256 includes an LR value 264, an FP value 266, or both. The LR value 264 indicates a return address of the first function call. The stack manager 112 updates the FP register 234 to have an FP value 270 that indicates a memory location of the first stack 252 where the stack frame 256 begins. The SP register 236 has an SP value 272 that indicates a memory location of the first stack 252 where the stack frame 256 ends. Although each of the first stack management 210 and the second stack management 250 is described as using the FP register 234 and the SP register 236, in other implementations, the MMU 110 uses at least one of the FP register or the SP register to perform the first stack management 210, and at least one of the FP register or the SP register is different from a corresponding one of the FP register 234 or the SP register 236 used by the stack manager 112 to perform the second stack management 250.

[0031] In response to the execution of a second function call for a first task at core 106, stack manager 112 attempts to add stack frame 258 to first stack 252. Stack frame 258 includes an LR value 268, an FP value 270 of FP register 234, one or more local values 202, one or more argument values 204, or a combination thereof. Local values 202 correspond to local variable values of the function of the second function call. Argument values 204 indicate the argument values of the second function call. LR value 268 indicates the return address of the second function call. FP value 270 indicates the memory location of first stack 252 where stack frame 256 is stored. When attempting to add stack frame 258 to first stack 252, stack manager 112 attempts to store (e.g., push) LR value 268 (e.g., the return address of the second function call), the FP value 270 of FP register 234, or both to first stack 252. Stack manager 112 updates FP register 234 to indicate the SP value 272 of SP register 236 (e.g., the memory location of first stack 252 where stack frame 258 begins). If stack frame 258 does not exceed the available space in first stack 252, stack manager 112 attempts to update SP register 236 to indicate the memory location of first stack 252 where stack frame 258 ends. SP register 236 is updated to have a value that exceeds (e.g., is less than) the frame limit 278 (e.g., indicated by frame limit register 292) that causes generation of exception 282.

[0032] In response to determining that the size of stack frame 258 exceeds the available space in first stack 252, stack manager 112 designates second stack 254 for use by the first task, as further described with reference to Figure 3 In a particular example, each stack frame of first stack 252 has the same frame size. In a particular aspect, stack manager 112 determines a value based on the frame size and the address indicated by SP register 236 (prior to attempting to add stack frame 258) (e.g., their sum). In response to determining that the determined value exceeds the value indicated by frame limit register 292 (e.g., frame limit 278), stack manager 112 determines that the size of stack frame 258 exceeds the available space in first stack 252. Exception 282 occurs when stack manager 112 attempts to allocate stack frame 258 at first stack 252, and stack manager 112 determines that the size of stack frame 258 exceeds the available space in first stack 252 in response to exception 282. In a particular example, exception 282 is caused when stack manager 112 attempts to allocate memory for at least a portion of stack frame 258 that exceeds frame limit 278. Figure 2 As shown, adding stack frame 258 to first stack 252 would exceed frame limit 278. In a particular aspect, stack manager 112 avoids adding stack frame 258 to first stack 252.

[0033] In response to exception 282, the stack manager 112 executes Figure 1 the exception handler 142. In a particular example, the exception handler 142 enables the stack manager 112 to transition from a first stack 252 in a first memory to a second stack 254 in a second memory. For example, in response to determining that the size of the stack frame 258 exceeds the available space of the first stack 252, the exception handler 142 designates the second stack 254 for use by the first task. In a particular aspect, the first stack 252 is associated with a first-level stack, and the second stack 254 is associated with a second-level stack, as further described with reference to Figure 3 In response to determining that the first stack 252 is associated with the first-level stack, the exception handler 142 determines whether a stack in the next level stack (e.g., the second-level stack) is available. In response to determining that the second stack 254 associated with the second-level stack is available, the exception handler 142 designates the second stack 254 for use by the first task.

[0034] The exception handler 142 (e.g., Figure 1 the metadata duplicator 146) copies the metadata 262 associated with the first stack 252 to the second stack 254. For example, the exception handler 142 stores the state (e.g., register values) at the time of transitioning from the first stack 252 to the second stack 254 so that the state can be restored during a reverse transition from the second stack 254 when the second stack 254 is no longer used by the first task. The exception handler 142 copies the value of the frame limit register 292 (e.g., the frame limit 278) to the second stack 254. The exception handler 142 updates the limit register 292 for the frame to indicate the frame limit 280 of the second stack 254. The exception handler 142 copies the SP value 272 of the SP register 236 (e.g., the memory location of the first stack 252 after the stack frame 256) to the second stack 254. The exception handler 142 allocates a stack frame 260 on the second stack 254 for a second function call (e.g., the function call to the first stack 252 that was previously attempted to be added to the stack frame 258). The exception handler 142 adds the LR value 268 (e.g., the return address of the second function call) to the second stack 254. The exception handler 142 copies the FP value 270 of the FP register 234 (e.g., the value indicating the memory location of the first stack 252 storing the stack frame 256) to the second stack 254. The exception handler 142 adds the local value 202, the argument 204, or a combination thereof to the second stack 254. The exception handler 142 updates the LR register 290 (e.g., the link return register) that indicates Figure 1 the return handler address 274 of the return handler 144.

[0035] In certain aspects, the metadata 262 includes the following items or combinations thereof: a frame limit 278, an SP value 272, an LR value 268, an FP value 270, local values 202, arguments 204, a return handler address 274. In certain aspects, the stack frame 260 includes the following items or combinations thereof: an LR value 268, an FP value 270, local values 202, arguments 204. The exception handler 142 updates the FP register 234 to indicate an FP value 288 that corresponds to (e.g., indicates) a memory location of the second stack 254 that stores the LR value 268. The exception handler 142 updates the SP register 236 to indicate a memory location of the second stack 254 that is after the stack frame 260.

[0036] The stack manager 112 allocates a stack frame 284 for a third function call of the first task. For example, the stack manager 112 copies the value of the LR register 290 (e.g., the return handler address 274) to the second stack 254. The stack manager 112 copies the value of the FP register 234 (e.g., the FP value 288) to the second stack 254. The stack frame 284 includes a return handler address 274, an FP value 288, function call data (e.g., one or more local values, one or more parameters, or a combination thereof) associated with the third function call, or a combination thereof. The stack manager 112 updates the LR register 290 to indicate a value corresponding to the return address of the third function call. Upon returning from the function call, execution generally continues at the address indicated by the LR register 290. The LR register 290 is updated to indicate the return address of the third function call so that execution of the first task can continue from the return address upon a subsequent return from the third function call. The stack manager 112 updates the FP register 234 to indicate a value (e.g., the memory location of the second stack 254 that stores the return handler address 274) of the SP register 236. The stack manager 112 updates the SP register 236 to indicate a memory location of the second stack 254 that is after the stack frame 284.

[0037] When it is detected that the second stack 254 is no longer used by the first task, the metadata 262 enables the stack manager 112 to transition from the second stack 254 to the first stack 252. For example, the stack manager 112 enables the restoration of the stored state when transitioning from the first stack 252 to the second stack 254. In response to determining that the first task is returning from a third function call associated with the stack frame 284, the stack manager 112 removes the stack frame 284 from the second stack 254. In certain aspects, removing the stack frame 284 from the second stack 254 includes: updating the SP register 236 that indicates the value of the FP register 234 (e.g., the memory location in the second stack 254 storing the return handler address 274), updating the FP register 234 that indicates the FP value 288 retrieved from the second stack 254 (e.g., the memory location in the second stack 254 storing the LR value 268), or both. In response to determining that the first task is returning from a third function call associated with the stack frame 284, the stack manager 112 determines that the execution of the first task will continue at the address indicated by the LR register 290 (e.g., the return address of the third function call) and updates the LR register 290 that indicates the return handler address 274 retrieved from the second stack 254. In certain aspects, updating the LR register 290 that indicates the return handler address 274 enables the initiation of the execution of the return handler 144 upon a subsequent return from a function call (e.g., the second function call) that previously caused the transition from the first stack 252 to the second stack 254.

[0038] In response to determining that the first task is returning from a second function call associated with stack frame 260, stack manager 112 removes stack frame 260 from second stack 254. In a particular aspect, removing stack frame 260 from second stack 254 includes updating SP register 236 and FP register 234. For example, stack manager 112 updates SP register 236 to indicate the value of FP register 234 (e.g., FP value 288, the memory location of second stack 254 storing LR value 268). As another example, stack manager 112 updates FP register 234 to indicate FP value 270 (e.g., the value indicating the memory location of first stack 252 storing stack frame 256). In response to determining that the first task is returning from a second function call associated with stack frame 260, stack manager 112 determines that execution will continue 290 at the address indicated by the LR register (e.g., return handler address 274) and updates LR register 290 to indicate the LR value 268 retrieved from second stack 254 (e.g., the return address of the second function call). Execution of return handler 144 is initiated at the instruction stored at return handler address 274 indicated by LR register 290. In a particular aspect, LR register 290 is updated to indicate LR value 268 such that execution can continue at the return address of the second function call after execution of return handler 144.

[0039] In a particular aspect, in response to determining that the first task is returning from a second function call, return processor 144 reconfigures stack manager 112 to transition from second stack 254 to first stack 252. For example, return handler 144 deallocates second stack 254 from the first task. By way of illustration, deallocating second stack 254 includes designating second stack 254 as available for the next allocation. In a particular aspect, second stack 254 is moved to cache 108 during the execution of the second function call and the third function call. In this regard, second stack 254 is designated as available for the next allocation when second stack 254 is stored in cache 108. Allocating second stack 254 (or another stack) when second stack 254 is stored in cache 108 improves performance compared to allocating second stack 254 (or another stack) that is not stored in cache 108.

[0040] In certain aspects, the return handler 144 updates the SP register 236 to indicate the SP value 272 retrieved from the second stack 254 (e.g., the memory location of the first stack 252 storing the LR value 268). In certain aspects, the return handler 144 updates the frame limit register 292 to indicate the frame limit 278 retrieved from the second stack 254. Execution of the first task continues at the instruction stored at the address indicated by the LR register 290 (e.g., the return address of the second function call).

[0041] Accordingly, the second stack management 250 enables transitioning from the first stack 252 to the second stack 254 independently of the MMU 110. The second stack management 250 enables dynamic allocation of additional stack space to tasks that exceed the corresponding allocation in the first stack. When the additional stack space is no longer used by a designated task, the additional stack space can be dynamically reallocated. Although Figure 2 the second stack management 250 is described for a single task, in some implementations, the second stack management 250 is implemented for each task of the processor 102. In one such implementation, for each new task initiated at the processor 102 (e.g., core 106), a corresponding initial stack is allocated in the first memory. For each task that exceeds its corresponding initial stack, a corresponding secondary stack is dynamically allocated in the second memory.

[0042] Refer to Figure 3 , an example of stack management is shown, which is generally designated as 300. In certain aspects, the stack management is performed by Figure 1 the stack manager 112, the exception handler 142, the return handler 144, or a combination thereof, as described in reference Figure 2 .

[0043] Example 300 indicates a multi-layer stack. Example 300 indicates a first stack 310, a second shared stack 320, a third shared stack 330, a fourth shared stack 340, and a fifth shared stack 350 corresponding to a first stack layer, a second stack layer, a third stack layer, a fourth stack layer, and a fifth stack layer, respectively. In certain aspects, Figure 1 the multi-layer stack is included in the system 100 of

[0044] In certain aspects, Figure 2 the first stack 252 of Figure 2The second stack 254 is included in another immediate stack layer (e.g., the first stack 310, the second shared stack 320, the third shared stack 330, the fourth shared stack 340, or the fifth shared stack 350) that is adjacent and after (e.g., above) the above-specified stack layer.

[0045] In Figure 3 each stack layer includes fewer and larger stacks compared to the previous stack layer. For example, the first stack 310, the second shared stack 320, the third shared stack 330, the fourth shared stack 340, and the fifth shared stack 350 include a first plurality of stacks of a first size (e.g., 536 bytes (B)), a second plurality of stacks of a second size (e.g., 2.5 KB), a third plurality of stacks of a third size (e.g., 4 KB), a fourth plurality of stacks of a fourth size (e.g., 8 KB), and a fifth plurality of stacks of a fifth size (e.g., 32 KB), respectively. It should be understood that each stack layer that includes fewer and larger stacks is provided as an illustrative example. In an alternative implementation, the stacks included in a particular layer (e.g., the first stack 252) have the same size as the stacks included in another layer (e.g., the second stack 254). In another alternative implementation, the stacks included in a lower layer have a larger size than the stacks included in a higher layer, and the higher layer includes more stacks than the lower layer.

[0046] The stack manager 112 assigns a corresponding first stack in the first stack 310 to each new task initiated at the processor 102 (e.g., core 106). For example, the stack manager 112 assigns the stack 311 (e.g., the first stack 252) of the first stack 310 to the first task initiated at the core 106. The stack manager 112 also assigns the stack 313 of the first stack 310 to the second task initiated at the core 106.

[0047] The stack manager 112 maintains an allocation bitmask 360 corresponding to the shared stacks. For example, the allocation bitmask 360 includes bitmasks 362, 364, 366, and 368 that are associated with the second shared stack 320, the third shared stack 330, the fourth shared stack 340, and the fifth shared stack 350, respectively. A specific bit of the bitmasks of the allocation bitmask 360 is associated with a specific stack in the corresponding shared stack. For example, each bit of the bitmask 362 corresponds to a specific stack in the second shared stack 320.

[0048] In response to determining that the first task exceeds stack 311, the stack manager 112 (e.g., the exception handler 142) determines whether any second shared stack 320 is available for allocation. For example, in response to determining that a specific bit of the bitmask 362 has a first value (e.g., 0), the stack manager 112 determines that the stack 321 (of the second shared stack 320) corresponding to the specific bit is available. The stack manager 112 (e.g., the exception handler 142) allocates the stack 321 for use by the first task and updates the specific bit of the bitmask 362 to have a second value (e.g., 1) indicating that the stack 321 is not available for allocation. It should be understood that using the allocation bitmask 360 to track the allocated stacks is provided as an illustrative example. In some implementations, other data structures (e.g., lists, stacks, tables, or sets) can be used to track stack allocations. Various other techniques can be used to allocate stacks. In a particular implementation, a last-in-first-out strategy (or a first-in-first-out strategy) is used to allocate from the shared stacks 320, 330, 340, 350, or a combination thereof.

[0049] In response to determining that the second task exceeds stack 313, the stack manager 112 (e.g., the exception handler 142) allocates the stack 323 of the second shared stack 320 to the second task. If a task exceeds its stack in the second shared stack 320, the stack manager 112 (e.g., the exception handler 142) can allocate additional stacks at a higher level. For example, in response to determining that the first task exceeds stack 321, the stack manager 112 (e.g., the exception handler 142) allocates the stack 331 of the third shared stack 330 to the first task.

[0050] Example 300 thus illustrates the dynamic allocation of shared stacks to tasks that use more stack space. The dynamic allocation enables a large amount of stack space to be dynamically available for each task without reserving a large amount of stack space for each task to accommodate worst-case scenarios. For example, the stack space used by the first task is greater than the stack space used by the second task (e.g., 7KB). Assuming that the worst-case scenario represents reserving at least a larger amount (e.g., 7KB) of stack space for each task. Example 300 enables a smaller amount (e.g., 536B) of stack space to be reserved for each task, where additional stack space is dynamically allocated to tasks that exceed the smaller amount of stack space.

[0051] Reference Figure 4 shows an example of stack management, which is generally designated as 400. In a particular aspect, the stack management is performed by Figure 1 the stack manager 112, the exception handler 142, the return handler 144, or a combination thereof.

[0052] Example 400 indicates task 402 initiated at core 106. The first instruction of task 402 (e.g., at address 0x20, where "0x" indicates a hexadecimal numbering scheme) includes a first function call 404 to a first function (e.g., foo). The second instruction of task 402 (e.g., at address 0x40) includes a second function call 406 to a second function (e.g., foo1).

[0053] In certain aspects, the function call includes an allocation request, one or more additional instructions, a deallocation request, or a combination thereof. As described herein, an allocation request (e.g., allocframe) attempts to allocate a stack frame on the stack associated with task 402. For example, stack manager 112 performs the allocation request by storing (e.g., pushing) the LR value of the LR register 290 of Figure 2 the, the FP value of the FP register 234 of Figure 2 or both on the stack. Stack manager 112 updates the FP register 234 that indicates the SP value of the SP register 236. Stack manager 112 determines the local data size to be allocated to store one or more local values, one or more arguments, or a combination thereof of the function call. Stack manager 112 determines a first value (e.g., first value = SP value - local data size) based on the SP value of the SP register 236 and the local data size. Stack manager 112 attempts to update the SP register 236 to indicate the first value. If the first value exceeds (e.g., is less than) the frame limit indicated by the frame limit register 292, an Figure 2 exception 282 is generated.

[0054] As described herein, a deallocation request (e.g., deallocframe) deallocates the stack frame on the stack associated with task 402. For example, stack manager 112 performs the deallocation request by restoring the values of the SP register 236, the FP register 234, the LR register 290, or a combination thereof. By way of illustration, stack manager 112 updates the SP register 236 that indicates the memory location at the end of the previous stack (e.g., the value indicated by the FP register 234). Stack manager 112 updates the FP register 234 that indicates the FP value retrieved from the stack. Stack manager 112 updates the LR register 290 that indicates the LR value retrieved from the stack.

[0055] The first function call 404 includes an allocation request for a stack frame having a first size (e.g., 2 bytes) (e.g., at address 0x300). In a particular aspect, in response to determining that the first stack 252 has available stack space greater than or equal to the first size (e.g., 8 bytes), the stack manager 112 allocates a first stack frame (e.g., stack frame 256) of the first stack 252 to the task 402. In a particular aspect, the stack manager 112 performs the allocation request by storing (e.g., pushing) the LR value 264 (e.g., 0x30, the return address of the first function call 404), Figure 2 the FP value 266 of Figure 2 or both to the first stack 252. The stack manager 112 updates the FP register 234 that indicates the SP value of the SP register 236. The stack manager 112 determines the local data size to be allocated to store one or more local values, one or more arguments, or a combination thereof of the first function call 404. The stack manager 112 determines a first value (e.g., first value = SP value - local data size) based on the SP value of the SP register 236 and the local data size. The stack manager 112 updates the SP register 236 that indicates the first value. Since the first value is within the frame limit 278 indicated by the frame limit register 292 (e.g., greater than or equal to the frame limit 278), no exception 408 is generated. The first stack frame (e.g., stack frame 256) is associated with the first function call 404.

[0056] In response to detecting a deallocation request (e.g., at address 0x320), the stack manager 112 detects that the task 402 is returning from the first function call 404 and removes the first stack frame (e.g., stack frame 256) from the first stack 252. By way of illustration, the stack manager 112 performs the deallocation request by restoring the values of the SP register 236, the FP register 234, the LR register 290, or a combination thereof. The stack manager 112 updates the SP register 236 that indicates the value of the FP register 234. The stack manager 112 updates the FP register 234 that indicates the FP value 266 retrieved from the first stack 252. The stack manager 112 updates the LR register 290 that indicates the LR value 264 retrieved from the first stack 252. For example, Figure 2 the LR value 264 indicates the return address of the first function call 404 (e.g., 0x30) and the execution of the task 402 continues at the return address indicated by the LR value 264.

[0057] The second function call 406 includes an allocation request (e.g., at address 0x400) for a stack frame having a second size (e.g., 20 bytes). In response to the allocation request, an exception 408 is generated (e.g., by the stack manager 112). In a particular aspect, in response to determining that the second size (e.g., 20 bytes) exceeds the available stack space of the first stack 252 (e.g., 8 bytes), the stack manager 112 (or the memory handler) generates the exception 408. In a particular aspect, the stack manager 112 executes the allocation request by storing (e.g., pushing) the LR value 268 of Figure 2 (e.g., 0x50, the return address of the second function call 406), the FP value 270 of the FP register 234, or both to the first stack 252. The stack manager 112 updates the FP register 234 272 that indicates the SP value of the SP register 236. The stack manager 112 determines the local data size to be allocated to store the local values 202 of the second function call 406, Figure 2 the arguments 204, or a combination thereof. The stack manager 112 determines a first value (e.g., first value = SP value - local data size) based on the SP value of the SP register 236 and the local data size. The stack manager 112 updates the SP register 236 that indicates the first value. Because the first value exceeds (e.g., is less than) the frame limit 278 indicated by the frame limit register 292, the exception 408 is generated. In a particular aspect, in response to the exception 408, the updates to the first stack 252, the FP register 234, or a combination thereof are restored. For example, the stack manager 112 updates the FP register 234 that indicates the FP value 270. As another example, the stack manager 112 removes the LR value 268, the FP value 270, or both from the first stack 252. In a particular aspect, in response to the exception 408, the exception handler 142 allocates the stack frame 260 on the second stack 254 to the task 402.

[0058] The exception handler 142 adds the frame limit 278 to the second stack 254 (e.g., the top of the second stack 254). The exception handler 142 updates the frame limit register 292 that indicates the frame limit 280 of the second stack 254. The exception handler 142 adds the SP value 272 of the SP register 236 to the second stack 254. The exception handler 142 adds the LR value 268 to the second stack 254. The LR value 268 indicates the return address of the second function call 406 (e.g., 0x50). The exception handler 142 adds the FP value 270 of the FP register 234 to the second stack 254. The exception handler 142 updates the FP register 234 that indicates the memory location of the second stack 254 where the LR value 268 is stored. The exception handler 142 adds the local value 202, the argument 204, or a combination thereof to the second stack 254. The exception handler 142 updates the SP register 236 that indicates the memory location of the second stack 254 adjacent to the memory allocated to the stack frame 260 in the second stack 254. For example, the value of the SP register 236 indicates the memory location of the second stack 254 that is next available for allocation or at the end of the second stack 254 (e.g., if the second stack 254 is full). In a particular implementation, the second stack 254 grows from a higher memory address to a lower memory address. In this implementation, the exception handler 142 determines a first value (e.g., first value = first address - size of one stack frame) based on a first address that indicates the start (e.g., the top) of the stack frame 260 and a particular size of the stack frame 260, and updates the SP register 236 that indicates the first value. The exception handler 142 updates the LR register 290 that indicates the return handler address 274, as described with reference to Figure 2 described.

[0059] In response to detecting a deallocation request (e.g., at address 0x420), the stack manager 112 detects that task 402 is returning from the second function call 406. The stack manager 112 removes the second stack frame (e.g., stack frame 260) from the second stack 254. For illustration, the stack manager 112 executes the deallocation request by restoring the value of the SP register 236, the FP register 234, the LR register 290, or a combination thereof. The stack manager 112 updates the SP register 236 that indicates the value of the FP register 234 (e.g., the memory location of the second stack 254 storing the LR value 268). The stack manager 112 updates the FP register 234 that indicates the FP value 270 retrieved from the second stack 254. The stack manager 112 determines that the instruction stored at the return handler address 274 indicated by the LR register 290 (e.g., the instruction of the return handler 144) will be executed, and updates the LR register 290 that indicates the LR value 268 retrieved from the second stack 254. The return handler 144 executes the return operation 410, and the return operation 410 enables the stack manager 112 to transition from the second stack 254 to the first stack 252. For example, the return handler 144 updates the SP register 236 that indicates the SP value 272 retrieved from the second stack 254, updates the frame limit register 292 that indicates the frame limit 278 retrieved from the second stack 254, or both. The return handler 144 continues the execution of task 402 at the address indicated by the LR register 290 (e.g., the return address of the second function call 406).

[0060] Example 400 thus shows the dynamic allocation of the second stack 254 for task 402 when the frame size requested by task 402 exceeds the available space of the first stack 252. Example 400 also shows the transition from the second stack 254 to the first stack 252 when the second stack 254 is no longer used by task 402.

[0061] Reference Figure 5 , shows an example of stack management, which is generally designated as 500. In a particular aspect, the stack management is performed by Figure 1 the stack manager 112, the exception handler 142, the return handler 144, or a combination thereof.

[0062] In Figure 2In example 200, in response to determining that the size of the stack frame of a function call exceeds the available space in the first stack 252, the stack manager 112 (e.g., the exception handler 142) allocates a stack frame for the function call in the second stack 254. In example 500, in response to determining that the size of the requested stack frame for a second function call exceeds the available space in the first stack 252, in addition to allocating the stack frame for the second function call to the second stack 254, the exception handler 142 also allocates the stack frame corresponding to the previous function call (e.g., the first function call) to the second stack 254, so that the second function call can easily access the arguments of the first function call.

[0063] The first stack 252 includes an index 508. In a particular aspect, the value of the index 508 indicates the first stack layer including the first stack 252 (e.g., Figure 3 the first stack 310, the second shared stack 320, the third shared stack 330, the fourth shared stack 340, or the fifth shared stack 350). The first stack 252 includes a limit 506 (e.g., reserved space).

[0064] The second stack 254 includes an index 558. In a particular aspect, the value of the index 558 indicates the second stack layer including the second stack 254 (e.g., Figure 3 the first stack 310, the second shared stack 320, the third shared stack 330, the fourth shared stack 340, or the fifth shared stack 350). The second stack 254 includes a limit 556 (e.g., reserved space).

[0065] The stack frame 258 includes an LR value 268, an FP value 270, local values 202, arguments 204, or a combination thereof, as described in reference Figure 2 In a particular aspect, as part of the execution of a first function call, the stack manager 112 adds the stack frame 258 to the first stack 252. The FP register 234 indicates the address of the memory location in the first stack 252 where the LR value 268 is stored. The SP register 236 indicates an SP value 272, e.g., the address of the memory location in the first stack 252 immediately adjacent to the memory allocated to the stack frame 258 (e.g., the next available for allocation).

[0066] In response to an exception indication that a requested stack frame size for a second function call has exceeded a first stack 252, where an index 508 of the first stack 252 indicates a first layer, an index 558 of a second stack 254 indicates a second layer, and the second layer is immediately above the first layer, an exception handler 142 selects the second stack 254. The exception handler 142 copies a value indicated by a frame limit register 292 (e.g., a frame limit 278) to the second stack 254. The exception handler 142 copies an SP value 272 of an SP register 236 to the second stack 254. The exception handler 142 allocates a stack frame 560 of the second stack 254 to the first function call. The exception handler 142 copies values of a stack frame 258 of the first stack 252 to the stack frame 560 of the second stack 254 (including copying an LR value 268, copying an FP value 270, copying local values 202, copying arguments 204, or a combination thereof).

[0067] The exception handler 142 updates an FP register 234 to indicate an FP value 288, e.g., a memory address of the second stack 254 storing the stack frame 560 (e.g., the LR value 268). The exception handler 142 updates an SP register 236 to indicate a memory address of the second stack 254 immediately adjacent to the stack frame 560. The exception handler 142 updates a frame limit register 292 to indicate a frame limit 280 of the second stack 254. The exception handler 142 updates an LR register 290 to indicate a return handler address 274.

[0068] In a particular aspect, the exception handler 142 adds Figure 2 a stack frame 284 to the second stack 254. For example, the exception handler 142 copies a return handler address 274 indicated by an LR register 290 to the second stack 254. The exception handler 142 copies an FP value 288 indicated by an FP register 234 to the second stack 254. The exception handler 142 updates an LR register 290 to indicate a return address of the second function call. The exception handler 142 updates an FP register 234 to indicate a value indicated by an SP register 236 (e.g., a memory location of the second stack 254 storing the return handler address 274). The exception handler 142 updates an FP register 234 to indicate a memory location of the second stack 254 immediately adjacent to a memory storing the stack frame 284. The stack frame 284 is associated with the second function call.

[0069] In some implementations, by copying the stack frame 258 (e.g., in a portion of the stack frame 560) to the second stack 254, the argument 204 is easily accessible to a subsequent function (e.g., a second function call) added to the second stack 254 via the stack pointer location in the second stack 254 (e.g., by counting down from the SP register 236) to provide simplified argument passing.

[0070] In response to determining that the first task is returning from a second function call, the stack manager 112 removes the stack frame 284 from the second stack 254, determines that the execution of the first task will continue from the instruction at the address indicated by the LR register 290, and updates the LR register 290 to indicate the return handler address 274 retrieved from the second stack 254. The stack manager 112 updates the SP register 236 to indicate the value indicated by the FP register 234 (e.g., the memory location of the second stack 254 storing the return handler address 274). The stack manager 112 updates the FP register 234 to indicate the FP value 288 retrieved from the second stack 254.

[0071] In response to determining that the first task is returning from a first function call, the stack manager 112 initiates the execution of the return handler 144 at the return handler address 274 indicated by the LR register 290. For example, the return handler 144 removes the stack frame 560 from the second stack 254, removes the stack frame 258 from the first stack 252, or both. By way of illustration, the return handler 144 updates the SP register 236 to indicate the SP value 272, updates the FP register 234 to indicate the FP value 270, updates the LR register 290 to indicate the LR value 264, updates the frame limit register 292 to indicate the frame limit 278, or a combination thereof. The return handler 144 continues the execution of the first task at the return address of the first function call indicated by the LR value 264 of the LR register 290.

[0072] Thus, Examples 200 and 500 illustrate that various metadata can be stored on the second stack 254 to configure the stack manager 112 (e.g., the return handler 144) to transition from the second stack 254 to the first stack 252 when it is detected that the second stack 254 is no longer being used by the first task.

[0073] Figure 6 A stack management method 600 is shown. In a particular aspect, one or more operations of the method 600 are performed by Figure 1 the exception handler 142, the return handler 144, the stack manager 112, or a combination thereof.

[0074] Method 600 includes, at 602, detecting by a stack manager of a processor that a size of a frame to be allocated exceeds available space of a first stack. For example, Figure 1 an exception handler 142 detects that the size of the frame to be allocated exceeds the available space of the first stack 252, as described with reference to Figure 2 . For example, in response to Figure 2 an exception 282, the exception handler 142 detects that the size of the frame exceeds the available space. The first stack 252 is used by a first task (e.g., Figure 4 task 402) executing at the processor 102 (e.g., core 106).

[0075] Method 600 further includes, at 604, specifying a second stack for use by a particular task. For example, Figure 1 the exception handler 142 specifies a second stack 254 for use by the first task (e.g., Figure 4 task 402), as described with reference to Figures 2 - 5 .

[0076] Method 600 further includes, at 606, copying metadata associated with the first stack to the second stack. For example, Figure 1 the exception handler 142 copies metadata 262 associated with the first stack 252 to the second stack 254, as described with reference to Figure 2 and Figures 4 - 5 . The metadata 262 enables the stack manager 112 to transition from the second stack 254 to the first stack 252 when detecting that the second stack 254 is no longer used by the first task (e.g., Figure 4 task 402).

[0077] Method 600 further includes, at 608, allocating a frame in the second stack. For example, Figure 1 the exception handler 142 allocates a stack frame 284 in the second stack 254, as described with reference to Figure 2 .

[0078] Accordingly, method 600 enables transitioning from the first stack 252 to the second stack 254 independently of the MMU 110. Method 600 enables dynamically allocating additional stack space to a task that exceeds a corresponding allocation in the first stack.

[0079] Referring to Figure 7 , a block diagram of a particular illustrative example of a device (e.g., a wireless communication device) is depicted, which is generally designated as 700. In various examples, device 700 includes fewer or more components than shown in Figure 7 . In the illustrative example, device 700 corresponds to Figure 1 system 100. In the illustrative example, device 700 performs with reference toFigures 1 - 6 One or more operations described.

[0080] In a particular aspect, device 700 includes processor 102. Processor 102 includes stack manager 112. Processor 102 is coupled to antenna 742 via wireless controller 740. Device 700 also includes memory 732. In a particular implementation, memory 732 includes Figure 1 memory 114. Device 700 includes display 728 coupled to display controller 726. One or more speakers 736, one or more microphones 738, or a combination thereof may be coupled to encoder / decoder (CODEC) 734.

[0081] Memory 732 may include instructions 760 executable by processor 102, CODEC 734, stack manager 112, another processing unit of device 700, or a combination thereof to perform the methods and processes disclosed herein (such as the one or more operations described with reference to Figures 1 - 6 One or more operations described). With reference to Figures 1 - 7 One or more components of the systems and devices described may be implemented via dedicated hardware (e.g., circuitry), by a processor executing instructions (e.g., instructions 760) to perform one or more tasks, or a combination thereof. As an example, memory 732, or one or more components of processor 102, stack manager 112, and / or CODEC 734 includes a memory device such as random access memory (RAM), magnetoresistive random access memory (MRAM), spin torque transfer MRAM (STT-MRAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, removable disks, or compact disc read-only memory (CD-ROM). The memory device includes instructions (e.g., instructions 760) that, when executed by a computer (e.g., a processor in CODEC 734, stack manager 112, and / or processor 102), cause the computer to perform the one or more operations described with reference to Figures 1 - 6 One or more operations described. As an example, memory 732, or one or more components of processor 102, stack manager 112, CODEC 734 is a computer-readable storage device of an instruction (e.g., instructions 760) that, when executed by a computer (e.g., a processor in CODEC 734, stack manager 112, and / or processor 102), cause the computer to perform the one or more operations described with reference to Figures 1 - 6 One or more operations described.

[0082] In certain aspects, the device 700 is included in a system-in-package or system-on-chip device 722, such as a mobile station modem (MSM). In certain aspects, the processor 102, the display controller 726, the memory 732, the CODEC 734, the stack manager 112, and the wireless controller 740 are included in the system-in-package or system-on-chip device 722. In certain aspects, an input device 730, such as a touch screen and / or a keyboard, and a power supply 744 are coupled to the system-on-chip device 722. In addition, as shown in FIG. Figure 7 As shown, in certain aspects, the display 728, input device 730, speaker 736, microphone 738, antenna 742, and power supply 744 are external to the system-on-chip device 722. However, each of the display 728, input device 730, speaker 736, microphone 738, antenna 742, and power supply 744 can be coupled to a component, such as an interface or controller, of the system-on-chip device 722. In the illustrative example, the device 700 corresponds to a communication device, a computer, a display device, a television, a game console, a music player, a radio, a video player, an entertainment unit, a personal media player, a digital video player, a camera, a navigation device, a mobile communication device, a smart phone, a cellular phone, a laptop computer, a tablet computer, a personal digital assistant, a display device, an optical disc player, a tuner, a decoder system, an encoder system, or any combination thereof.

[0083] In illustrative aspects, the stack manager 112 is operable to perform stack management according to the described techniques. For example, the stack manager 112 detects that the size of the frame to be allocated exceeds Figure 2 The first stack 252 is used by the first task executing at the processor 102. The stack manager 112 specifies Figure 2 The stack manager 112 copies metadata associated with the first stack 252 to the second stack 254. The metadata enables the stack manager 112 to transition from the second stack 254 to the first stack 252 when it detects that the second stack 254 is no longer used by the first task. The stack manager 112 allocates frames in the second stack 254.

[0084] In conjunction with the described aspects, an apparatus is disclosed that includes a component for detecting that the size of a frame to be allocated exceeds the available space of a first stack. For example, the component for detecting includes Figure 1 The first stack 252 is used by a specific task executed at the processor 102 (e.g., the core 106).

[0085] The apparatus also includes components for specifying a second stack for use by a particular task. For example, the components for specifying include Figure 1 exception handler 142, stack manager 112, one or more devices configured to specify a second stack for use by a particular task (e.g., a processor executing instructions stored in a computer-readable storage device), or any combination thereof.

[0086] The apparatus also includes components for copying metadata associated with the first stack to the second stack. For example, the components for copying include Figure 1 exception handler 142, stack manager 112, one or more devices configured to copy metadata associated with the first stack to the second stack (e.g., a processor executing instructions stored in a computer-readable storage device), or any combination thereof. The metadata 262 enables the stack manager 112 of the processor 102 to transition from the second stack 254 to the first stack 252 when it detects that the second stack 254 is no longer being used by a particular task.

[0087] The apparatus also includes components for allocating frames in the second stack. For example, the components for allocating include Figure 1 exception handler 142, stack manager 112, one or more devices configured to allocate frames in the second stack (e.g., a processor executing instructions stored in a computer-readable storage device), or any combination thereof.

[0088] In a particular aspect, the apparatus also includes components for transitioning from the second stack to the first stack in response to detecting that a particular task is returning from a function associated with a frame. For example, the components for transitioning include Figure 1 return handler 144, stack manager 112, one or more devices configured to transition from the second stack to the first stack (e.g., a processor executing instructions stored in a computer-readable storage device), or any combination thereof.

[0089] As used herein, "coupled" can include communication coupling, electrical coupling, magnetic coupling, physical coupling, optical coupling, and combinations thereof. Two devices (or components) can be coupled (e.g., communicatively coupled, electrically coupled, or physically coupled) directly or indirectly via one or more other devices, components, wires, buses, networks (e.g., wired network, wireless network, or combination thereof), etc. Two devices (or components) that are electrically coupled can be included in the same device or different devices and, by way of non-limiting example, can be connected via electronics, one or more connectors, or inductive coupling. In some implementations, two devices (or components) that are communicatively coupled (such as electrically communicatively) can send and receive electrical signals (digital or analog signals) directly or indirectly (such as via one or more wires, buses, networks, etc.).

[0090] As used herein, "generate", "calculate", "use", "select", "access", and "determine" can be used interchangeably. For example, "generate", "calculate", or "determine" a value, characteristic, parameter, or signal can refer to actively generating, calculating, or determining the value, characteristic, parameter, or signal, or can refer to using, selecting, or accessing a value, characteristic, parameter, or signal such as that which has been generated by a component or device.

[0091] Those skilled in the art will further appreciate that the various illustrative logical blocks, configurations, components, circuits, and algorithm steps described in connection with the aspects disclosed herein can be implemented as electronic hardware, computer software, or a combination of both. The various illustrative components, blocks, configurations, components, circuits, and steps have been generally described above in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be construed as causing a departure from the scope of the present disclosure.

[0092] The steps of a method or algorithm described in connection with aspects disclosed herein can be embodied directly in hardware, in a software component executed by a processor, or in a combination of the two. The software component can reside in random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, a hard disk, a removable disk, a compact disc read-only memory (CD-ROM), or any other form of storage medium known in the art. An exemplary non-transitory (e.g., tangible) storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. Alternatively, the storage medium can be integral to the processor. The processor and the storage medium can reside in an application specific integrated circuit (ASIC). The ASIC can reside in a computing device or a user terminal. Alternatively, the processor and the storage medium can reside as discrete components in a computing device or a user terminal.

[0093] The foregoing description of the disclosed aspects is provided to enable a person skilled in the art to make or use the disclosed aspects. Various modifications to these aspects will be readily apparent to those skilled in the art, and the principles defined herein can be applied to other aspects without departing from the scope of the disclosure. Thus, the disclosure is not intended to be limited to the aspects shown herein but is to be accorded the widest scope consistent with the principles and novel features defined by the following claims.

Claims

1. A device for stack management, comprising: A multi-layer stack, each layer of the stack including a shared stack, wherein each layer of the multi-layer stack includes fewer and larger stacks than the previous layer of the multi-layer stack; A first memory configured to include a first number of first stacks included in a first stack layer of the multi-layer stack, wherein each of the first stacks has a first stack size; A second memory configured to include a second number of second stacks included in a second stack layer of the multi-layer stack, wherein each of the second stacks has a second stack size, wherein the second number is less than the first number, and wherein the second stack size is greater than the first stack size; And A stack manager of a processor, the stack manager being configured to: Detect that the size of a frame to be allocated exceeds the available space of a first stack among the first stacks, the first stack being used by a specific task executed at the processor; In response to determining that the size of the frame to be allocated exceeds the available space of the first stack, select a second stack from one or more unallocated stacks of the second stack layer and designate the second stack for use by the specific task; Copy metadata associated with the first stack to the second stack, the metadata enabling the stack manager to transition from the second stack to the first stack when it is detected that the second stack is no longer used by the specific task; And Allocate the frame in the second stack.

2. The device according to claim 1, wherein the processor includes the first memory, and wherein the second memory is external to the processor.

3. The device according to claim 1, wherein the stack manager is further configured to: Store an address of a return handler in a link return register at least in part based on determining that the size of the frame to be allocated exceeds the available space of the first stack, wherein the frame allocated in the second stack is associated with a function call; and In response to the specific task returning from the function call, execute the return handler corresponding to the address stored in the link return register.

4. The device according to claim 1, wherein the stack manager is further configured to: Maintain an allocation bitmask corresponding to the shared stacks of the multi-layer, wherein each bit of the bitmask is associated with a corresponding one of the shared stacks; and In response to detecting that the size of the frame to be allocated exceeds the available space of the first stack, determine whether any of the shared stacks of the second stack layer are available for allocation based on the allocation bitmask.

5. The device according to claim 1, wherein the stack manager is further configured to: in response to the specific task returning from a function associated with the frame, execute a return handler that reconfigures the stack manager to transition to the first stack based on the metadata.

6. The apparatus according to claim 1, wherein the stack manager is further configured to: deallocate the second stack from the specific task in response to the specific task returned from a function associated with the frame.

7. The apparatus according to claim 6, wherein the stack manager is further configured to: after deallocating the second stack from the specific task, designate the second stack as available for the next allocation, and the second stack is stored in a cache memory.

8. The apparatus according to claim 1, wherein each specific layer stack includes a predetermined number of stacks of a predetermined size, and wherein the predetermined number and the predetermined size are associated with the level of the specific layer in the multi-layer stack.

9. A method of managing a stack, the method comprising: detecting, by a stack manager of a processor, that a size of a frame to be allocated exceeds available space of a first stack used by a specific task executed at the processor, wherein a first stack layer of a multi-layer stack includes a first number of first stacks, wherein each of the first stacks has a first stack size, wherein the first stack is included among the first stacks, and wherein each layer stack of the multi-layer stack includes a shared stack, and wherein each layer stack of the multi-layer stack includes fewer and larger stacks than a previous layer stack of the multi-layer stack; in response to determining that the size of the frame to be allocated exceeds the available space of the first stack, selecting a second stack from one or more unallocated stacks of a second stack layer of the multi-layer stack and designating the second stack for use by the specific task, wherein the second stack layer includes a second number of second stacks, wherein each of the second stacks has a second stack size, wherein the second stack is included among the second stacks, wherein the second number is less than the first number, and wherein the second stack size is greater than the first stack size; copying metadata associated with the first stack to the second stack, the metadata enabling the stack manager to transition from the second stack to the first stack when detecting that the second stack is no longer used by the specific task; and allocating the frame in the second stack.

10. The method according to claim 9, wherein detecting that the size of the frame to be allocated exceeds the available space of the first stack comprises: Detecting an exception caused by a stack limit.

11. The method according to claim 10, wherein the selecting, the designating, the copying, and the allocating are performed by an exception handler in the processor in response to the exception.

12. The method according to claim 9 further comprises: Storing an address of a return handler in a link return register at least partially based on determining that the size of the frame to be allocated exceeds the available space of the first stack, wherein the frame allocated in the second stack is associated with a function call.

13. The method according to claim 12 further comprises: Executing the return handler corresponding to the address stored in the link return register in response to the specific task returned from the function call.

14. The method according to claim 9 further comprises: In response to the specific task returned from the function associated with the frame, a return handler is executed, and the return handler reconfigures the stack manager based on the metadata to transition to the first stack.

15. The method according to claim 9 further comprises: In response to the specific task returned from the function associated with the frame, the second stack is deallocated from the specific task.

16. The method according to claim 15, further comprising: After deallocating the second stack from the specific task, the second stack is designated as available for the next allocation, and the second stack is stored in the cache memory.

17. The method according to claim 14, wherein reconfiguring the stack manager includes copying one or more register values indicated by the metadata to one or more registers to restore the register state.

18. The method according to claim 9, further comprising: detecting, by the stack manager, that a second size of a second frame to be allocated exceeds available space of the second stack; and designating a third stack to be used by the specific task.

19. The method according to claim 9, wherein the designation of the second stack and the transition from the second stack to the first stack are performed independently of the memory management unit.

20. The method according to claim 9, wherein the first stack is included in a first memory, and the first memory has a reduced latency time compared to a second memory including the second stack.

21. The method according to claim 20, wherein the first memory includes a tightly coupled memory (TCM).

22. The method according to claim 20, further comprising: allocating a corresponding initial stack in the first memory for each new task initiated at the processor; and dynamically allocating a corresponding secondary stack in the second memory for each task exceeding the initial stack of the first memory.

23. The method according to claim 9 further comprises: Copy the arguments of the function from the first stack to the second stack to be accessible via the stack pointer position in the second stack.

24. A non-transitory computer-readable medium storing instructions that, when executed by a processor, cause the processor to: detect that the size of a frame to be allocated exceeds the available space of a first stack, the first stack being used by a specific task executed at the processor, wherein a first stack layer of a multi-layer stack includes a first number of first stacks, wherein each of the first stacks has a first stack size, wherein the first stack is included among the first stacks, and wherein each layer stack of the multi-layer stack includes a shared stack, and wherein each layer stack of the multi-layer stack includes fewer and larger stacks than the previous layer stack of the multi-layer stack; In response to determining that the size of the frame to be allocated exceeds the available space of the first stack, select a second stack from one or more unallocated stacks of the second stack layer of the multi-layer stack, and designate the second stack for use by the specific task, where the second stack layer includes a second number of second stacks, where each of the second stacks has a second stack size, where the second stack is included among the second stacks, where the second number is less than the first number, and where the second stack size is greater than the first stack size; Copy the metadata associated with the first stack to the second stack, the metadata enabling the stack manager to transition from the second stack to the first stack when it detects that the second stack is no longer being used by the specific task; And Allocate the frame in the second stack.

25. The non-transitory computer-readable medium according to claim 24, wherein the instructions, when executed by the processor, cause the processor to: in response to the specific task returned from the function associated with the frame, execute a return handler that reconfigures the stack manager to transition to the first stack based on the metadata.

26. The non-transitory computer-readable medium according to claim 24, wherein the instructions, when executed by the processor, cause the processor to: in response to the specific task returned from the function associated with the frame, deallocate the second stack from the specific task.

27. The non-transitory computer-readable medium according to claim 26, wherein the instructions, when executed by the processor, cause the processor to: after deallocating the second stack from the specific task, designate the second stack as available for the next allocation, and the second stack is stored in the cache memory.

28. The non-transitory computer-readable medium according to claim 24, wherein each specific layer stack includes a predetermined number of stacks of a predetermined size, and wherein the predetermined number and the predetermined size are associated with the level of that specific layer in the multi-layer stack.

29. An apparatus, comprising: Means for detecting at a processor that the size of a frame to be allocated exceeds the available space of a first stack, the first stack being used by a specific task executed at the processor, where the first stack layer of a multi-layer stack includes a first number of first stacks, where each of the first stacks has a first stack size, where the first stack is included among the first stacks, and where each layer stack of the multi-layer stack includes a shared stack, and where each layer stack of the multi-layer stack includes fewer and larger stacks than the previous layer stack of the multi-layer stack; A component for selecting, at the processor, a second stack from one or more unallocated stacks of a second stack layer of the multi-layer stack, wherein the second stack layer includes a second number of second stacks, wherein each of the second stacks has a second stack size, wherein the second stack is included among the second stacks, wherein the second number is less than the first number, and wherein the second stack size is greater than the first stack size; A component for designating, at the processor, the second stack for use by the particular task; A component for copying, at the processor, metadata associated with the first stack to the second stack, the metadata enabling a stack manager of the processor to transition from the second stack to the first stack when it detects that the second stack is no longer being used by the particular task; And A component for allocating, at the processor, the frame in the second stack.

30. The apparatus according to claim 29, further comprising: A component for transitioning, at the processor, from the second stack to the first stack in response to detecting that the particular task is returning from a function associated with the frame.

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