SOC System Verification Method, Device, Computer Equipment and Readable Storage Medium
By setting up software and hardware interaction modules in the SOC system for two-way interactive information transmission, generating driver files and verifying, the problems of low verification efficiency and coverage in the existing technology are solved, and efficient software and hardware collaborative verification is achieved.
Patent Information
- Application Number
- CN202110818414.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-07-20
- Publication Date
- 2025-06-24
- Estimated Expiration
- 2041-07-20
AI Technical Summary
The existing SOC system verification method only implements one-way software and hardware interaction, and cannot realize two-way software and hardware interaction collaborative verification, resulting in low verification efficiency and coverage.
By setting up software and hardware interaction modules in the SOC system, the interactive information between the software verification environment and the hardware verification environment is transmitted in two-way, software driver files and hardware driver files are generated, and these files are input into the system to be verified to obtain verification results.
The two-way interactive collaborative verification of software and hardware is realized, the verification efficiency and coverage of the SOC system are improved, and the software and hardware collaborative application behavior of the SOC system can be effectively covered and verified.
Smart Images

Figure CN113536716B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of integrated circuits, and more particularly, to a method and apparatus for verifying an SOC system, a computer device, and a readable storage medium. Background Art
[0002] In the existing SOC system verification process, generally, a shared area is used for information transfer. The hardware excitation is directly packaged and stored in the shared space in advance, and then it is called in a software manner during the software excitation process to achieve the purpose of software and hardware interaction. This processing method only realizes one-way interaction and cannot achieve two-way interaction and collaborative verification between software and hardware. Therefore, its verification efficiency is low and the verification coverage rate is low. Summary of the Invention
[0003] In view of the above problems, the present invention provides a method and apparatus for verifying an SOC system, a computer device, and a readable storage medium to improve the verification efficiency and coverage rate of the SOC system.
[0004] To achieve the above object, the present invention adopts the following technical solutions:
[0005] An SOC system verification method applied to an SOC system provided with a software and hardware interaction module, comprising:
[0006] Controlling the software and hardware interaction module to forward first interaction information and / or second interaction information of a software verification environment and / or a hardware verification environment to the hardware verification environment and / or the software verification environment;
[0007] Controlling the software verification environment to generate a software driver file according to the second interaction information and a preset software excitation, and / or controlling the hardware verification environment to generate a hardware driver file according to the first interaction information and a preset hardware excitation;
[0008] Inputting the software driver file and / or the hardware driver file into a system to be verified, and obtaining a verification result output by the system to be verified.
[0009] Preferably, in the SOC system verification method, the software and hardware interaction module includes a software configuration register, a hardware configuration register, a software status register, a hardware status register, and a dual-port RAM, and the dual-port RAM is connected to the software verification environment and the hardware verification environment.
[0010] Preferably, in the SOC system verification method, the controlling the software and hardware interaction module to forward first interaction information and / or second interaction information of a software verification environment and / or a hardware verification environment to the hardware verification environment and / or the software verification environment includes:
[0011] Receive the first interaction information through the software configuration register, and / or receive the second interaction information through the hardware configuration register;
[0012] Map the first interaction information from the software configuration register to the hardware status register, and / or map the second interaction information from the hardware configuration register to the software status register;
[0013] Transmit the first interaction information and / or the second interaction information to the dual-port RAM.
[0014] Preferably, in the SOC system verification method, it further includes:
[0015] Receive the software status clearing instruction of the software verification environment, and clear the second interaction information in the software status register; and / or
[0016] Receive the hardware status clearing instruction of the hardware verification environment, and clear the first interaction information in the hardware status register.
[0017] Preferably, in the SOC system verification method, the controlling the software verification environment to generate a software driver file according to the second interaction information and a preset software stimulus includes:
[0018] Read the second priority information in the dual-port RAM;
[0019] Sequentially read at least one of the second interaction information from the dual-port RAM according to the second priority information, and perform compilation processing with a preset software stimulus to obtain a software compilation result;
[0020] Generate the software driver file according to the software compilation result.
[0021] Preferably, in the SOC system verification method, the controlling the hardware verification environment to generate a hardware driver file according to the first interaction information and a preset hardware stimulus includes:
[0022] Read the first priority information in the dual-port RAM;
[0023] Sequentially read at least one of the first interaction information from the dual-port RAM according to the first priority information, and perform compilation processing with a preset hardware stimulus to obtain a hardware compilation result;
[0024] Generate the hardware driver file according to the hardware compilation result.
[0025] Preferably, in the SOC system verification method, the preset software stimulus is compiled and generated using the C language or the asm language, and the preset hardware stimulus is compiled and generated using the Systemverilog language or the Verilog language.
[0026] The present invention also provides an SOC system verification device, which is applied to an SOC system provided with a software and hardware interaction module, and includes:
[0027] An interaction information forwarding unit, configured to control the software and hardware interaction module to forward the first interaction information and / or the second interaction information of the software verification environment and / or the hardware verification environment to the hardware verification environment and / or the software verification environment;
[0028] A driver file generation unit, configured to control the software verification environment to generate a software driver file according to the second interaction information and the preset software stimulus, and / or control the hardware verification environment to generate a hardware driver file according to the first interaction information and the preset hardware stimulus;
[0029] A verification result acquisition unit, configured to input the software driver file and / or the hardware driver file into the system to be verified, and acquire the verification result output by the system to be verified.
[0030] The present invention also provides a computer device, including a memory and a processor, where the memory stores a computer program, and when the computer program runs on the processor, it executes the SOC system verification method.
[0031] The present invention also provides a readable storage medium, which stores a computer program, and when the computer program runs on a processor, it executes the SOC system verification method.
[0032] The present invention provides a method for verifying an SOC system. The method for verifying the SOC system is applied to an SOC system provided with a software-hardware interaction module, and includes: controlling the software-hardware interaction module to forward first interaction information and / or second interaction information of a software verification environment and / or a hardware verification environment to the hardware verification environment and / or the software verification environment; controlling the software verification environment to generate a software driver file according to the second interaction information and a preset software stimulus, and / or controlling the hardware verification environment to generate a hardware driver file according to the first interaction information and a preset hardware stimulus; inputting the software driver file and / or the hardware driver file into a system to be verified, and obtaining a verification result output by the system to be verified. By transmitting the hardware interaction information that the software verification environment needs to access to the hardware verification environment, and transmitting the software interaction information that the hardware verification environment needs to access to the software verification environment, the present invention can implement software-hardware interaction verification of the SOC system under software-hardware settings, realize software-hardware co-simulation verification of the SOC system, effectively cover the application behaviors of software-hardware cooperation of the SOC system, and thus improve the verification efficiency and verification coverage rate.
[0033] To make the above objects, features, and advantages of the present invention more obvious and understandable, the following specifically enumerates preferred embodiments and, in conjunction with the accompanying drawings, makes a detailed description as follows. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] To more clearly illustrate the technical solutions of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as limiting the protection scope of the present invention. In each drawing, similar components are numbered similarly.
[0035] Figure 1 is a flowchart of a method for verifying an SOC system provided in Embodiment 1 of the present invention;
[0036] Figure 2 is a schematic structural diagram of an SOC system verification architecture provided in Embodiment 2 of the present invention;
[0037] Figure 3 is a schematic structural diagram of a software-hardware interaction module provided in Embodiment 2 of the present invention;
[0038] Figure 4 is a flowchart of forwarding interaction information provided in Embodiment 2 of the present invention;
[0039] Figure 5 is a flowchart of a method for verifying an SOC system provided in Embodiment 3 of the present invention;
[0040] Figure 6It is a flowchart for generating software driver files provided in Embodiment 4 of the present invention;
[0041] Figure 7 It is a flowchart for generating hardware driver files provided in Embodiment 4 of the present invention;
[0042] Figure 8 It is a schematic structural diagram of a SOC system verification device provided in Embodiment 5 of the present invention. Detailed implementation manners
[0043] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments.
[0044] Generally, the components of the embodiments of the present invention described and illustrated herein can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed present invention, but merely represents selected embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts fall within the scope of protection of the present invention.
[0045] Hereinafter, the terms "including", "having" and their cognates that can be used in various embodiments of the present invention are only intended to represent specific features, numbers, steps, operations, elements, components or combinations of the foregoing items, and should not be construed as first excluding the existence of one or more other features, numbers, steps, operations, elements, components or combinations of the foregoing items or increasing the possibility of one or more features, numbers, steps, operations, elements, components or combinations of the foregoing items.
[0046] In addition, the terms "first", "second", "third", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.
[0047] Unless otherwise limited, all terms (including technical terms and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which various embodiments of the present invention belong. The terms (such as those defined in a commonly used dictionary) will be interpreted as having the same meaning as the contextual meaning in the relevant technical field and will not be interpreted as having an idealized meaning or being overly formal, unless clearly defined in various embodiments of the present invention.
[0048] Embodiment 1
[0049] Figure 1It is a flowchart of a method for verifying an SOC system provided in Embodiment 1 of the present invention. This method is applied to an SOC system provided with a software and hardware interaction module, and includes the following steps:
[0050] Step S11: Control the software and hardware interaction module to forward the first interaction information and / or the second interaction information of the software verification environment and / or the hardware verification environment to the hardware verification environment and / or the software verification environment.
[0051] In an embodiment of the present invention, the above SOC is a system-on-chip (SOC, System on Chip). The above software verification environment is used for designing and compiling software verification test cases, and can also control the sending and receiving of interaction information for interacting with the system hardware. That is, the software verification environment may include a software excitation module, a software compilation module, an interaction configuration module, an interaction status clearing module, and a software driver module, etc. The software excitation module can complete its driver code in C language or assembly language, so as to implement the configuration of software test cases. The software compilation module can implement the compilation process of software excitation and corresponding interaction information through a software compiler supporting the processor, such as a GCC compiler (GCC, GNU Compiler Collection, GNU compiler suite), etc., to generate the required compilation results. The interaction configuration module is used for setting the control of hardware operation during the operation of test cases, and the set interaction information is forwarded to the hardware verification environment through the software and hardware interaction module. The interaction status clearing module is used to control the software and hardware interaction module to clear the corresponding interaction information after receiving the interaction information transmitted from the hardware verification environment.
[0052] In an embodiment of the present invention, the above hardware verification environment is used for designing and compiling hardware verification test cases, and can also control the sending and receiving of interaction information for interacting with the system software. That is, the hardware verification environment may include a hardware excitation module, a hardware compilation module, an interaction configuration module, an interaction status clearing module, and a hardware driver module, etc. The hardware excitation module can complete its driver code in Systemverilog or Verilog language, so as to implement the configuration of hardware test cases. The hardware compilation module can implement the compilation process of hardware excitation and corresponding interaction information through a corresponding simulation tool, such as a VCS or NC simulation tool, etc., to generate the required compilation results. The interaction configuration module is used for setting the control of software operation during the operation of test cases, and the set interaction information is forwarded to the software verification environment through the software and hardware interaction module. The interaction status clearing module is used to control the software and hardware interaction module to clear the corresponding interaction information after receiving the interaction information transmitted from the software verification environment.
[0053] In the embodiments of the present invention, the software-hardware interaction module may be provided with a software configuration register, a hardware configuration register, a software status register, a hardware status register, and a dual-port RAM. The dual-port RAM is connected to the software verification environment and the hardware verification environment. That is, through the registers in the software-hardware interaction module, the transfer of interaction information between the software verification environment and the hardware verification environment can be realized, and the current states of the software verification environment and the hardware verification environment can be saved through the status registers. Through this software-hardware interaction module, the one-way transmission and simultaneous transmission of interaction information between the software verification environment and the hardware verification environment can be realized.
[0054] Step S12: Control the software verification environment to generate a software driver file according to the second interaction information and a preset software stimulus, and / or control the hardware verification environment to generate a hardware driver file according to the first interaction information and a preset hardware stimulus.
[0055] In the embodiments of the present invention, after receiving the second interaction information, the software verification environment can generate a corresponding software driver file through a compiler in combination with a preset software stimulus. After receiving the first interaction information, the hardware verification environment can generate a hardware driver file through a simulator in combination with a preset hardware stimulus. Among them, the first interaction information includes hardware participation setting information, and the second interaction information includes software participation setting information. Among them, the above software-hardware interaction module can simultaneously transmit multiple first interaction information and second interaction information. When transmitting multiple interaction information, the priority of the interaction information can be set so that the software verification environment and the hardware verification environment can determine the order of processing the interaction information according to the priority.
[0056] Step S13: Input the software driver file and / or the hardware driver file into the system to be verified, and obtain the verification result output by the system to be verified.
[0057] In the embodiments of the present invention, by transmitting the hardware interaction information that the software verification environment needs to access to the hardware verification environment, and transmitting the software interaction information that the hardware verification environment needs to access to the software verification environment, the software-hardware interaction verification of the SOC system under software-hardware setting conditions can be realized, and the software and hardware co-simulation verification of the SOC system can be realized, which can effectively cover the application behaviors of the software and hardware collaboration of the SOC system, thereby improving the verification efficiency and verification coverage.
[0058] Embodiment 2
[0059] Figure 2 It is a schematic structural diagram of a verification architecture of an SOC system provided by Embodiment 2 of the present invention.
[0060] Figure 3It is a schematic structural diagram of a software and hardware interaction module provided in Embodiment 2 of the present invention.
[0061] In an embodiment of the present invention, the software and hardware interaction module 300 includes a software configuration register 310, a hardware configuration register 320, a software status register 330, a hardware status register 340, and a dual-port RAM 350. The dual-port RAM 350 is connected to the software verification environment and the hardware verification environment.
[0062] Figure 4 It is a flowchart of forwarding interaction information provided in Embodiment 2 of the present invention, including the following steps:
[0063] Step S41: Receive the first interaction information through the software configuration register and / or receive the second interaction information through the hardware configuration register.
[0064] In an embodiment of the present invention, that is, the software configuration register is connected to the software verification environment, and the hardware configuration register is connected to the hardware verification environment. After setting the first interaction information related to the hardware through the software verification environment, the first interaction information is transmitted to the software configuration register. After setting the second interaction information related to the software through the hardware verification environment, the second interaction information is transmitted to the hardware configuration register.
[0065] Step S42: Map the first interaction information from the software configuration register to the hardware status register and / or map the second interaction information from the hardware configuration register to the software status register.
[0066] In an embodiment of the present invention, the hardware status register temporarily stores the mapped first interaction information to represent the interaction status of the current hardware verification environment. Similarly, the software status register temporarily stores the mapped second interaction information to dialectically represent the interaction status of the current software verification environment. When the hardware verification environment receives the first interaction information, it can immediately issue an instruction to clear the corresponding first interaction information in the hardware status register. When the software verification environment receives the second interaction information, it can also issue an instruction to clear the corresponding second interaction information in the software status register.
[0067] Step S43: Transmit the first interaction information and / or the second interaction information to the dual-port RAM.
[0068] In an embodiment of the present invention, that is, the hardware verification environment can receive the first interaction information from the dual-port RAM, and the software verification environment can receive the second interaction information from the dual-port RAM. Among them, the interaction information in the dual-port RAM can be stored for a preset duration to ensure that the hardware verification environment and the software verification environment can successfully obtain it. And, the dual-port RAM can sort the interaction information according to the tags to determine the order of transmission to the hardware verification environment or the software verification environment, which is not limited here.
[0069] Embodiment 3
[0070] Figure 5 It is a flowchart of a method for verifying an SOC system provided in Embodiment 3 of the present invention. The method includes the following steps:
[0071] Step S51: Control the software and hardware interaction module to forward the first interaction information and / or the second interaction information of the software verification environment and / or the hardware verification environment to the hardware verification environment and / or the software verification environment.
[0072] This step is the same as the above step S11 and will not be repeated here.
[0073] Step S52: Control the software verification environment to generate a software driver file according to the second interaction information and a preset software incentive, and / or control the hardware verification environment to generate a hardware driver file according to the first interaction information and a preset hardware incentive.
[0074] This step is the same as the above step S12 and will not be repeated here.
[0075] Step S53: Input the software driver file and / or the hardware driver file into the system to be verified, and obtain the verification result output by the system to be verified.
[0076] This step is the same as the above step S13 and will not be repeated here.
[0077] Step S54: Receive the software status clearing instruction of the software verification environment, clear the second interaction information in the software status register, and / or receive the hardware status clearing instruction of the hardware verification environment, clear the first interaction information in the hardware status register.
[0078] In an embodiment of the present invention, when no software status clearing instruction or hardware status clearing instruction is received, when the software and hardware interaction module receives new first interaction information or second interaction information, it can also determine to execute the transmission of the new first interaction information or second interaction information, or delay the transmission according to the priority of the first interaction information or the second interaction information. For example, when new first interaction information is received and its priority is relatively high, it can overwrite the original first interaction information, and after execution, the first interaction information with lower original priority is executed, or the corresponding information stored in the dual-port RAM is directly cleared according to the use case setting.
[0079] Embodiment 4
[0080] Figure 6 FIG. 4 is a flowchart of generating a software driver file provided by Embodiment 4 of the present invention, including the following steps:
[0081] Step S61: Read the second priority information in the dual-port RAM.
[0082] Step S62: Sequentially read at least one of the second interaction information from the dual-port RAM according to the second priority information, and perform compilation processing with a preset software excitation to obtain a software compilation result.
[0083] Step S63: Generate the software driver file according to the software compilation result.
[0084] Figure 7 FIG. 5 is a flowchart of generating a hardware driver file provided by Embodiment 4 of the present invention, including the following steps:
[0085] Step S71: Read the first priority information in the dual-port RAM.
[0086] Step S72: Sequentially read at least one of the first interaction information from the dual-port RAM according to the first priority information, and perform compilation processing with a preset hardware excitation to obtain a hardware compilation result.
[0087] Step S73: Generate the hardware driver file according to the hardware compilation result.
[0088] Embodiment 5
[0089] Figure 8 FIG. 6 is a schematic structural diagram of a SOC system verification device provided by Embodiment 5 of the present invention.
[0090] The SOC system verification device 800 includes:
[0091] The interaction information forwarding unit 810 is configured to control the software and hardware interaction module to forward the first interaction information and / or the second interaction information of the software verification environment and / or the hardware verification environment to the hardware verification environment and / or the software verification environment;
[0092] The driver file generation unit 820 is configured to control the software verification environment to generate a software driver file according to the second interaction information and a preset software stimulus, and / or control the hardware verification environment to generate a hardware driver file according to the first interaction information and a preset hardware stimulus;
[0093] The verification result acquisition unit 830 is configured to input the software driver file and / or the hardware driver file into the system to be verified, and acquire the verification result output by the system to be verified.
[0094] In the embodiments of the present invention, for a more detailed functional description of each of the above modules, reference may be made to the corresponding parts in the foregoing embodiments, which will not be elaborated herein.
[0095] In addition, the present invention further provides a computer device, which may include a smart phone, a tablet computer, an in-vehicle computer, a smart wearable device, etc. The computer device includes a memory and a processor. The memory may be used to store a computer program, and the processor runs the computer program, so that the computer device executes the above method or the functions of each module in the above SOC system verification device.
[0096] The memory may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, application programs required for at least one function (such as a sound playback function, an image playback function, etc.); the data storage area may store data created according to the use of the computer device (such as audio data, a phone book, etc.). In addition, the memory may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one magnetic disk storage device, a flash memory device, or other volatile solid-state storage devices.
[0097] This embodiment further provides a computer storage medium for storing the computer program used in the above computer device.
[0098] In several embodiments provided by the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely illustrative. For example, the flowcharts and structure diagrams in the accompanying drawings show the possible architectures, functions, and operations of devices, methods, and computer program products according to multiple embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, a program segment, or a part of code, and the module, program segment, or part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in an alternative implementation, the functions marked in the blocks may occur in a different order than that marked in the accompanying drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the structure diagram and / or flowchart, as well as the combination of blocks in the structure diagram and / or flowchart, can be implemented by a dedicated hardware-based system for performing the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.
[0099] In addition, each functional module or unit in various embodiments of the present invention may be integrated together to form an independent part, or each module may exist alone, or two or more modules may be integrated to form an independent part.
[0100] If the above functions are implemented in the form of software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a smart phone, a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical discs that can store program codes.
[0101] The above is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.
Claims
1. A method for verifying an SOC system, characterized in that Applied to an SOC system provided with a software-hardware interaction module, including: Controlling the software-hardware interaction module to forward first interaction information and / or second interaction information of a software verification environment and / or a hardware verification environment to the hardware verification environment and / or the software verification environment; Controlling the software verification environment to generate a software driver file according to the second interaction information and a preset software stimulus, and / or controlling the hardware verification environment to generate a hardware driver file according to the first interaction information and a preset hardware stimulus; Inputting the software driver file and / or the hardware driver file into a system to be verified, and obtaining a verification result output by the system to be verified; Wherein, the software-hardware interaction module includes a software configuration register, a hardware configuration register, a software status register, a hardware status register, and a dual-port RAM, and the dual-port RAM is connected to the software verification environment and the hardware verification environment; The controlling the software-hardware interaction module to forward first interaction information and / or second interaction information of a software verification environment and / or a hardware verification environment to the hardware verification environment and / or the software verification environment includes: receiving the first interaction information through the software configuration register, and / or receiving the second interaction information through the hardware configuration register; mapping the first interaction information from the software configuration register to the hardware status register, and / or mapping the second interaction information from the hardware configuration register to the software status register; transmitting the first interaction information and / or the second interaction information to the dual-port RAM.
2. The SOC system verification method according to claim 1, wherein Further including: Receiving a software status clearing instruction of the software verification environment, and clearing the second interaction information in the software status register; And / or Receiving a hardware status clearing instruction of the hardware verification environment, and clearing the first interaction information in the hardware status register.
3. The SOC system verification method according to claim 1, wherein The controlling the hardware verification environment to generate a hardware driver file according to the first interaction information and a preset hardware stimulus includes: Reading first priority information in the dual-port RAM; Sequentially reading at least one piece of the first interaction information from the dual-port RAM according to the first priority information, and performing compilation processing with a preset hardware stimulus to obtain a hardware compilation result; Generating the hardware driver file according to the hardware compilation result.
4. The SOC system verification method according to claim 1, wherein The controlling the software verification environment to generate a software driver file according to the second interaction information and a preset software stimulus includes: Reading second priority information in the dual-port RAM; Sequentially reading at least one piece of the second interaction information from the dual-port RAM according to the second priority information, and performing compilation processing with a preset software stimulus to obtain a software compilation result; Generating the software driver file according to the software compilation result.
5. The SOC system verification method according to claim 1, wherein The preset software stimulus is compiled and generated using C language or asm language, and the preset hardware stimulus is compiled and generated using Systemverilog language or Verilog language.
6. A verification device for an SOC system, characterized in that, Applied to an SOC system provided with a software-hardware interaction module, including: An interaction information forwarding unit, configured to control the software and hardware interaction module to forward first interaction information and / or second interaction information of a software verification environment and / or a hardware verification environment to the hardware verification environment and / or the software verification environment; A driver file generation unit, configured to control the software verification environment to generate a software driver file according to the second interaction information and a preset software incentive, and / or control the hardware verification environment to generate a hardware driver file according to the first interaction information and a preset hardware incentive; A verification result acquisition unit, configured to input the software driver file and / or the hardware driver file into a system to be verified, and acquire a verification result output by the system to be verified; Wherein, the software and hardware interaction module includes a software configuration register, a hardware configuration register, a software status register, a hardware status register, and a dual-port RAM, and the dual-port RAM is connected to the software verification environment and the hardware verification environment; The controlling the software and hardware interaction module to forward first interaction information and / or second interaction information of a software verification environment and / or a hardware verification environment to the hardware verification environment and / or the software verification environment includes: receiving the first interaction information through the software configuration register, and / or receiving the second interaction information through the hardware configuration register; mapping the first interaction information from the software configuration register to the hardware status register, and / or mapping the second interaction information from the hardware configuration register to the software status register; and transmitting the first interaction information and / or the second interaction information to the dual-port RAM.
7. A computer device, characterized in that, It includes a memory and a processor, the memory stores a computer program, and when the computer program runs on the processor, it executes the SOC system verification method according to any one of claims 1 to 5.
8. A readable storage medium, characterized in that, It stores a computer program, and when the computer program runs on a processor, it executes the SOC system verification method according to any one of claims 1 to 5.
Citation Information
Patent Citations
Processor co-verification platform based on network transmission and testing method of processor co-verification platform
CN102147760A
Processor collaborative verification platform based on network transmission
CN202110531U