Method for manufacturing an optoelectronic semiconductor device and optoelectronic semiconductor device

Abstract

In one embodiment, the method is for manufacturing an optoelectronic semiconductor device and comprises the following steps: A) providing an optoelectronic semiconductor chip (2) having a contact side (20), B) generating a coating region (21) and a protection region (22) on the contact side (20), C) applying a liquid coating material (30) to the contact side (20), wherein the coating material (30) wets the coating region (21) and does not wet the protection region (22), and D) curing the coating material (30) on the coating region (21) to at least one electrical contact structure (31) such that, in proper use, electrical power is supplied to the semiconductor chip (2) through the at least one contact structure (31).

Description

Field of the Invention

[0001] A method for manufacturing an optoelectronic semiconductor device is described. In addition, an optoelectronic semiconductor device is described. Summary of the Invention

[0002] The task to be solved is to describe a method by which an optoelectronic semiconductor chip can be effectively electrically contacted.

[0003] This task is solved in particular by a method and an optoelectronic semiconductor device having the features of the independent claims. Preferred developments are the subject matter of the remaining claims.

[0004] According to at least one embodiment, the method is for manufacturing an optoelectronic semiconductor device. The completed semiconductor device is, for example, a light-emitting diode (abbreviated as LED), preferably having a plurality of light-emitting units. For example, the completed semiconductor device is a display or a display device. In addition, the completed semiconductor device can be a pixelated headlamp, for example for targeted illumination of individual areas, for example in a house or on a stage, or also in an adaptive headlamp in a motor vehicle.

[0005] According to at least one embodiment, the method includes a step of providing one or more optoelectronic semiconductor chips. At least one semiconductor chip is preferably a light-emitting diode chip. A laser diode chip, such as a vertical-cavity surface-emitting laser (abbreviated as VCSEL), can also be used. If a plurality of semiconductor chips are provided, these semiconductor chips can be structurally identical to each other. Alternatively, different types of semiconductor chips can be installed.

[0006] Preferably, the at least one semiconductor chip is configured to generate visible light, for example to generate blue light. There can also be semiconductor chips for generating green light or yellow light or orange light or red light. In addition, semiconductor chips for generating near-ultraviolet radiation or near-infrared radiation can be provided. The radiation emitted by the semiconductor chip during operation can be generated directly in the semiconductor layer sequence of the semiconductor chip. It is also possible that at least one luminescent substance is assigned to the semiconductor chip, and the radiation generated in the semiconductor layer sequence can be partially or completely converted into radiation of different wavelengths by the luminescent substance. In addition, sensors such as photoelectric sensors or temperature sensors can be present.

[0007] According to at least one embodiment, the semiconductor chip includes one or more contact sides. The at least one contact side is configured to supply power to the semiconductor chip.

[0008] According to at least one embodiment, the method includes the step of generating at least one coating region and at least one protection region on the contact side or on at least one of the contact sides or on a plurality or all of the contact sides. The at least one coating region and the at least one protection region are different from each other, in particular different from each other in terms of their wetting properties with respect to the material. For example, the coating region is designed to be hydrophobic, while the protection region is hydrophilic, or vice versa.

[0009] According to at least one embodiment, the method includes the step of applying at least one liquid coating material to the at least one contact side. Preferably, the coating material is applied flatly, i.e., in particular without the aid of a masking material. By applying the coating material itself, no structuring of the coating material is achieved in this case. Alternatively, the coating material can only be applied locally, for example along the region where a printed circuit is to be formed.

[0010] According to at least one embodiment, the at least one coating material has wetting properties with respect to the coating region. That is, the coating material wets at least one coating region and covers the at least one coating region. Thus, the protection region has a non-wetting effect, so that the coating material finally avoids the protection region.

[0011] Here, the coating material is also applied at least locally to the protection region. This preferably also applies in the case where the coating material is applied in a roughly structured manner, for example in the manner of a printed circuit. This means that the coating material preferably automatically leaves the protection region again. During the step of applying the coating material, the coating material can still be withdrawn from the protection region. Alternatively, the withdrawal is carried out only when the coating material is cured, for example due to a temperature change.

[0012] According to at least one embodiment, the method includes the step of curing at least one coating material. Curing is, for example, cooling and thereby solidifying, hardening (e.g., thermally or photochemically), drying (by evaporation of the solvent) and / or forming an alloy, for example by reacting the coating material with components of the coating region, in particular accompanied by a change in the melting point. Before curing, the coating material is withdrawn from the protection region due to different wetting properties.

[0013] Thus, the electrical contact structure is produced by curing the coating material on the at least one coating region. The contact structure is preferably located directly on the coating region. Thus, when used as specified, the semiconductor chip can be energized through the at least one contact structure. This means that the contact structure forms a current-carrying component in the completed optoelectronic semiconductor device.

[0014] In at least one embodiment, the method is for manufacturing an optoelectronic semiconductor device and includes the following steps, in particular in the stated order:

[0015] A) Providing at least one optoelectronic semiconductor chip having at least one contact side,

[0016] B) Producing at least one coating region and at least one protection region on the contact side or on at least one of the contact sides,

[0017] C) Applying at least one liquid coating material flatly or roughly pre-structured onto the at least one contact side, where the at least one coating material wets the at least one coating region and does not wet the at least one protection region, where the coating material is preferably applied both on the at least one coating region and on the at least one protection region and withdraws from the at least one protection region due to the wetting properties, and

[0018] D) Curing the at least one coating material on the at least one coating region to at least one electrical contact structure such that when used as specified, power is supplied to the semiconductor chip through at least one contact structure.

[0019] Using the method described here, rapid and inexpensive electrical contacting of a large number of semiconductor chips, such as LED chips, is possible. The term "large number" means for example at least ten and / or at most 10 8 semiconductor chips.

[0020] In common contacting methods such as wire bonding, producing planar printed circuit connections or flip-chip soldering, the formation of structured electrical contact lines or contact surfaces is necessary. In addition, accurate placement of the semiconductor chip is required. Such contacting methods require a considerable amount of effort, especially when a very large number of semiconductor chips with small geometric dimensions have to be contacted.

[0021] In the method described here, an LED chip can be contacted with an electrical conductor from above, for example using a coatable or printable or sprayable or jetable or immersible or dropwise or spin-coatable coating material, first in liquid form and then in solid form. For this purpose, the electrical conductor can be transparent or opaque or can also be reflective. Transparent means for example a permeability for the radiation emitted by the semiconductor chip of at least 50% or at least 80% or at least 90%. Reflective means in particular a reflectivity for the radiation emitted by the semiconductor chip of at least 50% or 80% or 90%.

[0022] In the case of non-transparent conductors, particular attention is paid to the fact that the material used for the lines does not cover too much of the semiconductor chip area and thus does not overly obscure the emission. For this purpose, areas can be provided on the LED chip and the areas can be produced by structuring, to which the conductors are to be connected. For this purpose, the areas can be metallized, for example, with contact pads, such that the electrical connection to the LED chip takes place with little loss and, on the other hand, there is sufficient area to mount the conductors on these sites. The areas can be located on the main side and / or the side faces of the LED chip.

[0023] Furthermore, the surface of the LED chip where the conductor should not be applied can be coated in such a way that liquid coating material is repelled. Thus, for example, when using a water-based coating material, the surface in question can be designed to be hydrophobic. This can be achieved, for example, by coating the sites that should later be conductor-free with an oxide such as silicon dioxide and then etching these sites, for example, with hydrofluoric acid, or by coating these sites with a hydrophobic material such as perforated hydrocarbons (e.g., polytetrafluoroethylene).

[0024] In the case of transparent lines, the light-emitting diode chip can be structured and coated on the contact side before being placed on a later carrier, i.e., while still in the wafer composite, such that good electrical connection to the semiconductor material takes place at suitable sites of the semiconductor chip. Materials that form the connection to the conductor and thus to the carrier or to the current source are provided on the outer side of the semiconductor chip for a low-resistance connection to the conductor. The corresponding sites can be conductively interconnected.

[0025] Even when using transparent conductors, the areas on the semiconductor chip can be processed such that they repel the coating material, as described in the case of non-transparent conductors, in particular metal conductors. Furthermore, if required, additional substances with other functions can be added to the transparent conductor. For example, diffusers that scatter light and / or luminescent substances can be added. For example, when jointly contacting red, green, and blue LED emitters, the diffuser can produce an RGB image point with particularly good color mixing. Thus, two functions, namely improving the optical properties and electrical coupling, can be achieved cost-effectively in one working process.

[0026] In addition, the geometry related to the refractive index, in particular the geometry of the transparent conductor, can simultaneously be used as a coupling-out structure, also referred to as an on-chip lens. Thereby, the efficiency and / or the directivity, i.e., the emission characteristics, can be influenced. Thus, optical compensation can be carried out simultaneously with the application of the contact structure.

[0027] Steps can also be encapsulated in the semiconductor chip. In addition, the side edges of the semiconductor chip can be encapsulated according to its shape. Here, other parameters such as surface tension, viscosity, or glass transition point may be important for the coating material that is to be applied in liquid form first.

[0028] Therefore, by using the method described here, low adjustment requirements for the semiconductor chip and the conductor for electrical contact can be achieved to realize the inexpensive, parallelized contact, wiring, mounting, and compensation of semiconductor chips such as LED chips. The semiconductor chip can be mounted on a carrier or a base, and the coating material for electrical contact can be effectively provided starting from the side facing away from the carrier or the base.

[0029] According to at least one embodiment, the at least one coating region and / or the at least one protection region are each an integrated component of the finished semiconductor device. This means that the coating region and / or the protection region are not just temporary components, such as photoresist or mask layers. This means that the coating region and the protection region can be identified in the finished semiconductor device, preferably like the measures that realize the difference between the coating region and the protection region.

[0030] According to at least one embodiment, when observed in a top view of at least one contact side, the at least one semiconductor chip has an average side length of at most 0.2 mm or 0.1 mm or 50 μm. The average side length of the semiconductor chip is preferably at most 30 μm or 15 μm or 10 μm. Alternatively or additionally, the average side length of the semiconductor chip is at least 1 μm or 2 μm or 5 μm. This means that the semiconductor chip is relatively small. When observed in a top view of the contact side, the average side length is especially the sum of all side lengths divided by the number of edges.

[0031] According to at least one embodiment, the coating region or at least one of the coating regions or all coating regions are formed by the smooth semiconductor surface region of the semiconductor chip. Smooth especially refers to a roughness of at most 3 nm or 2 nm or 1 nm. In the present case, roughness is especially understood as a fourth-order shape deviation, i.e., roughness in the form of grooves, scales, and protrusions, see DIN 4760.

[0032] According to at least one embodiment, the protection region or at least one of the protection regions or all protection regions are formed by the rough semiconductor surface region of the semiconductor chip. Instead of the semiconductor surface region, a passivation layer such as an oxide layer can also be used in the protection region.

[0033] The roughness of the corresponding surface area of the protection area is preferably at least 5 nm or 10 nm or 20 nm. Alternatively or additionally, the surface roughness is at most 150 nm or 100 nm or 50 nm or 30 nm. In particular, the roughness for the area of the protection area is significantly smaller than that of common roughened parts to improve the optical coupling output efficiency.

[0034] The so-called lotus effect is achieved through this surface roughness. That is, in the direction parallel to the main extension direction of the surface, the surface structure has a periodicity significantly smaller than the droplet diameter of the coating material. Significantly smaller means, for example, at most one-fifth or one-tenth or one-thirtieth.

[0035] According to at least one embodiment, the at least one coating area and / or the at least one protection area or at least some coating areas and / or at least some protection areas are still produced in the wafer composite. That is, the creation of the coating area and / or the protection area can be carried out before the semiconductor chip is separated from the wafer composite. There are a large number of semiconductor chips in the wafer composite, and preferably at a certain distance from each other, as they were initially grown. Here, these semiconductor chips can still be located on the growth substrate or on an alternative carrier, where in the latter case, the relative positions of the semiconductor chips with respect to each other have not changed or have not changed significantly compared to the growth.

[0036] According to at least one embodiment, the coating area or at least one or all of the coating areas in the coating area are formed by a metallization part. The metallization part preferably directly contacts the semiconductor surface area for the coating area. The thickness of the metallization part is, for example, at least 5 nm or 10 nm or 20 nm and / or at most 2 μm or 1 μm or 0.3 μm.

[0037] According to at least one embodiment, the protection area or one of the protection areas or all of the protection areas are formed by one or more protection coatings. The protection coating can have a smooth surface or can also be equipped with surface roughness. At least one protection coating includes, for example, fluorinated or perfluorinated plastics, such as polytetrafluoroethylene. Alternatively, the at least one protection coating contains oxides, such as silicon dioxide or aluminum oxide. The protection coating can be composed of one or more of these materials.

[0038] According to at least one embodiment, in step C), the coating material is applied without a mask, over a large area, and / or unstructured. Here, the coating material is preferably applied simultaneously and continuously to a large number of semiconductor chips. The number of semiconductor chips on which the coating material is applied is preferably at least 10 3 or 10 5 or 10 7 or 10 8Alternatively or additionally, the quantity is at most 10 10 or 10 9 or 10 8 .

[0039] According to at least one embodiment, in step C), the coating material or at least one coating material is applied by means of spraying, printing, spin coating or drop coating. Printing includes, for example, screen printing methods or inkjet printing methods, by means of which rough structuring can optionally be carried out.

[0040] During drop coating, the semiconductor chip is at a temperature that is relatively low with respect to the evaporation temperature of the coating material or the solvent of the coating material. That is to say, the coating material can condense from the gas phase onto the semiconductor chip and thus be effectively deposited as a liquid.

[0041] According to at least one embodiment, in step C), the application of the coating material or at least one coating material is carried out by means of immersion. That is to say, for example, a semiconductor chip applied to a carrier, still applied to a growth wafer or applied to a temporary substrate can be mainly or completely introduced into the liquid coating material. After lifting or during lifting, the coating material is preferably withdrawn onto the coating area.

[0042] According to at least one embodiment, the completed contact structure or at least one completed contact structure or all completed contact structures are metallic. For example, the contact structure consists of one or more metals or of one or more metal alloys and / or metal layers. For example, one contact structure or a plurality of contact structures are made of one or more of the following metals: Al, Cu, Zn, Ni, Ag, Au, Pt, Ti, In, Cr, Mo, W, Fe, Mn, Cu, Ge, Si. In this context, the semiconductor materials Ge and Si are understood as metals. In addition, Hg can be used as a metal for the contact structure.

[0043] According to at least one embodiment, the coating material or at least one coating material is solder. That is to say, the coating material can be metallic and can be applied in liquid form. The solder may not change or may not change its chemical composition significantly during curing.

[0044] In addition, the coating material can be metallic and change its chemical composition during curing. Thus, for example, mercury (abbreviated as Hg) or a gallium-indium-tin alloy is used as the coating material. Mercury can be applied in liquid form at room temperature or evaporated to form a liquid. By using Hg, an amalgam can be produced specifically on at least one coating area either alone or in combination with other coating materials in addition to Hg or Hg-containing compounds. The gallium-indium-tin alloy is an especially eutectic alloy composed of gallium, indium and preferably also tin. Here, an alloy composed of 68% to 69% Ga, 21% to 22% In and 9.5% to 10.5% Sn has a particularly low melting point of approximately -19.5 °C.

[0045] Compared with water having a surface tension of approximately 70 mN / m at room temperature, Hg at room temperature has a very high surface tension of approximately 470 mN / m, while the gallium-indium-tin alloy is approximately 720 mN / m. In contrast, the surface tension of solvents such as n-hexane or acetone is approximately 20 mN / m at room temperature.

[0046] According to at least one embodiment, other contact structures are manufactured on the contact side. For example, the contact structure is designed as a cathode and the other contact structure is designed as an anode, or vice versa. The contact structure and the other contact structure are preferably not electrically short-circuited. It is possible that the only electrical connection between the contact structure and the other contact structure within the semiconductor device is given via the semiconductor chip.

[0047] According to at least one embodiment, the contact structure and the other contact structure have different heights on the contact side. That is, the semiconductor chip can be thicker in the area of the contact structure than in the area of the other contact structure, or vice versa.

[0048] According to at least one embodiment, the semiconductor chip has one or more steps between the contact structure and the other contact structure. Such steps can extend over the entire active area of the semiconductor chip.

[0049] According to at least one embodiment, the other contact structure is produced in a further step C) and a further step D). That is, both the contact structure and the other contact structure can be produced from a liquid phase. Thereby, at least one semiconductor chip can be contacted from one or more liquid phases on the anode side and the cathode side. In the present case, the liquid phase is also understood to be deposited from a gas phase, where a liquid is formed from the gas phase, for example by condensation.

[0050] According to at least one embodiment, the contact structure or at least one contact structure or all contact structures and / or at least one other contact structure each form an electrical contact surface for the external electrical contact of the finished semiconductor device. It is possible here that the contact structure and / or the other contact structure can be in direct contact with the semiconductor layer sequence of the semiconductor chip involved. Thus, for example, the contact structure consists of a gallium indium tin alloy.

[0051] According to at least one embodiment, the finished semiconductor device includes a carrier. The carrier is, for example, a circuit board such as a printed circuit board (abbreviated as PCB).

[0052] According to at least one embodiment, in step A), one or more semiconductor chips are mounted on the carrier. For this purpose, the carrier can have electrical contact surfaces, such as a common anode or a common cathode, or electrical contact surfaces that can be individually electrically controlled for each semiconductor chip. If the carrier has a large number of individually controllable contact surfaces, the carrier can be a silicon substrate that includes electronic components such as transistors and / or switches for targeted control and addressing of the individual semiconductor chips.

[0053] According to at least one embodiment, the contact structure or at least one of the contact structures or all electrical contact structures are electrical printed circuits. That is to say, a conductor structure such as a printed circuit can be formed from the semiconductor chip involved to the electrical contact part of the carrier via at least one contact structure. The associated electrical contact part of the carrier - the contact structure in the form of a printed circuit extends to this electrical contact part - is preferably located next to the semiconductor chip involved when viewed in a top view on the contact side, especially outside the area of multiple semiconductors.

[0054] According to at least one embodiment, the contact structure or at least one of the contact structures forms an electrical conduction network. Thereby, a single contact structure can electrically connect multiple semiconductor chips to a common contact part, especially on the carrier.

[0055] According to at least one embodiment, the contact structure or at least one of the contact structures forms a contact frame. The contact frame preferably surrounds the contact side at the edge. Thereby, a light exit window can be formed in the center of the contact side, and the light exit window is surrounded and / or framed by the contact structure.

[0056] According to at least one embodiment, the contact structure or at least one of the contact structures includes one or more optically effective additives. The at least one additive is especially selected from the following group: luminescent substances, diffusers, dyes, filtering substances, heat-conducting substances, substances for adapting the refractive index, substances for adapting the thermal expansion coefficient.

[0057] According to at least one embodiment, the contact structure or at least one of the contact structures is formed of a light-transmissive material. Thus, for example, the contact structure consists of a transparent conductive oxide (referred to as TCO), such as ITO or ZnO.

[0058] A metallic, light-transmissive contact structure is also possible. In this case, the thickness of at least one of the contact structures involved is preferably at most 20 nm or 10 nm or 5 nm.

[0059] According to at least one embodiment, the contact structure is designed as an optical element. For example, the contact structure can be shaped as a lens, such as a converging lens or a diverging lens.

[0060] According to at least one embodiment, the semiconductor chip includes an optical body. The optical body can be a light-emitting substance. Additionally, it is possible that the optical body is formed by a light-transmissive growth substrate for a semiconductor layer sequence of the semiconductor chip.

[0061] Furthermore, a optoelectronic semiconductor device is described. The semiconductor device is in particular manufactured using the method as described in connection with one or more of the above embodiments. Thus, the features of the semiconductor device are also disclosed for the method and vice versa.

[0062] In at least one embodiment, the optoelectronic semiconductor device includes an optoelectronic semiconductor chip having a contact side. On the contact side, there are a coating region and a protection region. An electrical contact structure is mounted on the coating region such that the protection region is free of the contact structure. The contact structure can taper towards the protection region in a crescent shape at the edge of the coating region. That is, the contact structure can be designed to be at least like a water droplet towards the protection region, which rests on a base. The contact structure preferably does not contact the protection region, but due to the crescent shape design, the contact structure can locally cover the protection region when observed in a top view of the contact side. Description of the Drawings

[0063] The methods described herein and the optoelectronic semiconductor devices described herein will be explained in more detail below with reference to embodiments based on the drawings. Herein, the same reference numerals in the respective figures denote the same elements. However, no scale reference is shown here, but for better understanding, the individual elements can be shown exaggerated.

[0064] Figures 1 to 12 A schematic diagram showing the method steps of the method described herein, where Figure 1 、 Figure 5 、 Figure 7 、 Figure 9 and Figure 11 show schematic top views, Figure 2 、Figure 3 , Figure 4 , Figure 6 , Figure 8 , Figure 10 and Figure 12 show a schematic cross - sectional view,

[0065] Figures 13 to 15 show a schematic top - view of the method steps of an embodiment of the method described herein,

[0066] Figures 16 to 19 show a schematic top - view of a semiconductor chip of an embodiment of the method described herein,

[0067] Figure 20 and Figure 21 show a schematic cross - sectional view of an embodiment of a optoelectronic semiconductor device described herein,

[0068] Figure 22 show a schematic cross - sectional view of a semiconductor layer sequence for an embodiment of the optoelectronic semiconductor device described herein, and

[0069] Figure 23 and Figure 24 show a schematic cross - sectional view of the method steps of an embodiment of the method described herein. Detailed Description

[0070] In Figure 1 and 2 an embodiment of a method for manufacturing an optoelectronic semiconductor device 1 is shown. In Figure 1 a top - view of

[0071] the optoelectronic semiconductor chip 2 for this method is shown. The semiconductor chip 2 is preferably a light - emitting diode chip (abbreviated as LED chip). When observed in a top - view of the contact side 20, the side length L of the semiconductor chip 2 is in the range of approximately 10 μm. The semiconductor chip 2 is thus relatively small and can be a μLED.

[0072] Figures 2 to 4 A schematic cross - sectional view of a possible implementation of the semiconductor chip 2 is shown, as shown in Figure 1 a top - view of Figures 2 to 4 In the following embodiments, all variants of the semiconductor chip 2 can be used, as shown in connection with

[0073] In the case of the semiconductor chip 2 of Figure 2 , the contact side 20 is provided with a protective coating 42 in the protection area 22. The protective coating 42 covers the entire protection area 22. The side surfaces of the semiconductor chip 2 may also optionally be covered by a passivation layer 24. As an alternative to such a passivation layer 24, the protective coating 42 may extend to the side surfaces. Different from the illustration in Figure 2 , the protective coating 42 or the passivation layer 24 may reach other electrical contact structures 32 on the lower side of the semiconductor chip 2.

[0074] The protective coating 42 is preferably relatively thin. The thickness of the protective coating 42 is in particular at most 200 nm or 100 nm or 50 nm or 20 nm, and the protective coating 42 may be smooth. The protective coating 42 is preferably made of a perfluorinated plastic or an oxide such as silicon dioxide.

[0075] With Figure 2 , these statements related to the protective coating 42 and the passivation layer 24 correspondingly apply to all the remaining embodiments.

[0076] Optionally, a metallization 39 is present in the coating area 21. The metallization 39 may be directly applied to the semiconductor material of the semiconductor chip 2. The optional metallization 39 is preferably also relatively thin. The metallization 39 may completely cover the coating area 21.

[0077] According to Figure 3 , the protection area 22 symbolically represented by hatching is formed by a roughened portion 41. Through the roughened portion 41, a lotus effect can be achieved such that liquid rolls off the roughened portion 41 and accumulates in the coating area 21. For this purpose, the roughened portion 41 preferably has a small average roughness, in particular several tens of nm.

[0078] Figure 3 shows that the roughened portion 41 can be directly produced from the semiconductor material of the semiconductor chip 2. Different from this, the roughened portion 41 can also be produced in the protective coating, which is not shown in Figure 1 . That is to say, the protective coating in which the roughened portion 41 is produced is then directly located on the semiconductor material.

[0079] For example, such a roughened portion 41 is produced by depositing a silicon dioxide layer, which is etched with hydrofluoric acid (abbreviation: HF) in order to achieve a lotus effect on the surface. Such structuring can be demonstrated, for example, by means of an atomic force microscope or an electron microscope.

[0080] In Figure 2 and Figure 3 , the coating area 21 and the protection area 22 are approximately in a common plane. In contrast, in Figure 4It is shown that the main part of the protection area 22 can rise above the plane defined by the coating area 21. The sides of the semiconductor layer sequence 26 of the semiconductor chip 2 and the sides of the bulge can be provided with roughness, protective coatings, and / or passivation layers to ensure non-wetting properties with respect to the coating material not shown.

[0081] The optical body 6 can be mounted on the semiconductor layer sequence 26. The optical body 6 is transmissive to the radiation generated during the operation of the semiconductor chip 2. Different from Figure 4 the illustration shown, the optical body can be designed in the form of a lens. The optical body 6 can be a separately manufactured body applied to the semiconductor layer sequence 26, and a connecting dielectric layer can be present therein. In addition, the optical body 6 can also be formed by the growth substrate for the semiconductor layer sequence.

[0082] As an alternative to the separate optical body, the bulge with the protection area 22 can represent a part of the semiconductor layer sequence 26 of the semiconductor chip 2. For example, the n-type conductive semiconductor sublayer of the semiconductor layer sequence 26 is etched back on all sides to form the contact frame 29. Optionally, the semiconductor layer sequence 26 is provided with metallization 39 around the bulge with the protection area 22.

[0083] In Figure 5 the method step, the carrier 5 is provided. The carrier 5 is, for example, a printed circuit board or a silicon carrier with integrated electronic devices. The carrier 5 has other electrical contact sites 52, which are later individually assigned to the semiconductor chip 2. In addition, there are electrical contact sites 51, for example, as a common anode or as a common cathode. The contact sites 51, 52 can be in a common plane on the carrier 5. The associated side view is shown in Figure 6 In

[0084] In Figure 7 and Figure 8 the method step, the semiconductor chip 2 is applied on the other contact sites 52. The semiconductor chip 2 can be applied from the wafer composite from which the semiconductor chip 2 is grown. The surface density of the semiconductor chip 2 can gradually decrease from the wafer not shown towards the carrier 5, for example, decrease to at most one-tenth and / or at least one-thousandth, for example, decrease to about one percent. That is to say, the semiconductor chips 2 have a significant distance from each other on the carrier 5, but are still relatively densely arranged, for example, having an area share of at least 0.5% or 1% or 5% and / or at most 60% or 30% or 10%.

[0085] In Figure 9 and Figure 10In the method steps, the coating material 30 is applied flatly and initially unstructured. The coating material 30 is, for example, a liquid solder or a conductive ink with silver particles. In addition, an aqueous solution containing zinc salts can be used, so that it can be reduced to zinc. Similarly, a coating material 30 containing aluminum hydroxide is also possible. In the case of a non-metallic coating material 30, zinc oxide can be flocculated out of the aqueous phase, for example.

[0086] In Figure 11 and Figure 12 of the method steps, it is illustrated that due to the anti-wetting effect of the protection area 22, the coating material has withdrawn onto the coating area 21. Therefore, the light exit window 25 has no coating material 30. Thus, the coating material 30 on the semiconductor chip 2 preferably wets only the coating area 21.

[0087] Unlike Figure 11 and Figure 12 of the illustration, the coating material 30 can be in flat direct contact with the carrier 5. However, an electrical short circuit with other contact parts 52 should be avoided here. However, preferably, the carrier 5 also has an anti-wetting effect on the coating material 30.

[0088] Therefore, an electrical contact structure 31 is produced from the coating material 30, which is configured in the form of a grid and conductively connects the coating area 21 to the contact part 51 on the carrier 5.

[0089] In Figures 13 to 15 another exemplary method is shown. According to Figure 13 , the semiconductor chip 2 is mounted on the carrier 5. For the sake of simplicity of the illustration, only one of the semiconductor chips 2 is shown, but a plurality of semiconductor chips 2 can also be mounted.

[0090] In Figure 14 of the steps, the coating material 30 is mounted in a manner similar to a printed circuit and roughly pre-structured. Here, the coating material 30, similar to a printed circuit, can first be applied to the entire semiconductor chip 2 and in particular to the entire protection area 22, for example using a printing method.

[0091] In Figure 15 it can be seen that the coating material has withdrawn from the light exit window 25 of the protection area 22 and is limited to the coating area 21 on the semiconductor chip 2. Thus, an electrical connection can be effectively established between the contact part 51 and the coating area 21 without directly producing the final form of the contact structure 21 when applying the coating material 30. As in all other embodiments, the coating area 21 can optionally be provided with a metallization 39.

[0092] In Figures 16 to 19 a plurality of embodiments of the design of the contact side 20 of the semiconductor chip 2 that can be used here are shown.

[0093] and Figures 1 to 15 The embodiments are different. Figure 2 The coating area 21 in the embodiment is not mounted in a frame form, but extends in an E-shape on the contact side 20. Thus, two protective areas 22 separated from each other can be formed on the contact side 20.

[0094] according to Figure 17 The coating region 21 has a relatively large circular area in the center of the contact side 20, which is formed as an extension of a strip extending up to the edge of the contact side 20. Thus, a large-area electrical contact can be achieved in the center of the contact side 20.

[0095] exist Figure 18 There are a plurality of individual coating regions 21 , which are each designed in strip-like form and are separated from one another by protective regions 22 .

[0096] exist ​ In the exemplary embodiment, the coating region 21 is limited to the corner region of the contact side 20. An optional contact extension 38 extends from the coating region 21, which contact extension is formed, for example, by further metallization. The contact extension 38 can be designed so as not to be wetted by the coating material 30. In other words, the protective region 22 can extend onto the contact extension 38.

[0097] ​ The design of the contact side 20 in FIG. 2 is to be understood as merely exemplary. Other geometries of the coating region 21 and the protective region 22 are also possible.

[0098] ​ The semiconductor layer sequence 26 of the semiconductor chip 2 is shown to have an active region 27 for generating light. A step 23 is formed across the active region 27, so that the coating regions 21 for the contact structures 31, 32 are at different heights. A metallization layer 39 may be present in each case.

[0099] Contact structures 31 , 32 , which can each be deposited from the liquid phase, are formed starting from the coating region 21 . The contact structures 31 , 32 can be produced in separate steps, so that electrical short circuits can be avoided. Optionally, an optical body 6 , such as a growth substrate, can still be located on the semiconductor layer sequence 26 .

[0100] The semiconductor layer sequence is preferably based on a III-V compound semiconductor material. This semiconductor material is, for example, a nitrogen compound semiconductor material such as Al n In 1-n-m Ga m N or phosphorus compound semiconductor materials such as Al n In 1-n-m Ga m P or arsenic compound semiconductor materials such as Aln In 1-n-m Ga m As or Al n Ga m In 1-n-m As k P 1-k where 0 ≤ n ≤ 1, 0 ≤ m ≤ 1 and n + m ≤ 1 and 0 ≤ k < 1. Preferably, for at least one layer or all layers of the semiconductor layer sequence herein, 0 < n ≤ 0.8, 0.4 ≤ m < 1 and n + m ≤ 0.95 and 0 < k ≤ 0.5. Herein, the semiconductor layer sequence may have dopants and additional components. However, for simplicity, only the main components of the lattice of the semiconductor layer sequence are illustrated, namely Al, As, Ga, In, N or P, even if they may be partially replaced by a small amount of other substances and / or supplemented with a small amount of other substances.

[0101] For example, the contact structure 31 is produced as explained in connection with ​ . The same method or a different method can be used for the other contact structure 32.

[0102] In a variant of the manufacturing method for one of the contact structures, the semiconductor chip 2 has a metallization 39 on one or two coating regions 21, which is made of a metal that forms an amalgam with Hg and / or reacts with a gallium-indium-tin alloy. For example, the corresponding metallization 39 is made of Al, Cu, Zn, Ni, Ag, Au, Pt, Ti and / or In. Another metallization 39 is used in the present case, for example, for the contact site 31, which is made of a different metal that does not form an amalgam with Hg. This other metallization 39 is made of Cr, Mo, W, Fe, Mn, Co, Ge and / or Si, for example.

[0103] If the semiconductor chip 2 is now placed on a carrier and vapor-deposited flatly with Hg or immersed in Hg, then Hg forms an amalgam with the metallization 39 for one of the contact sites 32, and the wettability is removed while the differently designed metallizations do not react. Thereby, even in the case of many and small contact structures 31, 32, electrically conductive interconnections with a specific polarity can be produced in a targeted manner without costly adjustment.

[0104] Alternatively, an aqueous solution of HgCl2 can also be used to apply Hg, where noble metals such as Au or Pt should not be used in this case.

[0105] The corresponding manufacturing method based on Hg can also be used in all embodiments.

[0106] In ​On the left side, it is illustrated that a plurality of contact structures 31a, 31b can be deposited in a vertically stacked manner. The coating material for the subsequently produced contact structure 31b preferably only wets the material of the previously produced contact structure 31a here. In the direction away from the contact side 20, the contact structures 31a, 31b can be widened. Thus, when observed in a top view of the contact side 20, the protection area 22 can be partially covered by the contact structures 31a, 31b.

[0107] On ​ the right side, it is shown that the contact structure 31 can be made of a light-transmitting material such as TCO. In this case, the contact structure 31 can be designed in the form of a lens and used as an optical element. Additionally in ​ it is shown that the contact structures 31, 31a, 31b can be respectively crescent-shaped at the edge of the coating area 21. Thus, when observed in cross-section, the shapes of the contact structures 31, 31a, 31b are similar to droplets resting on a liquid-repellent material at the edge.

[0108] On ​ an embodiment of the semiconductor layer sequence 26 equipped with a light output coupling structure 7 is shown. The light output coupling structure 7 has an average structure size, for example, in the range of 0.5 μm to 5 μm. Thus, the light output coupling structure 7 is significantly larger than the structure of the roughness 41 for the lotus effect of the protection area 22.

[0109] On ​ it is illustrated that the coating area 21 and the protection area 22 symbolically represented by the shadow can still be produced in the wafer composite. Here, the semiconductor layer sequence 26 with the area 2' for the semiconductor chip 2 is still located on the growth substrate 6. The active area 27 grows continuously and parallel to the main side of the growth substrate 6.

[0110] According to ​ , the coating material 30 for producing the unshown contact structure is also still applied in the wafer composite, which is only shown in a simplified manner in ​ . Here, the mesa trench 8 is preferably already formed such that the semiconductor chip 2 exists individually but is still located on the growth substrate 6. The side of the semiconductor chip 2 can be equipped with a passivation layer 24, especially in the area of the mesa trench 8. The electrical contact surface can be directly formed on the semiconductor layer sequence 26 by means of the coating material 30.

[0111] Different from ​ and ​ , the coating area 21 and the protection area 22 may be formed only after the mesa trench 8 is produced. Additionally, although less preferred, the coating material 30 can be applied before the mesa trench 8 is produced.

[0112] This patent application claims the priority of German Patent Application 10 2019 106 546.1, the disclosure of which is incorporated herein by reference.

[0113] The invention described herein is not limited by the description based on embodiments. On the contrary, the invention includes each new feature and each combination of features, in particular each combination of features in the claims, even if the feature or the combination itself is not explicitly stated in the claims or the embodiments.

[0114] List of reference numerals

[0115] 1 optoelectronic semiconductor device

[0116] 2 optoelectronic semiconductor chip

[0117] 2' semiconductor layer sequence region of the semiconductor chip

[0118] 20 contact side

[0119] 21 coating region

[0120] 22 protection region

[0121] 23 step

[0122] 24 passivation layer

[0123] 25 light exit window

[0124] 26 semiconductor layer sequence

[0125] 27 active region

[0126] 29 contact frame

[0127] 30 coating material

[0128] 31 electrical contact structure

[0129] 32 other electrical contact structure

[0130] 33 additive

[0131] 38 contact extension

[0132] 39 metallization

[0133] 40 smooth region of the semiconductor surface

[0134] 41 rough part

[0135] 42 protective coating

[0136] 5 carrier

[0137] 51 electrical contact site

[0138] 52 Other electrical contact parts

[0139] 6 Optical body

[0140] 7 Optical output coupling structure

[0141] 8 Tabletop groove

[0142] L Side length.

Claims

1. A method for manufacturing an optoelectronic semiconductor device (1), comprising the following steps: A) providing at least one optoelectronic semiconductor chip (2) having at least one contact side (20), wherein the at least one optoelectronic semiconductor chip (2) is mounted on a carrier (5), and wherein the carrier has an electrical contact site (51) which, when viewed in a plan view of the contact side (20), is located beside the optoelectronic semiconductor chip (2); B) generating at least one coating region (21) and at least one protection region (22) on the contact side (20) or on at least one of the contact sides (20); C) applying at least one liquid coating material (30) to the at least one contact side (20), wherein the at least one coating material (30) wets the at least one coating region (21) and does not wet the at least one protection region (22); and D) curing the at least one coating material (30) into at least one contact structure (31) on the at least one coating region (21) such that, in normal use, electrical power is supplied to the semiconductor chip (2) through the at least one contact structure (31), wherein the optoelectronic semiconductor device (1) includes the carrier (5), and wherein the contact structure (31) is an electrical printed circuit extending from the optoelectronic semiconductor chip (2) to the electrical contact site (51) of the carrier (5).

2. The method according to claim 1, wherein the at least one coating region (21) and the at least one protection region (22) are each a component of the optoelectronic semiconductor device (1), and the coating material (30) is applied both to the at least one coating region (21) and to the at least one protection region (22) and is withdrawn from the at least one protection region (22) due to its wetting properties; wherein the at least one semiconductor chip (2) is formed by a light-emitting diode chip or a laser diode chip; and wherein, when viewed in a plan view of the at least one contact side (20), the at least one semiconductor chip (2) has an average side length of at most 0.1 mm.

3. The method according to any one of the preceding claims, wherein the at least one coating region (21) is formed by a smooth semiconductor surface area or by a metallization (39) of the semiconductor chip (2), and the at least one protection region (22) is formed by a rough semiconductor surface area or by a rough protective coating (42) of the semiconductor chip (2); wherein the roughness of the rough protection region (22) is between 5 nm and 100 nm, inclusive of the end values.

4. The method according to claim 1 or 2, wherein the at least one coating region (21) is formed by a semiconductor surface area or by a metallization (39) of the semiconductor chip (2), and the at least one protection region (22) is formed by at least one protective coating (42). wherein the protective coating (42) is smooth and comprises a perfluorinated plastic or an oxide, or consists of a perfluorinated plastic or an oxide.

5. The method according to claim 1 or 2, wherein the at least one coating region (21) and the at least one protective region (22) are still produced in the wafer composite, wherein in the wafer composite, a large number of semiconductor chips (2) are present at a certain distance from each other, as initially grown.

6. The method according to claim 1 or 2, Wherein, in step C), the at least one coating material (30) is applied simultaneously and masklessly onto at least 10 5 semiconductor chips (2).

7. The method according to claim 1 or 2, wherein in step C), the coating material (30) or at least one of the coating materials (30) is applied by spraying, printing, spin coating or drop coating.

8. The method according to claim 1 or 2, wherein in step C), the coating material (30) or at least one of the coating materials (30) is applied by immersion.

9. The method according to claim 1 or 2, wherein the finished contact structure (31) or at least one finished contact structure (31) is metallic and light-impermeable.

10. The method according to claim 9, wherein the coating material (30) or at least one of the coating materials (30) is solder.

11. The method according to claim 1 or 2, wherein other contact structures (32) are produced on the contact side (20) in addition to the contact structure (31), wherein the contact side (20) has different heights in the region of the contact structure (31) and in the region of the other contact structures (32), such that there is at least one step (23) between these regions.

12. The method according to claim 11, wherein the other contact structures (32) are produced from a liquid phase in a further step C) and a further step D).

13. The method according to claim 1 or 2, wherein the contact structure (31) or at least one of the contact structures (31) is an electrical contact surface for externally electrically contacting the optoelectronic semiconductor device (1) directly on the semiconductor layer sequence (26) of the semiconductor chip (2).

14. The method according to claim 1 or 2, wherein the contact structure (31) or at least one of the contact structures (31) forms an electrical conduction network such that the contact structure (31) electrically connects a plurality of the semiconductor chips (2) to the electrical contact site (51), wherein the coating material (30) is applied flatly in step C).

15. The method according to claim 1 or 2, wherein the contact structure (31) or at least one of the contact structures (31) forms a contact frame (29) such that a light exit window (25) surrounded by the contact structure (31) is formed in the center of the contact side (20).

16. The method according to claim 1 or 2, wherein the contact structure (31) or at least one of the contact structures (31) comprises at least one optically active additive (33), wherein the additive (33) is a luminescent substance, a diffuser, a dye, a filtering substance, a heat-conducting substance, a refractive-index adapter and / or a coefficient-of-thermal-expansion adapter.

17. The method according to claim 1 or 2, wherein the contact structure (31) or at least one of the contact structures (31) is light-transmissive and shaped as a lens.

18. An optoelectronic semiconductor device (1) manufactured by using the method according to any one of the preceding claims, having: - an optoelectronic semiconductor chip (2) with a contact side (20), - a coating region (21) and a protection region (22) on the contact side (20), and - a contact structure (31) on the coating region (21) such that the protection region (22) is free of the contact structure (31), wherein the contact structure (31) tapers towards the protection region (22) in a meniscus shape at the edge of the coating region (21).

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