Controlled adjustment transition

Abstract

Embodiments of the present application relate to controlled regulation transitions. An apparatus (102) includes an amplifier (306) having non-inverting and inverting inputs and an output. The apparatus includes a capacitor (312) coupled to a first node (311) and ground (309), a resistor (310) coupled to the first node and the amplifier output, and a first switch (320) coupled to the first node and a current sink (322) coupled to ground. The apparatus includes an AND gate (318) having inputs and an output coupled to a control terminal of the first switch. The apparatus includes a first comparator (314) having non-inverting and inverting inputs and an output coupled to an input of the AND gate, a second comparator (324) having a non-inverting input coupled to the amplifier output, an inverting input coupled to a transistor stack (328), and an output coupled to an input of the AND gate, and a second switch (327) coupled to the transistor stack and a current source (326), the second switch having a control terminal coupled to the output of the first comparator.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the field of energy storage, and in particular to controlled regulation transitions. BACKGROUND

[0002] Various mobile electronic devices, such as smartphones, laptops, and other mobile computing devices, are powered using batteries. Charging batteries is a difficult and potentially dangerous task, as overcharging can lead to excessive temperatures, fire, or explosion, while undercharging can harm long-term battery performance. In particular, large voltage and / or current spikes during battery charging are suboptimal for battery safety and performance. SUMMARY

[0003] According to at least one example of the present disclosure, an apparatus includes an operational transconductance amplifier having an inverting input configured to be coupled to a battery parameter feedback node having a voltage indicative of a parameter provided to a battery, a non-inverting input configured to be coupled to a battery parameter regulation voltage source, and an output. The apparatus also includes a capacitor coupled to a first node and a ground node, a resistor coupled to the first node and the output of the operational transconductance amplifier, and a first switch coupled to the first node and a current sink. The current sink is also coupled to the ground node. The apparatus includes an AND gate having a first input, a second input, and an output, the output of the AND gate coupled to a control terminal of the first switch. The apparatus also includes a first comparator having a non-inverting input configured to be coupled to the battery parameter feedback node, an inverting input configured to be coupled to a battery parameter threshold voltage source, and an output coupled to the first input of the AND gate. The apparatus includes a second comparator having a non-inverting input coupled to the output of the operational transconductance amplifier, an inverting input coupled to a transistor stack, the transistor stack also coupled to the ground node, and an output coupled to the second input of the AND gate. The apparatus further includes a second switch coupled to the transistor stack and a current source, the second switch having a control terminal coupled to the output of the first comparator.

[0004] According to another example of the disclosure, an apparatus includes a first operational transconductance amplifier having an inverting input configured to be coupled to a battery current feedback node having a voltage indicative of a current provided to a battery, a non-inverting input configured to be coupled to a battery current regulation voltage source, and an output. The apparatus also includes a second operational transconductance amplifier having an inverting input configured to be coupled to a battery voltage feedback node having a voltage indicative of a voltage provided to a battery, a non-inverting input configured to be coupled to a battery voltage regulation voltage source, and an output. The apparatus also includes a capacitor coupled to a first node and a ground node, a resistor coupled to the first node and the output of each of the operational transconductance amplifiers, and a first switch coupled to the first node and a current sink. The current sink is also coupled to the ground node. The apparatus also includes an AND gate having a first input, a second input, and an output, the output of the AND gate coupled to a control terminal of the first switch, an OR gate having a first input, a second input, and an output, the output of the OR gate coupled to the first input of the AND gate, and a first comparator having a non-inverting input configured to be coupled to the battery current feedback node, an inverting input configured to be coupled to a battery current threshold voltage source, and an output coupled to the first input of the OR gate. The apparatus also includes a second comparator having a non-inverting input configured to be coupled to the battery voltage feedback node, an inverting input configured to be coupled to a battery voltage threshold voltage source, and an output coupled to the second input of the OR gate. The apparatus also includes a third comparator having a non-inverting input coupled to the output of each of the operational transconductance amplifiers, an inverting input coupled to a transistor stack, where the transistor stack is also coupled to the ground node, and an output coupled to the second input of the AND gate. Finally, the apparatus includes a second switch coupled to the transistor stack and a current source, the second switch having a control terminal coupled to the output of the first comparator.

[0005] According to yet another example of the disclosure, an apparatus includes an operational transconductance amplifier configured to generate a current at an output, where the current is based on a voltage indicative of a parameter provided to a battery and a voltage provided by a battery parameter regulation voltage source. The apparatus also includes a capacitor coupled to the output of the operational transconductance amplifier and a ground node, a first switch coupled to the capacitor and a current sink, where the current sink is also coupled to the ground node, and an AND gate having a first input, a second input, and an output, the output of the AND gate coupled to a control terminal of the first switch. The apparatus also includes a first comparator configured to assert an output in response to the voltage indicative of the parameter being greater than a battery parameter threshold, where the output of the first comparator is coupled to the first input of the AND gate, a second comparator configured to assert an output in response to a voltage at the output of the operational transconductance amplifier being greater than a voltage of a stack of transistors, where the stack of transistors is also coupled to the ground node and the output of the second comparator is coupled to the second input of the AND gate, and a second switch coupled to the stack of transistors and a current source, the second switch having a control terminal coupled to the output of the first comparator. BRIEF DESCRIPTION OF DRAWINGS

[0006] For a detailed description of various examples, reference will now be made to the accompanying drawings in which:

[0007] Figure 1 A block diagram showing an example battery-powered electronic device including a battery and a regulation integrated circuit (IC) according to an example is shown;

[0008] Figures 2a to 2c Example waveforms showing a regulated parameter with respect to various regulation zones and an offset from the regulated parameter according to an example are shown;

[0009] Figure 3 Example schematic diagrams of a regulation IC according to various examples are shown;

[0010] Figure 4 Another example schematic diagram of a regulation IC according to various examples is shown; and

[0011] Figure 5 A set of waveforms showing the functionality of a regulation IC under various conditions according to various examples is shown. DETAILED DESCRIPTION

[0012] A battery charge regulation circuit operates to regulate the voltage and / or current supplied to a battery during charging or the voltage supplied to device system electronics (e.g., microprocessor). The battery charge regulation circuit operates to protect the battery from voltage and / or current transients or excursions from a particular range of values. In some examples, such voltage and / or current transients are introduced by a wall adapter or by a battery powered system to which the battery charge regulation circuit is coupled. Upon detection by the battery charge regulation circuit of a parameter (e.g., voltage and / or current) excursion outside of the range of values, it can be desirable to reduce the time to restore the parameter to within the range of values while also reducing overshoot or undershoot of the regulated parameter.

[0013] Examples of the present disclosure include a device including a regulation integrated circuit (IC) that more quickly restores a regulated parameter that experiences an excursion outside of a range of values to its regulation zone (e.g., to within the range of values) while also reducing undershoot or overshoot of the regulated parameter. In particular examples in which the regulated parameter is a battery voltage and / or battery current, the more rapid return of the regulated parameter to its regulation zone allows the battery charge regulation IC of the present disclosure to reduce the likelihood of triggering more stringent overvoltage, undervoltage, and / or overcurrent protection (e.g., turning off the power converter) used to protect the battery.

[0014] Figure 1 A block diagram depicting an example electronic device 100 (e.g., a mobile device (e.g., a smartphone)). The electronic device 100 includes a battery 104 and a regulation IC 102 coupled to the battery 104. The battery 104 is any suitable type of battery capable of providing power to the electronic device 100 to enable the electronic device 100 to perform its intended functions. In examples, the regulation IC 102 is a single chip housed inside a package. In examples, the regulation circuitry is distributed across multiple chips, with all such chips being housed inside a single package. Other variations of the precise configuration of the regulation IC 102 are contemplated and included within the scope of the present disclosure. The regulation IC 102 is coupled to a port 101 configured to be coupled to a power supply (not shown). For example, a user can connect the port 101 to a mains power source via an adapter. Figure 1 The example electronic device 100 is just one in which the regulation IC 102 can be implemented. Other applications, including various other devices that use rechargeable batteries, or devices for which a regulated parameter is useful, would also benefit from the regulation IC 102.

[0015] In operation, the regulation IC 102 receives power via the port 101 and uses the power to charge the battery 104. In particular, the regulation IC 102 implements the techniques mentioned above and described in greater detail below to quickly transition the regulated parameter back to its regulation zone while reducing undershoot or overshoot of the regulated parameter when charging the battery 104. In Figure 1 Examples, the more rapid return of the battery 104 voltage or battery 104 current to its regulation zone implemented by the regulation IC 102 reduces the likelihood of triggering more stringent overvoltage, undervoltage, and / or overcurrent protection (e.g., turning off the power supply circuitry of the regulation IC 102 to isolate the battery 104 from the port 101) to protect the battery 104.

[0016] Figure 2a , 2b And 2c respectively show waveform sets 200, 250, 270 that exhibit the behavior of a regulated parameter as a function of time with respect to a regulation value (e.g., a voltage value) and an offset threshold (e.g., a voltage value). Referring first to Figure 2a The waveform set 200 includes a waveform representing values of a regulated parameter 202 as a function of time. In some examples, the parameter 202 is one of a battery 104 voltage (VBAT) or a battery 104 current (IBAT). In one example where the parameter 202 is a battery 104 current, the parameter 202 is still a voltage value, e.g., a voltage across a current sense resistor, as will be further explained below. In Figure 2a In the example of 2a, the parameter 202 is at a value below the regulation value 204 (IBAT_REG or VBAT_REG), and thus the parameter 202 is not regulated (e.g., the regulation IC 102 is not employed to further regulate the parameter 202).

[0017] Referring now to Figure 2b First and second offset thresholds 206, 208 are shown. The first offset threshold 206 is also labeled IBAT OCP ALM or VBAT OVP ALM, which will be further explained below. The second offset threshold 208 is also labeled IBAT OCP or VBAT OVP, which will be further explained below. For consistency, these offset thresholds 206, 208 are also shown in Figure 2a , although they are in Figure 2anot involved, as the parameter 202 remains below the regulation value 204. With reference to the specific example in which the parameter 252 is one of the battery 104 voltage or the battery 104 current, the offset thresholds 206, 208 represent values of the voltage or voltage that the battery 104 should not exceed for more than a threshold amount of time. In one example, the battery 104 voltage or current is allowed to exceed a first offset threshold 206 (IBAT OCP ALM or VBAT OVP ALM) for a first amount of time, while the battery 104 voltage or current is allowed to exceed a second offset threshold 208 (IBAT OCP or VBAT OVP) for a second amount of time that is less than the first amount of time. In another example, the battery 104 voltage or current is allowed to exceed a first offset threshold 206 (IBAT OCP ALM or VBAT OVP ALM) for a first amount of time, while the battery 104 voltage or current is not allowed to exceed a second offset threshold 208 (IBAT OCP or VBAT OVP) for any amount of time. In this example, the battery 104 voltage or current exceeding the second offset threshold 208 triggers a fault that engages more stringent protection circuitry, such as shutting down power supply circuitry of the regulation IC 102 to isolate the battery 104 from the port 101 to further protect the battery 104. In one example, the first offset threshold 206 is an alarm threshold that, when exceeded, causes an interrupt to be generated, the effect of which is to reduce the battery 104 current and / or voltage to avoid reaching the second offset threshold 208. However, the process of reducing the current and / or voltage supplied to the battery 104 is relatively slow, requiring detection of the offset, generation of the interrupt, and waiting for the interrupt to be fixed. Continuing this example, the second offset threshold 208 is an overvoltage or overcurrent threshold that, when exceeded, stops charging of the battery 104. When the second offset threshold 208 is exceeded, charging is stopped and a start-up sequence is performed in order to resume charging of the battery 104.

[0018] Still referring to Figure 2bvalue 204. The overshoot of parameter 252 beyond regulation value 204 is shown as AV1 or AI1, respectively, depending on whether parameter 252 represents battery 104 voltage or current. As explained above, when parameter 252 exceeds first offset threshold 206, an interrupt is generated that causes the current or voltage supplied to battery 104 to be reduced. However, due to the delay in processing the interrupt, in this example, parameter 252 continues to rise beyond first offset threshold 206. The undershoot of parameter 252 below regulation value 204 is shown as AV2 or AI2, respectively, depending on whether parameter 252 represents battery 104 voltage or current. At time 256, as the interrupt is repaired and / or regulation IC 102 operates to keep parameter 252 at regulation value 204, parameter 252 stabilizes. The time period from the time parameter 252 exceeds regulation value 204 (at time 254) to the time the interrupt is repaired and / or regulation IC 102 regulates parameter 252 to regulation value 204 (at time 256) is shown as At.

[0019] As explained above, it is advantageous to reduce both the time elapsed before regulation of battery 104 voltage and / or current takes over (At) and the overshoot and undershoot of parameter 252 (AV1 / AV2 or AI1 / AI2). According to examples of the present disclosure, regulation IC 102 reduces both At and AV1 / AV2 or AI1 / AI2, which results in a reduced likelihood of triggering more stringent undercurrent, overcurrent, undervoltage, or overvoltage protection, and a reduced likelihood of shutting down the power converter in order to protect battery 104. Figure 2c A set of waveforms 270 is shown, which are magnified around regulation value 204. In Figure 2c , regulated value or parameter 272 is one of battery 104 voltage or battery 104 current as explained above. In Figure 2c , an upper offset value 274 is shown relative to regulation value 204. In one example, upper offset value 274 is one percent greater than regulation value 204, as shown in Figure 2c , upper offset value 274 is x% greater than regulation value 204. When parameter 272 exceeds upper offset value 274, regulation IC 102 begins operating to regulate parameter 272 to regulation value 204. Unlike examples of Figure 2b , in which an interrupt-based regulation process is employed that is relatively slow to regulate parameter 252, regulation IC 102 regulates parameter 272 more quickly, which is described in further detail below. These and other benefits are explained more fully below with respect to an example schematic of regulation IC 102.

[0020] Figure 3A circuit schematic diagram of a system 300 including a battery 104 and a regulation IC 102 according to an example of the disclosure is shown. The battery 104 is coupled to a current sense resistor 302. A power field effect transistor (FET) 334 controls the current flowing from a power converter (not shown for simplicity) to the battery 104 and through the current sense resistor 302. In Figure 3 In an example, the regulated parameter is the current provided to the battery 104. Accordingly, a battery current sense circuit 304 is coupled to the current sense resistor 302 and senses the voltage across the current sense resistor 302. The battery current sense circuit 304 generates a battery parameter (e.g., current) feedback voltage (VFB IBAT, which also refers to the node at that voltage) based on the voltage across the current sense resistor 302 (e.g., proportional to the voltage across the current sense resistor 302).

[0021] In another example, the regulated parameter is the voltage provided to the battery 104, and accordingly the battery current sense circuit 304 is replaced by a battery voltage sense circuit. Although not shown for simplicity in Figure 3 The battery voltage sense circuit would be coupled to the terminals of the battery 104 (e.g., BATP and BATN) and accordingly sense the voltage across the battery 104. The battery voltage sense circuit generates a battery voltage feedback voltage (VFB VBAT, which also refers to the node at that voltage) based on the voltage across the battery 104 (e.g., proportional to the voltage across the battery 104). The remainder of Figure 3 functions in a similar manner to regulate the battery 104 voltage, as explained further below.

[0022] Referring again to the example where the adjusted parameter is the current supplied to battery 104, the regulating IC 102 includes an operational transconductance amplifier 306 with two inputs: an inverting input configured to couple to a battery parameter (e.g., current) feedback node (VFB_IBAT); and a non-inverting input configured to couple to a battery parameter (e.g., battery current) regulating voltage source 308, which in turn couples to a ground node 309. The battery current regulating voltage source 308 provides a voltage VREF_IBATREG, the value of which is related to the value of the current supplied to battery 104 when the regulating IC 102 operates to adjust parameter 252, as described above. For example, if parameter 272 is the current of battery 104, the adjustment value 204 is 1 ampere (A), and the current sensing resistor 302 has a resistance of 0.01 Ω, then the input voltage of the battery current sensing circuit 304 is 0.01 volt (V). In this example, the battery current sensing circuit 304 is configured to generate an output eight times its input voltage, and thus generates an output voltage of 0.08V. Therefore, VREF_IBATREG will also be set to 0.08V, which corresponds to the adjustment value 204 for the 1A battery current 104.

[0023] Operational transconductance amplifier 306 is configured to generate an output current proportional to the difference between its input voltage and the output current. The output of operational transconductance amplifier 306 is coupled to resistor (Rint) 310, which is coupled to a first node 311. Capacitor (Cint) 312 is coupled to the first node 311 and to ground node 309. The output of operational transconductance amplifier 306 is also the output of regulating IC 102 and is labeled VOUT.

[0024] The regulating IC 102 also includes a first comparator (COMP) 314 comprising two inputs: a non-inverting input configured to couple to a battery current feedback node (VFB_IBAT); and an inverting input configured to couple to a battery parameter (e.g., current) threshold voltage source 316, which in turn couples to a ground node 309. The battery current threshold voltage source 316 provides a voltage VREF_PD, the value of which is related to VREF_IBATREG as described above. In one example, VREF_PD is a percentage larger than VREF_IBATREG and therefore offset by a value 274 with respect to the regulating value 204. The output of the first comparator 314 is coupled to a first input of an AND gate 318 and to a control terminal of a second switch 327, as will be explained further below.

[0025] The regulating IC 102 also includes a second comparator 324 with two inputs: a non-inverting input coupled to the output of an operational transconductance amplifier 306 (VOUT); and an inverting input coupled to a transistor stack 328, which in turn is coupled to a ground node 309. The output (Cap_vs_Th_Cmp) of the second comparator 324 is coupled to a second input of an AND gate 318. The output of the AND gate 318 is coupled to a control terminal (e.g., a transistor) of a first switch 320, which selectively couples a first node 311 to a current sink (BOOST_PD) 322. The current sink 322 is also coupled to the ground node 309.

[0026] As explained above, the output of the first comparator 314 is coupled to the control terminal of the second switch 327. The second switch 327 is coupled to the transistor stack 328 and the current source 326. The current source 326 is also coupled to the supply node 325. The transistor stack 328 includes a plurality of transistors 328a to 328n, each of which is a replica of the same type as the power FET 334. In one example, transistors 328a to 328n include n-type metal-oxide-semiconductor field-effect transistors (MOSFETs). Transistors 328a to 328n will be described in more detail below.

[0027] In some instances, the output of the operational transconductance amplifier 306 is the output (VOUT) of the regulating IC 102, which is configured to couple to the input of a power FET control circuit 330 that drives the control terminal (e.g., the gate) of the power FET 334. The power FET control circuit 330 is thus configured to control the voltage to the gate of the power FET 334 to cause the power FET 334 to increase or decrease the amount of current supplied to the battery 104 by modulating the resistivity of the device. In response to an increase in the value of VOUT, the power FET control circuit 330 increases the voltage supplied to the gate of the power FET 334. Similarly, in response to a decrease in the value of VOUT, the power FET control circuit 330 decreases the voltage supplied to the gate of the power FET 334.

[0028] During the operation of regulating IC 102, when the current supplied to battery 104 is lower than the regulation value 204, the voltage across current sensing resistor 302 causes battery current sensing circuit 304 to generate a voltage VFB_IBAT that is less than the voltage VREF_IBATREG provided by battery current regulating voltage source 308. Therefore, operational transconductance amplifier 306 supplies current (e.g., proportional to the difference between VREF_IBATREG and VFB_IBAT) to resistor 310, and thus voltage VOUT remains relatively constant at its maximum possible value. Consequently, power FET control circuit 330 supplies the maximum gate voltage to power FET 334, which corresponds to power FET 334 supplying current to battery 104, where parameter (e.g., current) 202 is at an unregulated value (less than the regulation value 204). Additionally, since VFB_IBAT is less than the battery current threshold voltage source 316 voltage VREF_PD, the output of first comparator 314 is not asserted. Therefore, the output of AND gate 318 is not asserted, and first switch 320 is open. If the current supplied to battery 104 is lower than the regulation value 204, then the operational transconductance amplifier 306 supplies current to resistor 310, which induces a proportional voltage across resistor 310, thus increasing the voltage VOUT. In response to the increase in VOUT, the power FET control circuit 330 increases the gate voltage of power FET 334 (e.g., to fully turn on power FET 334).

[0029] However, when the current supplied to battery 104 increases above the regulation value 204, the voltage across the current sensing resistor 302 causes the battery current sensing circuit 304 to generate a voltage VFB_IBAT greater than the voltage VREF_IBATREG supplied by the battery current regulating voltage source 308. Therefore, the operational transconductance amplifier 306 absorbs a current proportional to the difference between VFB_IBAT and VREF_IBATREG, which causes capacitor 312 to discharge, thereby reducing voltage VOUT. This causes the power FET control circuit 330 to reduce the gate voltage supplied to power FET 334 in an attempt to limit the current supplied to battery 104. However, capacitor 312 discharges relatively slowly, which prevents the power FET control circuit 330 from quickly regulating the gate of power FET 334 to limit the current supplied to battery 104. At this time, VFB_IBAT is still less than the battery current threshold voltage source 316 voltage VREF_PD, and therefore the output of the first comparator 314 is not asserted. Therefore, the output of AND gate 318 is not asserted, and the first switch 320 is open.

[0030] When the current supplied to battery 104 increases above the upper offset value 274, the voltage across the current sensing resistor 302 causes the battery current sensing circuit 304 to generate a voltage VFB_IBAT greater than the voltage VREF_PD provided by the battery current threshold voltage source 316. Therefore, the output of the first comparator 314 is asserted. Additionally, because the voltage VOUT is higher than the voltage at the drain of transistor 328a, the output of the second comparator 324 is asserted. Therefore, the output of the AND gate 318 is also asserted, which closes the first switch 320. When the first switch 320 is closed, a discharge path exists between the ground node 309 and the capacitor 312. Furthermore, the current absorber 322 accelerates and boosts the discharge of capacitor 312, which causes the power FET control circuit 330 to reduce the gate voltage of the power FET 334 more quickly, and thus reduces the current supplied to battery 104.

[0031] When the output of the first comparator 314 is asserted, the second switch 327 also closes, and thus the current source 326 supplies current to the transistor stack 328. The transistors 328a to n in the transistor stack 328 are connected in series, with the gates of transistors 328a to n coupled to the drain of transistor 328a. The value of the current supplied by the current source 326 is chosen such that when the current corresponding to the adjustment value 204 is supplied to the battery 104, the current density through transistors 328a to n is approximately equal to the current density through the power FET 334. Therefore, when the current source 326 supplies current to the transistor stack 328, a voltage corresponding to the input voltage is generated across the transistor stack 328, which causes the power FET control circuit 330 to operate the power FET 334 to supply the current corresponding to the adjustment value 204 to the battery 104. Furthermore, since transistors 328a to n are copies of power FET 334, the voltage generated across the transistor stack 328 will vary accordingly as the power FET 334 supplies a voltage to the battery 104 with a current corresponding to the regulation value 204 when the gate of the power FET 334 is reached (e.g., with process and temperature variations). Therefore, the impact of process and temperature variations on the control of the power FET 334 is reduced.

[0032] As capacitor 312 discharges through first switch 320 and current sink 322, the output of second comparator 324 remains asserted until voltage VOUT drops below the voltage across transistor stack 328. When VOUT drops below the voltage across transistor stack 328, the output of second comparator 324 is deasserted, the voltage corresponding to the voltage that causes power FET 334 to supply current to battery 104 corresponding to regulation value 204 when supplied to power FET control circuit 330. When the output of second comparator 324 is deasserted, the output of AND gate 318 is deasserted, and therefore first switch 320 opens, which stops pull-down discharge of capacitor 312 (e.g., boost pull-down).

[0033] The pull-down discharge of capacitor 312 reduces the amount of time that the regulating power FET 334 reduces the current supplied to battery 104 to the regulation value 204. Furthermore, by stopping the pull-down discharge of capacitor 312 as described above, the undershoot of the regulation value 204 below the current supplied to battery 104 is reduced.

[0034] As explained above, Figure 3 The regulating IC 102 shown uses a pull-up / boost mechanism (e.g., a first switch 320 and a current sink 322) to regulate the power FET 334 based on either the voltage supplied to the battery 104 or the current supplied to the battery 104. For example, in the case where the regulation is based on the current supplied to the battery 104, the battery current sensing circuit 304 generates a battery current feedback voltage based on the voltage across the current sensing resistor 302 (e.g., proportional to the voltage across the current sensing resistor 302). In another example, in the case where the regulation is based on the voltage supplied to the battery 104, the battery voltage sensing circuit (for simplicity, in...) Figure 3 (Not shown) Generates a battery voltage feedback voltage based on the voltage across battery 104 (e.g., proportional to the voltage across battery 104). However, in another example, regulating IC 102 regulates power FET 334 based on both the voltage and current supplied to battery 104.

[0035] Figure 4An example system 400 is shown that implements regulation of a power FET 434 based on both the voltage and current supplied to the battery 104. For example, a first portion of the regulation IC 102 senses the voltage and current supplied to the battery 104. Specifically, the first portion includes a battery current sensing circuit 404 (e.g., similar to the battery current sensing circuit 304 described above) coupled to a current sensing resistor 402. Additionally, the first portion includes a battery voltage sensing circuit 405 coupled to terminals (e.g., BATP and BATN) of the battery 104. Both battery current and voltage sensing circuits 404 and 405 function similarly because they generate feedback voltages (VFB_IBAT and VFB_VBAT, respectively) based on the voltage across the current sensing resistor 402 and the battery 104 (e.g., proportional to the voltage across the current sensing resistor 402 and the battery 104).

[0036] The first part further includes a first operational transconductance amplifier 406 comprising two inputs: an inverting input configured to couple to a battery current feedback node (VFB_IBAT); and a non-inverting input configured to couple to a battery current regulating voltage source 408 (which provides a voltage VREF_IBATREG), which in turn is coupled to a ground node 401. Part 400 also includes a second operational transconductance amplifier 407 comprising two inputs: an inverting input configured to couple to a battery voltage feedback node (VFB_VBAT); and a non-inverting input configured to couple to a battery voltage regulating voltage source 409 (which provides a voltage VREF_VBATREG), which in turn is coupled to a ground node 401.

[0037] Battery current regulating voltage source 408 provides a voltage VREF_IBATREG, the value of which is related to the value of the current when regulating IC 102 operates to regulate the current supplied to battery 104, as described above. Similarly, battery voltage regulating voltage source 409 provides a voltage VREF_VBATREG, the value of which is related to the value of the voltage when regulating IC 102 operates to regulate the voltage supplied to battery 104, as described above.

[0038] Operational transconductance amplifiers 406 and 407 are each configured to generate an output current proportional to the difference between their input voltages. Figure 4In this example, the outputs of operational transconductance amplifiers 406 and 407 are coupled, which sums the currents generated (or absorbed) by operational transconductance amplifiers 406 and 407. The common output is labeled VOUT and is coupled to resistor 410, which is coupled to first node 411. Capacitor 412 is coupled to first node 411 and ground node 401. Output VOUT is also the output of regulating IC 102, as explained above.

[0039] The second part of regulating IC 102 is configured to compare the battery current feedback voltage (VFB_IBAT) and the battery voltage feedback voltage (VFB_VBAT) with an upper offset threshold to control the pull-down discharge (e.g., boost pull-down) of capacitor 412, as explained above. Therefore, the second part includes a first comparator 414 comprising two inputs: a non-inverting input configured to couple to the battery current feedback node (VFB_IBAT); and an inverting input configured to couple to a battery current threshold voltage source 416, which in turn is coupled to a ground node 401. The second part also includes a second comparator 415 comprising two inputs: a non-inverting input configured to couple to the battery voltage feedback node (VFB_VBAT); and an inverting input configured to couple to a battery voltage threshold voltage source 417, which in turn is coupled to a ground node 401.

[0040] Battery current threshold voltage source 416 provides a voltage whose value is related to VREF_IBATREG (e.g., greater than X%), as described above. Therefore, battery current threshold voltage source 416 defines an offset value 274 with respect to the adjustment value 204 of the current parameter. The output of the first comparator 414 is coupled to the first input of the OR gate 419. Battery voltage threshold voltage source 417 provides a voltage whose value is related to VREF_VBATREG (e.g., greater than Y%), as described above. Therefore, battery voltage threshold voltage source 417 defines an offset value 274 with respect to the adjustment value 204 of the voltage parameter. The output of the second comparator 415 is coupled to the second input of the OR gate 419.

[0041] The first and second parts generate nodes VOUT and Error_Over, respectively, which are coupled to the rest of system 400. This is in contrast to the above. Figure 3 The content described is similar. Specifically, the remainder of system 400 includes elements consistent with those described above. Figure 3 The components described above are numbered in a similar manner and function as described above. Figure 3Similar to the components described herein. For example, the first switch 420 and current sink 422 are similarly coupled to the first node 411, while VOUT is coupled to the power FET control circuit 430, which is similar to... Figure 3 The power FET control circuit 330 is similar to that in the example.

[0042] During operation of system 400, when the current and voltage supplied to battery 104 are lower than their respective regulation values, battery current sensing circuit 404 generates a voltage VFB_IBAT that is less than the voltage VREF_IBATREG provided by battery current regulating voltage source 408. Similarly, battery voltage sensing circuit 405 generates a voltage VFB_VBAT that is less than the voltage VREF_VBATREG provided by battery voltage regulating voltage source 409. Therefore, first operational transconductance amplifier 406 supplies current (e.g., proportional to the difference between VREF_IBATREG and VFB_IBAT) to resistor 410, while second operational transconductance amplifier 407 supplies current (e.g., proportional to the difference between VREF_VBATREG and VFB_VBAT) to resistor 410, and thus voltage VOUT remains relatively constant at its maximum possible value.

[0043] Therefore, the power FET control circuit 430 provides the maximum gate voltage to the power FET 434, which corresponds to the power FET 434 providing unregulated current and voltage to the battery 104. Additionally, because VFB_IBAT is less than the battery current threshold voltage source 416 and VFB_VBAT is less than the battery voltage threshold voltage source 417, the outputs of comparators 414 and 415 are not asserted, and therefore the output of OR gate 419 is not asserted. Consequently, the output of AND gate 418 (the output of OR gate 419 is the input of AND gate 418) is not asserted, and the first switch 420 is open.

[0044] However, when the current supplied to battery 104 increases above its regulation value, the voltage across current sensing resistor 402 causes battery current sensing circuit 404 to generate a voltage VFB_IBAT greater than the voltage VREF_IBATREG provided by battery current regulating voltage source 408. Similarly, when the voltage supplied to battery 104 increases above its regulation value, the voltage across battery 104 causes battery voltage sensing circuit 405 to generate a voltage VFB_VBAT greater than the voltage VREF_VBATREG provided by battery voltage regulating voltage source 409. Therefore, the first operational transconductance amplifier 406 and / or the second operational transconductance amplifier 407 respectively absorb currents proportional to the difference between VFB_IBAT and VREF_IBATREG or the difference between VFB_VBAT and VREF_VBATREG, which causes capacitor 412 to discharge, thereby reducing voltage VOUT. This causes power FET control circuit 430 to reduce the gate voltage supplied to power FET 434 in an attempt to limit the current and / or voltage supplied to battery 104. However, capacitor 412 discharges relatively slowly, which prevents power FET control circuit 430 from quickly regulating the gate of power FET 434 to limit the current supplied to battery 104. At this time, VFB_IBAT is still less than the battery current threshold voltage source 416, and VFB_VBAT is still less than the battery voltage threshold voltage source 417, and therefore the output of OR gate 419 is not asserted. Consequently, the output of AND gate 418 is also not asserted, and the first switch 420 is open.

[0045] When the current supplied to battery 104 increases above its offset value 274, the voltage across current sensing resistor 402 causes battery current sensing circuit 404 to generate a voltage VFB_IBAT greater than the voltage provided by battery current threshold voltage source 416. Therefore, the output of first comparator 414 is asserted. Alternatively, when the voltage supplied to battery 104 increases above its offset value 274, battery voltage sensing circuit 405 generates a voltage VFB_VBAT greater than the voltage provided by battery voltage threshold voltage source 417. Therefore, the output of second comparator 415 is asserted. In response to the assertion of the outputs of first comparator 414 and / or second comparator 415, the output of OR gate 419 is also asserted.

[0046] Additionally, the output of the second comparator 424 has been asserted, as explained above. Therefore, in response to the assertion of the output of the OR gate 419, the output of the AND gate 418 is asserted, which closes the first switch 420. When the first switch 420 is closed, a discharge path exists between the ground node 401 and the capacitor 412. Furthermore, the current sink 422 accelerates and boosts the discharge of the capacitor 412, causing the power FET control circuit 430 to decrease the gate voltage of the power FET 434 more rapidly, and thus increasing the current and / or voltage supplied to the battery 104.

[0047] As explained in this example, Figure 4 Output replacement of OR gate 419 Figure 3 The output of the first comparator 314 is shown in the diagram. Therefore, when the output of OR gate 419 is asserted, the second switch 427 also closes, and thus the current source 426 supplies current to the transistor stack 428. As explained above, when the current source 426 supplies current to the transistor stack 428, a voltage corresponding to the input voltage is generated across the transistor stack 428, which causes the power FET control circuit 430 to operate the power FET 434 to supply current and / or voltage corresponding to the regulated value to the battery 104.

[0048] As capacitor 412 discharges through first switch 420 and current sink 422, the output of second comparator 424 remains asserted until the voltage at VOUT drops below the voltage across transistor stack 428. When VOUT is less than the voltage across transistor stack 428, the output of second comparator 424 is deasserted, the voltage corresponding to the voltage that, when supplied to power FET control circuit 430, causes power FET 434 to supply current and / or voltage corresponding to the adjusted values ​​of those parameters to battery 104. When the output of second comparator 424 is deasserted, the output of AND gate 418 is deasserted, and therefore first switch 420 opens, which stops the pull-down discharge (e.g., boost pull-down) of capacitor 412.

[0049] As described above, the pull-down discharge of capacitor 412 reduces the amount of time that the current and / or voltage supplied to battery 104 by the regulating power FET 434 decreases to its regulated value. Furthermore, as described above, by stopping the pull-down discharge of capacitor 412, undershoot below the regulated value of the current and / or voltage supplied to battery 104 is reduced.

[0050] Figure 5 The display corresponds to Figure 3The waveforms 500 shown here represent the voltages at various nodes of the regulating IC 102. The first waveform 502 shows the time-varying output of the battery current sensing circuit 304, which is the battery parameter feedback voltage, labeled VFB. In the first waveform 502, VFB is shown relative to voltage levels VREF_IBATREG (e.g., provided by the battery current regulating voltage source 308) and VREF_PD (e.g., provided by the threshold voltage source 316). The second waveform 504 shows the time-varying voltage at the output of the first comparator 314, labeled Error_Over. The third waveform 506 shows the time-varying voltage at the output of the operational transconductance amplifier 306, labeled VOUT. Finally, the fourth waveform 508 shows the time-varying voltage at the output of the second comparator 324, labeled Cap_vs_Th_Cmp.

[0051] Initially, for example at time 0, the battery parameter feedback voltage VFB is less than the regulation voltage VREF_IBATREG, and therefore the regulation IC 102 does not operate to regulate the current supplied to the battery 104. Therefore, VFB is also less than the threshold voltage VREF_PD, and therefore the output Error_Over of the first comparator 314 is de-asserted. VOUT is relatively constant at its maximum possible value. Therefore, the power FET control circuit 330 provides the maximum gate voltage to the power FET 334. Since VOUT is high when the second switch 327 is open, Cap_vs_Th_Cmp is asserted, which causes the top of the transistor stack 328 to be pulled down to ground node 309.

[0052] Before time 510, the battery parameter feedback voltage VFB (e.g., indicating the current flowing into battery 104) begins to rise (e.g., due to a battery charging adapter malfunction or the device incorrectly requesting too much current). Subsequently, at time 510, the battery parameter feedback voltage VFB exceeds the threshold voltage VREF_PD. VFB exceeding VREF_PD causes the output of the first comparator 314 to be asserted, which is shown in the second waveform 504, where Error_Over transitions from low to high voltage. As explained above, when Error_Over is asserted, the first switch 320 closes and the current sink 322 accelerates and boosts the discharge of capacitor 312 (and therefore VOUT), which causes the power FET control circuit 330 to more quickly reduce the gate voltage of power FET 334, and thus reduce the current supplied to battery 104. The third waveform 506 shows the boost pull-down of VOUT after time 510. When Error_Over is asserted, the second switch 327 also closes and generates a voltage across transistor stack 328, as explained above. The voltage across transistor stack 328 is shown as a dashed line in the third waveform 506. While VOUT is greater than the dashed line, the output of the second comparator 324 remains asserted, as shown in the fourth waveform 508. However, when VOUT reaches the voltage across transistor stack 328 at time 515, the output of the second comparator 324 is deasserted, causing the first switch 320 to open, thus stopping the boost-pull-down.

[0053] At time 515, although the battery parameter feedback voltage VFB decreases, VFB remains greater than the threshold voltage VREF_PD, and therefore Error_Over remains asserted. However, at time 520, VFB drops below the threshold voltage VREF_PD, and therefore the output Error_Over of the first comparator 314 is deasserted. At time 525, the voltage across transistor stack 328 discharges to less than VOUT, causing the output of the second comparator 324 to be asserted, which is reflected in the fourth waveform 508. Between times 525 and 530, the battery parameter feedback voltage VFB is maintained at the regulated voltage VREF_IBATREG by maintaining VOUT as explained above (e.g., using operational transconductance amplifier 306 feedback). Finally, at time 530, the battery parameter feedback voltage VFB drops below the regulated voltage VREF_IBATREG (e.g., due to a gradual decrease in battery charge distribution or transient stabilization of the system), and therefore VOUT begins to rise as the operational transconductance amplifier 306 charges capacitor 312.

[0054] In the foregoing discussion, the terms “comprising” and “including” are used in an open-ended manner and should therefore be interpreted as meaning “including but not limited to…”. The term “coupled” is used throughout the specification. This term may cover connection, communication, or signaling paths that achieve a functional relationship consistent with the description of this disclosure. For example, if device A generates a signal to control device B to perform an action, then in a first instance, device A is coupled to device B, or in a second instance, device A is coupled to device B via an intermediate component C, provided that the intermediate component C does not substantially alter the functional relationship between device A and device B such that device A controls device B via control signals generated by device A. A device “configured to” perform a task or function may be configured (e.g., programmed and / or hardwired) at the time of manufacture to perform said function and / or may be configured (or reconfigured) by a user after manufacture to perform said function and / or other additional or alternative functions. This configuration may be achieved through firmware and / or software programming of the device, through the construction and / or layout of the device’s hardware components and interconnects, or a combination thereof. Furthermore, circuits or devices believed to contain certain components may alternatively be configured to couple to those components to form the described circuit system or device. For example, a structure described as containing one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage and / or current sources) may alternatively contain only semiconductor elements within a single physical device (e.g., a semiconductor die and / or integrated circuit (IC) package) and may be configured to couple to at least some passive elements and / or sources to form the described structure at the time of manufacture or after the time of manufacture, for example, by an end user and / or a third party.

Claims

1. An electronic device comprising: Operational transconductance amplifier, comprising: An inverting input, configured to couple to a battery parameter feedback node having a voltage indicating the parameters supplied to the battery; A non-inverting input configured to couple to a battery parameter regulating voltage source; and Output; A capacitor, which is coupled to the first node and the ground node; A resistor coupled to the first node and the output of the operational transconductance amplifier; A first switch is coupled to the first node and a current absorber, wherein the current absorber is also coupled to the ground node; An AND gate, comprising a first input, a second input, and an output, wherein the output of the AND gate is coupled to the control terminal of the first switch; The first comparator includes: A non-inverting input, configured to be coupled to the battery parameter feedback node; Inverting input, configured to couple to a battery parameter threshold voltage source; and The output is coupled to the first input of the AND gate; The second comparator includes: A non-inverting input, which is coupled to the output of the operational transconductance amplifier; An inverting input, coupled to a transistor stack, which is also coupled to the ground node; and The output, which is coupled to the second input of the AND gate; and A second switch is coupled to the transistor stack and a current source, and the second switch includes a control terminal coupled to the output of the first comparator.

2. The electronic device of claim 1, wherein the first switch is configured to: In response to the assertion that the output of the AND gate is closed; and The output of the AND gate is disconnected in response to the cancel assertion.

3. The electronic device of claim 1, wherein the second switch is configured to: The output of the first comparator is asserted and closed; and The output of the first comparator is canceled and disconnected.

4. The electronic device of claim 1, wherein the transistor stack comprises an n-type metal-oxide-semiconductor field-effect transistor (MOSFET).

5. The electronic device of claim 4, wherein the n-type MOSFET comprises a copy transistor of the power transistor coupled to the battery.

6. The electronic device of claim 1, wherein the voltage received at the inverting input of the first comparator is greater than the voltage received at the non-inverting input of the operational transconductance amplifier.

7. The electronic device of claim 1, wherein the parameters provided to the battery include the current provided to the battery.

8. The electronic device of claim 1, wherein the parameters provided to the battery include the voltage provided to the battery.

9. An electronic device comprising: The first operational transconductance amplifier includes: An inverting input, configured to couple to a battery current feedback node having a voltage indicating the current supplied to the battery; A non-inverting input configured to couple to a battery current-regulated voltage source; and Output; The second operational transconductance amplifier includes: An inverting input, configured to couple to a battery voltage feedback node having a voltage indicating the voltage supplied to the battery; A non-inverting input configured to couple to a battery voltage regulation voltage source; and Output; A capacitor, which is coupled to the first node and the ground node; A resistor, which is coupled to the output of the first node and each of the operational transconductance amplifiers; A first switch is coupled to the first node and a current absorber, wherein the current absorber is also coupled to the ground node; An AND gate, comprising a first input, a second input, and an output, wherein the output of the AND gate is coupled to the control terminal of the first switch; An OR gate includes a first input, a second input, and an output, wherein the output of the OR gate is coupled to the first input of the AND gate; The first comparator includes: A non-inverting input, configured to be coupled to the battery current feedback node; Inverting input, configured to couple to a battery current threshold voltage source; and The output is coupled to the first input of the OR gate; The second comparator includes: A non-inverting input, configured to be coupled to the battery voltage feedback node; Inverting input, configured to couple to a battery voltage threshold voltage source; and The output is coupled to the second input of the OR gate; The third comparator includes: A non-inverting input, which is coupled to the output of each of the operational transconductance amplifiers; An inverting input, coupled to a transistor stack, which is also coupled to the ground node; and The output, which is coupled to the second input of the AND gate; and A second switch is coupled to the transistor stack and a current source, and the second switch includes a control terminal coupled to the output of the first comparator.

10. The electronic device of claim 9, wherein the first switch is configured to: In response to the assertion that the output of the AND gate is closed; and The output of the AND gate is disconnected in response to the cancel assertion.

11. The electronic device of claim 9, wherein the second switch is configured to: The OR gate is closed in response to the assertion that its output is closed; and The OR gate is disconnected in response to the output being canceled by the assertion.

12. The electronic device of claim 9, wherein the transistor stack comprises an n-type metal-oxide-semiconductor field-effect transistor (MOSFET).

13. The electronic device of claim 12, wherein the n-type MOSFET comprises a copy transistor of the power transistor coupled to the battery.

14. The electronic device of claim 9, wherein the voltage supplied by the battery current threshold voltage source is greater than the voltage supplied by the battery current regulating voltage source.

15. The electronic device of claim 9, wherein the voltage supplied by the battery voltage threshold voltage source is greater than the voltage supplied by the battery voltage regulation voltage source.

16. An electronic device comprising: An operational transconductance amplifier configured to generate current at its output, wherein the current is based on a voltage indicating parameters supplied to the battery and a voltage supplied by a battery parameter-regulated voltage source; A capacitor, which is coupled to the output and ground node of the operational transconductance amplifier; A first switch is coupled to the capacitor and the current absorber, wherein the current absorber is also coupled to the grounding node; An AND gate, comprising a first input, a second input, and an output, wherein the output of the AND gate is coupled to the control terminal of the first switch; A first comparator is configured to assert an output in response to the voltage indicating the parameter being greater than a battery parameter threshold, wherein the output of the first comparator is coupled to the first input of the AND gate; A second comparator is configured to assert an output in response to a voltage at the output of the operational transconductance amplifier being greater than a voltage across a transistor stack, wherein the transistor stack is also coupled to the ground node and the output of the second comparator is coupled to the second input of the AND gate; and A second switch is coupled to the transistor stack and a current source, and the second switch includes a control terminal coupled to the output of the first comparator.

17. The electronic device of claim 16, wherein the first switch is configured to: In response to the assertion that the output of the AND gate is closed; and The output of the AND gate is disconnected in response to the cancel assertion.

18. The electronic device of claim 16, wherein the second switch is configured to: The output of the first comparator is asserted and closed; and The output of the first comparator is canceled and disconnected.

19. The electronic device of claim 16, wherein the transistor stack comprises an n-type metal-oxide-semiconductor field-effect transistor (MOSFET).

20. The electronic device of claim 19, wherein the n-type MOSFET comprises a copy transistor of the power transistor coupled to the battery.

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