High-pass filter based on low-temperature co-fired ferrite process

Abstract

This invention discloses a high-pass filter based on low-temperature co-fired ferrite technology, belonging to the field of radio frequency components. It includes a cavity and a cover plate. A substrate, inductor, and capacitor are disposed within the cavity. The substrate is a multilayer low-temperature co-fired ferrite substrate. The inductor is integrated inside the substrate, and the capacitor is a discrete component embedded within the cavity. This invention uses the LC structure principle to design a Chebyshev Type I high-pass filter. The overall structure is a cubic open cavity, integrating the inductor inside the substrate and embedding the capacitor as a discrete component within the cavity. This successfully achieves a high-pass filter operating at 1MHz to 10MHz with a cutoff frequency of 1MHz and a size of 8.2×8.2×2.8mm³. This invention achieves miniaturization and improved reliability of passive high-pass filters, playing a crucial role in the performance improvement of radar systems, airborne and missile-borne communication systems, and aligns with the development trend of lighter, smaller, more portable, and higher-performance communication systems.

Description

Technical Field

[0001] This invention relates to the field of radio frequency components, mainly used in communication, radar, navigation, electronic countermeasures and other fields, as a high-pass filter based on low-temperature co-fired ferrite process for signal filtering between receiving modules and subsequent modules. Background Technology

[0002] For traditional high-pass filters operating in the 1MHz–10MHz range with a cutoff frequency of 1MHz, compared to Butterworth filters, Chebyshev Type I filters exhibit equal ripple characteristics in the passband, while monotonically decreasing in the stopband and possessing greater attenuation characteristics. Furthermore, the higher the order, the steeper the transition band, and the transfer function has no zeros. Traditional passive high-pass filters are typically implemented by mounting multiple discrete inductors, capacitors, and other components on a circuit board, but this approach struggles to simultaneously achieve the high filtering performance and miniaturization requirements of high-pass filters. Figure 1 This is a schematic diagram of a traditional Chebyshev Type I high-pass filter circuit.

[0003] The technical problems and shortcomings of traditional high-pass filters are mainly reflected in the following two aspects:

[0004] 1. Traditional high-pass filter designs involve mounting multiple discrete inductors and capacitors on a circuit board and achieving high-pass filtering through multi-stage LC resonance. This results in high-pass filters occupying a large volume on the circuit board and requiring numerous soldered components. In particular, high-pass filter designs that operate at low frequencies, have stringent filtering characteristics, and require high reliability have large inductance / capacitance values. Using thin-film technology for integrated design is complex and difficult to implement, and using PCB board mounting makes it even more difficult to ensure miniaturization and high reliability.

[0005] 2. Traditional high-pass filter development is limited by various factors such as component processing technology and reliability. It requires multiple assembly and adjustment to optimize the impedance characteristics of discrete inductors and capacitors, and to avoid changes in high-pass filter performance caused by batch differences in capacitors and inductors and soldering process errors, resulting in low mass production efficiency. Summary of the Invention

[0006] The purpose of this invention is to provide a high-pass filter based on low-temperature co-fired ferrite technology to solve the above-mentioned problems.

[0007] To achieve the above objectives, the technical solution adopted by the present invention is as follows: a high-pass filter based on low-temperature co-fired ferrite process, comprising a cavity and a cover plate above the cavity, wherein a substrate, an inductor and a capacitor are disposed in the cavity, the substrate is a multilayer low-temperature co-fired ferrite substrate, the inductor is integrated inside the substrate, and the capacitor is a discrete component embedded in the cavity.

[0008] As a preferred technical solution: the substrate has a total of 60 layers, of which 24 are slotted layers, 12 are upper cover layers, 9-12 are coil layers, and 12 are lower cover layers.

[0009] As a preferred technical solution: there are five inductors, namely L1, L2, L3, L4 and L5, wherein L1, L2, L4 and L5 are located at the four vertices, L3 is located in the middle position, and L1, L2, L4 and L5 are centrally distributed around L3 and interconnected with the top layer circuit of the substrate.

[0010] As a further preferred technical solution: L1 and L5 are symmetrically distributed, with the same coil structure and 12 layers of coils; L2 and L4 are distributed in the same direction, with the same coil structure and 11 layers of coils; L3 has 9 layers of coils.

[0011] As a further preferred technical solution: L1, L2, L4 and L5 are spaced 5.5mm apart.

[0012] As a further preferred technical solution: the inductor coil has an outer diameter of 1.4mm, an outer diameter of 0.8mm, and a width of 0.3mm.

[0013] It should be noted that the above-mentioned parameters, such as the number of basic layers and the number of inductors, of the high-pass filter based on low-temperature co-fired ferrite technology are merely preferred choices. Other values ​​can also achieve the present invention. Specifically:

[0014] Overall circuit topology as follows Figure 3 As shown, the inductance values ​​of inductors L1 to L5 are 1 to 10 μH, and the capacitance values ​​of capacitors C1 to C6 are 1 to 10 nF, all of which can be completed using the design method and steps of this invention;

[0015] The order of the high-pass filter can be selected from 3, 5, 7, 9, 11, and 13. The higher the order, the stronger the out-of-band rejection and the greater the in-band insertion loss. However, the number of components increases accordingly, which leads to increased integration process difficulty, increased overall size after integration, and problems such as mutual coupling between multiple inductors.

[0016] The number of substrate stack-up layers can be between 48 and 60. The upper and lower cover layers mainly serve as magnetic circuit design layers and can be adjusted to optimize the interaction between the inductor's magnetic circuit and the capacitor, as well as the coupling characteristics between multiple inductors. The upper cover layer and the lower cover layer can be adjusted within the range of 0-12 layers. Too few upper and lower cover layers will affect parameters such as leakage inductance and mutual inductance of the inductor, thus affecting the performance of the filter. Therefore, the more upper and lower cover layers, the better. However, increasing the number of upper and lower cover layers will increase the difficulty of integrated substrate fabrication. Therefore, a compromise design is required.

[0017] The number of slotted layers can be adjusted from 1 to 24. This is mainly because a cover plate can be added to this layer to seal the surface-mount capacitors in the slot. The more slotted layers there are, the deeper the slots become. A suitable number of layers can ensure that the cover plate seals the surface-mount capacitors, and that the cover plate will not touch the capacitors after encapsulation, while also keeping the filter size moderate.

[0018] The coil design layers can be adjusted from 1 to 24 layers. The more coil design layers there are, the larger the number of coil turns are, and the larger the inductance value of the integrated inductor is.

[0019] The proposed solution utilizes a 9th-order LC filter, integrating four inductors and five capacitors. The capacitance value changes; simultaneously, the spatial distribution of the integrated inductors, their inductance values, and the number of winding layers are all modified. Due to the reduced number of filter components, the substrate size can be correspondingly reduced. The integrated solution employs the design method flow of this invention, enabling both design and fabrication.

[0020] As a preferred technical solution, the capacitor is embedded in the cavity in the form of a surface mount capacitor. That is, a surface mount capacitor is selected.

[0021] As a preferred technical solution: the capacitor is a 0603 capacitor, and the capacitor material is selected as 2X1 type material.

[0022] Through extensive testing and verification, the inductor was manufactured using a substrate integration process. As the size of the chip capacitor decreases, the performance (Q value and temperature characteristics) of the capacitor deteriorates. Taking all factors into consideration, the 0603 package was selected to meet the miniaturization requirements of the filter. The capacitor material was selected as a 2X1 type material with good temperature characteristics. The capacitance value changes within 10% between -50℃ and +85℃, and the frequency impedance characteristics are relatively good. The self-resonant frequency point is between 1 and 10MHz, which meets the filter design requirements.

[0023] As a preferred technical solution, the capacitor and inductor are electrically connected through printed circuit patterns.

[0024] As a preferred technical solution, the cover plate is a metal cover plate.

[0025] The inductor and circuit wiring of this invention are preferably implemented through printed patterns and top and bottom vias. The discrete capacitors are preferably embedded in the cavity in the form of surface mounts. The electrical connection with the inductor in the substrate is achieved through printed circuit patterns. Using simulation design methods and selecting a suitable ferrite substrate material, it is relatively easy to achieve the μH level of the inductor. Finally, a metal cover plate is used to seal the top of the cavity. This greatly reduces the number of discrete components in the circuit. The Chebyshev I type high-pass filter is designed using the passive LC structure principle. The circuit topology is designed using Ansoft-Designer software, and electromagnetic simulation of the three-dimensional structure of the inductor is performed using Ansoft-Maxwell software.

[0026] The high-pass filter proposed in this invention, based on low-temperature co-fired ferrite technology, uses multilayer low-temperature co-fired ferrite ceramic as the substrate and employs the LC structure principle to design a Chebyshev Type I high-pass filter. The overall design utilizes a cubic open-cavity structure, integrating the inductor within the substrate and embedding the capacitor as discrete components within the cavity. This successfully achieves a high-pass filter operating at 1MHz to 10MHz with a cutoff frequency of 1MHz and a size of 8.2×8.2×2.8mm³. This invention's high-pass filter achieves miniaturization and improved reliability of passive high-pass filters, playing a crucial role in realizing and improving the performance of radar systems, airborne, and missile-borne communication systems. It aligns with the development trend of lighter, smaller, more portable, and higher-performance communication systems, and its high performance, low cost, high reliability, and miniaturization are of paramount importance.

[0027] Compared with existing technologies, the advantages of this invention are as follows: The high-pass filter design method based on low-temperature co-fired ferrite technology of this invention is fundamentally different from traditional high-pass filters operating in the low-frequency band. It adopts a cubic open-cavity structure and integrates inductors inside the substrate using the low-temperature co-fired ferrite technology. Capacitors are embedded in the cavity as discrete components, and an integrated cover plate is used for encapsulation, greatly reducing the number of discrete components. Before the improvement, there were 6 discrete capacitors and 5 discrete inductors surface-mounted; after the improvement, there are 6 discrete capacitors surface-mounted, and the inductors are integrated into the substrate, with 0 surface-mounted units. The high-pass filter of this invention solves the problems of large size, numerous discrete components, and low integration of traditional high-pass filters, simplifies the device soldering process, and improves the level of mass production. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of a traditional Chebyshev Type I high-pass filter circuit.

[0029] Figure 2 This is a schematic diagram of the high-pass filter circuit of Embodiment 1 of the present invention;

[0030] Figure 3This is a diagram of the integrated inductor structure in the low-temperature co-fired ferrite substrate of Embodiment 1 of the present invention;

[0031] Figure 4 This is a diagram of the substrate stack structure of Embodiment 1 of the present invention;

[0032] Figure 5 This is a schematic diagram of the overall structure of the filter in Embodiment 1 of the present invention;

[0033] Figure 6 This is a circuit diagram of the top-level integrated pad in Embodiment 1 of the present invention;

[0034] Figure 7 Design the layout for inductor windings;

[0035] Figure 8 Inter-layer interconnection diagram of circuit in Embodiment 1 of the present invention;

[0036] Figure 9 This is a schematic diagram of the multi-point common ground of the bottom substrate in Embodiment 1 of the present invention;

[0037] Figure 10 This is a diagram of the surface mount pads on the back side of the bottom layer in Embodiment 1 of the present invention;

[0038] Figure 11 This is a diagram of the dielectric slurry covering the conductor surface in Embodiment 1 of the present invention;

[0039] Figure 12 This is a diagram showing the external dimensions of a high-pass filter based on LTCF technology in Embodiment 1 of the present invention.

[0040] In the diagram, 1 is the slotted layer; 2 is the upper cover layer; 3 is the coil layer; 4 is the lower cover layer; 5 is the surface mount capacitor; and 6 is the inductor. Detailed Implementation

[0041] The invention will now be further described with reference to the accompanying drawings.

[0042] Example 1:

[0043] A high-pass filter based on low-temperature co-fired ferrite process is presented in this embodiment. The passive LC structure principle is used to design the Chebyshev I type high-pass filter. The circuit topology is designed using Ansoft-Designer software, and electromagnetic simulation is performed using the three-dimensional inductor structure in Ansoft-Maxwell software.

[0044] Circuit Topology Design: Based on the technical specifications and miniaturization goals of the high-pass filter in this application, the design approach of the Chebyshev I filter was adopted. The LC parameters were optimized using Ansoft-Designer software, and the selection rules for discrete component values ​​were referenced to complete the topology design. Through multiple simulation iterations of the high-pass filter circuit, the LC filtering order of the filter was determined to be 11th order, the inductance values ​​L1–L5 were 1–10 μH, and the capacitance values ​​C1–C6 were 1–10 nF.

[0045] This embodiment selects a topology as follows: Figure 2 As shown, the capacitor is implemented by embedding discrete surface-mount components within the cavity, and the inductor is implemented by integrating it onto a low-temperature co-fired ferrite substrate.

[0046] Design of Integrated Inductor on Low-Temperature Co-fired Ferrite Substrate: Based on circuit topology design, magnetic circuit simulation, and magnetic flux density calculation, this study considers the design method of photogrammetric inductors. The finite element method (FEM) is used for magnetic circuit design. Its principle is to divide the computational space into a grid, assuming the magnetic fields on the boundaries are parallel, and calculate the magnetic field distribution using Maxwell's equations. The simulated inductor core is made of NiZn ferrite material, and its relative permeability is measured from a standard ferrite toroidal core prepared by low-temperature co-firing. Ansoft-Maxwell software is used to establish the structural model of the integrated inductor. Data such as the permeability of the ferrite material, the number of coil turns, outer diameter, inner diameter, wire width, thickness, and ferrite substrate thickness are input to establish the magnetic circuit model, obtaining the magnetic circuit simulation diagram and magnetic flux density. Inductance and leakage flux can be calculated, and eddy current loss, hysteresis loss, and impedance analysis can be performed. Finally, based on the calculation results of Ansoft-Designer and Ansoft-Maxwell simulation software, and according to the technical specifications of the high-pass filter and the design objectives of its structure and magnetic circuit, the basic spatial structure of the high-pass filter is determined. Then, the generated structural model is parametrically analyzed to optimize the structural design scheme.

[0047] This embodiment uses, as follows: Figure 3 The inductor integration structure in the low-temperature co-fired ferrite substrate is shown.

[0048] Low-temperature co-fired ferrite multilayer laminated integrated inductor structure: In this structure, the ferrite magnetic film (core) and coil are fully integrated, with the core and coil located very close together. Both have similarly low magnetic reluctance. Since the magnetic flux must choose the path with the lowest magnetic reluctance, it no longer passes through other coil loops with higher magnetic reluctance. Therefore, the magnetic flux that cannot effectively couple with other coil loops is leakage flux. Furthermore, the relative positions and distances between multiple coils also lead to differences in self-inductance and mutual inductance values, causing the integrated inductor in the substrate to deviate to some extent from the theoretical values ​​of discrete inductors, further altering the filter parameters.

[0049] In summary, considering the design challenges mentioned above, this embodiment proposes solutions from three aspects:

[0050] (1) Circuit topology design

[0051] To effectively control the mutual inductance influence of inductance values, a multi-winding inductor model is established to analyze the parasitic parameter effects between windings. This invention, based on the Chebyshev Type I high-pass filter principle and combined with Ansoft-Designer software simulation, designs the filter's performance parameters and proposes a symmetrical circuit topology, such as... Figure 2 As shown, ensure that the inductance and capacitance values ​​satisfy the following relationship:

[0052]

[0053] Through extensive testing and verification, the inductor was manufactured using a substrate integration process. As the size of the chip capacitor decreases, the performance (Q value and temperature characteristics) of the capacitor deteriorates. Taking into account all factors, the 0603 package was selected to meet the miniaturization requirements of the filter. The capacitor material was selected as a 2X1 type material with good temperature characteristics. The capacitance value changes within 10% between -50℃ and +85℃. The frequency impedance characteristics are good, and the self-resonant frequency point is between 1 and 10MHz, far away from 1MHz, which meets the filter design requirements.

[0054] (2) Spatial positioning design of integrated inductors

[0055] Based on electromagnetic field theory and combined with the overall design requirements of high-pass filters, this application uses Ansoft-Maxwell simulation software to simulate and output the self-inductance and mutual inductance values ​​of each inductor winding for different integrated structures, as well as the magnetic flux density vector diagram and contour map of each structure; by analyzing the percentage change of mutual inductance value relative to self-inductance, the coupling effect between windings is determined; by analyzing the magnetic flux density vector diagram and contour map, the leakage inductance of each winding is analyzed.

[0056] Simulation Design:

[0057] The integrated parameters of the substrate were designed using Maxwell software 3D simulation. Five integrated inductors (L1 to L5) were connected in a "Z" shape. The coils located at the four vertices of the square substrate were centrally symmetrically distributed around the coil in the middle position and interconnected with the top layer circuit of the substrate. The integrated inductors used silver paste conductor design, and the interlayer design used top and bottom through holes for interconnection. The intralayer design was implemented using screen printing. The design mainly focused on comparing and simulating parameters such as winding radius, winding wire diameter, relative winding position, number of winding layers, insulation medium design, number of cover layers design, and magnetic material settings, and optimizing the model to establish a simulation model.

[0058] Through multiple iterations and optimizations, this embodiment selects an integrated substrate frame size of 8.5×8.5mm. The substrate material is the applicant's low-temperature co-fired ferrite type 300 soft magnetic material (see invention patent: Wide-temperature nickel-zinc low-temperature co-fired ferrite material and preparation method for high-power multilayer chip ferrite devices; patent number 201610260375.0). The substrate has a total of 60 layers, including 24 slotted layers 1, in which chip capacitors 5 are installed; 12 upper cover layers 2; 9-12 coil layers 3, in which inductors 6 are installed; and 12 lower cover layers 4. The substrate stack-up structure is as follows: Figure 4 As shown, the overall structure of the filter is as follows: Figure 5 As shown;

[0059] In this embodiment, the coil outer diameter is 1.4mm, the coil outer diameter is 0.8mm, and the coil width is 0.3mm; the L3 inductor is integrated at the origin of the spatial coordinates, and the coil has 9 layers; L1 and L5 are symmetrically distributed, with the same coil structure, and the coil has 12 layers; L2 and L4 are symmetrically distributed, with the same coil structure, and the coil has 11 layers; the L3 coil has 9 layers; L1, L2, L4, and L5 are spaced 5.5mm apart.

[0060] By adopting Figure 4 The model simulates the magnetic field cloud map, and the simulation output inductance matrix is ​​shown in Table 1.

[0061] Table 1. Simulation Inductance Matrix of Integrated Winding Output (Unit: μH)

[0062]

[0063] From the simulated magnetic flux density vector map, contour map, and output inductance matrix, it can be seen that the filter magnetic field of the integrated inductor is mainly constrained by the winding flux, resulting in a relatively large self-inductance of the inductor. The magnetic field distribution is relatively regular near the coil, while the magnetic field distribution inside the coil is more uniform, with a higher flux density. The magnetic field distribution near the coil is correlated with the number of coil turns; that is, as the number of coil turns increases, the magnetic flux density in the vicinity also increases. The magnetic field distribution inside the coil is relatively uniform, with a higher flux density. As the distance increases, the magnetic flux density outside the coil gradually decreases, and the mutual coupling between different inductors is less than 1%. Combined with simulation, it was found that covering the winding conductor layer with printed insulating medium has little impact on the self-inductance and mutual inductance of the inductor.

[0064] Based on circuit topology design and simulation design, and taking full account of product reliability and optimal circuit performance, the Qualcomm integrated filter engineering design was completed interactively using Maxwell software and AutoCAD software. The main improvements were made to the overall filter layout, top-level integrated pad circuit, inter-layer interconnection, and multi-point grounding of the bottom substrate.

[0065] Specifically, by designing a top-level integrated pad circuit, surface-mount mounting of capacitors C1 to C6 within the open-cavity substrate is achieved. The pad circuit layout is shown below. Figure 6 As shown, the inductor winding design layout is as follows: Figure 7 To ensure simple and convenient installation of the high-pass filter, both of the filter's I / O ports and ground port are designed on the bottom layer. The surface mount pad layout on the back of the bottom layer is shown below. Figure 10 As shown, the three pads are the same size and spaced the same, and the two "I / O ports" are symmetrically distributed around the middle "ground port";

[0066] Circuits on different layers within the substrate are interconnected using vias. The interconnection layout between circuit layers is shown below. Figure 8 As shown, according to circuit design principles, the number of layers between the top-layer capacitor pads and inductor windings, and the bottom-layer "I / O ports" for interlayer interconnection is relatively large. Therefore, the interlayer interconnection between the capacitor pads and inductor windings (or bottom-layer "I / O ports") is achieved using multiple sets of vertical vias. Each set of vertical vias only passes through 2-3 layers of low-temperature co-fired ferrite laminate, and one circuit pad is designed to enhance the reliability of the interlayer interconnection. In addition, the vias and pads are designed as far away from the inductor windings as possible. For integrated inductors, the winding circuits of adjacent layers are directly connected vertically through vias, without the need for pads.

[0067] The filter's underlying substrate adopts a multi-point common ground design, such as... Figure 9 As shown, a mesh structure conductor is designed as a ground plane in the low-temperature co-fired ferrite stack near the bottom of the substrate. The grounding terminal of the inductor winding can be directly connected to this ground plane through a vertical via, realizing a common ground at multiple points and suppressing circuit noise. At the same time, the mesh structure conductor has a large heat dissipation area, improving circuit reliability and effectively avoiding the warping, cracking and other processing problems caused by the full coverage of the conductor in the low-temperature co-fired ferrite stack.

[0068] Furthermore, this embodiment also designs a layout in which the winding conductor layer covers the printed insulating medium, such as... Figure 11 As shown, simulation analysis and process development revealed that covering the winding conductor layer with printed insulating medium has a relatively small impact on the inductor's self-inductance and mutual inductance. Considering the device manufacturing process and the yield rate, the design of covering the conductor layer with printed insulating medium was ultimately not adopted.

[0069] Finally, relying on the low-temperature co-fired ferrite process platform, the integrated inductor on the low-temperature co-fired ferrite substrate was successfully developed, and the final product has a size of 8.2*8.2*2.8mm. 3 Surface mount capacitors C2, C3, C4, and C5 are selected as 2.7nF, and capacitors C1 and C6 are selected as 4.7nF; the winding inductor L3 in the middle position is selected as 4.3uH; the four winding inductors L2 and L4 near the edge of the substrate are selected as 4.7uH, and L1 and L5 are selected as 5.4uH. Their dimensions are as follows. Figure 12As shown.

[0070] Example 2:

[0071] Key technical indicators of the product obtained in the example test

[0072] All tests and experiments in this embodiment were conducted under the "standard atmospheric conditions for testing" specified in Clause 4.1.1 of GJB360A-1996.

[0073] Connect the high-pass filter test ports I / O1 (or input port) and I / O2 (or output port) to network analyzer test ports 1 and 2 to perform electrical performance measurements. The specific test data are shown in Table 2.

[0074] Table 2. Insertion loss and voltage standing wave ratio test results (at room temperature 25℃)

[0075]

[0076] At room temperature, the filter has a passband bandwidth of 1–10 MHz, a cutoff frequency of 1 MHz, an insertion loss of <3.1 dB, a stopband attenuation of >40 dB (300–500 kHz), a passband ripple of <2.5 dB, and a voltage standing wave ratio of <1.4. All performance indicators meet the design requirements.

[0077] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A high-pass filter based on low-temperature co-fired ferrite technology, comprising a cavity and a cover plate above the cavity, wherein a substrate, an inductor, and a capacitor are disposed within the cavity, characterized in that: The substrate is a multilayer low-temperature co-fired ferrite substrate, the inductor is integrated inside the substrate, and the capacitor is a discrete component embedded within the cavity; wherein... The substrate includes, from top to bottom, a slotted layer, an upper cover layer, a coil layer, and a lower cover layer. The capacitor is embedded in the slotted layer of the cavity in a surface mount form, and the inductor is integrated in the coil layer of the cavity. The capacitor and inductor are electrically connected through printed circuit patterns; The inductors are five in number, namely L1, L2, L3, L4 and L5. L1, L2, L4 and L5 are located at the four vertices, and L3 is located in the middle. L1, L2, L4 and L5 are distributed around L3 in a central arrangement and are interconnected with the top layer circuit of the substrate. The substrate has a total of 60 layers, including 24 slotted layers, 12 upper cover layers, 9 to 12 coil layers, and 12 lower cover layers. L1 and L5 are symmetrically distributed and have the same coil structure, with 12 coil layers; L2 and L4 are symmetrically distributed and have the same coil structure, with 11 coil layers; L3 has 9 coil layers.

2. The high-pass filter based on low-temperature co-fired ferrite process according to claim 1, characterized in that: The distances between L1, L2, L4 and L5 are 5.5 mm.

3. The high-pass filter based on low-temperature co-fired ferrite process according to claim 1, characterized in that: The inductor coil has an outer diameter of 1.4 mm, an inner diameter of 0.8 mm, and a width of 0.3 mm.

4. The high-pass filter based on low-temperature co-fired ferrite process according to claim 1, characterized in that: The capacitor is a 0603 capacitor, and the capacitor material is selected as 2X1 type material.

5. The high-pass filter based on low-temperature co-fired ferrite process according to claim 1, characterized in that: The cover plate is a metal cover plate.

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