A gate voltage tunable electronic system integrated with a superconducting resonator for a quantum computing device

Abstract

A superconducting coupling device includes a resonator structure. The resonator structure has a first end configured to couple to a first device and a second end configured to couple to a second device. The device further includes an electronic system coupled to the resonator structure and a gate positioned proximate to a portion of the electronic system. The electronic system and the gate are configured to interrupt the resonator structure at one or more predetermined locations to form a switch. The gate is configured to receive a gate voltage and change the inductance of the electronic system based on the gate voltage. The change in inductance causes the resonator structure to change the coupling strength between the first device and the second device.

Description

Technical Field

[0001] The present invention generally relates to superconducting devices, manufacturing methods, and manufacturing systems for controlling qubit coupling in superconducting quantum devices. More specifically, the present invention relates to devices, methods, and systems of a gate voltage adjustable electronic system integrated with a superconducting resonator for a quantum computing device. Background Art

[0002] Hereinafter, unless explicitly distinguished during use, the prefix "Q" in a word or phrase indicates a reference to that word or phrase in the context of quantum computing.

[0003] Molecules and subatomic particles follow the laws of quantum mechanics, which is a branch of physics that explores how the physical world works at the most fundamental level. At this level, particles behave in strange ways, simultaneously presenting more than one state and interacting with other particles that are very far away. Quantum computing utilizes these quantum phenomena to process information.

[0004] The computers we use now are called classical computers (also referred to as "traditional" computers or traditional nodes, or "CN" here). Traditional computers use traditional processors, which are manufactured using semiconductor materials and technologies, semiconductor memories, and magnetic or solid-state storage devices, which is called the von Neumann architecture. In particular, the processors in traditional computers are binary processors, that is, they operate on binary data represented by 1 and 0.

[0005] A quantum processor (q-processor) uses the odd properties of entangled qubit devices (compactly referred to as "qubits" in this article, plural "qubits") to perform computational tasks. In a specific field where quantum mechanics works, matter particles can exist in multiple states, such as an "on" state, an "off" state, and an "on" and "off" state simultaneously. In the case where binary calculations using semiconductor processors are limited to only using ON and OFF states (equivalent to 1 and 0 in binary code), quantum processors utilize these quantum states of matter to output signals that can be used for data calculations.

[0006] Traditional computers encode information in bits. Each bit can take a value of 1 or 0, and these 1s and 0s are used as on / off switches that ultimately drive the functions of the computer. On the other hand, quantum computers are based on qubits, which operate according to two key principles of quantum physics: superposition and entanglement. Superposition means that each qubit can represent 1 and 0 simultaneously. Entanglement means that qubits in superposition can be related to each other in a non-classical way; that is, the state of one (being 1 or 0 or both) can depend on the state of the other, and more information can be determined when two qubits are entangled than when they are processed separately.

[0007] Using these two principles, qubits operate as more complex information processors, enabling quantum computers to function in ways that allow them to solve difficult problems that are intractable using conventional computers. IBM has successfully built and demonstrated the operability of a quantum processor using superconducting qubits (IBM is a registered trademark of International Business Machines Corporation in the United States and other countries).

[0008] In known semiconductor manufacturing technologies, superconducting devices such as qubits are fabricated using superconducting and semiconductor materials. Superconducting devices typically use one or more layers of different materials to achieve the performance and functionality of the device. The material layers can be superconducting, conductive, semiconductive, insulating, resistive, inductive, capacitive, or have any number of other properties. Depending on the nature of the given material, the shape, size, or arrangement of the material, the other materials adjacent to the material, and many other considerations, different methods may have to be used to form the different material layers.

[0009] Superconducting devices are typically planar, i.e., in which the superconducting structure is fabricated on a plane. Non-planar devices are three-dimensional (3D) devices in which some structures are formed above or below a given fabrication plane.

[0010] A q-processor is implemented as a group of more than one qubit. The qubits are fabricated as a lattice of coplanar devices on a single fabrication plane. This implementation of the q-processor is generally accepted as a fault-tolerant quantum architecture, which is referred to as a surface code scheme (SCS) or a surface code architecture (SCA). SUMMARY OF THE INVENTION

[0011] Exemplary embodiments provide a superconducting device and a method and system for manufacturing the same. Embodiments of the superconducting coupling device include a resonator structure. In an embodiment, the resonator structure has a first end configured to couple to a first device and a second end configured to couple to a second device. The embodiment also includes an electronic system coupled to the resonator structure and a gate located near a portion of the electronic system. In this embodiment, the electronic system and the gate are configured to interrupt the resonator structure at one or more predetermined locations to form a switch. In this embodiment, the gate is configured to receive a gate voltage and change the inductance of the electronic system based on the gate voltage. In this embodiment, the change in inductance causes the resonator structure to change the coupling strength between the first device and the second device.

[0012] In another embodiment, the change in inductance is the result of the gate changing the critical current of the electronic system. In another embodiment, the change in inductance causes a change in the characteristic frequency of the resonator structure. In another embodiment, the change in the characteristic frequency of the resonator structure enables the coupling strength between the first device and the second device to be changed.

[0013] In another embodiment, the gate voltage is configured to switch between a low inductance state with a high critical current and a high inductance state with a low critical current.

[0014] In another embodiment, at least a portion of the resonator structure is formed of a superconducting material. In another embodiment, the gate is formed of a metallic material or a superconducting material.

[0015] In another embodiment, a first device capacitor is capacitively coupled to a first end of the resonator structure and a second device capacitor is capacitively coupled to a second end of the resonator structure.

[0016] Another embodiment further includes a ground plane that is coupled to the resonator structure through a shunt portion of the resonator structure. In another embodiment, the shunt portion of the resonator structure includes an electronic system.

[0017] In another embodiment, the electronic system is coupled between a first portion of the resonator structure and a second portion of the resonator structure.

[0018] Another embodiment further includes a substrate structure, wherein the electronic system is disposed on a surface of the substrate structure.

[0019] Another embodiment also includes an insulator disposed on the electronic system, wherein the gate is disposed on the insulating structure.

[0020] In another embodiment, the electronic system includes a quantum well material disposed between a first barrier material and a second barrier material.

[0021] In another embodiment, the electronic system includes at least one of a semiconductor material or a graphene material.

[0022] In another embodiment, the first device is a first qubit and the second device is a second qubit.

[0023] Embodiments include a manufacturing method for manufacturing a superconducting device.

[0024] Embodiments include a manufacturing system for manufacturing a superconducting device. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The novel features that are considered to be characteristics of the invention are set forth in the appended claims. However, the invention itself, its preferred mode of use, further objectives and advantages will be best understood by reference to the following detailed description of illustrative embodiments when read in conjunction with the accompanying drawings, in which:

[0026] Figure 1 An example surface code architecture (SCA) that describes problems that can be solved using the illustrative embodiments is described;

[0027] Figure 2Depicts an example gate voltage tunable electronic system integrated with a superconducting resonator according to an illustrative embodiment;

[0028] Figure 3 Depicts an exemplary shunt gate tunable coupled resonator according to an illustrative embodiment;

[0029] Figure 4 Depicts an exemplary inline integration of a gate voltage tunable electronic system integrated with a superconducting coupled resonator according to an illustrative embodiment;

[0030] Figure 5 Depicts an example implementation of a gate voltage tunable electronic system integrated with a superconducting resonator in an SCA arrangement according to an illustrative embodiment;

[0031] Figure 6 Depicts a cross-sectional view of a gate voltage tunable electronic system integrated with a superconducting resonator device structure according to an exemplary embodiment;

[0032] Figure 7 Depicts a cross-sectional view of a gate voltage tunable electronic system integrated with a superconducting resonator device structure according to another illustrative embodiment;

[0033] Figure 8 Depicts a cross-sectional view of a gate voltage tunable electronic system integrated with a superconducting resonator device structure according to another illustrative embodiment;

[0034] Figure 9 Depicts a cross-sectional view of a gate voltage tunable electronic system integrated with a superconducting resonator device structure according to another illustrative embodiment;

[0035] Figure 10 Depicts a cross-sectional view of a gate voltage tunable electronic system integrated with a superconducting resonator device structure according to an exemplary embodiment; and

[0036] Figure 11 Depicts an example implementation of a gate voltage tunable electronic system integrated with a superconducting resonator in a multi-bit device architecture according to an illustrative embodiment. DETAILED DESCRIPTION

[0037] Exemplary embodiments for describing the present invention generally address and solve the above problems and other related problems by providing tunable superconducting resonators for quantum computing devices. The illustrative embodiments also provide a manufacturing method and system for manufacturing a gate voltage tunable electronic system integrated with a superconducting resonator.

[0038] Figure 1Describes an example surface code architecture (SCA) that illustrates the problems that can be solved using illustrative embodiments. A superconducting qubit structure such as SCA 100 arranges a number of qubits 102, 102A, and 102B in a lattice form on a planar two-dimensional (2D) grid. The qubits are coupled to and communicate with each other using resonator lines 104 (also referred to as "buses"). The quantum state of qubit 102 is read using a readout line 106 that is capacitively coupled to a particular qubit.

[0039] Typically, the readout line 106 is a resonator line where the qubit state of a particular qubit is measured using dispersive readout. Dispersive readout uses a dispersive interaction with a resonator, where the interaction results in a dispersive shift that causes the frequency of the resonator to change according to the state of the qubit. The resonator frequency is interrogated with a microwave pulse, typically at a frequency near the midpoint of the resonance frequencies corresponding to the ground state and the excited state. The phase and amplitude of the reflected signal are used to distinguish the state of the qubit.

[0040] However, existing architectures using dispersive readout are vulnerable to microwave crosstalk and / or frequency conflicts between qubits, resulting in performance degradation in qubit state measurements and correspondingly reducing the performance of quantum computers.

[0041] To address the above problems of existing architectures, attempts have been made to develop architectures that allow for tuning the coupling between qubits. Experimentally, tuning qubit coupling has previously relied on using flux control circuit elements. However, these flux-tunable qubits suffer from several drawbacks, including reduced coherence time due to flux noise, the need for fine tuning of the magnetic flux, their sensitivity to on-chip crosstalk (e.g., up to 30%), heating caused by the current required to generate the flux, and degradation of qubit performance due to the shortened coherence time. Some recent activities have focused on developing voltage-controlled tuning of qubit coupling. A recent method for developing voltage-controlled tuning includes a proposal to controllably short-circuit two grounded transmons by gate tuning a semiconductor switch. Another recent method uses a voltage-controlled switch based on a semiconductor nanowire to controllably ground one end of a superconducting cavity to change the coupling of the grounded gatemon.

[0042] There is a need for a solution to provide a tunable superconducting resonator for a quantum computing device to address the above problems associated with qubit coupling, in order to provide advantages such as reduced microwave crosstalk and / or frequency conflicts between qubits. For example, such a solution would enable controlling the coupling between qubit 102A and qubit 102B to reduce or eliminate microwave crosstalk and / or frequency conflict 108 between qubit 102A and qubit 102B during the readout process.

[0043] One embodiment provides an adjustable coupling architecture for a quantum computing device. Examples include a gate voltage tunable electronic system integrated with a superconducting resonator for a quantum computing device to form a gate voltage controlled switch integrated with a coupled resonator. In one embodiment, the gate tunable electronic system and a portion of the gate are positioned to form a switch configured to interrupt a superconducting resonator circuit at a critical location. In one or more embodiments, the gate tunable electronic system is a Josephson junction (JJ) switch. A Josephson junction (JJ) is formed by two or more superconductors joined by a thin section of non-superconducting material. In a particular embodiment, the gate is formed of a metallic material positioned proximate to the JJ switch.

[0044] In one or more embodiments, the gate positioned proximate to the JJ switch provides a tunable JJ switch configured such that by applying a gate voltage to the gate, the critical current of the JJ switch is tuned based on the gate voltage. The critical current in a superconducting material is the current below which the material is superconducting and above which the material is non-superconducting. By changing the critical current of the JJ switch, the Josephson inductance L of the JJ switch J changes in an inverse manner. In one embodiment, the voltage applied to the proximal metal gate tunes the switch between a low inductance state with a high critical current (e.g., approximately 1 - 10 microamperes (μA)) and a high inductance state with a low critical current (e.g., 10 nanoamperes (nA)).

[0045] For currents through the JJ switch that are small compared to the critical current, the Josephson inductance is given by:

[0046]

[0047] where Φ0 is the magnetic flux quantum, and I c is the critical current of the JJ switch. In one example, a critical current of 1 μA provides a Josephson inductance of 0.3 nH (nanohenry), and a critical current of 10 nA provides a Josephson inductance of 30 nH.

[0048] In this embodiment, changing the gate voltage of the gate results in a change in the Josephson inductance of the JJ switch and a corresponding change in the characteristic frequency of the resonator of the coupled qubit. The change in the characteristic frequency of the resonator results in a change in the coupling strength between the qubits.

[0049] One or more embodiments provide for a gradually tunable coupling between nearest neighbor qubits by adjusting a gate voltage. Another embodiment provides for multiplexed readout of qubits through JJ switch integration controlled by a gate voltage in a readout resonator. Another embodiment provides the ability to isolate a qubit having an unwanted transition frequency by severing or reducing the coupling of that qubit with one or more other qubits having the unwanted transition frequency. One or more embodiments provide a novel quantum gate hardware approach having faster gates (e.g., a switching time of approximately one nanosecond (ns)) and a tunable coupling strength between qubits.

[0050] Another embodiment provides a method of fabricating a gate voltage tunable electronic system integrated with a superconducting resonator such that the method can be implemented as a software application. The application implementing the method embodiment of fabrication can be configured to operate in conjunction with existing superconducting fabrication systems (e.g., lithography systems).

[0051] For clarity of description, and not to imply any limitation thereto, illustrative embodiments are described using an example number of qubits arranged in a lattice. Within the scope of the illustrative embodiments, embodiments can be implemented using different numbers of qubits, different arrangements in the lattice, superconducting devices other than qubits, types of qubits not based on superconductors, or some combination thereof. An embodiment can be implemented to similarly improve other superconducting fabrications where tunable coupling to superconducting elements is desired.

[0052] In addition, simplified diagrams of exemplary tunable coupling resonators are used in the drawings and illustrative embodiments. In the actual fabrication of a tunable coupling resonator, there can be additional structures not shown or described herein, or structures different from those shown and described herein, without departing from the scope of the exemplary embodiments. Similarly, within the scope of the exemplary embodiments, the structures shown or described in the exemplary tunable coupling resonators can be fabricated differently to yield similar operations or results as described herein.

[0053] As described herein, the different shaded portions in the two-dimensional diagrams of exemplary structures, layers, and formations are intended to represent different structures, layers, materials, and formations in exemplary fabrication. The different structures, layers, materials, and formations can be fabricated using suitable materials known to those of ordinary skill in the art.

[0054] The specific shapes, positions, orientations, or dimensions of the shapes described herein are not intended to limit the exemplary embodiments, unless such features are explicitly described as features of an embodiment. The selection of a shape, position, dimension, or some combination thereof is for clarity of the drawings and description only, and may have been exaggerated, minimized, or otherwise altered relative to the actual shapes, positions, orientations, or dimensions that might be used in actual lithography to achieve the objectives of the illustrative embodiments.

[0055] In addition, by way of example only, illustrative embodiments are described with respect to specific actual or hypothetical superconducting devices, such as qubits. The steps described by the various illustrative embodiments can be adapted to fabricate various tunable coupled resonators in a similar manner, and such adaptations are encompassed within the scope of the illustrative embodiments.

[0056] When implemented in an application, the embodiments enable a manufacturing process to perform certain steps as described herein. The steps of the manufacturing process are described in several figures. In a particular manufacturing process, not all steps are necessary. Some manufacturing processes can implement the steps in a different order, combine certain steps, remove or replace certain steps, or perform some combination of these and other step operations without departing from the scope of the illustrative embodiments.

[0057] By way of example only, illustrative embodiments are described with respect to certain types of materials, electrical properties, structures, formations, layer orientations, directions, steps, operations, planes, dimensions, quantities, data processing systems, environments, components, and applications. Any particular manifestation of these and other similar artificial factors is not intended to limit the present invention. Any suitable manifestation of these and other similar products can be selected within the scope of the exemplary embodiments.

[0058] Illustrative embodiments are described using specific designs, architectures, layouts, schematics, and tools, which are by way of example only and not limitations on the illustrative embodiments. The illustrative embodiments can be used in conjunction with other designs, architectures, layouts, schematics, and tools of comparable or similar purpose.

[0059] The examples in this disclosure are for clarity of description only and are not limiting of the illustrative embodiments. Any advantages listed herein are by way of example only and are not intended to limit the illustrative embodiments. Additional or different advantages can be achieved by particular illustrative embodiments. In addition, a particular illustrative embodiment can have some, all, or none of the advantages listed above.

[0060] Reference Figure 2, this figure depicts an example gate voltage tunable electronic system integrated with a superconducting resonator according to an illustrative embodiment. The top view 200 depicts a tunable superconducting resonator structure having a resonator center conductor 202 made of a superconducting material coupled to a gate voltage tunable electronic system 206, and a gate 204 disposed near the gate voltage tunable electronic system 206. In one or more embodiments, the gate voltage tunable electronic system 206, the resonator center conductor 202, and the gate 204 include Josephson junction (JJ) switches 208. In one or more embodiments, a first end of the resonator center conductor 202 is configured to be capacitively coupled to a first superconducting device such as a first qubit, and a second end of the resonator center conductor 202 is configured to be capacitively coupled to a second superconducting device such as a second qubit.

[0061] In the illustrated embodiment, the gate 204 has a planar rectangular shape and is located above, near, and orthogonal to a portion of the gate voltage tunable electronic system 206. In other specific embodiments, the gate 204 may have any suitable shape, size, or configuration. In a particular embodiment, the gate 204 is formed of a superconducting material or a metallic material. In other embodiments, other gate and qubit structures may be used. In other embodiments, more than one qubit may be capacitively coupled to the resonator center conductor 202 at different positions along its length. In one or more embodiments, the gate 204 and the gate voltage tunable electronic system 206 are separated by an insulator material or a vacuum. In an embodiment, the gate 204 may only overlap a portion of the gate voltage tunable electronic system 206. In an embodiment, the gate 204 may not overlap the resonator center conductor 202.

[0062] In a particular embodiment, possible superconducting materials for forming the resonator center conductor 202 or the gate 204 include one or more of aluminum, indium, niobium, niobium titanium nitride, niobium diselenide, tantalum, titanium, or molybdenum rhenium. In a particular embodiment, possible metallic or conductive gate materials for forming the gate 204 include gold, platinum, palladium, gold alloys (such as palladium gold), copper, or graphite. It should be understood that the foregoing is a non-exhaustive list of possible superconducting materials and metallic materials, and in other embodiments, other suitable superconducting materials or metallic materials may be used.

[0063] In one embodiment, a gate voltage is applied to the metal gate 204 to cause a controllable change in the critical current within the JJ switch 208, and thereby further cause a change in the Josephson inductance of the JJ switch 208. The change in the Josephson inductance further causes a change in the characteristic frequency of the resonator including the center conductor 202, which further changes the coupling strength between two or more superconducting devices coupled to the resonator center conductor 202. Thus, the gate voltage can be configured to tune the Josephson inductance and thus be capable of detuning the resonator including the center conductor 202 to change the coupling strength between superconducting devices, for example, between a strong coupling state and a weak coupling (or decoupled) state.

[0064] Reference Figure 3 , which depicts an exemplary shunt-gate tunable coupled resonator according to an illustrative embodiment. The top view 300 depicts a shunt-tunable superconducting resonator structure having a resonator center conductor 302 made of a superconducting material, with one end connected to a first coupling pad 304A and the other end connected to a second coupling pad 304B. The resonator center conductor 302 is connected to a shunt portion 306 that couples the resonator center conductor 302 to a ground plane 308. In one embodiment, the resonator center conductor 302 and the shunt portion 306 can be formed from a continuous sheet of the same superconducting material. A JJ switch 314 is integrated within the shunt portion 306 to controllably shunt the resonator based on the gate voltage applied to the gate 310 of the integrated JJ switch 314. In a particular embodiment, the ground plane 308 is a superconducting ground plane formed from a superconducting material. In other embodiments, other gates and qubit structures can be used, and one or more JJ switches can be integrated into the resonator center conductor 302 and / or the shunt portion 306 at any suitable location along their respective lengths. In a particular embodiment, one JJ switch is integrated within the resonator center conductor 302 and the shunt portion 306 does not contain a JJ switch.

[0065] In some embodiments, the ground plane 308 can be constructed such that the resonator includes a coplanar waveguide. In this geometry, the ground plane is separated from the resonator center conductor 302 and the shunt 306 by a certain distance on either side, and this distance is invariant along the length of the resonator. The dimensions are typically guided by the design specifications of a transmission line having a 50-ohm impedance in the frequency range of 1 MHz - 20 GHz. In Figure 3 the illustrated embodiment, this ground plane geometry is not shown for clarity. In Figure 3 the particular embodiment shown, the resonator center conductor 302 is shown in a meandering structure. In other particular embodiments, the resonator center conductor 302 can be in a straight configuration or any other suitable resonator configuration.

[0066] In Figure 3In the specific embodiment shown, the shunt portion 306 is shown in a straight configuration. In other specific embodiments, the shunt portion 306 can be a meandering configuration of any other suitable configuration. In other specific embodiments, the length of the shunt portion 306 can be much longer than that shown in Figure 3 , and in other specific embodiments, the length of the shunt portion 306 can be no longer than the length necessary to integrate the JJ switch (e.g., approximately the length of the JJ switch). In other embodiments, the shunt portion 306 can be connected to the resonator center conductor 302 at a location different from that shown in Figure 3 .

[0067] The first coupling pad 304A is configured to capacitively couple a first qubit 312A to the resonator center conductor 302, and the second coupling pad 304B is configured to capacitively couple a second qubit 312B to the resonator center conductor 302. In other embodiments, the first coupling pad 304A is configured to capacitively couple the qubit 312A to the resonator center conductor 302, and the second coupling pad 304B is configured to capacitively couple to another device. In some embodiments, the first coupling pad 304A is configured to capacitively couple the qubit 312A to the resonator center conductor 302, and the second coupling pad 304B is directly coupled to the readout measurement circuit, for example, using wire bonding or bump bonding.

[0068] In one embodiment, a gate voltage is applied to the gate 310 of the integrated JJ switch 314 to cause a controllable change in the critical current of the junction and thus further cause a change in the Josephson inductance L J . The change in the Josephson inductance L J further causes a change in the characteristic frequency of the resonator including the center conductor 302, which further changes the coupling strength between the first qubit 312A and the second qubit 312B. Thus, the gate voltage is configurable to tune the Josephson inductance L j and thus capable of detuning the frequency of the resonator including the center conductor 302 to change the coupling strength between the first qubit 312A and the second qubit 312B.

[0069] Referring to Figure 4 , this figure depicts an exemplary inline integration of a gate voltage tunable electronic system integrated with a superconducting coupled resonator according to an illustrative embodiment. The top view 400 depicts the integrated "T" shaped gate voltage tunable electronic system 414 and the superconducting coupled resonator structure having a gate 402 disposed adjacent to and perpendicular to a portion of the JJ switch 404. The JJ switch 404 is coupled between two portions of a resonator center conductor 408 made of a superconducting material.

[0070] A portion of the gate 402 is close to the first ground plane 410A, and the shunt portion 406 of the electronic system 414 is coupled to the second ground plane 410B. In a particular embodiment, the first ground plane 410A and the second ground plane 410B are each superconducting ground planes formed of a superconducting material. In a particular embodiment, the shunt portion 406 of the electronic system 414 has a resistance less than or approximately equal to 1 kiloohm (Kohm). The resonator center conductor 408 is capacitively coupled to the first qubit 412A at one end and capacitively coupled to the second qubit 412B at the other end.

[0071] Embodiments of the present invention are flexible in implementing the shunt electronic system 406. In some embodiments, the geometry of the shunt portion 406 and the ground plane 410B can be selected to determine the resistance of the shunt portion 406. Although the ground plane 410B is shown as having a cutout rectangular portion near the shunt 406, in some embodiments, the ground plane 410B may not have this cutout portion. In some embodiments, due to the proximity effect from the ground plane 410B and the resonator center conductor 408, the shunt portion of the electronic system 414 is superconducting. In some embodiments, the shunt portion 406 connects the ground plane 410B to the resonator center conductor 408 at a location different from the JJ switch 404, such that the shunt portion 406 and the JJ switch 404 comprise two different electronic systems.

[0072] In one embodiment, the gate 402 and the JJ switch 404 are configured to cause a controllable change in the critical current of the JJ switch 404, and thereby cause a change in the Josephson inductance L J of the JJ switch 404. The change in the Josephson inductance L J further causes a change in the characteristic frequency of the resonator in the structure 400, which further changes the coupling strength between superconducting devices (such as qubit 412A and qubit 412B) coupled to the device. In other embodiments, other gates and gate-tunable electronic systems can be used, and the gate structure can gate all or part of the gate-tunable electronic system.

[0073] Reference Figure 5, this figure depicts an example implementation of a gate voltage tunable electronic system integrated with a superconducting resonator in an SCA arrangement according to an illustrative embodiment. The top view 500 depicts a plurality of qubits 502 formed in a lattice pattern on a planar two-dimensional (2D) grid. The qubits are coupled to and communicate with each other using resonator lines 504 (also referred to as "buses"). The quantum states of the qubits 502 are read using read lines 506, 506A capacitively coupled to a particular qubit. Each of the read lines 506A further includes an integrated gate / JJ switch 508 disposed proximate thereto to form a gate voltage tunable electronic system integrated with a superconducting resonator as described, for example, herein with respect to various embodiments.

[0074] In the illustrated embodiment, each of the read lines 506A and the corresponding integrated gate / JJ switch 508 form a gate tunable readout resonator configured to receive a separately controllable gate voltage to permit controlled coupling and decoupling of a particular qubit 502 from the read line 506. In one or more embodiments, the separately gated portion of the gate tunable readout resonator provides the ability to multiplex readout of the qubits 502 through the tunable readout resonator.

[0075] Reference Figure 6 , this figure depicts a cross-sectional view of a gate voltage tunable electronic system integrated with a superconducting resonator device structure 600 according to an illustrative embodiment. The structure 600 includes an insulating substrate structure 602 having first and second portions of superconducting material 604 formed on a surface (e.g., top surface) of the insulating substrate structure 602. In a particular embodiment, the insulating substrate structure 602 may be formed of any suitable substrate material, such as silicon (Si) or sapphire.

[0076] The structure 600 further includes a layer of semiconductor material 606 disposed on the surface of the insulating substrate structure 602 between the first and second portions of the superconducting material 604. In Figure 6 the illustrated embodiment, portions of the superconducting material 604 overlap portions of the semiconductor material layer 606. In a particular embodiment, the semiconductor material layer 606 is formed of indium arsenide (InAs) material. The junctions of the first and second portions of the superconducting material 604 with the semiconductor material layer 606 together form a gate voltage tunable electronic system such as a JJ switch.

[0077] The structure 600 further includes an insulator layer 608 deposited on the exposed portion of the semiconductor material layer 606 and the overlapping portion of the superconducting material 604. In a particular embodiment, the insulator layer 608 is formed of an oxide material. The structure 600 further includes a gate material 610 deposited on the insulator layer 608, which forms a gate of a gate voltage tunable electronic system integrated with the superconducting resonator device. In a particular embodiment, possible metal or conductive gate materials that can form the gate material 610 include gold, platinum, palladium, gold alloys (e.g., palladium gold), copper, or graphite. In a particular embodiment, possible superconducting materials that can form the superconducting material 604 or the gate material 610 include aluminum, indium, niobium, niobium nitride, niobium titanium nitride, niobium diselenide, tantalum, titanium, or molybdenum rhenium. It should be understood that the foregoing is a non-exhaustive list of possible superconducting materials and metal materials, and in other embodiments, other suitable superconducting materials or metal materials may be used. It should also be understood that the insulator 608 is optional and may be absent according to a particular embodiment.

[0078] In one embodiment, a gate voltage is applied to the gate material 610 to cause a controllable change in the critical current within the superconductor / semiconductor junction, and thereby further cause a change in the Josephson inductance L j . The change in the Josephson inductance L J further results in a change in the characteristic frequency of the resonator in the structure 600, which further changes the coupling strength between superconducting devices (e.g., qubits) coupled to the device.

[0079] Referring Figure 7 , this figure depicts a cross-sectional view of a gate voltage tunable electronic system integrated with a superconducting resonator device structure 700 according to another illustrative embodiment. The structure 700 includes a molecular beam epitaxy (MBE) grown heterostructure. The structure 700 includes a first barrier layer 702 having a quantum well layer 704 formed on the surface (e.g., top surface) of the first barrier layer 702.

[0080] The structure 700 further includes first and second portions of a superconducting material 706 formed on the surface (e.g., top surface) of the quantum well layer 704 and a second barrier layer 708 disposed on the surface of the quantum well layer 704 between the first and second portions of the superconducting material 706.

[0081] In some embodiments, the superconducting material 706 may not be disposed on the surface of the quantum well layer 704, but may be formed in another suitable manner. For example, the superconductor 706 may extend into the quantum well 704, or the bottom surface of the superconductor 706 may be disposed slightly above the quantum well in the barrier 708. Additionally, although the bottom surface of the superconductor 706 in 700 is depicted as flat, this may not be the case in some embodiments. For example, the superconductor 706 may contact the quantum well 704 in a spatially non-uniform manner, or as part of the manufacturing process, superconducting material from the superconductor 706 may partially migrate into the quantum well 704.

[0082] In the illustrated embodiment, the first barrier layer 702, the quantum well layer 704, and the second barrier layer 708 form a quantum well. A quantum well is a potential well with discrete energy values, which causes quantum confinement. In various embodiments, one or more of the first barrier layer 702, the quantum well layer 704, and the second barrier layer 708 are formed using an MBE process. In a specific instance, the quantum well layer 704 is formed of InAs material, and the first barrier layer 702 and the second barrier layer 708 are formed of InGaAs material. In another specific example, the quantum well layer 704 is formed of Ge material, and the first barrier layer 702 and the second barrier layer 708 are formed of SiGe material.

[0083] In other specific embodiments, possible materials for the quantum well layer 704, the first barrier layer 702, and the second barrier layer 708 may include:

[0084]

[0085]

[0086] In Figure 7 the illustrated embodiment, the junctions of the first and second portions 706 of the superconducting material, the first barrier layer 702, the quantum well layer 704, and the second barrier layer 708 together form a gate-tunable electronic system such as a JJ switch.

[0087] The structure 700 further includes an insulating layer 710 deposited on the exposed portion of the second barrier layer 708 and the overlapping portion of the superconducting material 706. In a specific embodiment, the insulating layer 710 is formed of an oxide material. The structure 700 further includes a gate material 712 deposited on the insulating layer 710, which forms the gate of a gate voltage-tunable electronic system integrated with a superconducting resonator device.

[0088] In one embodiment, a gate voltage is applied to the gate material 712 to cause a controllable change in the critical current within the superconductor / semiconductor junction, and thereby further cause a change in the Josephson inductance L j of. The Josephson inductance L JThe change further results in a change in the characteristic frequency of the resonator in structure 700, which further changes the coupling strength between superconducting devices (such as qubits) coupled to the device. It should be understood that insulator 710 is optional and may be absent according to a particular embodiment.

[0089] In some embodiments, the structure in 700 may include dopants or atoms inserted at certain positions in the structure. For example, when zero voltage is applied to gate 712, dopants can be used to control the carrier density in the JJ switch. Thus, dopants can be used to control the range of gate voltages required to operate the switch. In some embodiments, the dopants can be arranged in thin layers in barrier 702 and / or barrier 708 at a constant distance from quantum well 704 (e.g., a δ-doping scheme).

[0090] In some embodiments, a quantum well can also be formed at the interface between two completely different semiconductors. For example, both barrier layer 708 and quantum well 704 can be composed of the same semiconductor (such as GaAs), while barrier layer 702 can be composed of a different semiconductor (such as AlGaAs). Additionally, a δ-doped layer can be present in barrier layer 702. In this case, the quantum well can be formed in quantum well layer 704 near the interface with barrier layer 702.

[0091] Reference Figure 8 , which depicts a cross-sectional view of a gate voltage tunable electronic system integrated with a superconducting resonator device structure 800 according to another illustrative embodiment. Structure 800 includes a MBE-grown quantum well heterostructure with MBE-grown superconducting contacts. Structure 800 includes a first barrier layer 802 having a quantum well layer 804 formed on the surface (e.g., the top surface) of the first barrier layer 802.

[0092] Structure 800 further includes a second barrier layer 806 disposed on the surface of quantum well layer 804 and first and second portions of superconducting material 808 formed on the surface (e.g., the top surface) of the second barrier layer 806. In the illustrated embodiment, the first and second portions of superconducting material 808 are formed on the second barrier layer 806 using an epitaxial process.

[0093] In the illustrated embodiment, the first barrier layer 802, quantum well layer 804, and second barrier layer 806 form a quantum well. In various embodiments, one or more of the first barrier layer 802, quantum well layer 804, and second barrier layer 806 are formed using an MBE process. In a particular instance, quantum well layer 804 is formed of InAs material, and the first barrier layer 802 and the second barrier layer 806 are formed of InGaAs material. In another particular example, quantum well layer 804 is formed of Ge material, and the first barrier layer 802 and the second barrier layer 806 are formed of SiGe material.

[0094] The junctions of the first and second portions of the superconducting material 808, the first barrier layer 802, the quantum well layer 804, and the second barrier layer 806 together form a gate-tunable electronic system, such as a JJ switch.

[0095] The structure 800 also includes an insulating layer 810 deposited on the exposed portion of the second barrier layer 806 and the first and second portions of the superconducting material 808. In a particular embodiment, the insulating layer 810 is formed of an oxide material. The structure 800 also includes a gate material 812 deposited on the insulator layer 810, which forms the gate of a gate voltage-tunable electronic system integrated with the superconducting resonator device. It should be understood that the insulator 810 is optional and may be absent according to a particular embodiment.

[0096] In one embodiment, a gate voltage is applied to the gate material 812 to cause a controllable change in the critical current within the superconductor / semiconductor junction, thereby further causing a change in the Josephson inductance L j of. The change in the Josephson inductance L J further results in a change in the characteristic frequency of the resonator in the structure 800, which further changes the coupling strength between superconducting devices (such as qubits) coupled to the device.

[0097] In some embodiments, the structure in 800 may include dopants or atoms inserted at certain locations within the structure. For example, when zero voltage is applied to the gate 812, dopants can be used to control the carrier density in the JJ switch. Thus, dopants can be used to control the range of gate voltages required to operate the switch. In some embodiments, the dopants may be disposed in a thin layer in the barrier layer 802 and / or the barrier layer 806 at a constant distance from the quantum well 804 (e.g., a δ-doping scheme).

[0098] In some embodiments, the quantum well may also be formed at the interface between two completely different semiconductors. For example, both the barrier layer 806 and the quantum well 804 may be composed of the same semiconductor (such as GaAs), while the barrier layer 802 may be composed of a different semiconductor (such as AlGaAs). Additionally, a δ-doped layer may be present in the barrier layer 802. In this case, the quantum well may be formed in the quantum well layer 804 near the interface with the barrier layer 802.

[0099] Reference Figure 9, which depicts a cross-sectional view of a gate voltage tunable electronic system integrated with a superconducting resonator device structure 900 according to another illustrative embodiment. Structure 900 includes a semiconductor substrate structure 902 having first and second portions of superconducting material 904 formed on a surface (e.g., top surface) of the semiconductor substrate structure 902. In a particular embodiment, the semiconductor substrate structure 902 is an adjacent semiconductor substrate formed of a semiconductor material such as Si. The first and second portions of superconducting material 904 together with the junction of the semiconductor substrate layer 902 form a gate tunable electronic system, such as a JJ switch.

[0100] Structure 900 further includes an insulator layer 906 deposited on an overlapping portion of an exposed portion of the semiconductor substrate layer 902 and a portion of the superconducting material 904. In a particular embodiment, the insulator layer 906 is formed of an oxide material. Structure 900 further includes a gate material 908 deposited on the insulator layer 906, forming a gate of the gate voltage tunable electronic system integrated with the superconducting resonator device. In a particular embodiment, possible metal or conductive gate materials that can form the gate material 908 include gold, platinum, palladium, gold alloys (e.g., palladium gold), copper, or graphite. In a particular embodiment, possible superconducting materials that can form the superconducting material 904 or the gate material 908 include aluminum, indium, niobium, niobium nitride, niobium titanium nitride, niobium diselenide, tantalum, titanium, or molybdenum rhenium. It should be understood that the foregoing is a non-exhaustive list of possible superconducting materials and metal materials, and in other embodiments, other suitable superconducting materials or metal materials may be used. It should also be understood that the insulator 908 is optional and may be absent according to a particular embodiment.

[0101] In one embodiment, a gate voltage is applied to the gate material 908 to cause a controllable change in the critical current within the superconductor / semiconductor junction, thereby further causing a change in the Josephson inductance L j of. The change in the Josephson inductance L J further results in a change in the characteristic frequency of the resonator in structure 900, which further alters the coupling strength between superconducting devices (e.g., qubits) coupled to the device.

[0102] Reference Figure 10 , which depicts a cross-sectional view of a gate voltage tunable electronic system integrated with a superconducting resonator device structure 1000 according to an illustrative embodiment. Structure 1000 includes an insulating substrate structure 1002 having a graphene layer 1004 formed of graphene material, the graphene layer being disposed on a portion of a surface (e.g., top surface) of the insulating substrate structure 1002. In a particular embodiment, the insulating substrate structure 1002 is formed of silicon. In a particular embodiment, the insulating substrate material may be silicon, with a boron nitride material disposed on a portion of its surface and beneath the graphene layer 1004.

[0103] Structure 1000 also includes first and second portions of superconducting material 1006 formed on the surface of insulating substrate structure 1002 and a portion of graphene layer 1004, where graphene layer 1004 is disposed between the first and second portions of superconducting material 1006. The junctions of the first and second portions of superconducting material 1006 with graphene layer 1004 together form a gate-tunable electronic system such as a JJ switch.

[0104] Structure 1000 also includes insulating layer 1008 deposited on an overlapping portion of the exposed portion of graphene layer 1004 and a portion of superconducting material 1006. In a particular embodiment, insulating layer 1008 is formed of an oxide material. In a particular embodiment, insulator layer 1008 is a boron nitride material. Structure 1000 also includes gate material 1010 deposited on insulator layer 1008, which forms the gate of a gate voltage-tunable electronic system integrated with a superconducting resonator device. In a particular embodiment, possible metallic or conductive gate materials that may form gate material 1010 include gold, platinum, palladium, gold alloys (e.g., palladium gold), copper, or graphite. In a particular embodiment, possible superconducting materials that may form superconducting material 1006 or gate material 1010 include aluminum, indium, niobium, niobium nitride, niobium titanium nitride, niobium diselenide, tantalum, titanium, or molybdenum rhenium. It should be understood that the foregoing is a non-exhaustive list of possible superconducting and metallic materials, and in other embodiments, other suitable superconducting or metallic materials may be used.

[0105] In one embodiment, a gate voltage is applied to gate material 1010 to cause a controllable change in the critical current within the superconductor / graphene junction, and thereby further cause a change in Josephson inductance L j of. The change in Josephson inductance L J further results in a change in the characteristic frequency of the resonator in structure 1000, which further alters the coupling strength between superconducting devices (e.g., qubits) coupled to the device.

[0106] In other particular embodiments, layer 1004 may include a thin film material such as one or more of Bi2Te3, Bi2Se3, Sb2Te3, Sb2Se3. In a particular embodiment, layer 1004 may be single-layer graphene or bilayer graphene.

[0107] Reference Figure 11, which depicts an example implementation of a gate voltage tunable electronic system integrated with a superconducting resonator in a multi - qubit device architecture according to an illustrative embodiment. The top - view 1100 depicts a plurality of qubits 1102A - 1102D formed in a lattice pattern on a planar two - dimensional (2D) grid. In some embodiments, the qubits 1102A - 1102D are transmon qubits. The readout lines 1104, capacitively coupled to a particular qubit, are used to read the quantum states of the qubits 1102A - 1102D. The qubits are coupled to each other and communicate using a resonator line 1106 (also referred to as a “bus”).

[0108] The resonator line 1106 may also include a shunt 1108 coupled thereto, including JJ switches 1112 and gates 1110 disposed proximate the respective JJ switches 1112 to form, for example, a gate - tunable resonator as described herein with respect to various embodiments. In the illustrated embodiment, each of the switches 1112 and the corresponding gates 1110 are configured to receive separately controllable gate voltages to permit controlled coupling and decoupling of pairs of qubits 1102A - 1102D. In one or more embodiments, the individually gated portions of the gate - tunable resonator provide the ability to gradually tune the coupling between nearest - neighbor qubits. In one or more embodiments, the individually gated portions of the gate - tunable resonator provide the ability to turn off qubits having undesirable transition frequencies. In one or more embodiments, the individually gated portions of the gate - tunable resonator provide a novel quantum - gate hardware approach with a tunable coupling strength between the gates and qubits that is faster.

[0109] Various embodiments of the present invention are described herein with reference to the related drawings. Alternative embodiments may be devised without departing from the scope of the present invention. Although various connection and positional relationships between elements (e.g., above, below, adjacent, etc.) are set forth in the following description and the drawings, those skilled in the art will recognize that many of the positional relationships described herein are orientation - independent when the described functions are maintained even when the orientation is changed. Unless otherwise specified, these connections and / or positional relationships may be direct or indirect, and the present invention is not intended to be limited in this regard. Thus, the coupling of entities may refer to direct or indirect coupling, and the positional relationship between entities may be direct or indirect positional relationship. As an example of an indirect positional relationship, the formation of layer “A” on layer “B” as mentioned in this specification includes the case where one or more intermediate layers (e.g., layer “C”) are between layer “A” and layer “B”, provided that the relevant characteristics and functions of layer “A” and layer “B” are not substantially changed by the (multiple) intermediate layers.

[0110] The following definitions and abbreviations are used to explain the claims and the specification. As used herein, the terms "comprising", "comprises", "including", "includes", "having", "has", "containing", "contains", "covering", or any other variation thereof are intended to cover a non-exclusive inclusion. For example, a composition, mixture, process, method, article, or apparatus that comprises a series of elements is not necessarily limited to those elements, but may include other elements not expressly listed or inherent to such composition, mixture, process, method, article, or apparatus.

[0111] Additionally, the term "exemplary" is used herein to mean "serving as an example, instance, or illustration". Any embodiment or design described herein as "exemplary" is not necessarily to be construed as more preferred or advantageous than other embodiments or designs. The terms "at least one" and "one or more" are understood to include any integer greater than or equal to one, i.e., one, two, three, four, etc. The term "plurality" shall be understood to include any integer greater than or equal to two, i.e., two, three, four, five, etc. The term "connected" may include indirect "connection" and direct "connection".

[0112] References in the specification to "one embodiment", "an embodiment", "example embodiment", etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but each embodiment may or may not include that particular feature, structure, or characteristic. Moreover, these phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is within the knowledge of those skilled in the art to effect such feature, structure, or characteristic in connection with other embodiments, whether or not explicitly described.

[0113] The terms "about", "substantially", "approximately", and variations thereof are intended to include the degree of error associated with a measurement of a particular quantity based on the equipment available at the time of filing this application. For example, "about" may include a range of ±8% or 5% or 2% of a given value.

[0114] The description of the various embodiments of the invention has been presented for purposes of illustration, but is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terms used herein were chosen to best explain the principles of the embodiments, the practical application, or the technical improvement present in the marketplace, or to enable other ordinary skilled artisans in the art to understand the embodiments described herein.

Claims

1. A superconducting coupling device, comprising: A resonator structure having a first end configured to be coupled to a first device and a second end configured to be coupled to a second device; A gate voltage tunable electronic system coupled to the resonator structure; And A gate having a gate material deposited on an insulating layer and positioned close to a part of the gate voltage tunable electronic system, the gate voltage tunable electronic system and the gate being configured to interrupt the resonator structure at one or more predetermined positions to form a switch, the gate being configured to receive a gate voltage and change the inductance of the gate voltage tunable electronic system based on the gate voltage, the change in the inductance causing the resonator structure to change the coupling strength between the first device and the second device.

2. The superconducting coupling device according to claim 1, wherein the change in the inductance is the result of the gate changing the critical current of the gate voltage tunable electronic system.

3. The superconducting coupling device according to claim 1, wherein the change in the inductance causes a change in the characteristic frequency of the resonator structure.

4. The superconducting coupling device according to claim 3, wherein the change in the characteristic frequency of the resonator structure enables the coupling strength between the first device and the second device to be changed.

5. The superconducting coupling device according to claim 1, wherein the gate voltage is configured to change the switch between a low inductance state with a high critical current and a high inductance state with a low critical current.

6. The superconducting coupling device according to claim 1, wherein at least a part of the resonator structure is formed of a superconducting material.

7. The superconducting coupling device according to claim 1, wherein the gate is formed of a metal material or a superconducting material.

8. The superconducting coupling device according to claim 1, wherein the first device is capacitively coupled to the first end of the resonator structure, and the second device is capacitively coupled to the second end of the resonator structure.

9. The superconducting coupling device according to claim 1, further comprising a ground plane coupled to the resonator structure through a shunt portion of the resonator structure.

10. The superconducting coupling device according to claim 9, wherein the shunt portion of the resonator structure includes the gate voltage tunable electronic system.

11. The superconducting coupling device according to claim 1, wherein the gate voltage tunable electronic system is coupled between a first part of the resonator structure and a second part of the resonator structure.

12. The superconducting coupling device according to claim 1, further comprising a substrate structure, wherein the gate voltage tunable electronic system is disposed on the surface of the substrate structure.

13. The superconducting coupling device according to claim 12, further comprising an insulator disposed on the gate voltage tunable electronic system, wherein the gate is disposed on the insulator.

14. The superconducting coupling device according to claim 12, wherein the gate voltage tunable electronic system comprises a quantum well material disposed between a first barrier material and a second barrier material.

15. The superconducting coupling device according to claim 1, wherein, The gate voltage tunable electronic system comprises at least one of a semiconductor material or a graphene material.

16. The superconducting coupling device according to claim 1, wherein the first device is a first qubit and the second device is a second qubit.

17. A method, comprising: coupling a first end of a resonator structure to a first device; coupling a second end of the resonator structure to a second device; coupling a gate voltage tunable electronic system to the resonator structure; positioning a gate proximate to a portion of the gate voltage tunable electronic system, the gate having a gate material deposited on an insulating layer; interrupting the resonator structure at one or more predetermined locations by the gate voltage tunable electronic system and the gate to form a switch; receiving a gate voltage through the gate; and changing an inductance of the gate voltage tunable electronic system based on the gate voltage, the change in the inductance causing the resonator structure to change a coupling strength between the first device and the second device.

18. The method according to claim 17, wherein the change in the inductance is a result of the gate changing a critical current of the gate voltage tunable electronic system.

19. The method according to claim 17, wherein the change in the inductance induces a change in a characteristic frequency of the resonator structure.

20. The method according to claim 19, wherein the change in the characteristic frequency of the resonator structure enables a change in the coupling strength between the first device and the second device.

21. A superconductor manufacturing system, comprising a lithography component, the superconductor manufacturing system performing operations including the following when operating on a mold to manufacture a superconductor device: coupling a first end of a resonator structure to a first device; coupling a second end of the resonator structure to a second device; coupling a gate voltage tunable electronic system to the resonator structure; positioning a gate proximate to a portion of the gate voltage tunable electronic system, the gate having a gate material deposited on an insulating layer; interrupting the resonator structure at one or more predetermined locations by the gate voltage tunable electronic system and the gate to form a switch, the gate being configured to receive a gate voltage and change an inductance of the gate voltage tunable electronic system based on the gate voltage, the change in the inductance causing the resonator structure to change a coupling strength between the first device and the second device.

22. The superconductor manufacturing system according to claim 21, wherein the change in the inductance is a result of the gate changing a critical current of the gate voltage tunable electronic system.

23. The superconductor manufacturing system according to claim 22, wherein the change in the inductance causes a change in a characteristic frequency of the resonator structure.

24. The superconductor manufacturing system according to claim 23, wherein the change in the characteristic frequency of the resonator structure enables a change in the coupling strength between the first device and the second device.

25. The superconductor manufacturing system according to claim 21, wherein the gate voltage is configured to change the switch between a low inductance state having a high critical current and a high inductance state having a low critical current.

Images