Tin oxide mandrel in patterning

Abstract

Tin oxide films are used as mandrels in semiconductor device manufacturing. In one implementation, the process begins by providing a substrate having a plurality of protruding tin oxide features (mandrels) present on an exposed etch stop layer. Next, a conformal spacer material layer is formed on both the horizontal surface and the sidewalls of the mandrel. The spacer material is then removed from the horizontal surface, thereby exposing the tin oxide material of the mandrel without completely removing the spacer material present on the sidewalls of the mandrel (e.g., leaving at least 50%, such as at least 90%, of the height initially on the sidewall). Next, the mandrel is selectively removed (e.g., using a hydrogen-based etching chemistry) while retaining the spacer material present on the sidewalls of the mandrel. The resulting spacer can be used to pattern the etch stop layer and the underlying layer.

Description

[0001] This application is a divisional application of application number 201980010832.2, application date January 29, 2019, and invention name “Tin Oxide Mandrel in Patterning”.

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS

[0003] This application claims the benefit of U.S. Provisional Patent Application No. 62 / 655,678, filed on April 10, 2018, entitled “Tin Oxide Mandrels in Patterning,” with Yu et al. as inventors, and U.S. Provisional Patent Application No. 62 / 624,066, filed on January 30, 2018, entitled “Spacer formation Using Tin Oxide Mandrels,” with Tan et al. as inventors, the entire contents of which are incorporated herein by reference. Technical Field

[0004] The present invention relates to methods of semiconductor device fabrication. In particular, embodiments of the present invention relate to methods of using tin oxide films in semiconductor processing. Background Art

[0005] In integrated circuit (IC) manufacturing, deposition and etching techniques are used to form patterns of materials, such as for forming metal lines embedded in dielectric layers. Some patterning schemes involve the use of spacers that enable precise patterning and formation of small-scale features. The spacers are formed on the substrate so that they are separated by a defined distance (usually determined by previous patterning) and are used as a mask for patterning of the underlying layers. The materials of the spacers and surrounding layers are selected to have appropriate etch selectivity, which will enable the formation of the spacers and the underlying layer patterning. After patterning is completed, the spacers are removed by etching, and the spacers are not part of the final manufactured semiconductor device.

[0006] Spacers are used for patterning in a variety of applications, including forming dynamic random access memory (DRAM), patterning fins in fin field effect transistors (finFETs), and back-end-of-line (BEOL) processing.

[0007] The spacers may be formed on the semiconductor substrate using a patterning process involving mandrels - larger raised features that act as supports for the spacers, which are then selectively removed by an etching process, leaving the spacers on the substrate.

[0008] The background description provided here is for the purpose of generally presenting the context of the present disclosure. Work by the presently designated inventors to the extent described in this background section and in aspects of the description that could not be determined as prior art at the time of filing the application is neither explicitly nor implicitly admitted to be prior art against the present disclosure. Summary of the invention

[0009] Tin oxide is used as a mandrel material in the patterning of semiconductor substrates. The patterning method provided herein can achieve a high degree of control over the spacer and mandrel geometry and achieve high efficiency.

[0010] On the one hand, a method for processing a semiconductor substrate using a tin oxide mandrel is provided. In some embodiments, the method includes: (a) providing a semiconductor substrate having a plurality of tin oxide protruding features (mandrels) present on an etch stop layer (ESL); (b) forming a spacer material layer on both the horizontal surface and the sidewall of the tin oxide protruding features; and (c) removing the spacer material from the horizontal surface of the tin oxide protruding features to expose the underlying tin oxide without completely removing the spacer material on the sidewall of the tin oxide protruding features. In some embodiments, the treatment also includes the following operations: removing the tin oxide protruding features without completely removing the spacer material previously present on the sidewall of the tin oxide protruding features, thereby forming a plurality of spacers present above the etch stop layer. In some embodiments, after removing the tin oxide protruding features, the method then etches the etch stop layer in the presence of the plurality of spacers.

[0011] In some embodiments, the spacer material is a silicon-containing material (e.g., silicon oxide, silicon nitride, silicon carbide, SiOC, SiNO, SiCNO, or SiCN) or titanium dioxide. In one implementation, the spacer material is titanium dioxide and the etch stop layer comprises a silicon-containing material. In other embodiments, the spacer material is silicon oxide and the etch stop layer comprises tungsten.

[0012] The spacer etch chemistry used in operation (c) can vary depending on the chemical nature of the spacer material. In some embodiments, the spacer material is a silicon-containing material, and removing the spacer material from the horizontal surface in (c) includes etching the spacer material using a fluorine-based etch chemistry. In other embodiments, the spacer material is titanium dioxide, and removing the spacer material from the horizontal surface in (c) includes etching the spacer material using a chlorine-based etch chemistry.

[0013] In some embodiments, after the spacer material has been removed from the horizontal surfaces and the tin oxide has been exposed, the processing continues by: (d) removing the tin oxide protruding features (spindles) without completely removing the spacer material previously present on the sidewalls of the tin oxide protruding features, thereby forming a plurality of spacers present above the etch stop layer, wherein the tin oxide protruding features are removed using a hydrogen-based etch chemistry, thereby resulting in the formation of tin hydrides. In some implementations, removing the tin oxide protruding features includes: contacting the semiconductor substrate with a plasma-activated hydrogen-containing reactant selected from the group consisting of H2, HBr, NH3, H2O, hydrocarbons, and combinations thereof.

[0014] Several different processing flows can be used to form the semiconductor substrate with multiple tin oxide protrusion features provided in operation (a). In one implementation, forming multiple tin oxide protrusion features on the semiconductor substrate is achieved by patterning a flat (covering) tin oxide layer. In another embodiment, forming multiple tin oxide protrusion features includes: (i) forming multiple first mandrels (e.g., photoresist or other carbon-containing mandrels) on the semiconductor substrate; (ii) conformally depositing a tin oxide layer on the multiple first mandrels; and (iii) etching the deposited tin oxide layer from a horizontal surface and removing the multiple first mandrels to form the multiple tin oxide protrusion features on the semiconductor substrate provided in (a), wherein the multiple tin oxide protrusion features formed serve as second mandrels in subsequent operations (b)-(c).

[0015] In some embodiments, the first mandrels contain a carbon-containing material, such as a photoresist, diamond-like carbon, or amorphous carbon, and operation (iii) includes etching the deposited tin oxide layer from the horizontal surface using a hydrogen-based etching chemistry (e.g., using H2 or a hydrocarbon, such as CH4 or C2H2 as the hydrogen-containing gas) or a chlorine-based etching chemistry (e.g., using Cl2 and / or BCl3), and then removing the plurality of first mandrels using an oxygen-based etching chemistry.

[0016] In some embodiments, the provided method is used in conjunction with a photolithography process. For example, in some implementations, the process includes applying a photoresist to a semiconductor substrate, exposing the photoresist to light, patterning the photoresist and transferring the pattern to a substrate, and selectively removing the photoresist from the substrate. On the other hand, a system for processing a semiconductor substrate is provided. In some embodiments, the system includes: one or more deposition chambers; one or more etching chambers; and a system controller including program instructions for causing a series of operations. In some embodiments, the program instructions are used to: on a semiconductor substrate including a plurality of tin oxide protrusion features, cause a spacer material to be deposited on both the horizontal surface and the sidewall of the tin oxide protrusion feature; and cause the spacer material to be removed from the horizontal surface of the tin oxide protrusion feature to expose the underlying tin oxide without causing the spacer material on the sidewall of the tin oxide protrusion feature to be completely removed. The system controller may also include program instructions for causing removal of the tin oxide raised features without causing complete removal of the spacer material previously present on the sidewalls of the tin oxide raised features, thereby forming a plurality of spacers on the semiconductor substrate. The system controller may also include program instructions for causing deposition of a conformal tin oxide layer on a semiconductor substrate having a plurality of first mandrels, and then causing formation of the semiconductor substrate including the plurality of tin oxide raised features by removing the tin oxide material from a horizontal surface and by removing the first mandrels.

[0017] On the other hand, an etching apparatus is provided. In some embodiments, the etching apparatus includes: an etching process chamber having an inlet for a process gas; a substrate holder configured to hold a semiconductor substrate in the etching process chamber; and a process controller including program instructions for causing one or more operations. In some embodiments, the process controller includes program instructions for the following operations: causing etching of a spacer material layer of a plurality of tin oxide protrusion features coated on the semiconductor substrate, thereby completely removing the spacer material from the horizontal surface of the semiconductor substrate without completely removing the spacer material on the sidewalls of the plurality of tin oxide protrusion features. In some embodiments, the program instructions for causing etching of the spacer material include program instructions for causing etching of the spacer material layer using a fluorine-based etching chemistry, wherein the spacer material is a silicon-containing material.

[0018] In another aspect, an apparatus is provided, wherein the apparatus comprises a processing chamber and a controller having program instructions for causing any of the methods provided herein.

[0019] In another aspect, a partially fabricated semiconductor device is provided, wherein the partially fabricated semiconductor device includes a plurality of tin oxide raised features coated with a conformal spacer material layer.

[0020] These and other aspects of implementations of the subject matter described in this specification are set forth in the drawings and the description that follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figures 1A-1F A schematic cross-sectional view of a semiconductor substrate undergoing processing involving spacer formation is shown according to embodiments provided herein.

[0022] Figure 2 is a process flow chart of a method according to one embodiment provided herein.

[0023] Figure 3 is a process flow diagram of a method of forming a tin oxide mandrel according to embodiments provided herein.

[0024] Figures 4A-4E A schematic cross-sectional view of a semiconductor substrate being processed to form tin oxide mandrels according to an embodiment provided herein is shown.

[0025] Figures 5A-5C A schematic cross-sectional view of a semiconductor substrate being processed to form tin oxide mandrels according to an embodiment provided herein is shown.

[0026] Figure 6 is a process flow diagram of a method of forming a tin oxide mandrel according to embodiments provided herein.

[0027] FIG. 7A to FIG. 7G A schematic cross-sectional view of a semiconductor substrate undergoing processing according to embodiments provided herein is shown, illustrating the use of tin oxide spacers as second mandrels in a self-aligned quadruple patterning (SAQP) process.

[0028] FIG. 8A to FIG. 8F A schematic isometric view of a semiconductor substrate being processed according to embodiments provided herein is shown, illustrating the use of tin oxide spacers as second mandrels in a SAQP process.

[0029] Fig. 9 is a schematic diagram of an apparatus suitable for etching tin oxide using the etching chemistries provided herein.

[0030] Fig.10 A schematic diagram of a multi-station processing system according to an embodiment provided herein is shown. DETAILED DESCRIPTION

[0031] A method for using tin oxide films in semiconductor device manufacturing is provided. The method utilizes a variety of etching processes with adjustable etching rates and selectivities, which enables the integration of tin oxide films into processing schemes using a variety of materials, such as silicon-containing compounds (e.g., silicon oxide (SiO2), silicon carbide (SiC), silicon nitride (SiN), silicon oxycarbide (SiOC), silicon oxynitride (SiNO), silicon oxycarbonitride (SiCNO), and silicon carbonitride (SiCN)), elemental silicon (Si), carbon (including amorphous carbon and diamond-like carbon), photoresists, carbon-containing compounds (e.g., organic polymers, metal carbides, tungsten-containing carbon), metals (e.g., tungsten), metal oxides (e.g., titanium oxide, hafnium oxide, zirconium oxide, tantalum oxide), and metal nitrides (e.g., tantalum nitride (TaN) and titanium nitride (TiN)). In some embodiments, tin oxide is etched in the presence of any of these materials, wherein the etching selectivity is at least 10:1, such as at least 20:1. In some embodiments, any of these materials is etched in the presence of tin oxide with an etch selectivity of at least 10:1, such as at least 20:1. Selectivity refers to the ratio of the etch rates of the materials. For example, if the ratio of the etch rate of silicon oxide to the etch rate of tin oxide for a particular etch chemistry is at least 10:1, then silicon oxide is etched with a selectivity of at least 10:1 relative to tin oxide using that etch chemistry.

[0032] In the provided embodiments, tin oxide is used in a patterning process where the tin oxide film is used as a mandrel for spacer formation. For example, tin oxide can be a mandrel in self-aligned double patterning (SADP) or self-aligned quadruple patterning (SAQP). In combination with a selective etching process, tin oxide meets the stringent critical dimension (CD) / profile and selectivity requirements imposed by these applications. The etching process can be implemented on a variety of tools that allow plasma etching, such as the tin oxide provided by Lam Research Corporation. and Flex TM Implemented on etching tool.

[0033] Tin oxide can be selectively etched against various materials using a hydrogen-based etch, thereby converting the tin oxide into a volatile tin hydride product (e.g., tin tetrahydride). The term "tin hydride" as used herein includes a variety of tin hydrides (compounds having tin-hydrogen bonding) and is not limited to tin tetrahydride (SnH4). Terms such as "tin chloride" and "silicon fluoride" can similarly include a variety of chlorides and fluorides. Unlike many other metal hydrides, tin tetrahydride has a low boiling point and can therefore be easily removed from the processing chamber by scavenging and / or pumping, making hydrogen-based etching a particularly attractive process for selective tin oxide etching.

[0034] As used herein, tin oxide refers to a material comprising tin (Sn) and oxygen (O), and may optionally include hydrogen. As used herein, tin oxide may also contain small amounts of other elements, such as carbon and nitrogen (e.g., SnO x N y ), wherein the total amount of other elements is 10 atomic % or less (wherein hydrogen is not included in the calculation of the content). For example, tin oxide deposited by ALD may contain about 0.5-5 atomic % carbon. For example, tin oxide can be deposited by ALD, PECVD, or PVD. The stoichiometry of tin oxide can generally vary. In some embodiments, the atomic ratio of tin to oxygen is about 1:2 (SnO2). It should be understood that small deviations from the stoichiometry of tin to oxygen of 1:2 may exist in SnO2 and are within the range of the SnO2 structure. For example, in some examples of SnO2, the atomic ratio of O to Sn is between about 2.0-2.3. As used herein, tin oxide having a ratio of O to Sn of about 1.5-2.5 is within the range of SnO2 materials. The tin oxide materials described herein are different from indium tin oxide materials and other mixed metal oxides.

[0035] It should be understood that, unless otherwise specified, in other chemical compounds used herein, the stoichiometry may vary. For example, chemical formulas such as SiN and HfO specify elements that are present but not in stoichiometric amounts. In addition, it should be understood that the materials described herein may contain hydrogen (even if not specified in the chemical formula) and small amounts of dopants that are not explicitly listed in the chemical name (e.g., less than 10 atomic % of the dopant).

[0036] The term "semiconductor substrate" as used herein refers to a substrate containing semiconductor material at any location within a structure at any stage of semiconductor device manufacturing. It should be understood that the semiconductor material in the semiconductor substrate does not need to be exposed. A semiconductor wafer having multiple layers of other materials (e.g., dielectrics) covering the semiconductor material is an example of a semiconductor substrate. The following detailed description assumes that the disclosed implementation is implemented on a wafer. However, the disclosed implementation is not limited to this. The workpiece can have various shapes, sizes, and materials. In addition to semiconductor wafers, other workpieces that can utilize the disclosed implementation include various articles, such as printed circuit boards, etc.

[0037] Unless otherwise indicated, the term "about" when used in conjunction with a numerical value means within a range of 5% of the stated numerical value.

[0038] In some embodiments, the selective etching chemistry provided is used to remove certain materials or features on the substrate without removing other materials or features. As used herein, the etching chemistry "removes" the material or feature when at least 90% (e.g., 100%) (with reference to the thickness in the vertical direction) of the material or feature is removed. As used herein, the term "not removing" refers to retaining at least 50% of the material or feature (e.g., at least 80%) after etching, where % refers to the thickness in the vertical direction.

[0039] In some embodiments, the provided methods are used to remove material from the horizontal surface of a protruding feature without removing material present at the sidewalls of the protruding feature. It should be understood that a horizontal surface as used herein includes a surface having local deviations from a horizontal plane, such as a convex cap on the top of a protruding feature.

[0040] A variety of etching chemistries have been developed for selectively etching tin oxide in the presence of other materials, and for selectively etching other materials in the presence of tin oxide. Selective etching of tin oxide in the presence of another material is referred to as tin oxide etching, where the ratio of the etch rate of tin oxide to the etch rate of the other material is greater than 1, and where the other material and the tin oxide are exposed to the same etching chemistry at any time during the etching process. For example, the other material may be exposed at the beginning of the etching, or may be exposed during the etching process. The etch selectivity of selectively etching tin oxide in the presence of another material refers to the ratio of the etch rate of tin oxide to the etch rate of the other material for a given chemistry. For example, tin oxide can be selectively etched using a hydrogen-based etching chemistry in the presence of a silicon-containing compound, where the etch selectivity is greater than 50.

[0041] Similarly, selective etching of a material in the presence of tin oxide refers to such etching of the material wherein the ratio of the etch rate of the material to the etch rate of the tin oxide is greater than 1, and wherein the tin oxide is exposed to the same etching chemistry as the material being etched at any time during the etching process. For example, the tin oxide may be exposed at the beginning of the etching, or may be exposed during the etching process. The etch selectivity of the selective etching of a material in the presence of tin oxide refers to the ratio of the etch rate of the material to the etch rate of the tin oxide for a given chemistry. For example, carbon may be selectively etched using an oxygen-based etching chemistry in the presence of tin oxide, wherein the etch selectivity is greater than 50.

[0042] In some embodiments, a method for removing a tin oxide mandrel is provided. First, a semiconductor substrate is provided, wherein the semiconductor substrate includes a plurality of tin oxide protruding features (mandrels) and a spacer material layer, wherein the spacer material is present at the sidewalls of the tin oxide protruding features. Next, tin oxide is selectively etched in the presence of a second material using one of the selective tin oxide etching chemicals described herein. The tin oxide protruding features can be removed by these selective etchings without completely removing the spacer material previously present on the sidewalls, thereby forming a plurality of spacers.

[0043] In some embodiments, a method for removing a spacer material from a horizontal surface on a substrate is provided, wherein the spacer material is coated with a tin oxide mandrel. First, a semiconductor substrate is provided, wherein the semiconductor substrate includes a plurality of tin oxide protruding features (mandrels) and a conformal spacer material layer present on the horizontal surface and sidewalls of the tin oxide mandrel. Next, the spacer material is removed from the horizontal surface without completely removing the spacer material on the sidewalls and exposing the tin oxide. This step can be performed by any selective etching chemistry described herein that allows selective spacer material etching in the presence of tin oxide.

[0044] In some embodiments, a method for depositing a conformal spacer material layer on a plurality of tin oxide mandrels is provided. First, a semiconductor substrate is provided, wherein the semiconductor substrate includes a plurality of tin oxide mandrels. Next, a spacer material (e.g., a silicon-containing material) is deposited on the substrate so that it coats the mandrels on both the sidewalls and horizontal surfaces.

[0045] Hydrogen-based etching. In some embodiments, selective tin oxide etching is performed using hydrogen-based etching. Hydrogen-based etching involves exposing tin oxide to a hydrogen-containing reactant (usually under the condition of plasma activation of the reactant) so that it converts tin oxide into volatile tin hydride. SnH4 has a boiling point of -52°C and can be easily removed from the processing chamber. Examples of hydrogen-containing reactants include H2, HBr, NH3, H2O, and hydrocarbons (such as CH4, C2H2, etc.). A mixture of hydrogen-containing reactants can also be used. Hydrogen-based etching involves forming a plasma in a processing gas containing a hydrogen-containing reactant and an optional inert gas, and contacting the substrate with the formed plasma. Examples of inert gases include nitrogen (N2), helium (He), argon (Ar), neon (Ne), and xenon (Xe). In some embodiments, H2 is a preferred hydrogen-containing reactant, and in some embodiments, it is preferred to form a plasma in a gas containing at least 50%, for example at least 80%, H2 by volume. In other embodiments, HBr is used as a hydrogen-containing reactant. For example, tin oxide can be selectively etched with a plasma formed in a treatment gas consisting essentially of HBr and an inert gas (e.g., in a mixture of HBr, N2, and argon). Hydrogen-based etching is typically performed using a treatment gas that does not contain oxygen-containing and fluorine-containing species. In some embodiments, the treatment gas consists essentially of one or more hydrogen-containing reactants and an optional inert gas.

[0046] Hydrogen-based etching can selectively remove tin oxide in the presence of the following materials: silicon-containing compounds, such as SiO2, SiN, SiC, SiOC, SiCN, SiON, SiCNO, spin-on glass; metal oxides, such as titanium oxide, tungsten oxide, and zirconium oxide; metal nitrides, such as titanium nitride and tantalum nitride; metals, such as tungsten; and carbon-containing organic materials (such as photoresists and organic polymers). In addition, hydrogen-based etching can be used to selectively etch tin oxide in the presence of silicon covered with silicon oxide. Silicon oxide is typically formed on the silicon surface when silicon is exposed to the atmosphere. Hydrogen-based etching can also be used to selectively etch tin oxide in the presence of elemental silicon (e.g., amorphous silicon) and carbon. In addition, hydrogen-based etching can be used to selectively etch tin oxide in the presence of metal carbides and materials containing metals and carbon. For example, tin oxide can be selectively etched with hydrogen-based etching in the presence of tungsten-carbon materials (also known as tungsten-doped carbon). In some embodiments, the tungsten-carbon material includes tungsten between about 20-60 atomic %.

[0047] In some embodiments, a method for removing tin oxide mandrels in the presence of any of these materials is provided. First, a semiconductor substrate is provided, wherein the semiconductor substrate includes a plurality of exposed tin oxide mandrels and a layer of any of these materials (for example, these materials can be spacer materials present on the sidewalls of the tin oxide mandrels, or these materials can be ESL materials). Next, the tin oxide is selectively etched in the presence of these materials. For example, the tin oxide mandrels can be removed by hydrogen-based etching without completely removing the spacer materials present on the sidewalls of the tin oxide mandrels and without completely removing the ESL materials. These materials can be exposed before the etching, or can be exposed during the tin oxide etching.

[0048] In some embodiments, the etching selectivity of the hydrogen-based etching is greater than 10, such as greater than 30, such as greater than 50, or greater than 80. The etching selectivity refers to the ratio of the etching rate of tin oxide to the etching rate of other materials for selected processing conditions. In some examples, using H2 plasma, an etching selectivity of 100 is achieved for etching tin oxide relative to SiO2.

[0049] Tin oxide etching methods using hydrogen plasma (referring to plasma formed in hydrogen-containing reactants) can be implemented in various equipment under various processing conditions. In one implementation, the method includes: providing a semiconductor substrate with an exposed tin oxide layer to an etching chamber, and contacting the substrate with a plasma formed in a processing gas containing H2 (or another hydrogen-containing gas) and optionally a carrier gas (such as helium or other inert gases). The term "etching chamber" or "etching equipment" refers to a chamber and equipment configured for etching. In some embodiments, an "etching chamber" or "etching equipment" is specifically configured for etching operations. In other embodiments, an "etching chamber" or "etching equipment" can be configured to perform other operations in addition to etching, such as deposition. For example, in some embodiments, an etching chamber can also be used for ALD deposition.

[0050] In some embodiments, the plasma used for hydrogen plasma etching is generated in the same processing chamber that contains the semiconductor substrate. In other embodiments, the plasma is remotely generated and introduced into the processing chamber containing the substrate through one or more inlets in the processing chamber.

[0051] The etching is controlled to convert the tin oxide into volatile tin hydride. In one embodiment, the H2 content in the process gas is at least 50% by volume, such as at least 80% (can be up to and include 100%). In some embodiments, the process gas may further include hydrocarbons, such as CH4. In some embodiments, the process gas also includes Cl2. For example, the process gas may be essentially composed of H2 and an inert gas (such as He), or the process gas may be essentially composed of H2, an inert gas and a hydrocarbon (such as CH4). Etching is performed at a temperature of less than about 100°C measured near the substrate. Advantageously, the etching reaction produces only volatile materials, such as SnH4, which can be easily removed from the etching process chamber by exhaust and / or sweeping. The etching process temperature is preferably selected to be less than about 100°C, because higher temperatures can cause the formed SnH4 to decompose and form particles that can contaminate the process chamber and the substrate. The composition of the process gas and the processing conditions are selected to reduce or eliminate the formation of particles during etching. It is noteworthy that the etching reaction does not require any significant sputtering component and can be carried out without an external bias at the substrate and in the absence of heavy ions (e.g., argon ions). Reducing the sputtering component can be beneficial to improving the etching selectivity relative to the second material on the substrate. Therefore, in some embodiments, etching is performed without providing an external bias to the substrate and / or involves the use of helium (light gas) as a carrier gas to reduce sputtering.

[0052] Various frequencies (low and high) can be used to generate plasma for hydrogen plasma etching. Examples of suitable frequencies include 400 KHz, 2 MHz, 13.56 MHz, 27 MHz, or 2.45 GHz. In some embodiments, the power range for plasma generation can be in the range of between about 50 W and 1000 W, corresponding to about 0.0018 W / cm 2 Up to 0.36W / cm 2 The bias at the substrate is optional and the bias power can be in the range of about 0 to 500W.

[0053] The appropriate gas rate per showerhead (for processing a 300 mm wafer) is:

[0054] i. H2: 25 to 750 sccm;

[0055] ii. Cl2: 0 to 500 sccm (e.g., 5–200 sccm);

[0056] iii. He: 0 to 500 sccm (e.g., 5–100 sccm); and

[0057] iv. CH4: 0 to 500 sccm (e.g., 5–100 sccm).

[0058] In some embodiments, the etching process can be performed at a pressure of about 1 to 175 mTorr.

[0059] In some embodiments, high frequency generation (e.g., 13.56 MHz or 27 MHz) is used to generate the plasma, and a power corresponding to 0.07 W / cm 2 and 0.18W / cm 2 The plasma is provided at a plasma power of between about 200 and 500 W with a power density between 0 and 200 W. The bias power at the substrate is between about 0 and 200 W. A suitable gas rate for each showerhead (for processing a 300 mm wafer) is:

[0060] i. H2: 100 to 300 sccm;

[0061] ii. Cl2: 0 to 200 sccm (e.g., 5–100 sccm);

[0062] iii. He: 0 to 100 sccm (e.g., 5–50 sccm);

[0063] iv. CH4: 0 to 100 sccm (e.g., 5–50 sccm).

[0064] In these embodiments, the etching process is performed at a pressure between about 1 and 30 mTorr.

[0065] The selectivity of hydrogen-based etches can be significantly improved by using carbon-containing reactants in the process gas, which form carbon-containing polymers (e.g., CH x Polymer). In some embodiments, the process gas used in this embodiment comprises H2 and hydrocarbons (e.g., methane (CH4)). The process gas typically also comprises an inert gas. In some embodiments, the ratio of H2 to hydrocarbons is preferably at least 5, such as at least 10. In some embodiments, the volume ratio of H2 to hydrocarbons is between about 5-500, such as between about 10-300. In some embodiments, the selective etching of tin oxide in the presence of another material (or materials) comprises exposing the substrate to a plasma formed in a process gas comprising H2 and hydrocarbons (e.g., CH4). In one implementation, H2 is provided at a rate between about 100-500sccm, and hydrocarbons are provided at a rate between about 1-20sccm (e.g., between about 5-10sccm). The process can use a corresponding to between about 0.14-1.3W / cm 2 (e.g. 0.28-0.71W / cm 2) with a plasma power between about 100-1000W (e.g., about 200-500W (for a single 300mm wafer)) at a power density between about 100-1000W (e.g., about 200-500W (for a single 300mm wafer)). In some embodiments, etching is performed using a substrate bias between about 50-500Vb (e.g., between about 100-200Vb). The process is preferably performed at a temperature below about 100°C. In a specific example, the following gases are provided: 100sccm of H2; 5sccm of CH4, and 100sccm of helium. A plasma is formed in the process gas using a power of 300W, and a substrate bias of 100Vb at a 25% duty cycle is used. The process is performed at 30°C and a pressure of 5 mTorr. Forming a carbon-containing polymer on a substrate as described herein can increase the etching selectivity of tin oxide relative to any material listed herein. This effect is particularly useful when etching tin oxide in the presence of a photoresist, carbon, a carbon-containing material, and silicon (Si). For example, when etching is performed in the presence of a photoresist, the etching selectivity can be greater than 100, and in some cases is almost infinite. Using such a high selectivity etch enables the use of a smaller thickness of photoresist to reduce the photolithography exposure dose and / or prevent photoresist line collapse due to high aspect ratios at small fine pitches. In the method, CH x The polymer protects the photoresist from being etched. In addition, the etching can be used to improve the geometry of the photoresist layer. In some embodiments, in the presence of a photoresist disposed above the tin oxide layer, and in the presence of a material located below the tin oxide, the etching is used to selectively etch the tin oxide on the semiconductor substrate, wherein the etching selectivity is at least 10 relative to the photoresist and the material below the tin oxide. In some embodiments, the material below the tin oxide includes one or more of silicon (e.g., amorphous silicon), silicon-containing compounds (e.g., SiO2, SiN, SiC, SiON, SiOC), carbon (e.g., amorphous carbon), and carbon-containing compounds (e.g., carbon tungsten).

[0066] In some embodiments, HBr is used as a hydrogen-containing reactant in a hydrogen-based etch. In one implementation, the etching method includes flowing HBr at a rate of 100-50 sccm and flowing an inert gas (e.g., helium) at a rate of 100-500 sccm, and using a power corresponding to 0.14-1.42 W / cm 2 A plasma is formed in the process gas by applying an RF power of 100-1000 W (per 300 mm wafer) with a power density of 100-1000 W. The etching can be performed with or without a substrate bias. For example, the substrate bias can be between 0-200 Vb, such as between 50-200 Vb. The process can be performed at a temperature below 100° C. and a pressure of 5-50 mTorr.

[0067] Chlorine-based etching. In some embodiments, selective tin oxide etching is performed using chlorine-based etching. Chlorine-based etching involves exposing tin oxide to a chlorine-containing reactant (usually in the case of plasma activation of the reactant) so that it converts tin oxide into tin chloride. SnCl4 has a boiling point of 114°C and can be removed from the processing chamber. Examples of suitable chlorine-containing reactants include Cl2 and BCl3. A mixture of Cl2 and BCl3 is used in one embodiment. In one implementation, chlorine-based etching includes forming a plasma in a processing gas containing a chlorine-containing reactant and optionally containing an inert gas, and contacting the substrate with the formed plasma. Chlorine-based etching can selectively remove tin oxide in the presence of the following materials: silicon-containing compounds (e.g., SiO2, SiN, SiC, SiOC, SiCN, SiON, SiCNO, spin-on glass), carbon, and photoresists, but the selectivity for silicon-containing materials is generally lower than using hydrogen-based etching. In some embodiments, a semiconductor substrate is provided, wherein the semiconductor substrate includes an exposed tin oxide layer (e.g., a tin oxide mandrel) and a layer of any of these materials (e.g., as a spacer material on the mandrel sidewall or as an ESL material). Next, the tin oxide is selectively etched in the presence of these materials using a chlorine-based etch. These materials may be exposed prior to the etching, or may be exposed during the tin oxide etching process. In one implementation, the tin oxide is selectively etched in the presence of any of these materials using BCl3 / Cl2 etching. In one implementation, the etching method includes flowing BCl3 at a rate of 5-100 sccm, flowing Cl2 at a rate of 50-500 sccm, and flowing an inert gas (e.g., helium) at a rate of 100-500 sccm, and using a gas equivalent to 0.14-1.42 W / cm 2 The plasma is formed in the process gas by applying an RF power of 100-1000 W (per 300 mm wafer) with a power density of 100-1000 W. The etching can be performed with or without substrate bias. For example, the substrate bias can be between 0-100 Vb, such as between 10-100 Vb. The process can be performed at a temperature below 100° C. and a pressure of 5-50 mTorr.

[0068] In some embodiments, chlorine-based etching is used to selectively etch certain metal oxides in the presence of tin oxide. For example, titanium oxide can be selectively etched in the presence of tin oxide using chlorine-based etching. In some embodiments, a semiconductor substrate is provided, wherein the semiconductor substrate includes an exposed layer of titanium oxide and a tin oxide layer. Next, the titanium oxide is selectively etched in the presence of tin oxide using a chlorine-based etching chemistry. The tin oxide can be exposed before the etching, or it can be exposed during the tin oxide etching. For example, the titanium oxide can be a spacer material coated with a tin oxide mandrel. The titanium dioxide spacer material can be removed from the horizontal surface using a chlorine-based etching without completely removing the titanium dioxide on the sidewalls of the tin oxide mandrel.

[0069] Fluorocarbon-based etching. In some embodiments, a fluorocarbon-based etch is used to selectively etch silicon-containing compounds, such as SiO2, SiN, SiC, SiOC, SiCN, SiON, SiCNO, spin-on glass, in the presence of tin oxide. Fluorocarbon-based etching includes exposing the silicon-containing compound to a plasma-activated fluorocarbon (C x F y ) so that they are converted into volatile compounds containing Si-F bonds. Examples of suitable fluorocarbon reactants include CF4, C2F6, etc. In one implementation, fluorocarbon-based etching involves forming a plasma in a treatment gas containing fluorocarbons and optional inert gases, and contacting the substrate with the formed plasma. Fluorocarbon etching can selectively remove silicon-containing compounds in the presence of tin oxide. In some embodiments, a semiconductor substrate is provided, wherein the semiconductor substrate includes an exposed layer of a silicon-containing compound (e.g., a silicon-containing spacer material or an ESL material) and a tin oxide layer (e.g., a tin oxide mandrel). Next, the substrate is contacted with a fluorocarbon plasma, and the silicon-containing compound is selectively etched in the presence of tin oxide. In one embodiment, the substrate includes a tin oxide mandrel, and a silicon-containing spacer material (e.g., silicon oxide) is coated on the horizontal surface of the mandrel and on the mandrel sidewalls. The silicon-containing spacer material is selectively etched and removed from the horizontal surface by a fluorocarbon-based etching chemical, so that the silicon-based spacer material is retained at the sidewall of the mandrel. The tin oxide can be exposed before the etching, or can be exposed during the etching process. Fluorocarbon based etches are a type of fluorine based etch.

[0070] Fluorine-based etching. In some embodiments, elemental silicon and silicon-containing compounds, such as SiO2, SiN, SiC, SiOC, SiCN, SiON, SiCNO and spin-on glass are selectively etched using fluorine-based etching in the presence of tin oxide. Fluorine-based etching includes exposing the silicon-containing material to a fluorine-containing reagent (e.g., NF3, SF6 or fluorocarbon), which is plasma-activated in some embodiments, and converts the silicon-containing material into volatile silicon fluoride. However, tin oxide does not form volatile fluorides, and is therefore not substantially etched by this chemical substance. In addition to silicon-containing materials, fluorine-based etching can also be used to selectively etch titanium oxide, tungsten and tungsten carbon in the presence of tin oxide. In an implementation, fluorine-based etching involves forming a plasma in a treatment gas containing a fluorine-containing reactant (e.g., NF3) and an optional inert gas, and contacting the substrate with the formed plasma. Fluorine-based etching can selectively remove silicon-containing compounds and elemental silicon in the presence of tin oxide. In some embodiments, a semiconductor substrate is provided, wherein the semiconductor substrate includes an exposed layer of a silicon-containing compound and / or an elemental silicon (Si) layer (e.g., as a spacer material on a mandrel sidewall or as an ESL material) and a tin oxide layer (e.g., as a mandrel material). Next, the substrate is contacted with a fluorine-containing reactant in a plasma, and the silicon-containing compound and / or Si are selectively etched in the presence of tin oxide. The tin oxide may be exposed prior to the etching, or may be exposed during the etching process.

[0071] In one implementation, silicon (Si) is selectively etched using a fluorine-based etch in the presence of tin oxide. In one implementation, the etching method includes flowing NF3 at a rate of 5-100 sccm, flowing Cl2 at a rate of 50-500 sccm, and flowing an inert gas (e.g., nitrogen and / or helium) at a rate of 100-500 sccm, and using a power corresponding to 0.14-1.4 W / cm 2 The plasma is formed in the process gas by applying an RF power of 100-1000 W (per 300 mm wafer) with a power density of 100-1000 W. The etching can be performed with or without substrate bias. For example, the substrate bias can be between 0-100 Vb, such as between 10-100 Vb. The process can be performed at a temperature below 100° C. and a pressure of 10-300 mTorr.

[0072] In some embodiments, a semiconductor substrate is provided, wherein the semiconductor substrate includes an exposed layer of titanium oxide, tungsten and / or tungsten carbon (e.g., as a spacer material layer) and a layer of tin oxide (e.g., as a mandrel material). Next, the substrate is contacted with a fluorine-containing reactant in a plasma, and the titanium oxide, tungsten and / or tungsten carbon are selectively etched in the presence of tin oxide. The tin oxide may be exposed prior to the etching, or may be exposed during the etching process.

[0073] In one implementation, titanium oxide is selectively etched using a fluorine-based etch in the presence of tin oxide. In one implementation, the etching method includes flowing CF4 at a rate of 5-500 sccm, flowing CHF3 at a rate of 0-500 sccm (e.g., 10-500 sccm), and flowing an inert gas (e.g., argon) at a rate of 100-500 sccm, and using a 200 W / cm2 corresponding to 0.71-1.4 W / cm2. 2 A plasma is formed in the process gas using an RF power of 500-1000 W (per 300 mm wafer) with a power density of 100-200 W. The etching can be performed with or without substrate bias. For example, the substrate bias can be between 0-300 Vb, such as between 10-300 Vb. The process can be performed at a temperature below 100° C. and a pressure of 5-50 mTorr.

[0074] In one implementation, tungsten carbon is selectively etched in the presence of tin oxide using a fluorine-based etch. In one implementation, the etching method includes flowing NF3 at a rate of 5-100 sccm, flowing Cl2 at a rate of 5-500 sccm, and flowing an inert gas (e.g., argon and / or nitrogen) at a rate of 100-500 sccm, and using a power corresponding to 0.14-1.4 W / cm 2 A plasma is formed in the process gas using an RF power of 100-1000 W (per 300 mm wafer) with a power density of 100-1000 W. The etching can be performed with or without substrate bias. For example, the substrate bias can be between 0-100 Vb, such as between 10-100 Vb. The process can be performed at a temperature below 100° C. and a pressure of 10-100 mTorr.

[0075] Oxygen-based etching. In some embodiments, one or more materials selected from the group consisting of elemental carbon, carbon-containing compounds, polymers and photoresists are selectively etched using oxygen-based etching in the presence of tin oxide. Oxygen-based etching includes exposing any of the materials listed above to an oxygen-containing reagent (e.g., O2, O3, SO2 or CO2), which is plasma-activated in some embodiments, and converts the material into a volatile product (e.g., CO or CO2) containing a carbon-oxygen bond. In an implementation, oxygen-based etching includes forming a plasma in a treatment gas containing an oxygen-containing reactant (e.g., O2) and an optional inert gas, and contacting the substrate with the formed plasma. In other embodiments, etching can be performed in the absence of plasma. Oxygen-based etching can selectively remove carbon (e.g., amorphous carbon or diamond-like carbon), carbon-containing compounds and photoresists in the presence of tin oxide. In some embodiments, a semiconductor substrate is provided, wherein the semiconductor substrate includes an exposed layer of one or more materials (the materials are selected from the group consisting of carbon, carbon-containing compounds, and photoresists) (e.g., as a spacer material) and a tin oxide layer (e.g., as a mandrel material). Next, the substrate is contacted with an oxygen-containing reactant (optionally activated in a plasma) to convert the carbon-containing material into volatile CO or CO2, thereby selectively etching them in the presence of tin oxide. The tin oxide can be exposed before the etching, or it can be exposed during the etching process. For example, oxygen-based etching can be used to remove spacer materials (e.g., carbon-containing materials such as photoresists) from horizontal surfaces, so that the spacer materials present on the sidewalls of the tin oxide mandrel are not completely removed, and the tin oxide is exposed by etching.

[0076] Depositing materials. The materials mentioned herein can be deposited using various deposition methods, such as CVD (including PECVD), ALD (including PEALD), PVD (e.g., for depositing metals and metal oxides), spin coating methods (e.g., for depositing carbon and some dielectrics). When conformal deposition is required, ALD methods are generally preferred.

[0077] SiO2, SiC, SiN, SiOC, SiNO, SiCNO and SiCN materials can be deposited using various methods such as CVD, PECVD and ALD. The deposition may include a reaction between a silicon-containing precursor and a reactant such as an oxygen-containing reactant, a nitrogen-containing reactant or a carbon-containing reactant. Various silicon-containing precursors can be used to deposit these materials, including silane, tetraalkylsilane, trialkylsilane, tetraethyl orthosilicate (TEOS), etc. For example, TEOS or silane can be used as a silicon-containing precursor to deposit SiO2.

[0078] Carbon can be deposited by CVD or PECVD using, for example, hydrocarbon precursors (e.g., CH4). In other implementations, carbon can be deposited by spin coating or by PVD. Photoresists and organic polymers can be deposited, for example, by spin coating.

[0079] The tin oxide layer is deposited by any suitable method, such as by CVD (including PECVD), ALD (including PEALD), sputtering, etc. In some embodiments, it is preferred to conformally deposit the SnO2 film so that it follows the surface of the substrate, including the surface of any protrusions and recessed features on the substrate. One of the suitable deposition methods for conformal SnO2 film is ALD. Thermal or plasma enhanced ALD can be used. In a typical thermal ALD method, the substrate is provided to the ALD processing chamber and sequentially exposed to a tin-containing precursor and an oxygen-containing reactant, wherein the tin-containing precursor and the oxygen-containing reactant are reacted on the substrate surface to form SnO2. After the substrate is exposed to the tin-containing precursor and before the oxygen-containing reactant is allowed to enter the processing chamber, the ALD processing chamber is usually purged with an inert gas to prevent reactions in the bulk of the processing chamber. In addition, after treating the substrate with the oxygen-containing reactant, the ALD processing chamber is usually purged with an inert gas. The continuous exposure is repeated for several cycles, for example, between about 10-100 cycles, until a tin oxide layer having a desired thickness is deposited. Examples of suitable tin-containing precursors include tin halide-containing precursors (such as SnCl4 and SnBr4), and non-halide-containing tin precursors, such as organotin compounds, including alkyl-substituted tin amides, etc. Specific examples of alkyl-substituted tin amides suitable for ALD are tetrakis(dimethylamino)tin, tetrakis(ethylmethylamino)tin, N 2 ,N 3-di-tert-butyl-butane-2,3-diamino-tin(II) and (1,3-bis(1,1-dimethylethyl)-4,5-dimethyl-(4R,5R)-1,3,2-diazastannolidin-2-ylidene). Oxygen-containing reactants include, but are not limited to, oxygen, ozone, water, hydroperoxides, and NO. Mixtures of oxygen-containing reactants may also be used. Deposition conditions will vary depending on the choice of ALD reactants, with more reactive precursors typically reacting at lower temperatures than less reactive precursors. The process will typically be carried out at a temperature between about 20-500° C., at a pressure below atmospheric pressure. The temperature and pressure are selected so that the reactants remain gaseous in the process chamber to avoid condensation. Each reactant is provided to the process chamber in gaseous form alone or mixed with a carrier gas (e.g., argon, helium, or nitrogen). The rate of these mixtures will depend on the size of the process chamber, and in some embodiments is between about 10-10000 sccm.

[0080] In one example, the ALD process includes sequentially and alternately exposing a substrate in an ALD vacuum chamber to SnCl4 (a tin-containing precursor) and deionized water (an oxygen-containing reactant) at a temperature of 200-400°C. In a specific example of an ALD cycle, a mixture of SnCl4 vapor and N2 carrier gas is introduced into the ALD process chamber for 0.5 seconds and then exposed to the substrate for 3 seconds. Next, the ALD process chamber is purged with N2 for 10 seconds to remove SnCl4 from the body of the process chamber, and a mixture of H2O vapor and N2 carrier gas is flowed into the process chamber for 1 second and exposed to the substrate for 3 seconds. Next, the ALD process chamber is purged with N2 and the cycle is repeated. The ALD process is performed at a pressure below atmospheric pressure (e.g., 0.4 Torr) and a temperature of 200-400°C.

[0081] While the use of halogenated tin precursors in ALD is suitable in many embodiments, in some embodiments, it is more preferred to use non-halogenated organotin precursors to avoid corrosion problems that may occur when using halogenated precursors such as SnCl4. Examples of suitable non-halogenated organotin precursors include alkylaminotin (alkylated tin amide) precursors, such as tetrakis(dimethylamino)tin. In one example of an ALD process, a substrate is sequentially exposed to tetrakis(dimethylamino)tin and H2O2 in an ALD chamber at a temperature between about 50-300°C. Advantageously, the use of this precursor enables the deposition of SnO2 films at low temperatures of 100°C or less. For example, SnO2 films can be deposited at 50°C without using plasma to increase the reaction rate.

[0082] In some embodiments, SnO2 film is deposited by PEALD. Tin-containing precursors and oxygen-containing reactants of the same type as those used for thermal ALD described above can be used. In PEALD, the ALD equipment is equipped with a system for generating plasma in a treatment chamber and for treating substrates with plasma. In a typical PEALD treatment sequence, a substrate is provided to a PEALD treatment chamber and exposed to a tin-containing precursor adsorbed on the substrate surface. The treatment chamber is purged with an inert gas (e.g., argon or helium) to remove the precursor from the treatment chamber, and the substrate is exposed to the oxygen-containing reactant introduced into the treatment chamber. While introducing the oxygen-containing reactant or after a delay, a plasma is formed in the treatment chamber. The plasma promotes the reaction between the tin-containing precursor and the oxygen-containing reactant on the substrate surface, resulting in the formation of tin oxide. Next, the treatment chamber is purged with an inert gas, and the cycle comprising tin precursor dosing, scavenging, oxygen-containing reactant dosing, plasma treatment and a second scavenging is repeated as many times as needed to form a tin oxide film of desired thickness.

[0083] Tin oxide as mandrel

[0084] In the provided implementation, the tin oxide layer is used as the mandrel. Figures 1A-1F Explain the use of tin oxide mandrels, Figures 1A-1F Schematic cross-sectional views of semiconductor substrates at various stages of processing are provided. Figure 2 Process flow diagrams of embodiments of these methods are provided.

[0085] refer to Figure 2 , the process begins at 201 by providing a substrate having a plurality of tin oxide raised features. Figure 1A An illustrative substrate is shown in , which shows two tin oxide mandrels 101 present on an etch stop layer (ESL) 103. In some embodiments, the distance d1 between adjacent mandrels is between about 10-100nm. In some embodiments, a relatively large distance of about 40-100nm is used. In other applications, the distance between the closest mandrels is between about 10-30nm. In some embodiments, the distance d2 (also referred to as the pitch) between the centers of the closest mandrels is between about 30-130nm. In some embodiments, the pitch is between about 80-130nm. In other embodiments, the pitch is between about 30-40nm. The height d3 of the mandrels is typically between about 20-200nm, for example, between about 50-100nm.

[0086] The materials of the mandrel and the ESL are preferably selected to enable subsequent selective etching of the tin oxide mandrel material in the presence of the exposed spacer material, and selective etching of the ESL material in the presence of the exposed spacer material. Thus, for the ESL etch chemistry, the ratio of the etch rate of the ESL material to the etch rate of the spacer material is greater than 1, more preferably greater than about 1.5, such as greater than about 2. Similarly, for a mandrel pull chemistry, the ratio of the etch rate of the tin oxide mandrel material to the etch rate of the spacer material is greater than 1, more preferably greater than about 1.5, such as greater than about 2.

[0087] In some embodiments, the ESL material is a silicon-containing compound (e.g., SiO2), or a metal oxide (e.g., titanium oxide, zirconium oxide, or tungsten oxide). The mandrel material is tin oxide and the spacer material may include a silicon-containing compound (e.g., SiO2, SiN, or SiC), a carbon-containing compound (e.g., amorphous carbon, diamond-like carbon, or photoresist), amorphous silicon (doped or undoped), or a metal oxide (TaO, TiO, WO, ZrO, HfO). The ESL material, mandrel material, and spacer material are selected to be all different. In some embodiments, the outer material of the mandrel may be different from the mandrel core. The ESL layer and mandrel may be formed by one or more of physical vapor deposition (PVD), chemical vapor deposition (CVD), ALD (plasma-free or by PEALD), or plasma enhanced chemical vapor deposition (PECVD), and the pattern of the mandrel may be defined using photolithography or the SAQP-type method described herein.

[0088] The material for the spacers is preferably selected so that it can be selectively etched relative to tin oxide using a spacer etch chemistry, and the tin oxide mandrels can be selectively etched relative to the spacer material using a mandrel pull chemistry. In some embodiments, the ESL material is selected so that the ESL can be selectively etched relative to the spacer material using an ESL etch chemistry.

[0089] In some embodiments, the spacer material used in conjunction with the tin oxide mandrel includes, but is not limited to, silicon oxide, silicon nitride, or titanium oxide. Other suitable spacer materials that may be used in this embodiment include SiC, SiOC, SiNO, SiCNO, and SiCN. Examples of suitable ESL and spacer material pairs that may be used in conjunction with the tin oxide mandrel include: (i) titanium oxide spacers and silicon oxide ESLs; (ii) silicon oxide spacers and tungsten ESLs; (iii) silicon oxide spacers and silicon carbide ESLs.

[0090] Reference again Figure 1A, the ESL layer 103 is located on and in contact with the target layer 105. The target layer 105 is a layer that needs to be patterned. The target layer 105 can be a semiconductor layer, a dielectric layer or other layer, and can be made of, for example, silicon (Si), silicon oxide (SiO2), silicon nitride (SiN) or titanium nitride (TiN). In some embodiments, the target layer refers to a hard mask layer and contains a metal nitride, such as titanium nitride. The target layer 105 can be deposited by ALD (plasma-free or by PEALD), CVD or other suitable deposition techniques. The target layer 105 is located on and in contact with layer 107, and layer 107 is a BEOL layer in some embodiments, which includes a plurality of metal lines embedded in a dielectric material layer.

[0091] Reference again Figure 2 The process continues at 203 where a layer of spacer material is deposited on both the horizontal surfaces and the sidewalls of the raised features. Figure 1B In the structure shown, a spacer material layer 109 is deposited on the ESL 103 and on the tin oxide mandrel 101, including on the sidewalls of the mandrel 101. The spacer material layer is deposited by any suitable method, such as by CVD (including PECVD), ALD (including PEALD), sputtering, etc.

[0092] In some embodiments, the spacer material film is preferably deposited conformally so that it conforms to the surface of the ESL 103 and the tin oxide mandrel 101, as shown in FIG. Figure 1B As shown. The conformal film as used herein follows the contour of the substrate as a whole. In some embodiments, the thickness of the conformal film is approximately the same on all (horizontal and vertical) surfaces (fluctuation is less than 50%). In some embodiments, the thickness fluctuation in the deposited conformal film is less than 15%. In other embodiments, the thickness of the conformal film can be significantly larger on the horizontal surface than on the sidewall. In some embodiments, the spacer material layer is conformally deposited to a thickness between about 5-30nm, for example, a thickness between about 10-20nm. Typically, the spacer material layer 109 is deposited by any suitable method, such as by CVD (including PECVD), ALD (including PEALD), sputtering, etc. For example, the spacer material can be any one of a silicon oxide layer, a silicon nitride layer, or a titanium oxide layer deposited by PECVD or ALD. In one embodiment, the spacer material is titanium oxide deposited by ALD, and the ESL is silicon oxide or another silicon-containing material. Other examples of spacer materials that can be deposited by PECVD or ALD include SiC, SiOC, SiNO, SiCNO, and SiCN.

[0093] Reference Figure 2, after the spacer material layer has been deposited, the process continues at 205 where the spacer material is removed from the horizontal surfaces without completely removing the spacer material at the sidewalls of the tin oxide protruding features. This step is performed using a spacer etch chemistry. Figure 1C As shown, the spacer material is removed from the horizontal surface so that the tin oxide mandrel 101 material and the ESL 103 are exposed, while the spacer material 109 at the sidewall of the mandrel 101 is not completely removed. The spacer etching chemistry is preferably selective to both the tin oxide mandrel and the ESL material. When the spacer is silicon-based, such as SiO2, SiN or any of SiC, SiOC, SiNO, SiCNO and SiCN, a fluorine-based etch can be used. For example, a plasma fluorocarbon etching chemistry can be used to selectively etch silicon-containing spacers relative to the tin oxide mandrel. The chemistry can be adjusted according to the type of ESL used. When the spacer is titanium oxide, a chlorine-based chemistry can be used to selectively etch it relative to both the tin oxide mandrel and the silicon oxide ESL. Chlorine-based etching chemistry includes exposing the substrate to a (usually plasma-activated) Cl-containing reactant, such as plasma-activated Cl2, BCl3, etc. When the spacer is silicon-based (e.g., SiO2, SiN or any of SiC, SiOC, SiNO, SiCNO and SiCN) and the ESL is tungsten, a fluorine-based etching chemistry (e.g., a SF6 / O2 mixture activated by plasma) can be used to selectively etch the spacer relative to both tin oxide and tungsten.

[0094] Figure 1C The removal of the spacer material from the horizontal surfaces is shown. The spacer material layer 109 is etched away from the horizontal surfaces above the ESL 103 and above the mandrel 101, but is not completely etched away from the location where it adheres to the sidewall of the tin oxide mandrel 101. This etch exposes the layer 103 everywhere except for the location near the sidewall of the tin oxide mandrel 101. In addition, this etch exposes the top of the tin oxide mandrel 101. The resulting structure is shown in FIG. Figure 1C Preferably, after the etching, at least 50%, such as at least 80% or at least 90% of the original height of the tin oxide layer at the sidewalls remains.

[0095] Reference Figure 2 In the process shown in , after removing the spacer material from the horizontal surface in 205, in the next operation 207, the tin oxide protruding features are removed without completely removing the spacer material that was previously present on the sidewalls of the protruding features (mandrels), thereby forming a plurality of spacers. The resulting structure is Figure 1D, which shows a plurality of spacers 109 present on the ESL 103 after the removal of the tin oxide mandrel 101. The removal of the mandrel is performed by exposing the substrate to an etching chemistry (mandrel pull chemistry) that selectively etches the mandrel material. Therefore, in this step, the ratio of the etching rate of the tin oxide mandrel material to the etching rate of the spacer material is greater than 1, and more preferably greater than 1.5. In addition, in some embodiments, the etching chemistry used in this step should selectively etch the tin oxide mandrel material relative to the ESL material. A variety of etching methods can be used, and the specific choice of chemistry depends on the material of the spacer and the material of the ESL layer. Next, the tin oxide mandrel 101 is removed using a mandrel pull chemistry. In some embodiments, a hydrogen-based etch is used to remove the tin oxide mandrel. For example, in some embodiments, the substrate is contacted with a plasma-activated hydrogen-containing gas (e.g., a gas comprising H2, HBr, NH3, hydrocarbons, H2O, or a combination thereof) to form volatile tin hydride, which is easily removed from the processing chamber. The hydrogen-based etch is selective to various spacer materials (including SiO2, SiN or any of SiC, SiOC, SiNO, SiCNO, SiCN and TiO2) and metals (e.g., W) or metal-containing dielectrics (including WO2, TiN, TaN, ZrO, HfO) of the ESL layer. In alternative embodiments, other types of tin oxide etch chemistries provided herein may be used.

[0096] Reference Figure 2 After the spacers have been formed, in operation 209, the ESL material is etched in the presence of the spacers to form a patterned ESL. This step is performed using an ESL etch chemistry. The resulting structure is Figure 1E , where etching of the exposed ESL 103 is shown to expose the underlying target layer 105 at all locations not protected by the spacer 109. In some embodiments, the ESL etch chemistry used in this step selectively etches the ESL material in the presence of the spacer material. In other words, in some embodiments, for the ESL etch chemistry, the ratio of the etch rate of the ESL material to the etch rate of the spacer material is greater than 1, and more preferably greater than 1.5. When the spacer material is TiO2 and the ESL material is a silicon-based material (e.g., SiO2, SiN or any of SiC, SiOC, SiNO, SiCNO, and SiCN), a fluorine-based etch (e.g., a fluorocarbon plasma etch chemistry) can selectively etch the ESL layer in the presence of TiO2.

[0097] After transferring the pattern defined by the spacers to the ESL, the target layer 105 is etched at all locations not protected by the ESL film 103 to expose the underlying layer 107. The spacers 109 may also be removed during this etching step, thereby providing Figure 1F 104. The patterned structure shown. In some embodiments, the etching chemistry used in this step is selected to remove the target material and the spacer material. In other embodiments, two different etching steps with different chemistries can be used to pattern the target layer 105 and remove the spacer 109, respectively. A variety of etching chemistries can be used, depending on the chemistry of the target layer. In one embodiment, the target layer 105 is a metal nitride layer (e.g., TiN) layer. For example, a chlorine-based etching chemistry can be used to etch the titanium nitride target layer material. If the spacer material is TiO2, the spacer can be removed by a chlorine-based etching at the same time as the target layer etching.

[0098] Forming Tin Oxide Mandrels. Several different methods can be used to form a substrate having Tin Oxide Mandrels. In some embodiments, the Tin Oxide Mandrels are formed by patterning a Tin Oxide capping layer. This is accomplished by Figure 3 The process flow chart shown in is illustrated. The process starts in operation 301 by providing a substrate with a tin oxide capping layer. For example, tin oxide can be deposited on a substrate with a flat exposed ESL to form a flat tin oxide layer above the ESL. Next, in operation 303, a patterned layer is formed above the tin oxide layer. For example, a photoresist capping layer can be deposited on the tin oxide (but not necessarily in direct contact with the tin oxide), and photolithography can be used to pattern. In some embodiments, one or more intermediate capping layers are deposited between the tin oxide layer and the photoresist layer. Next, in operation 305, tin oxide is etched and the pattern is transferred to the tin oxide layer so that multiple tin oxide protrusions are formed on the substrate. If there is an intermediate layer between the tin oxide layer and the photoresist, the pattern is first transferred to these intermediate layers. In some embodiments, in the presence of a patterned mask material (such as a photoresist, carbon, another carbonaceous material and / or a silicon-containing material) layer, tin oxide is etched by an etching chemical based on hydrogen.

[0099] exist Figures 4A-4EAn exemplary method for forming a substrate having patterned tin oxide mandrels is shown in , which depicts a schematic cross-sectional view of a semiconductor substrate during processing. Patterning begins by providing a structure including a patterned photoresist layer 401 formed on a capping layer stack, wherein the stack includes, from top to bottom: a spin-on glass layer 403 (or another silicon-containing material, such as a silicon oxide-based material or SiON layer deposited by low temperature CVD), a spin-on carbon layer or a PECVD-deposited amorphous carbon layer 405, a tin oxide layer 407 (e.g., which is deposited by ALD, PECVD, or sputtering), an ESL (e.g., 409), and a target layer 411 (e.g., titanium nitride). First, the spin-on glass layer (or another silicon-containing material) is etched, for example, by a fluorine-based etch (e.g., a fluorocarbon-based etch chemistry). The etch transfers the pattern of the photoresist to the spin-on glass layer 403. The resulting structure is Figure 4B Next, after the carbon layer 405 is exposed, the carbon is etched using, for example, an oxygen-based chemical (e.g., O2, O3, NO, SO2, COS, CO, CO2 activated in a plasma) and the pattern is transferred to the carbon. This step may simultaneously remove (partially or completely) the photoresist 401. Figure 4C The resulting structure is shown with patterned layers 401, 403, and 405 having the photoresist 401 partially removed. Next, the capping tin oxide layer 407 is etched using any suitable tin oxide etching chemistry disclosed herein (e.g., using a hydrogen-based chemistry), and as Figure 4D Finally, the carbon layer 405 is ashed and removed using, for example, an oxygen-based chemical, thereby providing a Figure 4E The structure of the patterned tin oxide mandrels is shown.

[0100] Figures 5A-5C An alternative process flow is shown, which is similar to Figures 4A-4E The process shown, but does not include the carbon hard mask 405, as shown Figure 5A In this process, Figure 5B As shown, the pattern of photoresist 401 is transferred to spin-on glass layer 403. Next, tin oxide layer 407 is etched and the pattern is transferred directly from layer 403 to tin oxide layer 407. Hydrogen-based etching chemistry (e.g., using H2 and / or HBr) can be used to etch the tin oxide and convert it to tin hydride, or chlorine-based chemistry (e.g., using Cl2 and / or BCl3). The resulting structure is shown in FIG. Figure 5C shown.

[0101] The photolithography method of patterning the cover layer using photoresist includes: applying the photoresist to the substrate (on the cover layer to be patterned); exposing the photoresist; patterning the photoresist and transferring the pattern to the substrate; and selectively removing the photoresist from the substrate.

[0102] In another embodiment, the tin oxide mandrels are formed by a SAQP process in which tin oxide spacers are first formed and then used as mandrels. Figure 6 The process flow chart shown in is shown. The process begins in 601 by forming a first mandrel on a semiconductor substrate. In one embodiment, the process begins with providing a substrate having a plurality of raised features formed above an etch stop layer material. The raised feature is the first mandrel used during patterning, and may include any mandrel material (e.g., photoresist, carbon, carbon-containing material, silicon-containing material (e.g., silicon and / or silicon-containing compounds), etc.) that can be selectively etched relative to tin oxide. The first mandrel material is selected to be different from the etch stop layer material. In some embodiments, the first mandrel is a photoresist mandrel. When the first mandrel is a photoresist mandrel, the process can be performed with fewer steps compared to other mandrel materials that are typically patterned using additional photolithography steps.

[0103] In some embodiments, the first mandrel is a photoresist and the ESL is a silicon-containing compound, such as silicon oxide, silicon carbide, silicon nitride, etc. Next, a tin oxide layer is conformally deposited on the first mandrel in operation 603. The conformally deposited tin oxide layer covers both the horizontal surfaces of the first mandrel and the sidewalls of the first mandrel and the exposed ESL.

[0104] In some embodiments, after the tin oxide layer has been conformally deposited and before the tin oxide is removed from the horizontal surface, a passivation method is used to protect the tin oxide present on the sidewalls of the mandrel. Passivation is performed during the subsequent etching step of removing the tin oxide from the horizontal surface to prevent etching of the tin oxide present on the sidewalls of the mandrel. In some embodiments, a passivation layer is formed above the tin oxide layer at the sidewalls of the first mandrel by first depositing a passivation material on both the horizontal surface and the sidewalls of the first mandrel coated with tin oxide, and then removing the passivation material from the horizontal surface. For example, a silicon-containing passivation material can be deposited on both the horizontal surface and the sidewalls of the first mandrel coated with tin oxide, and then a fluorine-based (e.g., fluorocarbon-based) etching chemistry is used to remove the silicon-containing passivation material from the horizontal surface. This will result in a structure in which the tin oxide on the sidewalls is protected by a silicon-containing passivation material layer before the tin oxide is etched. In another example of passivation, forming a passivation layer over the tin oxide layer at the sidewalls of the protruding features includes depositing a carbon-containing passivation material over the tin oxide at the horizontal surface and sidewalls of the first mandrel, and then removing the carbon-containing passivation material from the horizontal surface. In yet another embodiment of the passivation method, forming a passivation layer over the tin oxide layer at the sidewalls of the first mandrel includes converting an outer portion of the tin oxide layer into a tin-containing passivation material, such as SnN, SnBr, SnF. In one example, the outer portion of the tin oxide layer is converted to tin nitride by contacting the substrate with the exposed tin oxide layer with a nitrogen-containing reactant in a plasma.

[0105] Next, in 605, the process proceeds by etching the tin oxide layer from the horizontal surface and then removing the first mandrel to form a plurality of tin oxide protruding features (first spacers or second mandrels). The tin oxide may be removed from the horizontal surface by any selective tin oxide etching chemistry described herein (e.g., by a hydrogen-based etch). The tin oxide is removed from the horizontal surface without completely removing the tin oxide on the sidewalls.

[0106] Next, the first mandrel is removed without completely removing the tin oxide present on the sidewalls of the first mandrel, thereby leaving a plurality of raised tin oxide features (first spacers) present on the ESL material layer. For example, the photoresist first mandrel can be removed by an oxygen-based etching chemistry, and the silicon-containing mandrel can be removed by a fluorine-based chemistry. The provided method can be used to form a tin oxide first spacer (which serves as the second mandrel) having a desired geometry (e.g., square, minimal or no footing, and consistent pitch).

[0107] These raised tin oxide features are then used as a second mandrel for subsequent patterning (eg Figures 1A-1F). Specifically, the process continues in the following manner: conformally depositing a second spacer material on the substrate so that the second spacer material covers the tin oxide second mandrel on both the sidewalls and the horizontal surface. The second spacer material is selected so that it can be selectively etched relative to the tin oxide mandrel. In some embodiments, the second spacer material is a silicon-containing compound, such as silicon oxide. Preferably, the second spacer material is different from the ESL material; the second spacer material is preferably deposited by a conformal deposition method (such as ALD); after the second spacer material is deposited, it is removed from the horizontal surface without being completely removed from the position near the sidewall of the tin oxide mandrel. The etching can be performed by any etching method that can selectively etch relative to the tin oxide. For example, if the second spacer material is a silicon-containing compound such as silicon oxide, a fluorine-based (e.g., fluorocarbon-based) plasma etching can be used. Next, the tin oxide second mandrel is removed without completely removing the second spacer material present on the sidewall of the second mandrel. The etching can be performed by any etching method that selectively etches tin oxide. In some embodiments, a hydrogen-based etch is used to selectively remove the tin oxide second mandrel in the presence of a second spacer material (e.g., silicon oxide). After removing the tin oxide mandrel, the substrate includes a plurality of spacers on the etch stop layer. The number of spacers at this stage is four times the number of first mandrels (quadruple pattern). Subsequent processing may include selectively etching and removing the exposed etch stop layer in the presence of the spacers, then selectively etching one or more target materials, and removing the spacers.

[0108] pass Figures 7A-7G The schematic cross-sectional view of the substrate being processed shown shows one implementation of the processing sequence, where tin oxide spacers are used as the second mandrel in a SAQP (self-aligned quadruple patterning) type implementation. Figures 8A-8F shown. Fig. 7A A semiconductor substrate is shown with a protruding feature (first mandrel) 701 present on an etch stop layer 703. A plurality of layers 705 and 707 are located below the etch stop layer. These underlying layers may include a target layer (which needs to be patterned) and / or one or more hard masks. In the depicted embodiment, the first mandrel 701 is made of photoresist, and the ESL 703 is a silicon-containing compound layer, such as a silicon oxide layer, a silicon nitride layer, a silicon carbide layer, a silicon oxynitride layer, etc. A conformal tin oxide layer is deposited on the substrate, thereby providing a Figure 7B In this embodiment, the tin oxide layer 709 is deposited directly on the photoresist mandrel 701 and the ESL 705 so that it covers the horizontal surface of the substrate and the surface of the sidewall of the photoresist mandrel 701. The corresponding isometric view is shown in FIG. Fig. 8ANext, the tin oxide is removed from the horizontal surfaces without completely removing the tin oxide from the area near the mandrel sidewalls, thereby providing Figure 7C The isometric view of this structure is shown in Figure 8B . Tin oxide can be removed selectively relative to the photoresist using any of the methods described herein. For example, tin oxide can be etched from horizontal surfaces using a method that includes performing a hydrogen-based etch during at least a portion of the etch. Passivation can be used to provide an optimal geometry for the tin oxide spacers. This step exposes the photoresist material. Next, the photoresist is selectively removed without completely removing the tin oxide present on the sidewalls of the photoresist mandrel. In some embodiments, the photoresist mandrel pull is performed by ashing (e.g., using an oxygen-based chemistry). Removal of the photoresist mandrel is performed using a chemistry that is selective relative to tin oxide and the ESL material, and oxygen-based ashing is a suitable selective method for removing photoresist. The resulting structure is shown in Fig.7D , where tin oxide raised features 709 (which may be referred to as first spacers and second mandrels) are located on ESL 703 and are spaced apart from each other by a defined distance determined by the size of the first photoresist mandrel. The number of these raised features is twice the number of first mandrels. The corresponding isometric view is shown in FIG. Figure 8C shown.

[0109] After forming the tin oxide protruding features, they are used as second mandrels for subsequent patterning. The process includes conformally depositing a second spacer material on the surface of the substrate. In the embodiment shown, the second spacer material is a silicon-containing compound that is different from the ESL material. For example, in some implementations, the second spacer is silicon oxide and the ESL material is a different material (e.g., silicon carbide). The structure obtained after depositing the second spacer material is Fig. 7E , where a second spacer material layer 711 (silicon oxide in the embodiment shown) covers the horizontal surface of the tin oxide mandrel 709, the sidewalls of the tin oxide mandrel, and the ESL 703. In some embodiments, the silicon oxide second spacer layer is deposited by a conformal deposition method, such as ALD. The corresponding equidistant structure is shown in FIG. Fig.8D shown.

[0110] Next, the second spacer material is removed from the horizontal surfaces without completely removing it from the sidewall regions of the tin oxide mandrels. The etch is preferably selective with respect to the tin oxide. In the depicted embodiment, a fluorine-based (e.g., fluorocarbon-based) etch chemistry may be used to selectively etch silicon oxide with respect to tin oxide. The structure obtained after etching is Figure 7F , wherein the tin oxide material of the second mandrel 709 is exposed. The corresponding isometric view is shown in FIG. Fig. 8EAs shown. Next, the second mandrel 709 is removed without completely removing the material of the second spacer present at the sidewalls of the second mandrel. The second mandrel pull can be performed using any of the selective tin oxide etching chemistries described herein. In one implementation, the tin oxide second mandrel is selectively removed relative to the second spacer (e.g., silicon oxide) material using a hydrogen-based etching chemistry. After removing the tin oxide second mandrel, the substrate includes a plurality of second spacers on the ESL layer. The number of second spacers is twice the number of second tin oxide mandrels and four times the number of first photoresist mandrels. Figure 7G A spacer 711 on the ESL 703 is shown. Figure 8F The corresponding isometric view is shown. The processing can be further continued in the following manner: similar to any spacer or hard mask processing sequence provided herein (e.g., reference Figures 1D-1F As described above, the underlying layers 703 and 705 are etched at locations not protected by the spacers. The second spacers are then removed after or during patterning of the underlying layers.

[0111] The sequence shown can provide the following processing benefits. First, if SiO2 is used for in-situ sidewall passivation, the tin oxide can be etched to obtain a square spacer (which is twice the size of the second mandrel) with minimal footing and no loss of spacer critical dimension (CD). The square tin oxide spacer with minimal footing meets the requirements of being the second mandrel for second spacer deposition. When the second spacer is a silicon-containing material (e.g., SiO2), the second spacer can be etched using a fluorine-based chemistry that has high selectivity relative to tin oxide. The tin oxide spacer / mandrel can be removed using an H2 chemistry that has high etch selectivity to silicon oxide or other silicon-containing compounds (which can be used as the second spacer material).

[0112] Other oxides serve as mandrels. In some embodiments, in any processing sequence described herein, other oxide materials are used instead of tin oxide. Specifically, oxides of elements that form hydrides with high vapor pressures can be used. Oxides of elements that form volatile hydrides (e.g., hydrides with a boiling point of less than about 20° C., such as less than about 0° C.) are used, where the hydrides are stable and gaseous at processing temperatures. For example, in some embodiments, in any processing sequence described herein, antimony oxide or tellurium oxide can be used instead of tin oxide and etched using similar hydrogen-based chemistry during processing.

[0113] equipment

[0114] The methods described herein can be performed in a variety of equipment configured for etching and deposition. Suitable equipment configured for etching includes: an etching process chamber; a substrate holder in the etching process chamber, which is configured to hold the substrate in place during etching; and a plasma generation mechanism, which is configured to generate plasma in a process gas.

[0115] Examples of suitable equipment include inductively coupled plasma (ICP) reactors, which in certain embodiments may also be suitable for cyclic deposition and activation processes, including for atomic layer etching (ALE) operations and atomic layer deposition (ALD) operations. Although ICP reactors are described in detail herein, it should be understood that capacitively coupled plasma reactors may also be used in some embodiments.

[0116] Fig. 9 A cross-sectional view of an inductively coupled plasma integrated etching and deposition apparatus 900 suitable for performing the plasma etching described herein is schematically shown, an example of which is Reactor, produced by LamResearch Corp. of Fremont, California. The inductively coupled plasma device 900 includes a total processing chamber 924 defined by a chamber wall 901 and a window 911. The chamber wall 901 can be made of stainless steel or aluminum. The window 911 can be made of quartz or other dielectric materials. The optional internal plasma grid 950 divides the total processing chamber into an upper sub-chamber 902 and a lower sub-chamber 903. In most embodiments, the plasma grid 950 can be removed to utilize the chamber space formed by the sub-chambers 902 and 903. The chuck 917 is positioned in the lower sub-chamber 903 near the bottom inner surface. The chuck 917 is configured to receive and hold a semiconductor wafer 919 on which etching and deposition processes are performed. The chuck 917 can be an electrostatic chuck for supporting the wafer 919 when the wafer 919 is present. In some embodiments, an edge ring (not shown) surrounds the chuck 917 and has an upper surface that is approximately in the same plane as the top surface of the wafer 919 (when the wafer is present above the chuck 917). The chuck 917 also includes electrostatic electrodes that can clamp and dechucking the wafer 919. Filters and DC clamp power sources (not shown) can be provided for this purpose. Other control systems can also be provided for lifting the wafer 919 off the chuck 917. The chuck 917 can be charged with an RF power source 923. The RF power source 923 is connected to the matching circuit 921 through the connector 927. The matching circuit 921 is connected to the chuck 917 through the connector 925. In this manner, the RF power source 923 is connected to the chuck 917. In various embodiments, the bias power of the electrostatic chuck can be set at about 50Vb, or can be set at a different bias power, depending on the process performed according to the disclosed embodiments. For example, the bias power may be set between about 20 Vb and about 100 Vb, or between about 30 Vb and about 150 Vb.

[0117] Elements for plasma generation include a coil 933 located above the window 911. In some embodiments, no coil is used in the disclosed embodiments. The coil 933 is made of a conductive material and includes at least one full turn. Fig. 9The example of the coil 933 shown in the figure includes three turns. The cross-section of the coil 933 is shown with symbols, and the coil 933 with the symbol "X" indicates that the coil 933 extends rotationally into the page, while the coil 933 with the symbol "●" indicates that it extends rotationally out of the page. The element for plasma generation also includes an RF power source 941 configured to provide RF power to the coil 933. Generally, the RF power source 941 is connected to the matching circuit 939 through a connector 945. The matching circuit 939 is connected to the coil 933 through a connector 943. In this way, the RF power source 941 is connected to the coil 933. An optional Faraday shield 949a is positioned between the coil 933 and the window 911. The Faraday shield 949a can be maintained in a spaced relationship relative to the coil 933. In some embodiments, the Faraday shield 949a is disposed directly above the window 911. In some embodiments, the Faraday shield 949b is disposed between the window 911 and the chuck 917. In some embodiments, the Faraday shield 949b is not held in a spaced relationship relative to the coil 933. For example, the Faraday shield 949b can be located directly below the window 911 without a gap. The coil 933, the Faraday shield 949a and the window 911 are each configured to be substantially parallel to each other. The Faraday shield 949a can prevent metal or other substances from being deposited on the window 911 of the processing chamber 924.

[0118] Processing gas (such as H2 and He etc.) can flow into the processing chamber through one or more main gas inlet 960 and / or one or more side gas inlet 970 located in the upper sub-chamber 902. Similarly, although not explicitly shown, similar gas inlet can be used to supply processing gas to the capacitively coupled plasma processing chamber. A vacuum pump, such as a one-stage or two-stage dry mechanical pump and / or a turbomolecular pump 940, can be used to extract the processing gas from the processing chamber 924 and maintain the pressure in the processing chamber 924. For example, a vacuum pump can be used to evacuate the lower sub-chamber 903 during a cleaning operation. A valve-controlled conduit can be used to connect the vacuum pump fluid to the processing chamber 924 so as to selectively control the application of the vacuum environment provided by the vacuum pump. During the operation of the plasma treatment process, this can be performed using a closed loop controlled flow limiting device such as a throttle valve (not shown) or a pendulum valve (not shown). Similarly, a vacuum pump and a valve that are controlled to be fluidly connected to the capacitively coupled plasma processing chamber can also be used.

[0119] During operation of the apparatus 900, one or more process gases (e.g., H2-containing gases for hydrogen-based etching) may be supplied through gas inlets 960 and / or 970. In certain embodiments, the process gas may be supplied only through the main gas inlet 960, or only through the side gas inlet 970. In some cases, the gas inlet shown in the figure may be replaced by a more complex gas inlet, for example, by one or more shower heads. The Faraday shield 949a and / or the optional grid 950 may include internal channels and holes that enable the process gas to be delivered to the process chamber 924. One or both of the Faraday shield 949a and the optional grid 950 may serve as shower heads for delivering process gases. In some embodiments, the liquid evaporation and delivery system may be located upstream of the process chamber 924 so that once the liquid reactant or precursor is evaporated, the evaporated reactant or precursor is introduced into the process chamber 924 through the gas inlet 960 and / or 970.

[0120] RF power is supplied from RF power source 941 to coil 933 to cause RF current to flow through coil 933. The RF current flowing through coil 933 generates an electromagnetic field around coil 933. The electromagnetic field generates an induced current in upper sub-chamber 902. Physical and chemical interactions of the generated ions and radicals with wafer 919 etch features on wafer 919 and selectively deposit layers on wafer 919.

[0121] If a plasma grid 950 is used so that both an upper sub-chamber 902 and a lower sub-chamber 903 exist, the induced current acts on the gas present in the upper sub-chamber 902 to produce an electron-ion plasma in the upper sub-chamber 902. The optional internal plasma grid 950 limits the amount of hot electrons in the lower sub-chamber 903. In some embodiments, the apparatus 900 is designed and operated so that the plasma present in the lower sub-chamber 903 is an ion-ion plasma.

[0122] Both the upper electron-ion plasma and the lower ion-ion plasma may contain cations and anions, although the ion-ion plasma will have a greater ratio of anions: cations. Volatile etching and / or deposition byproducts can be removed from the lower subchamber 903 through port 922. For example, tin hydride produced during etching of tin oxide using H2 plasma can be removed through port 922 during sweeping and / or extraction. The chuck 917 disclosed herein can operate in an elevated temperature range between about 10°C and about 250°C. The temperature will depend on the processing operation and the specific recipe. In some embodiments, the device is controlled to etch at a temperature below about 100°C.

[0123] The apparatus 900 can be coupled to a facility (not shown) when installed in a clean room or manufacturing plant. The facility includes piping that provides process gases, vacuum, temperature control, and environmental particle control. These facilities are connected to the apparatus 900 when installed in the target manufacturing plant. In addition, the apparatus 900 can be coupled to a transfer chamber that allows semiconductor wafers to be transferred into and out of the apparatus 900 by a robot using typical automation.

[0124] In some embodiments, a system controller 930 (which may include one or more physical or logical controllers) controls some or all operations of the process chamber 924. The system controller 930 may include one or more memory devices and one or more processors. In some embodiments, the apparatus 900 includes a switching system for controlling the flow rate of the process gas. In some embodiments, the controller includes program instructions for causing the steps of any method provided herein.

[0125] In some implementations, the system controller 930 is part of a system, which can be part of the above examples. Such a system may include a semiconductor processing device, which includes one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (wafer pedestals, gas flow systems, etc.). These systems can be integrated with electronic devices for controlling their operation before, during, and after processing semiconductor wafers or substrates. Electronic devices can be integrated into the system controller 930, which can control various elements or subcomponents of one or more systems. Depending on the type of processing parameters and / or system, the system controller can be programmed to control any of the processes disclosed herein, including controlling process gas delivery, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, wafer transfer in and out of tools and other transport tools and / or load locks connected to or connected to a specific system through an interface.

[0126] Broadly speaking, the system controller 930 can be defined as an electronic device with various integrated circuits, logic, memory and / or software that receives instructions, issues instructions, controls operations, enables cleaning operations, enables endpoint measurements, etc. The integrated circuit can include a chip in the form of firmware that stores program instructions, a digital signal processor (DSP), a chip defined as an application specific integrated circuit (ASIC), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). The program instructions can be instructions communicated to the controller in the form of various separate settings (or program files) that define operating parameters for performing a specific process on or for a semiconductor wafer or system. In some embodiments, the operating parameters can be part of a recipe defined by a process engineer for completing one or more processing steps during the preparation or removal of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0127] In some implementations, the system controller 930 may be part of or coupled to a computer that is integrated with, coupled to, or connected to the system or a combination thereof via a network. For example, the controller may be in the "cloud" or all or part of a wafer fab host system that may allow remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of a manufacturing operation, check the history of past manufacturing operations, check trends or performance criteria for multiple manufacturing operations, change parameters of a current process, set processing steps to follow the current process, or start a new process. In some examples, a remote computer (e.g., a server) may provide a processing recipe to the system via a network that may include a local network or the Internet. The remote computer may include a user interface that enables input or programming of parameters and / or settings, which are then communicated from the remote computer to the system. In some examples, the system controller 930 receives instructions in the form of data that specify parameters for each processing step to be performed during one or more operations. It should be understood that the parameters may be for the type of process to be performed and the type of tool that the controller is configured to connect to or control. Thus, as described above, the system controller 930 can be distributed, for example, by including one or more discrete controllers that are networked together and work toward a common goal (e.g., the processing and control described herein). An example of a distributed controller for these purposes can be one or more integrated circuits on the chamber that communicate with one or more remote integrated circuits (e.g., at the platform level or as part of a remote computer) that are combined to control the processing on the chamber.

[0128] Example systems may include, but are not limited to, plasma etch chambers or modules, deposition chambers or modules, spin cleaning chambers or modules, metal plating chambers or modules, cleaning chambers or modules, chamfer edge etch chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, ALD chambers or modules, ALE chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing system that may be associated with or used in the preparation and / or manufacture of semiconductor wafers.

[0129] As described above, depending on one or more processing steps to be performed by the tool, the controller can communicate with one or more other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, adjacent tools, tools located throughout the factory, a host computer, another controller, or tools used in material handling to move containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing facility.

[0130] Fig.10 Semiconductor processing cluster structure is described, wherein each module is interfaced with a vacuum transfer module 1038 (VTM). The configuration of various modules of "transferring" wafers between multiple storage devices and processing modules can be referred to as a "cluster tool architecture" system. Airtight chamber 1030 (also referred to as a load lock or transfer module) is connected to VTM 1038, which in turn is connected to four processing modules 1020a-1020d, and four processing modules 1020a-1020d can be individually optimized to perform various manufacturing processes. For example, processing modules 1020a-1020d can be implemented to perform substrate etching, deposition, ion implantation, wafer cleaning, sputtering and / or other semiconductor processing. In some embodiments, tin oxide deposition and tin oxide etching are performed in the same module. In some embodiments, tin oxide deposition and tin oxide etching are performed in different modules in the same tool. One or more of the substrate etch processing modules (any of 1020a-1020d) can be implemented as disclosed herein, for example, to deposit conformal films, selectively etch tin oxide, form air gaps, and other suitable functions according to the disclosed embodiments. The airtight chamber 1030 and the processing modules 1020a-1020d can be referred to as "stations". Each station has a facet 1036 connecting the station to the VTM 1038. Within each facet, sensors 1-18 are used to detect the passage of wafer 1026 as it moves between stations.

[0131] The robot 1022 transfers the wafer 1026 between stations. In one embodiment, the robot 1022 has one arm, while in another embodiment, the robot 1022 has two arms, each of which has an end effector 1024 to pick up a wafer (e.g., wafer 1026) for transport. In the atmospheric transfer module (ATM) 1040, the front end robot 1032 is used to transfer the wafer 1026 from the wafer box or front opening wafer box (FOUP) 1034 in the load port module (LPM) 1042 to the airlock 1030. The module center 1028 within the processing module 1020a-1020d is a location for placing the wafer 1026. The aligner 1044 in the ATM 1040 is used to align the wafer.

[0132] In an exemplary processing method, a wafer is placed in one of a plurality of FOUPs 1034 in the LPM 1042. The front-end robot 1032 transfers the wafer from the FOUP 1034 to the aligner 1044, which allows the wafer 1026 to be properly centered before being etched or processed. After alignment, the wafer 1026 is moved into the airlock 1030 by the front-end robot 1032. Since the airlock 1030 has the ability to match the environment between the ATM 1040 and the VTM 1038, the wafer 1026 can be moved between the two pressure environments without being damaged. The wafer is moved from the airlock 1030 through the VTM 1038 and into one of the processing modules 1020a-1020d by the robot 1022. To achieve this wafer movement, the robot 1022 uses an end effector 1024 on each of its arms. Once the wafer 1026 has been processed, it is moved from the process modules 1020a-520d into the airlock 1030 by the robot 1022. From there the wafer 1026 may be moved by the front end robot 1032 into one of a plurality of FOUPs 1034 or to an aligner 1044.

[0133] It should be noted that the computer controlling the wafer movement may be local to the cluster architecture, or it may be located external to the cluster architecture in the manufacturing facility, or at a remote location and connected to the cluster architecture via a network. Fig. 9 The controller can be used Fig.10 A machine-readable medium containing instructions for controlling the processing operations according to the present invention may be coupled to the system controller.

[0134] In some embodiments, a system for processing a semiconductor substrate includes one or more deposition chambers; one or more etching chambers; and a system controller with program instructions for performing any process or sub-process described herein. In some embodiments, the program instructions include instructions for causing the following operations: on a semiconductor substrate having a plurality of tin oxide protrusion features, causing the deposition of spacer material on the horizontal surface and sidewalls of the tin oxide protrusion features; and causing the removal of the spacer material from the horizontal surface of the tin oxide protrusion features to expose the underlying tin oxide without causing the complete removal of the spacer material on the sidewalls of the tin oxide protrusion features. The controller may further include program instructions for the following operations: causing the removal of the tin oxide protrusion features without causing the complete removal of the spacer material previously present on the sidewalls of the tin oxide protrusion features, thereby forming a plurality of spacers on the semiconductor substrate. In some embodiments, the controller includes program instructions for the following operations: by causing a conformal tin oxide layer to be deposited on a semiconductor substrate having a plurality of first mandrels, followed by removing the tin oxide material from the horizontal surface, and by removing the first mandrel, thereby causing the formation of a semiconductor substrate having a plurality of tin oxide protrusion features.

[0135] In some embodiments, an etching apparatus is provided, the etching apparatus comprising: an etching process chamber having an inlet for a process gas; a substrate holder configured to hold a semiconductor substrate in the etching process chamber; and a process controller comprising program instructions for any of the processes and sub-processes provided herein. In some embodiments, the controller comprises instructions for the following operations: causing etching of a spacer material layer coating a plurality of tin oxide protruding features on the semiconductor substrate, thereby completely removing the spacer material from a horizontal surface of the semiconductor substrate, without completely removing the spacer material on the sidewalls of the plurality of tin oxide protruding features.

[0136] In another aspect, a non-transitory computer machine readable medium is provided, wherein it includes code for enabling execution of any of the methods described herein.

[0137] Further implementation

[0138] The apparatus and processes described herein can be used in conjunction with photolithographic patterning tools or processes, for example, for the manufacture or preparation of semiconductor devices, displays, LEDs, photovoltaic panels, and the like. Typically, but not necessarily, such apparatus and processes will be used in a common manufacturing facility or performed together in a common manufacturing facility. Photolithographic patterning of films generally includes some or all of the following steps, each of which can be implemented with multiple possible tools: (1) applying photoresist to a workpiece (i.e., substrate) using a spin coating or spray coating tool; (2) curing the photoresist using a hot plate or oven or a UV curing tool; (3) exposing the photoresist to visible or UV or X-ray light using a tool such as a wafer stepper; (4) developing the resist to selectively remove the resist so that it can be patterned using a tool such as a wet bench; (5) transferring the resist pattern to an underlying film or workpiece by using a dry or plasma assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper. In some embodiments, a system is provided that includes any of the apparatus and steppers described herein.

Claims

1. A method for processing a semiconductor substrate, the method comprising: (a) providing a semiconductor substrate having a patterned photoresist layer covering the tin oxide layer; (b) etching a plurality of openings in the tin oxide layer using the patterned photoresist layer as a mask, wherein etching the plurality of openings comprises etching the tin oxide layer using at least one of a hydrogen-based etch chemistry and a chlorine-based etch chemistry; (c) at least partially removing the photoresist layer using an oxygen-based etch chemistry and forming a plurality of tin oxide mandrels; (d) depositing a layer of spacer material on the tin oxide mandrel such that the spacer material coats the sidewalls of the tin oxide mandrel and the horizontal portions of the tin oxide mandrel; (e) removing the spacer material from the horizontal portion of the tin oxide mandrel, and (f) removing the tin oxide mandrel to form a plurality of spacers on the semiconductor substrate. 2 . The method of claim 1 , wherein (b) comprises etching the tin oxide layer using a hydrogen-based etch chemistry.

3. The method of claim 1, wherein (b) comprises etching the tin oxide layer using a hydrogen-based etch chemistry, and wherein the etching comprises contacting the semiconductor substrate with H2 activated in a plasma and Cl2 activated in a plasma.

4. The method of claim 1 , wherein (b) comprises etching the tin oxide layer using a hydrogen-based etch chemistry, wherein the etching comprises contacting the semiconductor substrate with a plasma formed in a process gas comprising H 2 and Cl 2 , wherein the H 2 concentration in the process gas is at least 50%.

5. The method of claim 1 , wherein (b) comprises etching the tin oxide layer using a hydrogen-based etch chemistry, wherein the etching comprises contacting the semiconductor substrate with a plasma formed in a process gas comprising H 2 and Cl 2 , wherein the H 2 concentration in the process gas is at least 80%.

6. The method of claim 1, wherein the etching of the tin oxide layer in (b) is performed using an etching chemistry that etches tin oxide at a higher etching rate than photoresist.

7. The method of claim 1 , wherein (b) comprises etching the tin oxide layer using a hydrogen-based etch chemistry, wherein the etching comprises forming a plasma in a process gas comprising a hydrogen-containing gas selected from the group consisting of H 2 , HBr, NH 3 , H 2 O, hydrocarbons, and combinations thereof.

8. The method according to claim 1, wherein: The semiconductor substrate provided in (a) includes one or more intermediate layers between the tin oxide layer and the patterned photoresist layer, and wherein etching a plurality of openings in the tin oxide layer using the patterned photoresist layer as a mask includes transferring the pattern of the patterned photoresist layer to the one or more intermediate layers.

9. The method according to claim 1, wherein: After the openings in the tin oxide layer are formed, the photoresist is completely removed in (c).

10. The method according to claim 1, further comprising: (g) etching one or more underlying layers using the plurality of spacers as a mask after (f).

11. The method according to claim 1, wherein: Removing the tin oxide mandrels in (f) includes etching the tin oxide mandrels using a hydrogen-based etch chemistry.

12. The method of claim 1, wherein removing the tin oxide mandrels in (f) comprises etching the tin oxide mandrels using a hydrogen-based etch chemistry by exposing the semiconductor substrate to a process gas comprising a gas selected from the group consisting of H2, HBr, NH3, and combinations thereof.

13. The method according to claim 3, wherein the process gas used to etch the tin oxide layer further comprises an inert gas.

14. The method according to claim 3, wherein the process gas used to etch the tin oxide layer further comprises an inert gas selected from the group consisting of argon, N2 and combinations thereof.

15. The method of claim 1, wherein removing the spacer material from the horizontal portion of the tin oxide mandrel comprises using an etch chemistry that etches the spacer material at a faster rate than the tin oxide layer.

16. The method of claim 1, wherein the spacer material is selected from the group consisting of silicon-containing materials, carbon-containing materials, and metal oxides.

17. The method of claim 1, wherein the spacer material is a silicon-containing material, and wherein (e) comprises removing the spacer material from horizontal surfaces selectively to tin oxide using a fluorocarbon etch chemistry.

18. The method of claim 1, wherein (c) comprises removing the photoresist using an oxygen-based etch chemistry to expose the tin oxide layer.

19. The method of claim 1, further comprising: (g) After (f), forming a plurality of openings in an etch stop layer and a target layer using the spacer, the etch stop layer being located below the spacer and the target layer being located below the etch stop layer.

20. A method for processing a semiconductor substrate, the method comprising: (a) providing a semiconductor substrate having a patterned photoresist layer covering a tin oxide layer and one or more intermediate layers between the tin oxide layer and the patterned photoresist layer; (b) etching a plurality of openings in the tin oxide layer using the patterned photoresist layer as a mask, wherein etching the plurality of openings comprises transferring the pattern of the patterned photoresist layer to the one or more intermediate layers and simultaneously completely removing the photoresist; (c) etching the tin oxide layer using at least one of a hydrogen-based etch chemistry and a chlorine-based etch chemistry and forming a plurality of tin oxide mandrels; (d) depositing a layer of spacer material on the tin oxide mandrel such that the spacer material coats the sidewalls of the tin oxide mandrel and the horizontal portions of the tin oxide mandrel; (e) removing the spacer material from the horizontal portion of the tin oxide mandrel, and (f) removing the tin oxide mandrel to form a plurality of spacers on the semiconductor substrate.

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