Polyphase AC / DC Converter

Abstract

This case provides a three-phase AC / DC converter to obtain low input current harmonics. The converter includes an input stage for receiving a three-phase AC input voltage, an output stage connected to at least one load, and one or more switching conversion stages, where each switching conversion stage includes a plurality of half-bridge modules. The switches in each half-bridge module operate with a fixed duty cycle of substantially 50%, and are connected in a specific pattern and coupled to the DC side and the neutral point of the input voltage. The AC / DC converter further includes one or more controllers. According to at least one of the load voltage, load current, input voltage, and DC side voltage, the controller adjusts the switching frequency of the switches in the switching conversion stage. The converter may further include one or more decoupling stages, and the decoupling stage may be, for example, an inductor device that decouples the output stage from the switching conversion stage.

Description

Technical Field

[0001] This case relates to a multiphase AC / DC converter, especially a three-phase AC / DC converter with power factor correction (PFC). Background Art

[0002] In the application of three-phase AC / DC, a front-end PFC rectifier is usually required. The PFC rectifier can provide low total harmonic distortion and high power factor in the input three-phase current.

[0003] Figure 1 Shown is a common existing three-phase rectifier that has only one switch. This rectifier performs power factor correction and achieves low total harmonic distortion by operating the boost inductor in discontinuous-conduction mode (DCM), where the boost inductor is fully discharged in each switching cycle. In DCM operation, the line current naturally follows the line voltage, thus improving the total harmonic distortion and power factor. Since the inductor current is not directly controlled, a control method with low bandwidth and fixed switching frequency is mostly adopted. As recorded in relevant literature, the rectifier can achieve a total harmonic distortion of 10% to 20%, which is still acceptable for some applications.

[0004] To further reduce the current distortion in high-power applications, Reference [1] provides Figure 2 the Vienna rectifier shown. The Vienna rectifier can provide efficient AC / DC conversion, low total harmonic distortion in the input current, and high power factor. However, the Vienna rectifier contains too many components, making it unattractive in low-cost applications.

[0005] Figure 3 Shown is a six-switch boost converter where power can flow bidirectionally. According to Reference [2], by using wide-bandgap devices (such as SiC devices), high efficiency and high power density can be provided simultaneously. However, the high cost of wide-bandgap devices makes it difficult for this converter to be widely applied.

[0006] Figure 4 Shown is the two-switch three-phase rectifier proposed in Reference [3]. By connecting capacitors C1, C2, and C3 in a Y-type connection, a virtual neutral point can be obtained. The virtual neutral point is also connected to the midpoint of two switches and the midpoint of output capacitors C O1 and C O2 This connection method enables the three-phase PFC rectifier to operate as three independent single-phase PFC rectifiers, thus partially decoupling the phase currents in most line cycles. As Figure 5As shown, this structure was further improved in Reference [4]. Figure 5 The rectifier in Figure 5 provides better electromagnetic interference (EMI) performance by adding an inductive decoupling stage, making it applicable to applications with rapid high-voltage changes.

[0007] Recently, three-phase power supplies with high input voltages have become increasingly attractive in high-power applications (such as solid-state transformers) because they can provide more power at the same input current. To operate the converter in under high input voltage conditions, one possible approach is to directly replace the low-voltage devices with ultra-high-voltage devices, as described in Reference [5]. However, ultra-high-voltage devices are not currently available on the market, and their prices will also be extremely expensive in the short term. Another possible approach is to cascade the front-end bridge arm circuit to block the high input voltage, as described in Reference [6]. However, this approach requires a large number of active switches for the front-end PFC and also requires multiple DC / DC converters to provide DC current isolation, which will further increase the number of switches in the system. Figures 1 to 5

[0008] References:

[0009] [1] J.W. Kolar and F.C. Zach, “A novel three-phase utility interface minimizing line current harmonics of high-power telecommunications rectifier modules,” IEEE Transactions on Industrial Electronics, vol. 44, no. 4, pp. 456 - 467, Aug. 1997.

[0010] [2] J.W. Kolar and T. Friedli, “The essence of three-phase PFC rectifier systems,” IEEE Trans. Power Electron., vol. 28, no. 1, pp. 176 - 198, Jan. 2013.

[0011] [3] Jianping Ying et al., “Integrated Converter Having Three-Phase Power Factor Correction,” U.S. Pat. No. 7,005,759, issued February 28, 2006. ​

[0012] [4]Yungtaek Jang et al., “Three-Phase Soft-Switched PFC Rectifiers,” U.S. Pat. No. 8,687,388, issued April 1, 2014.

[0013] [5]Madhusoodhanan et al., “Solid-State Transformer and MV Grid Tie Applications Enabled by 15kV SiC IGBTs and 10kV SiC MOSFETs Based Multilevel Converters,” IEEE Transactions on Industry Applications, vol. 51, no. 4, pp. 3343 - 3360, July - Aug. 2015.

[0014] [6]X. She, A. Q. Huang and R. Burgos, “Review of Solid-State Transformer Technologies and Their Application in Power Distribution Systems,” IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 1, no. 3, pp. 186 - 198, Sept. 2013. Summary of the Invention

[0015] According to one aspect of the present invention, there is provided an AC / DC converter, comprising: a plurality of internal terminals, including a positive internal terminal, a negative internal terminal, and a neutral internal terminal; an input stage connected to the positive internal terminal, the negative internal terminal, and the neutral internal terminal, and having at least three input terminals, wherein the at least three input terminals are used to connect to a three-phase AC power supply; a switching stage including a plurality of modules, wherein each module includes a plurality of switches and capacitors, at least one module is connected to the positive internal terminal, at least one module is connected to the negative internal terminal, and at least two modules are connected to the neutral internal terminal; an output stage connected to the positive internal terminal and providing a DC voltage to an output terminal, wherein the output terminal is used to connect to a load; and a controller having a plurality of control signal output terminals connected to all the switches and generating control signals for all the switches.

[0016] In some embodiments, each module includes two switches, and the two switches and the capacitor are connected in series to form a loop. The module connected to the positive internal terminal is connected to the positive internal terminal via a node in the loop, where the node is connected to the two switches in the module. The module connected to the negative internal terminal is connected to the negative internal terminal via a node in the loop, where the node is connected to the two switches in the module. The first of at least two modules connected to the neutral internal terminal is connected to the neutral internal terminal via a node in the loop, where the node is connected to one of the switches and the capacitor in the module. The second of at least two modules connected to the neutral internal terminal is connected to the neutral internal terminal via a node in the loop, where the node is connected to the two switches in the module.

[0017] In some embodiments, the switch stage includes two modules. The first of the two modules is simultaneously the module connected to the positive internal terminal and the first of at least two modules connected to the neutral internal terminal. The second of the two modules is simultaneously the module connected to the negative internal terminal and the second of at least two modules connected to the neutral internal terminal.

[0018] In some embodiments, the switch stage includes (n + m) modules, where n and m are positive integers greater than 1. The (n + m) modules can be divided into n first modules and m second modules. Among the n first modules, the first first module is the module connected to the positive internal terminal, the nth first module is the first of at least two modules connected to the neutral internal terminal, and the ith first module (1 ≤ i ≤ n - 1) is connected to a node in the loop connected to two switches in the (i + 1)th first module via a node in the loop connected to one of the switches and the capacitor in the ith first module. Among the m second modules, the first second module is the second of at least two modules connected to the neutral internal terminal, the mth second module is the module connected to the negative internal terminal, and the jth second module (1 ≤ j ≤ m - 1) is connected to a node in the loop connected to two switches in the (j + 1)th second module via a node in the loop connected to one of the switches and the capacitor in the jth second module.

[0019] In some embodiments, the switching stage includes (2n + 2m) modules, where n and m are positive integers. Each module includes two switches, and the two switches and a capacitor in each module are connected in series to form a loop. The module connected to the positive internal terminal is connected to the positive internal terminal via a node in the loop, where the node is connected to the two switches in the module. The module connected to the negative internal terminal is connected to the negative internal terminal via a node in the loop, where the node is connected to the two switches in the module. The first of at least two modules connected to the neutral internal terminal is connected to the neutral internal terminal via a node in the loop, where the node is connected to the two switches in the module. The second of at least two modules connected to the neutral internal terminal is connected to the neutral internal terminal via a node in the loop, where the node is connected to the two switches in the module.

[0020] In some embodiments, the (2n + 2m) modules can be divided into 2n first modules and 2m second modules. The 2n first modules are paired in pairs, and the 2m second modules are paired in pairs. Each pair of modules has a common point, and the common point is connected to one of the switches and the capacitor in each corresponding module.

[0021] In some embodiments, n equals 1 and m equals 1. The module connected to the positive internal terminal is paired with the first of at least two modules connected to the neutral internal terminal. The module connected to the negative internal terminal is paired with the second of at least two modules connected to the neutral internal terminal.

[0022] In some embodiments, the output stage includes: a plurality of capacitors connected in series between the positive internal terminal and the negative internal terminal; a transformer including a first winding and a second winding, where the first winding has a first end and a second end connected to the neutral internal terminal; a resonant inductor and a resonant capacitor connected in series between an intermediate node of the plurality of capacitors and the first end of the first winding of the transformer; and a full-wave diode bridge arm connected to the second winding of the transformer and the output terminal.

[0023] In some embodiments, the output stage is also connected to the negative internal terminal and the neutral internal terminal.

[0024] In some embodiments, the output stage is a first output stage, the output terminal is a first output terminal, and the load is a first load. The converter further includes a second output stage connected to the negative internal terminal, and the second output stage provides a DC voltage to a second output terminal for connecting to a second load.

[0025] In some embodiments, the output stage is a first output stage, the output terminal is a first output terminal, the positive internal terminal is a first positive internal terminal, and the negative internal terminal is a first negative internal terminal. The converter further includes: a second positive internal terminal and a second negative internal terminal, wherein the input stage is also connected to the second positive internal terminal and the second negative internal terminal; a second switching stage including a plurality of modules connected in series between the second positive internal terminal and the second negative internal terminal; and a second output stage connected to the first and second negative internal terminals and providing a DC voltage to a second output terminal. The first output stage is also connected to the second positive internal terminal.

[0026] According to another concept of this case, this case provides an AC / DC converter, including: a plurality of input terminals for connecting to a three-phase input voltage source; an input filter stage coupled to the plurality of input terminals and connected to a positive node, a negative node, and a neutral node; a switching stage including n half-bridge modules, where n is a positive integer greater than 1, the n half-bridge modules are connected in series between the positive node and the negative node, and the neutral node is connected to the series path between the jth half-bridge module and the (j + 1)th half-bridge module, where 1 ≤ j ≤ n - 1; an output stage connected to the positive node and providing a DC voltage to an output terminal, where the output terminal is used to connect to a load; and a controller generating a plurality of control signals at its plurality of control signal output terminals, where the plurality of control signal output terminals are connected to the n half-bridge modules.

[0027] In some embodiments, each half-bridge module includes a capacitor and two switches, and the two switches and the capacitor are connected in series to form a loop.

[0028] In some embodiments, a first node is connected to the capacitor and one of the switches of the ith half-bridge module, a second node is connected to the two switches of the (i + 1)th half-bridge module, and the first node is connected to the second node, where 1 ≤ i ≤ n - 1.

[0029] In some embodiments, n is a positive even number, and each half-bridge module is paired with another half-bridge module to form a series-connected half-bridge module. Each series-connected half-bridge module has a common node, and the common node is connected to the capacitor and one of the switches of each corresponding half-bridge module.

[0030] In some embodiments, each half-bridge module has a switch connection node connected to its two switches. A pair of half-bridge modules forming any series-connected half-bridge module includes an upper half-bridge module and a lower half-bridge module. All series-connected half-bridge modules are connected in series with each other. In every k series-connected half-bridge modules (2 ≤ k ≤ n / 2), the switch connection node of the upper half-bridge module of the kth series-connected half-bridge module is connected to the switch connection node of the lower half-bridge module of the (k - 1)th series-connected half-bridge module.

[0031] In some embodiments, the input filter stage includes: an EMI filter connected to all input terminals; a three-phase diode bridge arm connected to a positive node and a negative node; a plurality of boost inductors connected to the diode bridge arm and the EMI filter; and a plurality of capacitors, wherein each capacitor is connected between one of the plurality of boost inductors and a neutral node.

[0032] In some embodiments, the output stage is also connected to the neutral node.

[0033] In some embodiments, the plurality of input terminals includes a power neutral terminal, and the output stage is also connected to the power neutral terminal.

[0034] In some embodiments, the output stage includes: a full-wave diode bridge arm connected to an output terminal, wherein the output terminal is used to connect to a load; a plurality of capacitors connected in series between the positive node and the negative node; a transformer including a first winding and a second winding, wherein the first winding has a first end and a second end, and the second winding is connected to the full-wave diode bridge arm; and a resonant inductor and a resonant capacitor connected in series between an intermediate node of the plurality of capacitors and the first end of the first winding of the transformer.

[0035] In some embodiments, the load is a first load, and the output terminal is also connected to a second load.

[0036] According to another concept of this case, this case provides an AC / DC converter, including: a plurality of input terminals for connecting to a three-phase input voltage source; an input filter stage coupled to the plurality of input terminals and connected to a positive node, a negative node, and a neutral node; a first switch stage including n half-bridge modules, where n is a positive integer greater than 1, and the n half-bridge modules are connected in series between the positive node and the negative node, and the neutral node is connected to a series path between the i-th half-bridge module and the (i + 1)-th half-bridge module, where 1 ≤ i ≤ n - 1; a second switch stage including m half-bridge modules, where m is a positive integer greater than 1, and the m half-bridge modules are connected in series between the positive node and the negative node; an output stage connected to the neutral node and a series connection node, where the series connection node is located between the j-th half-bridge module and the (j + 1)-th half-bridge module connected in series in the second switch stage, 1 ≤ j ≤ m - 1, and the output stage also has an output terminal for connecting to a load; and a controller generating a plurality of control signals at its plurality of control signal output terminals, wherein the plurality of control signal output terminals are connected to all the half-bridge modules in the first and second switch stages.

[0037] In some embodiments, the control signals provided by the controller to the second switch stage have a phase shift relative to the control signals of the first switch stage. Description of the Drawings

[0038] Figure 1 Shows a conventional three-phase single-switch PFC DCM boost rectifier circuit.

[0039] Figure 2 Shows a traditional three - phase Vienna PFC rectifier circuit.

[0040] Figure 3 Shows a traditional three - phase six - switch PFC boost rectifier circuit.

[0041] Figure 4 Shows a traditional three - phase two - switch PFC DCM boost rectifier circuit, which has a virtual neutral point and two shunt output capacitors.

[0042] Figure 5 Shows a traditional three - phase two - switch zero voltage switching (ZVS) PFC DCM boost rectifier circuit.

[0043] Figure ⑥A Shows the three - phase four - switch ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case.

[0044] Figure ⑥B Shows the Figure ⑥A Simplified model of the rectifier circuit shown, and the reference directions of voltage and current are shown in the figure.

[0045] Figure ⑥C Shows the Figure ⑥A Key waveforms of the rectifier circuit shown in one switching period.

[0046] Figure ⑥D Is Figure ⑥A An enlarged schematic diagram of the half - bridge module of the AC / DC converter 600 shown.

[0047] Figure ⑦A Shows the general three - phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which includes 6m diodes and 2n half - bridge modules, where m and n are positive integers.

[0048] Figure ⑦B Shows the Figure ⑦A Key waveforms of the rectifier circuit shown in one switching period.

[0049] Figure 8 Shows the general three - phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which further includes a plurality of DC - side capacitors on the basis of 6m diodes and 2n half - bridge modules.

[0050] Figure ⑨AShows the general three-phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which includes 6m diodes and 2n series-connected half-bridge modules.

[0051] Figure ⑨B Shows the Figure ⑨A Key waveforms of the shown rectifier circuit in one switching cycle.

[0052] Figure ⑨C Is Figure ⑨A Enlarged schematic diagram of the shown series-connected half-bridge module.

[0053] Figure 10 Shows the general three-phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which includes two independent loads.

[0054] Figure 11 Shows the general three-phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which includes two independent inductors and two independent loads.

[0055] Figure 12 Shows the general three-phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which includes a blocking capacitor between the virtual neutral point and the midpoint of the two shunt output capacitors.

[0056] Figure 13 Shows the general three-phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, where the input source neutral point is connected to the midpoint of the two shunt output capacitors.

[0057] Figure 14 Shows the general three-phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which includes a surge current controller.

[0058] Figure 15 Shows the general three-phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, where the input bridge rectifier includes a controllable switch.

[0059] Figure 16A Shows the isolated three-phase four-switch ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case.

[0060] Figure 16B Shows the Figure 16A Key waveforms of the shown rectifier circuit in one switching cycle.

[0061] Figure 17A Shows the general isolated three-phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which includes 6m diodes and 2n half-bridge modules.

[0062] Figure 17B Shows the key waveforms of the rectifier circuit shown in the preferred embodiment of this case in one switching cycle. Figure 17A The rectifier circuit shown

[0063] Figure 18 Shows the general isolated three-phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which further includes two transformers and two independent loads based on 6m diodes and 2n half-bridge modules.

[0064] Figure 19 Shows the general isolated three-phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which further includes 2n transformers and 2n independent loads based on 6m diodes and 2n half-bridge modules.

[0065] Figure 20A Shows the general isolated three-phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which includes 6m diodes and 2n series-connected half-bridge modules.

[0066] Figure 20B Shows the Figure 20A The rectifier circuit shown in the key waveforms in one switching cycle.

[0067] Figure 21 Shows the general isolated three-phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which further includes 2n transformers and 2n independent loads based on 6m diodes and 2n series-connected half-bridge modules.

[0068] Figure 22A Shows the general isolated three-phase ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which further includes a frequency controller and a phase-shift controller based on 6m diodes and two sets of 2n series-connected half-bridge modules.

[0069] Figure 22B Shows the Figure 22A The key waveforms of the rectifier circuit shown under phase-shift control in one switching cycle.

[0070] Figure 23 Shows the interleaved or parallel three-phase four-switch ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case.

[0071] Figure 24 Shows the general interleaved or parallel three-phase isolated ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case.

[0072] Figure 25Shows the general interleaved or parallel three-phase isolated ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, where each rectifier switch conversion stage includes 2n independent loads.

[0073] Figure 26A Shows the general interleaved or parallel three-phase isolated ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which includes two transformers and is under phase-shift control.

[0074] Figure 26B Shows the Figure 26A Key waveforms of the shown rectifier circuit during a switching cycle under phase-shift control.

[0075] Figure 27 Shows the general interleaved or parallel three-phase isolated ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which further includes two transformers based on multiple series-connected half-bridge modules and is under phase-shift control.

[0076] Figure 28 Shows the general interleaved or parallel three-phase isolated ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which includes a single transformer and is under phase-shift control, where the transformer has two primary side windings.

[0077] Figure 29 Shows the general interleaved or parallel three-phase isolated ZVS PFC DCM boost rectifier circuit of the preferred embodiment of this case, which includes two transformers and a single load and is under phase-shift control.

[0078] Wherein, the reference numerals are explained as follows:

[0079] 600: Converter

[0080] L1, L2, L3: Boost inductance

[0081] -C1, C2, C3: Capacitor

[0082] 610: EMI filter

[0083] V A 、V B 、V C : Input voltage terminal

[0084] 620: Three-phase diode bridge arm

[0085] 630: Switch conversion stage

[0086] 632, 634: Half-bridge module

[0087] S1, S2, S3, S4: Switch

[0088] C M1 、C M2 : Flying capacitor

[0089] N: Common point

[0090] C O1 、C O2 : Output capacitor

[0091] R: Load

[0092] D1, D2, D3, D4, D5, D6: Diode

[0093] 640: Controller

[0094] L C : Inductor

[0095] 650: Output stage

[0096] V AN 、V BN 、V CN 、V CO1 、V CO2 : Voltage source

[0097] V O : Output voltage

[0098] V CM1 、V CM2 : Voltage

[0099] t0, t1, t2, t3, t4, t5, t6, t7: Time

[0100] i L1 、i L2 、i L3 、i S1 、i S2 、i S3 、i S4 、i LC : Current

[0101] v S1 、v S2 、v S3 、v S4 : Voltage

[0102] GS1, GS2, GS3, GS4: Drive signal

[0103] 601, 602: Node

[0104] S 1a 、S 1b 、S na 、S nb 、S (n+1)a、S (n+1)b 、S 2na 、S 2nb :switch

[0105] D a1 、D am 、D b1 、D bm 、D c1 、D cm 、D d1 、D dm 、D e1 、D em 、D f1 、D fm :diode

[0106] C DC : DC side capacitor

[0107] 633, 635: Series-connected half-bridge modules

[0108] S 1c 、S 1d 、S 2nc 、S 2nd :switch

[0109] 6331, 6332, 6333, 6334: Half-bridge units

[0110] C M11 、C M12 、C M21 、C M22 :capacitance

[0111] R1, R2: load

[0112] L O1 , L O2 :inductance

[0113] C B : Blocking capacitor

[0114] C DC1 、C DC2 : DC side capacitor

[0115] M: midpoint

[0116] L r : Resonant inductor

[0117] C r : Resonant capacitor

[0118] i Lr : Resonant current

[0119] v MN :Voltage

[0120] TR, TR1, TR2: Transformers Detailed implementation manners

[0121] Some typical embodiments reflecting the features and advantages of this case will be described in detail in the following description. It should be understood that this case can have various variations in different aspects, all of which do not deviate from the scope of this case, and the descriptions and illustrations therein are essentially for illustrative purposes rather than for limiting this case.

[0122] The inventors have recognized that for high input voltage and high-power applications, a three-phase rectifier with high scalability, low cost, low input current harmonics, and high power factor is required. This case relates to a three-phase AC / DC converter that provides extremely low total harmonic distortion of input current and good power factor, and can achieve soft-switching for active switches. In addition, this case will simultaneously describe the implementation aspects of isolated and non-isolated rectifiers.

[0123] Figure ⑥A The three-phase ZVS PFC DCM low-input-current-harmonics AC / DC converter 600 (also referred to as the rectifier circuit 600) showing the preferred embodiment of this case is illustrated. The converter 600 includes three boost inductors L1, L2, and L3 and three capacitors C1, C2, and C3 connected in a Y-type or star configuration, where the three boost inductors L1, L2, and L3 are coupled to the three-phase input voltage terminals V A , V B and V C . After the boost inductors L1, L2, and L3 are a three-phase diode bridge arm 620 and a switching conversion stage 630. The switching conversion stage 630 includes two half-bridge modules 632 and 634, where each half-bridge module 632, 634 includes two series-connected active switches (i.e., S1 and S2 in the half-bridge module 632, and S3 and S4 in the half-bridge module 634), and is coupled to a flying capacitor (i.e., C M1 corresponding to the half-bridge module 632, and C M2 corresponding to the half-bridge module 634). In some embodiments, the switches S1, S2, S3, and S4 can be metal-oxide-semiconductor field-effect transistors (MOSFETs) or insulated gate bipolar transistors (IGBTs) with anti-parallel diodes, but are not limited thereto, and can also be any suitable switch type.

[0124] Figure ⑥D is Figure ⑥A an enlarged schematic diagram of the half-bridge modules 632, 634 of the AC / DC converter 600 inFigure ⑥A and Figure ⑥D As shown in Figure ⑥D , the output point of the half - bridge module 632 is connected to the positive terminal of the three - phase diode bridge arm 620, and the bottom end of the half - bridge module 632 is connected to the output point of the half - bridge module 634. The bottom end of the half - bridge module 634 is connected to the negative terminal of the three - phase diode bridge arm 620. The common point N of the input filter capacitors C1, C2, and C3 is connected to the bottom end of the half - bridge module 632 and the mid - point of the shunt output capacitors C O1 and C O2 . In this embodiment, the output capacitors C O1 and C O2 (i.e., the output filter capacitors) are coupled via a single load R.

[0125] The capacitors C1, C2, and C3 connected in a Y - shape generate a virtual ground terminal, which is a node having the same potential as the neutral common point N of the input voltage source, and this virtual ground terminal does not physically exist in a three - wire system. The common point N is directly connected to the mid - point between two half - bridge modular circuits (i.e., modules 632 and 634), and the three input currents are decoupled from each other. Due to this decoupling relationship, the current in any one of the inductors L1, L2, or L3 depends only on the corresponding input phase voltage, and thus low total harmonic distortion and high power factor can be obtained.

[0126] The converter 600 may further include a controller 640 to provide switching signals to switches S1, S2, S3, and S4. The switching signals of switches S1 and S4 are the same, and the switching signals of switches S2 and S3 are the same. The duty cycle of the switching signals can be fixed at substantially 50%, and the switching signals of the two switches in each half - bridge module 632, 634 are complementary. The switching signals may include a short dead - time, meaning that each pair of switches turns off slightly earlier than the opposite pair of switches conducts, such that all switches S1, S2, S3, and S4 are briefly in the off state during the dead - time. When switches S1 and S4 are conducting, it can be seen that the common point N is connected to the negative terminal of the three - phase diode bridge arm 620, and switch S3 blocks the voltage of capacitor C M2 , and capacitor C M1 becomes the DC - side capacitor. Similarly, when switches S2 and S3 are conducting, it can be seen that the common point N is connected to the positive terminal of the three - phase diode bridge arm 620, and switch S1 blocks the voltage of capacitor C M1 , and capacitor C M2 becomes the DC - side capacitor. Therefore, the capacitor voltage on capacitor C M1 or C M2 is equal to the output voltage, and in this configuration, each of the switches S1, S2, S3, and S4 needs to block the entire output voltage.

[0127] In some embodiments, the controller 640 can be used to change the switching frequencies of switches S1, S2, S3, and S4 based on at least one of the following information: input three-phase voltage, input three-phase current, DC-link capacitor voltage, output voltage, and output current. Any suitable device can be used to measure the voltage or current for the controller to perform control, such as an analog-to-digital converter, a current-voltage converter, and so on. The minimum switching frequency depends on full load and the minimum input voltage, while the maximum switching frequency depends on light load and the maximum input voltage. If the AC / DC converter is required to operate under extremely light load or no load, in order to avoid extremely high-frequency operation, a controllable burst mode or pulse skip mode can be adopted. Pulse-width modulation control is another possible control scheme for the converter, but it cannot achieve ZVS within the full-load range. The switching frequency can be determined by the controller in any suitable manner according to the sensed values. For example, the variable-frequency control described in reference [4] can also be applied to many embodiments.

[0128] In Figure ⑥A the operation of the circuit, the difficulty lies in balancing the flying capacitors C M1 and C M2 of the half-bridge modules 632 and 634. During operation, the voltages of the capacitors C M1 and C M2 of the half-bridge modules 632 and 634 can be sensed. When an unbalanced voltage is detected, the controller will adjust the duty cycles of switches S1, S2, S3, and S4. To improve the reliability of the converter 600, it is preferable that the capacitors C M1 and C M2 in the half-bridge modules 632 and 634 have relatively large capacitance values, thereby reducing the possibility of voltage imbalance during operation.

[0129] By operating the boost inductor in DCM and adopting a variable-frequency modulation control strategy, the converter 600 can provide lower total harmonic distortion of the input current, higher power factor, and ZVS of the switches. In addition, in the case of multiple series-connected loads, the common-mode noise in the converter 600 is reduced, and the shunt capacitors can be automatically balanced.

[0130] In each switching cycle, the voltages at the positive and negative terminals of the three-phase diode bridge arm 620 may change rapidly, resulting in a high dV / dt value. In some embodiments, the inductor L C is connected between the switch conversion stage 630 and the output stage 650 to isolate the output from these rapid high-voltage changes, thereby avoiding the generation of unacceptable common-mode EMI noise.

[0131] Figure ⑥B shows Figure ⑥AA simplified model of the converter 600 in FIG. Figure ⑥B To simplify the analysis of circuit operation, it is assumed that the input filter capacitors C1, C2 and C3 and the output capacitor C O1 and C O2 The ripple voltage of the output filter capacitor can be ignored, so the voltage of these capacitors is set to a constant voltage source V AN 、V BN 、V CN 、V CO1 and V CO2 Since the capacitors C in the half-bridge modules 632 and 634 M1 and C M2 The average voltage on the O (V O =V CO1 +V CO2 ), so the capacitors C in the half-bridge modules 632 and 634 M1 and C M2 As constant voltage V CM1 and V CM2 The semiconductors in the circuit are assumed to be ideal switches with zero on-resistance. Figure ⑥B The output capacitance is shown in Figure 2 to illustrate the transient changes during switching. Finally, the coupled inductor L C It is considered as an ideal transformer to simplify the analysis.

[0132] Figure ⑥C The key waveforms of the power stage in a switching cycle of the preferred embodiment of the present invention are shown. Figure ⑥C The reference direction of the current and voltage in the line cycle corresponds to the 60-degree segment (i.e., at V AN >0, V BN <0 and V CN <0 hours). Figure ⑥C As shown in the gate drive timing of switches S1 to S4 in FIG, switches S1 and S2 operate complementary to each other, with a short dead time between the turn-on of one switch and the turn-off of the other (e.g., the period from t4 to t3). Switches S1 and S4 have the same gate drive signal, while switches S2 and S3 have the same gate drive signal.

[0133] At t=t0, according to the gate control strategy, switches S2 and S3 are turned on at zero voltage at the same time. The voltage on L1 becomes V AN (That is, the phase voltage of phase A). The current i flowing through L1 L1 Start with V AN / L1 rises at a rate of L1 The inductor current i L1The peak value appears at t3 and is approximately:

[0134]

[0135] where Ts is the switching period. The voltage across L2 is V BN +V CM2 and the voltage across L3 is V CN +V CM2 Even if V BN and V CN are negative, the voltages across L2 and L3 are still positive. The currents i L2 and i L3 through inductors L2 and L3 increase continuously at the rates of (V BN +V CM2 ) / L2 and (V CN +V CM2 ) / L2 respectively. Switches S2 and S3 conduct negative current. Applying Kirchhoff’s current law at node 601 gives equation (2).

[0136] i L1 = i LC + i S2 (2)

[0137] It should be noted that the current i Sn (n equals 1, 2, 3, or 4) is the current flowing through each switch model, that is, the sum of the currents flowing through the ideal switch and the corresponding parallel capacitor and diode.

[0138] Since i L1 is nearly zero at t = 0, i S2 equals -i LC . In addition, since i L1 is positive, i S2 is less than i L1 , resulting in reduced power loss in the switches of converter 600. Similarly, applying Kirchhoff’s current law at node 602 gives equation (3).

[0139] i L2 + i L3 + i LC = i S3 (3)

[0140] During t0 to t1, both i S2 and i S3 increase, while the current i LC decreases.

[0141] At t = t1, the current i L2rises to zero and remains zero until the end of the half-switching period. After the current i L2 becomes zero, at t = t1, the rising slopes of i S2 and i S3 decrease, and the falling slope of the current i LC also decreases.

[0142] At t = t2, the current i L3 rises to zero and remains zero until the end of the half-switching period. After i L3 becomes zero, the rising slopes of i S2 and i S3 further decrease. The current of switch S3 is equal to the current i LC , and the capacitor C M2 continues to supply energy to the load.

[0143] At t = t3, switches S2 and S3 turn off. Part of the inductor current i L1 charges the output capacitor of switch S2 and discharges the output capacitor of switch S1. Once the voltage of the output capacitor of switch S2 is clamped to the voltage of capacitor C M1 , the anti-parallel diode of switch S1 starts to conduct current. Similarly, when the voltage of the output capacitor of switch S3 is clamped to the voltage of capacitor C M2 , the anti-parallel diode of switch S4 starts to conduct current. The current i L1 reaches its peak at t = t3 and then starts to decrease.

[0144] At t = t4, switches S1 and S4 turn on with ZVS. The voltage across inductor L1 is equal to the input voltage minus the voltage of capacitor C M1 . The current i L1 decreases at a rate of (V AN - V CM1 ) / L1. The voltage across inductor L2 becomes V BN , and the voltage across inductor L3 becomes V CN . Therefore, the currents i L2 and i L3 start to decrease at rates of V BN / L2 and V CN / L3 respectively. Applying Kirchhoff's current law at nodes 601 and 602, equations (4) and (5) can be obtained respectively.

[0145] i L1 = i LC - i S1 (4)

[0146] i L2 + i L3 + i LC = -iS4 (5)

[0147] At t=t5, the current i L1 drops to zero and remains at zero until the end of the switching cycle. To operate in DCM, the current i L1 The falling slope from t3 to t5 should be greater than the current i L1 The rising slope from t3 to t5. In other words, the voltage difference V CM1 -V AN should always be greater than the voltage V AN , where V CM1 =V CM2 =V O Therefore, the minimum output voltage can be derived from equation (6).

[0148]

[0149] Among them, V AN,PK is the phase voltage peak value, V L-L,RMS is the line-to-line rms voltage.

[0150] At t=t6, switches S1 and S4 are turned off. L2 and i L3 The peak values can be expressed by equations (7) and (8) respectively.

[0151]

[0152]

[0153] The peak value of any inductor current is proportional to the input voltage in its corresponding phase.

[0154] Finally, at t=t7, switches S2 and S3 are turned on, and a new switching cycle begins.

[0155] It should be noted that in a switching cycle, the inductor current starts at zero and eventually returns to zero. The average inductor current flowing through any inductor in a specific switching cycle is L,AVG > TS It can be calculated by equation (9).

[0156]

[0157] Where, L=L1=L2=L3, V N is the corresponding phase voltage.

[0158] Figure ⑥A The circuit shown may also be implemented in many other ways. For example, Figure ⑦A The embodiment in high voltage application is shown.​Figure ⑦A As shown Figure ⑥A Each diode in the three-phase diode bridge arm 620 in is replaced by m diodes connected in series, thereby blocking the high input voltage. In this embodiment, a passive buffer circuit may be required to balance the blocking voltages of the individual diodes.

[0159] In the switching conversion stage 630, there are a total of 2n half-bridge modules. The midpoint of each half-bridge module is connected to the bottom end of the previous half-bridge module (the half-bridge modules are cascaded). The midpoint of the first half-bridge module is connected to the positive end of the three-phase diode bridge arm, and the bottom end of the last half-bridge module is connected to the negative end of the three-phase diode bridge arm. The common point N of the input filter capacitors is connected to the midpoint between the n half-bridge modules in the upper half and the n half-bridge modules in the lower half, and is also connected to the midpoint of the shunt output capacitors C O1 and C O2 .

[0160] Figure ⑦B Shows the switching signals of all active switches. The control signals of switches S 1a , S 2a to S na are the same as the control signals of switches S (n+1)b , S (n+2)b to S 2nb , and their duty cycles are all fixed at substantially 50%. The control signals of switches S 1b , S 2b to S nb are the same as the control signals of switches S (n+1)a to S 2na , and their duty cycles are also fixed at substantially 50%. The control signals of the two switches in each half-bridge module are complementary. In other words, the upper switches of each half-bridge module in the upper half-bridge arm circuit and the lower switches of each half-bridge module in the lower half-bridge arm circuit conduct and turn off simultaneously, and the lower switches of each half-bridge module in the upper half-bridge arm circuit and the upper switches of each half-bridge module in the lower half-bridge arm circuit conduct and turn off simultaneously. When the upper switches of each half-bridge module in the upper half-bridge arm circuit and the lower switches of each half-bridge module in the lower half-bridge arm circuit conduct, the common point N is connected to the negative end of the three-phase diode bridge arm. Similarly, when the lower switches of each half-bridge module in the upper half-bridge arm circuit and the upper switches of each half-bridge module in the lower half-bridge arm circuit conduct, the common point N is connected to the positive end of the three-phase diode bridge arm.

[0161] When the upper switches of each half-bridge module in the upper half-bridge arm circuit and the lower switches of each half-bridge module in the lower half-bridge arm circuit are turned on, the capacitors of each half-bridge module in the upper half-bridge arm circuit are connected in series with each other to serve as the DC-side capacitor. When the lower switches of each half-bridge module in the upper half-bridge arm circuit and the upper switches of each half-bridge module in the lower half-bridge arm circuit are turned on, the capacitors of each half-bridge module in the lower half-bridge arm circuit are connected in series with each other to serve as the DC-side capacitor. Since the voltage of the DC-side capacitor is equal to the output voltage, the voltage of each capacitor in each half-bridge module is only 1 / n of the total output voltage, so that each switch only needs to block 1 / n of the total output voltage. Thus, in applications with extremely high input and output voltages, low-voltage switches can still be used.

[0162] During operation, the voltages of all the capacitors in each half-bridge module can be sensed. When a voltage imbalance is detected, the central controller will adjust the duty cycle of the switches. To improve the reliability of the system, it is preferable that the capacitors in the half-bridge module have relatively large capacitance values, thereby reducing the possibility of voltage imbalance during operation.

[0163] Figure 8 Shows an embodiment with an additional DC-side capacitor C DC of the preferred embodiment of the present case. The DC-side capacitor C DC is coupled between the positive output terminal and the negative output terminal of the three-phase diode bridge arm 620. In addition to providing the voltage of the capacitors in the half-bridge module, the DC-side capacitor C DC also provides a DC-side voltage.

[0164] Figure ⑨A Shows the switch conversion stage 630 of the preferred embodiment of the present case, which includes series-connected half-bridge modules 633 and 635. Figure ⑨B Shows in detail all the control signals of the active switches S 1a …S na 、S 1b …S nb 、S 1c …S nc 、S 1d …S nd 、S (n+1)a …S (2n)a 、S (n+1)b …S (2n)b 、S (n+1)c …S (2n)c and S (n+1)d …S (2n)d . Figure ⑨C is Figure ⑨A an enlarged schematic diagram of the series-connected half-bridge modules 633 and 635 shown in.

[0165] Please refer to Figure ⑨A and Figure ⑨C. In this embodiment, two half-bridge modules are connected in series (or "paired") to form a basic module (i.e., the series-connected half-bridge modules 633 and 635). The series-connected half-bridge module 633 includes a first half-bridge unit 6331 and a second half-bridge unit 6332. The first half-bridge unit 6331 includes two switches S 1a and S 1b and a capacitor C M11 , where the switches S 1a and S 1b and the capacitor C M11 are connected in series to form a loop. The connection point between the switches S 1a and S 1b defines the output point of the series-connected half-bridge module 633, and the connection point between the switch S 1b and the capacitor C M11 defines the bottom end of the first half-bridge unit 6331. The second half-bridge unit 6332 includes two switches S 1c and S 1d and a capacitor C M12 , where the switches S 1c and S 1d and the capacitor C M12 are connected in series to form a loop. The connection point between the switch S 1c and the capacitor C M12 defines the top end of the second half-bridge unit 6332, and the connection point between the switches S 1c and S 1d defines the bottom end of the series-connected half-bridge module 633. As shown in Figure ⑨C , by connecting the bottom end of the first half-bridge unit 6331 and the top end of the second half-bridge unit 6332, the first half-bridge unit 6331 and the second half-bridge unit 6332 are connected in series (or "paired") to form the series-connected half-bridge module 633.

[0166] Similarly, the series-connected half-bridge module 634 includes a first half-bridge unit 6333 and a second half-bridge unit 6334. The first half-bridge unit 6333 includes two switches S 2na and S 2nb and a capacitor C M21 , where the switches S 2na and S 2nb and the capacitor C M21 are connected in series to form a loop. The connection point between the switches S 2na and S 2nb defines the output point of the series-connected half-bridge module 634, and the connection point between the switch S 2nb and the capacitor C M21 defines the bottom end of the first half-bridge unit 6333. The second half-bridge unit 6334 includes two switches S 2nc and S 2nd and a capacitor CM22 , wherein the switch S 2nc and S 2nd and the capacitor C M22 are connected in series to form a loop. The connection point between the switch S 2nc and the capacitor C M22 defines the top of the second half-bridge unit 6334, while the connection point between the switch S 2nc and S 2nd defines the bottom of the series-connected half-bridge module 634. As Figure ⑨C shown, by connecting the bottom of the first half-bridge unit 6333 to the top of the second half-bridge unit 6334, the first half-bridge unit 6333 and the second half-bridge unit 6334 are connected in series (or "paired") to form the series-connected half-bridge module 634.

[0167] As Figure ⑨A and Figure ⑨C shown, the output point of the series-connected half-bridge module 633 is connected to the positive terminal of the three-phase diode bridge arm 620, the bottom of the series-connected half-bridge module 633 is connected to the output point of the series-connected half-bridge module 635, and the bottom of the series-connected half-bridge module 635 is connected to the negative terminal of the three-phase diode bridge arm 620. In an embodiment using multiple series-connected half-bridge modules (e.g., 2n series-connected half-bridge modules, where n is a positive integer greater than 2), the bottom of each series-connected half-bridge module is connected to the output point of the next series-connected half-bridge module, all switches operate at a substantially fixed duty cycle of 50%, and the control signals of the two switches in each half-bridge unit are complementary.

[0168] Figure 10 shows an embodiment of the preferred embodiment of the present case with two independent loads R1 and R2. In this embodiment, since the AC / DC converter of the present case can automatically balance the voltages on the two output capacitors C O1 and C O2 , no additional balancing circuit or controller is required.

[0169] Figure 11 shows an embodiment of the preferred embodiment of the present case with two independent inductors L O1 and L O2 . The two independent inductors L O1 and L O2 can replace Figure 10 the coupled inductor L C in.

[0170] Figure 12 shows an embodiment of the preferred embodiment of the present case with an additional blocking capacitor C B . In this embodiment, the blocking capacitor C B is disposed at the neutral point (i.e., the common point N) of the input capacitors C1, C2, and C3 and the output capacitor C O1and C O2 The blocking capacitor C B This prevents any DC current from flowing through the common point N and the output capacitor C O1 、C O2 between.

[0171] Figure 13 FIG3 shows an implementation of a three-phase four-wire system in a preferred embodiment of the present invention. In this embodiment, the output capacitor C O1 and C O2 The midpoint between them is connected to the actual neutral line of the input source.

[0172] Figure 14 The figure shows an implementation of a preferred embodiment of the present invention with an inrush current controller. In this embodiment, the inrush current controller can prevent and / or bypass any high current spikes when the AC / DC converter is connected to an input source. The inrush current controller can be coupled between the input source and input capacitors C1, C2, and C3. Furthermore, the output voltage can be sensed and used in the inrush current controller.

[0173] Figure 15 The embodiment of the preferred embodiment of the present invention is shown in which 6m controllable switches are used to replace 6m input diodes. In this embodiment, the active switches can provide synchronous rectification for the input three-phase bridge leg and enable the converter to operate bidirectionally.

[0174] Figure 16A The embodiment of the preferred embodiment of the present invention includes two half-bridge modules and an isolated output. In this embodiment, the primary side of the isolated AC / DC converter is similar to Figure ⑥A The circuit shown in Figure ⑥A The circuit shown, Figure 16A Lieutenant General Figure ⑥A The coupled inductor L in C The transformer is replaced with a transformer, wherein the transformer includes a primary winding and a secondary winding. One end of the primary winding is coupled to the DC link capacitor C through a resonant circuit. DC1 and C DC2 The midpoint M of the resonant circuit includes the resonant inductor L r and resonant capacitor C r The other end of the primary winding is connected to the common point N. The secondary side of the transformer is connected to a full-wave diode bridge arm.

[0175] Figure 16B The key waveforms of the power stage in a switching cycle of the preferred embodiment of the present invention are shown. Figure 16B The reference direction of the current and voltage in the line cycle corresponds to the 60-degree segment (i.e., at V AN >0, V BN <0 and V CN <0 hours).Figure 16B As shown in the gate drive timing of switches S1 to S4 in, switches S1 and S2 operate complementarily, and the dead time between the conduction of one switch and the turn-off of the other switch is short. Switches S1 and S4 have the same gate drive signal, while switches S2 and S3 have the same gate drive signal. The operating mechanism of the rectifier stage is similar to that of the circuit shown in Figure ⑥A . The additional resonant circuit and transformer are used as a typical series resonant converter. Figure 16B The voltage between points M and N shown in is caused by the switching strategy of this case. Therefore, the DC / DC stage can operate as a series resonant converter, and the resonant current i Lr shows that the operating frequency of the resonant converter is higher than the resonant frequency. It should be noted that Figure 16A the switching stage in can achieve both front-end PFC and DC / DC conversion simultaneously, which is usually achieved by two stages with different switches in the prior art. Therefore, it is confirmed that Figure 16A the embodiment shown in -B can effectively save costs.

[0176] Figure 17A shows an embodiment of the preferred embodiment of this case including 2n half-bridge modules and an isolated output. In this embodiment, each diode in the three-phase diode bridge arm in Figure 16A is replaced by m diodes connected in series to block the high input voltage. And in this embodiment, a passive buffer circuit is required to balance the blocking voltage of each diode. The switching conversion stage includes a total of 2n half-bridge modules, and their connection method is substantially the same as the connection method used for non-isolated output in Figure ⑦A .

[0177] Figure 17B shows the control signals of all active switches. Since the voltage of the DC-side capacitor C DC1 or C DC2 is equal to the sum of the capacitor voltages of each half-bridge module in the upper half-bridge arm circuit or the lower half-bridge arm circuit, the voltage of each capacitor of each half-bridge module is only 1 / n of the DC-side capacitor voltage, so that each switch only needs to block 1 / n of the DC-side capacitor voltage. Thus, low-voltage switches can still be used in applications with extremely high input voltages. In addition, during operation, the voltages of all capacitors in each half-bridge module can be sensed. When voltage imbalance is detected, the central controller will adjust the duty cycle of the switch. To improve the reliability of the system, it is preferable that the capacitors in the half-bridge module have a relatively large capacitance value, thereby reducing the possibility of voltage imbalance during operation. Therefore, there is no need to require a high-voltage DC-side capacitor with a high capacitance value.

[0178] Figure 18 shows an embodiment of the preferred embodiment of this case including 2n half-bridge modules and two isolated outputs. Compared withFigure 17A -B provides only a single output. This embodiment includes two separated resonant circuits, two transformers, and two diode bridge arms, and can provide two outputs. The first isolated output stage is coupled between the positive terminal of the DC bus and the common point N, while the second isolated output stage is coupled between the negative terminal of the DC bus and the common point N. In this circuit, the DC-side capacitor C DC is a non-essential component.

[0179] Figure 19 shows an embodiment of the preferred embodiment of this case including 2n half-bridge modules and 2n isolated outputs. Compared with Figure 17A -B provides only a single output. This embodiment includes 2n separated resonant circuits, 2n transformers, and 2n diode bridge arms, and can provide 2n outputs. Each isolated output stage is coupled to the corresponding half-bridge module, and the peak input voltage of each resonant circuit is 1 / n of the DC-side voltage. The 2n outputs can be further connected in series, in parallel, or in any combination. In this circuit, the DC-side capacitor C DC is a non-essential component.

[0180] ​ shows an embodiment of the preferred embodiment of this case including cascaded half-bridge modules. Similar to the circuit shown in ​ and ​ In this embodiment, two half-bridge modules are connected in series with each other as a basic module. The first output of the first cascaded half-bridge module is connected to the positive terminal of the three-phase diode bridge arm, the second output of each cascaded half-bridge module is connected to the first output of the next cascaded half-bridge module, and the second output of the last cascaded half-bridge module is connected to the negative pole of the three-phase diode bridge arm. All switches operate with a fixed duty cycle of substantially 50%, and the control signals of the two switches in each half-bridge module are complementary. ​ The switching signals of all active switches and the resonant current are shown in detail in

[0181] ​ shows an embodiment of the preferred embodiment of this case including 2n cascaded half-bridge modules and 2n isolated outputs. Compared with ​ which provides only a single output, this embodiment includes 2n separated resonant circuits, 2n transformers, and 2n diode bridge arms, and can provide 2n outputs. Each isolated output stage is coupled to the corresponding cascaded half-bridge module. The 2n outputs can be further connected in series, in parallel, or in any appropriate combination. In this circuit, the DC-side capacitor C DC is a non-essential component.

[0182] ​Shows an implementation aspect of the preferred embodiment of this case, which includes two sets of 2n half-bridge modules. The connection method of the additional 2n half-bridge modules is the same as that of the 2n half-bridge modules in the foregoing embodiment, and is coupled between the positive and negative ends of the three-phase input diode bridge arm. This circuit also includes a transformer and a full-wave diode bridge arm. A filter inductor L is added between the diode bridge arm and the output load. f . The transformer is coupled between the midpoint M of the additional 2n half-bridge modules and the common point N. The 4n half-bridge modules operate as a full-bridge circuit and can be used to implement various control strategies.

[0183] ​ Shows the gate control waveforms of all switches. Switch S 1a to S 2na and S 1b to S 2nb are switched at time t0, and switches S 1c to S 2nc and switches S 1d to S 2nd are switched at time t1. As ​ shown, the phase shift between the two switching times generates the PWM voltage V MN waveform on the transformer TR. All switches operate at a slow-changing switching frequency with a duty cycle close to 50%, so as to achieve low total harmonic distortion and high power factor. Even so, additional control margins are provided in this control method to precisely regulate the output voltage by changing the phase shift angle. In some embodiments, the phase shift angle is less than half a period or less than an integer multiple (modulo) of a complete period (the term "modulo" is used here to indicate that any phase shift adjustment is an integer multiple of a complete period). Taking the ​ shown controller as an example, the voltage on the DC-side capacitor is controlled by a low-bandwidth frequency controller, and the output voltage is controlled by a high-bandwidth phase-shift controller.

[0184] ​ Shows that the ​ shown circuit can be connected in parallel or in an interleaved manner. When operating in a direct parallel connection, the switch signals in each converter are the same as the switch signals shown in ​ . When operating in an interleaved connection, all switch signals in the second module are phase-shifted 180 degrees relative to the switch signals in the first module.

[0185] ​ Shows that the ​ shown circuit can be expanded M times by parallel or interleaved connection. When operating in a direct parallel connection, the switch signals of each converter are the same as those in ​The switch signals shown are the same. When operating in interleaved connection, the switch signals of any converter are phase-shifted by 360 / M degrees from those of the previous or next converter.

[0186] ​ An embodiment with 2nM outputs of the preferred embodiment of this case is shown. That is, the ​ converters shown are expanded M times in parallel or interleaved connection, and each converter includes 2n isolated outputs. In ​ , for clearly showing the overall circuit, the full-wave diode bridge arms are represented by blocks.

[0187] ​ An embodiment of the preferred embodiment of this case including two isolated AC / DC converters connected in parallel with each other is shown, which can precisely adjust the output voltage under phase-shift control. This embodiment includes two transformers and two output diode bridge arms to provide two isolated outputs. The first transformer is coupled between the positive terminal of the DC-side voltage of the first rectifier and the positive terminal of the DC-side voltage of the second rectifier. The second transformer is coupled between the negative terminal of the DC-side voltage of the first rectifier and the negative terminal of the DC-side voltage of the second rectifier. The converter also includes one or more controllers, and the controllers are adapted to change the switching frequencies of all switches according to the DC-side capacitor voltage and / or the output voltage. In addition, the controllers are also adapted to control the output voltage through phase-shift control.

[0188] ​ Shows ​ the key waveforms in the circuit shown, where the boost inductor current of the first rectifier is phase-shifted by 180 degrees relative to the boost inductor current of the second rectifier. The transformer primary-side voltages and resonant currents of the two rectifiers are the same.

[0189] ​ An embodiment of the preferred embodiment of this case including two isolated AC / DC converters connected in parallel with each other is shown, which can precisely adjust the output voltage by changing the phase-shift angle. In this embodiment, instead of using the half-bridge module as the basic component, the series-connected half-bridge module is used as the basic component in the switching conversion stage.

[0190] ​ An embodiment of the preferred embodiment of this case including two isolated AC / DC converters connected in parallel with each other is shown, which can precisely adjust the output voltage by changing the phase-shift angle. In this embodiment, only a single transformer with three windings and one output diode bridge arm are included, and one output is provided instead of two isolated outputs. The first winding is coupled between the positive terminal of the DC-side voltage of the first rectifier and the positive terminal of the DC-side voltage of the second rectifier, and the second winding is coupled between the negative terminal of the DC-side voltage of the first rectifier and the negative terminal of the DC-side voltage of the second rectifier.

[0191] ​ shows that ​ The single transformer in ​ can also be replaced by two transformers TR1 and TR2, where the secondary windings of the two transformers TR1 and TR2 are connected in series with each other.

[0192] For the convenience of explanation and definition of the technical content of this case, terms such as "substantially", "about", "slightly", "relatively", etc. are used to represent the inherent degree of uncertainty, which may be caused by factors such as quantitative comparison, numerical value, sensing, etc. These terms generally mean that the deviation from a given value or range is within 10%, 5%, 1% or 0.5%, and the deviation will not affect the basic function of the corresponding technical feature. Unless otherwise specifically stated, the numerical parameters stated in this disclosure can be regarded as specific numerical values or values within their error ranges.

[0193] It should be noted that the above are only preferred embodiments proposed for the purpose of explaining this case. This case is not limited to the described embodiments, and the scope of this case is determined by the appended claims. And this case can be variously modified by those skilled in this technology, but all are not beyond what is intended to be protected by the appended claims.

Claims

1. An AC / DC converter, comprising: Multiple internal terminals, including a positive internal terminal, a negative internal terminal, and a neutral internal terminal; An input stage connected to the positive internal terminal, the negative internal terminal, and the neutral internal terminal, and having at least three input terminals, wherein the at least three input terminals are used to connect to a three-phase AC power supply; A switching stage comprising multiple modules, wherein each of the modules comprises multiple switches and a capacitor, at least one of the modules is connected to the positive internal terminal, at least one of the modules is connected to the negative internal terminal, and at least two of the modules are connected to the neutral internal terminal; An output stage connected to the positive internal terminal and providing a DC voltage to an output terminal, wherein the output terminal is used to connect to a load; and A controller having multiple control signal output terminals connected to the multiple switches and generating control signals for the switches, Among them, The multiple modules of the switching stage comprise 2n first modules and 2m second modules, and n and m are positive integers, Each of the modules comprises two of the switches, and the two switches and the capacitor in each of the modules are connected in series to form a loop, The module connected to the positive internal terminal is connected to the positive internal terminal via a node in the loop, wherein the node is connected to the two switches in the module, The module connected to the negative internal terminal is connected to the negative internal terminal via a node in the loop, wherein the node is connected to the two switches in the module, The first of the at least two modules connected to the neutral internal terminal is connected to the neutral internal terminal via a node in the loop, wherein the node is connected to the two switches in the module, The second of the at least two modules connected to the neutral internal terminal is connected to the neutral internal terminal via a node in the loop, wherein the node is connected to the two switches in the module.

2. The converter according to claim 1, wherein the 2n first modules are all paired in pairs, the 2m second modules are all paired in pairs, and each pair of the modules has a common point, and the common point is connected to one of the switches and the capacitor in each corresponding module.

3. The converter according to claim 1, wherein the output stage comprises: Multiple capacitors connected in series between the positive internal terminal and the negative internal terminal; A transformer comprising a first winding and a second winding, wherein the first winding has a first end and a second end connected to the neutral internal terminal; A resonant inductor and a resonant capacitor connected in series between an intermediate node of the multiple capacitors and the first end of the first winding of the transformer; and A full-wave diode bridge arm connected to the second winding of the transformer and the output terminal.

4. The converter according to claim 1, wherein the output stage is further connected to the negative internal terminal and the neutral internal terminal.

5. The converter according to claim 1, wherein the output stage is a first output stage, the output terminal is a first output terminal, the load is a first load, and the converter further comprises a second output stage connected to the negative internal terminal, and the second output stage provides a DC voltage to a second output terminal, and the second output terminal is used to connect to a second load.

6. The converter according to claim 1, wherein the output stage is a first output stage, the output terminal is a first output terminal, the positive internal terminal is a first positive internal terminal, the negative internal terminal is a first negative internal terminal, and the converter further comprises: a second positive internal terminal and a second negative internal terminal, wherein the input stage is further connected to the second positive internal terminal and the second negative internal terminal; a second switching stage, comprising a plurality of modules connected in series between the second positive internal terminal and the second negative internal terminal; and a second output stage, connected to the first negative internal terminal and the second negative internal terminal, and providing a DC voltage to a second output terminal, wherein the first output stage is further connected to the second positive internal terminal.

7. An AC / DC converter, comprising: a plurality of input terminals for connecting to a three-phase input voltage source; an input filter stage, coupled to the plurality of input terminals, and connected to a positive node, a negative node, and a neutral node; a switching stage, comprising n half-bridge modules, where n is a positive integer greater than or equal to 4, the n half-bridge modules being connected in series between the positive node and the negative node, the neutral node being connected to the series path between the jth half-bridge module and the (j + 1)th half-bridge module, where 1 ≤ j ≤ n - 1; an output stage, connected to the positive node, and providing a DC voltage to an output terminal, wherein the output terminal is for connecting to a load; and a controller, generating a plurality of control signals at its plurality of control signal output terminals, wherein the plurality of control signal output terminals are connected to the n half-bridge modules, each of the half-bridge modules comprising two switches and a capacitor, and the two switches and the capacitor being connected in series to form a loop, the half-bridge module connected to the positive node being connected to the positive node via a node in the loop, wherein the node is connected to the two switches in the half-bridge module, the half-bridge module connected to the negative node being connected to the negative node via a node in the loop, wherein the node is connected to the two switches in the half-bridge module, the first of the two half-bridge modules connected to the neutral node being connected to the neutral node via a node in the loop, wherein the node is connected to the two switches in the half-bridge module, the second of the two half-bridge modules connected to the neutral node being connected to the neutral node via a node in the loop, wherein the node is connected to the two switches in the half-bridge module.

8. The converter according to claim 7, wherein a first node is connected to the capacitor and one of the switches of the ith half-bridge module, a second node is connected to the two switches of the (i + 1)th half-bridge module, and the first node is connected to the second node, where 1 ≤ i ≤ n - 1.

9. The converter according to claim 7, wherein n is a positive even number, each of the half-bridge modules is paired with another half-bridge module to form a series-connected half-bridge module, and each of the series-connected half-bridge modules has a common node, the common node being connected to the capacitor and one of the switches of each corresponding half-bridge module.

10. The converter according to claim 9, wherein, each of the half-bridge modules has a switch connection node connected to its two switches, A pair of the half-bridge modules forming any one of the series-connected half-bridge modules includes an upper half-bridge module and a lower half-bridge module. All the series-connected half-bridge modules are connected in series with each other. Among every k series-connected half-bridge modules (2 ≤ k ≤ n / 2), the switching connection node of the upper half-bridge module of the kth series-connected half-bridge module is connected to the switching connection node of the lower half-bridge module of the (k - 1)th series-connected half-bridge module.

11. The converter according to claim 7, wherein the input filter stage includes: An EMI filter connected to the plurality of input terminals; A three-phase diode bridge arm connected to the positive node and the negative node; A plurality of boost inductors connected to the diode bridge arm and the EMI filter; and A plurality of capacitors, each of which is connected between one of the plurality of boost inductors and the neutral node.

12. The converter according to claim 7, wherein the output stage is further connected to the neutral node.

13. The converter according to claim 7, wherein the plurality of input terminals includes a power neutral terminal, and the output stage is further connected to the power neutral terminal.

14. The converter according to claim 7, wherein the output stage includes: A full-wave diode bridge arm connected to the output terminal, wherein the output terminal is used to connect to the load; A plurality of capacitors connected in series between the positive node and the negative node; A transformer including a first winding and a second winding, wherein the first winding has a first end and a second end, and the second winding is connected to the full-wave diode bridge arm; And A resonant inductor and a resonant capacitor connected in series between an intermediate node of the plurality of capacitors and the first end of the first winding of the transformer.

15. The converter according to claim 7, wherein the load is a first load, and the output terminal is further connected to a second load.

16. An AC / DC converter, comprising: A plurality of input terminals for connecting to a three-phase input voltage source; An input filter stage coupled to the plurality of input terminals and connected to a positive node, a negative node, and a neutral node; A first switching stage including n half-bridge modules, where n is a positive integer greater than 1, and the n half-bridge modules are connected in series between the positive node and the negative node, and the neutral node is connected to the series path between the ith half-bridge module and the (i + 1)th half-bridge module, where 1 ≤ i ≤ n - 1; A second switching stage including m half-bridge modules, where m is a positive integer greater than 1, and the m half-bridge modules are connected in series between the positive node and the negative node; An output stage connected to the neutral node and a series connection node, where the series connection node is located between the jth half-bridge module and the (j + 1)th half-bridge module connected in series in the second switching stage, 1 ≤ j ≤ m - 1, and the output stage further has an output terminal for connecting to a load; and A controller generating a plurality of control signals at its plurality of control signal output terminals, wherein the plurality of control signal output terminals are connected to all the half-bridge modules in the first switching stage and the second switching stage.

17. The converter according to claim 16, wherein the control signal provided by the controller to the second switching stage has a phase shift relative to the control signal of the first switching stage.

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