Impedance matching

Abstract

Embodiments of the present disclosure relate to impedance matching. A circuit device includes a directional coupler having a first port, a second port, and a third port, where the first port receives a radio frequency signal, the second port outputs a signal in response to the signal received by the first port, and the third port outputs a signal in response to a reflection of the signal at the second port. An impedance matching network is connected between the second port and an antenna. The impedance matching network includes a fixed inductance and capacitance component and a single variable inductance or capacitance component. A diode coupled to the third port of the coupler generates a voltage at a measurement terminal, and the voltage is processed to select and set the inductance or capacitance value of the variable inductance or capacitance component.

Description

[0001] Cross - Reference to Related Applications

[0002] This application claims the benefit of priority of French Patent Application No. 2005058, filed on May 19, 2020, the content of which is incorporated herein by reference in its entirety to the maximum extent legally permitted. Technical Field

[0003] The present disclosure generally relates to electronic circuits, and more particularly to circuits including an antenna for transmitting radio frequency signals. Background Art

[0004] It is known to match the impedance of a radio frequency antenna intended to transmit radio frequency signals with the impedance of a radio frequency source providing the radio frequency signal to be transmitted. Specifically, when the antenna is placed in its operating environment and the environment causes an impedance mismatch between the radio frequency source and the antenna, known devices are capable of matching the impedance of the antenna with the impedance of the radio frequency source.

[0005] However, such known devices have various drawbacks.

[0006] There is a need to overcome all or some of the drawbacks of the aforementioned known impedance matching devices. Summary of the Invention

[0007] One embodiment provides a device that includes: an antenna; a directional coupler including a first port configured to be connected to a source of a radio frequency signal, a second port for directing the signal received by the first port towards its emission, and a third port for directing the signal received by the second port towards its emission; an impedance matching network including fixed-value inductive and / or capacitive components and a single inductive or capacitive value of a settable value, the input terminals of the network being coupled to the second port of the coupler and the output terminals of the network being coupled to the antenna; and a diode coupling the third port of the coupler to the measurement terminals of the device, the measurement terminals being configured to be connected to an analog-to-digital converter.

[0008] According to one embodiment, the matching impedance network is a single impedance matching network of the device.

[0009] According to one embodiment, the device further includes a low-pass filter connected to the measurement terminals.

[0010] According to one embodiment, the component of the settable value is a capacitor.

[0011] According to one embodiment, a matching impedance network includes: a first capacitive component connected between an input terminal of the network and a node configured to receive a reference electric potential; a first inductive component and a second capacitive component connected in series between the input terminal and an output terminal of the network; a second inductive component connected between the output terminal and the node; and a component with a settable value connected between the output terminal and the node.

[0012] According to one embodiment, the value of the component with a fixed value is determined such that after an impedance mismatch caused by a conductive element disposed close to the device, the normalized impedance of the device is within a region determined by all values of the component with a settable value in a Smith chart.

[0013] One embodiment provides an electronic system including the described device.

[0014] According to one embodiment, the electronic system further includes: a source of radio frequency signals connected to a first port of a coupler of the device; and an analog-to-digital converter connected to a measurement terminal of the device.

[0015] According to one embodiment, the electronic system includes a microcontroller, the microcontroller including an analog-to-digital converter, a digital-to-analog converter controlling the component with a settable value, and a processor configured to receive a measurement result from the analog-to-digital converter and provide a control signal to the digital-to-analog converter.

[0016] One embodiment provides a method of using the described device or system, the method including the following sequential steps: a) selecting an initial value of the component with a settable value and measuring the voltage at the measurement terminal; and b) changing the value of the component with a settable value in a determined scan direction and then measuring the voltage at the measurement terminal, step b) being repeated until the last measured voltage is strictly greater than the penultimate measured voltage.

[0017] According to one embodiment, step c) follows step b), step c) determining a set of each value of the component with a settable value corresponding to the minimum voltage measurement result and controlling the component with a settable value such that its value belongs to the set.

[0018] According to one embodiment, the component with a settable value is controlled such that its value is the median of the set.

[0019] According to one embodiment, the method includes the following step: before step a), determining the value of the component with a fixed value of the network such that after an impedance mismatch caused by a conductive element disposed close to the device, the normalized impedance of the device is within a region determined by all settable values of the component in a Smith chart.

[0020] According to one embodiment, determining the values of the components with fixed values comprises the following successive steps: 1) in an anechoic environment, select the values of the network components for which the impedance of the device matches the impedance of the source of the radio frequency signal; 2) calculate the normalized impedance of the device for each value of the components with adjustable values; 3) arrange the conductive element close to the device and calculate the normalized impedance of the device; and 4) repeat steps 2) and 3) by modifying at least one of the values selected in step 1) and / or at least one of the values of the network components with adjustable values, as long as the normalized impedance calculated at step 3) is outside the set of all normalized impedances calculated at step 2).

[0021] According to one embodiment, steps a), b) and c) are implemented in a periodic manner and / or upon request of the user. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In the following description of specific embodiments given by way of illustration and not limitation, the above features and advantages, as well as other features, will be described in detail with reference to the accompanying drawings, in which:

[0023] Figure 1 An example of an impedance matching device is shown in circuit form;

[0024] Figure 2 is shown in a Smith chart Figure 1 of the impedance offsets that the device is capable of correcting;

[0025] Figure 3 An embodiment of an impedance matching device is shown in circuit form;

[0026] Figure 4 is illustrated in the form of a flowchart Figure 3 of the implementation of the method of use of the device;

[0027] Figure 5 illustrates Figure 4 an example of an implementation of the method;

[0028] Figure 6 illustrates Figure 4 another example of an implementation of the method; and

[0029] Figure 7 illustrates Figure 4 yet another example of an implementation of the method. DETAILED DESCRIPTION

[0030] In the various figures, the same features have been denoted by the same reference numerals. Specifically, structural and / or functional features common between the various embodiments may have the same reference numerals and may be provided with the same structure, dimensions and material properties.

[0031] For clarity, only the steps and elements useful for understanding the embodiments described herein are illustrated and described in detail. Specifically, different circuits (e.g., integrated circuits) that can be used as sources of radio frequency signals for impedance matching devices connected to antennas are not described, and the described embodiments and variations are compatible with conventional sources of radio frequency signals.

[0032] In the following description, for example, when the fundamental frequency of a signal is in the range from 3 kHz to 300 GHz, preferably in the range from 100 MHz to 30 GHz, the signal is referred to as radio frequency (RF). In the remainder of this specification, more specifically, so-called sub-gigahertz or sub-GHz RF signals are considered, that is, radio frequency signals whose fundamental frequency is, for example, in the range from 400 MHz to 950 MHz, but the embodiments and variations described more generally apply to all radio frequency signals.

[0033] In the following description, if a first value is respectively less than or equal to a second value, greater than or equal to the second value, the first value is respectively referred to as less than the second value, greater than the second value. Additionally, if the first value is respectively less than and different from the second value, greater than and different from the second value, the first value is respectively referred to as strictly less than the second value, or strictly greater than the second value.

[0034] Unless otherwise specified, when referring to two elements connected together, it means a direct connection without any intermediate element other than a conductor; when referring to two elements coupled together, it means that the two elements can be connected or they can be coupled via one or more other elements.

[0035] In the following disclosure, unless otherwise specified, when referring to absolute position determiners (such as the terms "front", "rear", "top", "bottom", "left", "right", etc.) or relative position determiners (such as the terms "above", "below", "higher", "lower", etc.) or orientation determiners (such as "horizontal", "vertical", etc.), the orientation shown in the figures is referred to.

[0036] Unless otherwise specified, the expressions "about", "approximately", "substantially" and "on the order of" mean within 10%, preferably within 5%.

[0037] Figure 1 An example of the impedance matching circuit device 1 is shown in circuit form.

[0038] Device 1 includes an antenna 2 and an input terminal 100, between which an impedance matching network 3 is connected. Terminal 100 is configured to be connected to a source (not shown) of sub-GHz RF signals intended to be transmitted by antenna 2. The source of sub-GHz RF signals is, for example, an integrated circuit (not shown) having an output terminal configured to transfer the sub-GHz RF signal to be transmitted, and this output terminal is then connected to terminal 100.

[0039] Network 3 includes capacitive components and / or inductive components, or in other words, includes at least one inductive component and / or at least one capacitive component. The inductive and / or capacitive components of network 3 are coupled together and are coupled to a node 102 to which a reference potential is applied, the reference potential being typically ground GND. The inductive and / or capacitive components of network 3 couple the input terminal 301 of network 3 to the output terminal 302 of network 3. Terminals 301 and 302 are connected to terminal 100 and antenna 2 respectively. At least two inductive and / or capacitive components of network 3 have settable values, that is, controlled values. In other words, those components are variable components.

[0040] In Figure 1 the example, network 3 more specifically includes: a variable capacitor C1 having a settable capacitance value, connected between terminal 301 and node 102; a fixed inductor L1 having a fixed inductance value, connected in series between terminal 301 and 302, and a variable capacitor C2 having a settable capacitance value, the inductor L1 being coupled to terminal 301; and a fixed inductor L2 having a fixed inductance value and a variable capacitor C3 having a settable capacitance value, connected in parallel between terminal 302 and node 102.

[0041] When terminal 100 of device 1 is connected to a radio frequency source (not shown) of sub-GHz RF signals, the capacitance values of the variable capacitors C1, C2 and C3 of network 3 are modified during the impedance matching phase such that the impedance seen by the sub-GHz RF signal at terminal 100 is equal to or substantially equal to the conjugate impedance of the source of the sub-GHz RF signal. More precisely, the capacitance values of the variable capacitors C1, C2 and C3 are modified such that, for network 3 under consideration, the power of the sub-GHz RF signal reflected by device 1 towards terminal 100 is as low as possible. In other words, the capacitance values of the variable capacitors C1, C2 and C3 are modified such that the impedance of device 1 matches the impedance of the source of the sub-GHz RF signal.

[0042] To this end, device 1 is associated with a detector (not shown) configured to provide a measurement of the power of the signal reflected towards terminal 100, that is, a measurement of a part of the power of the sub-GHz signal provided to terminal 100 and reflected towards terminal 100 by antenna 2. When the impedance of device 1 matches the impedance of the source and the reflected power is minimal, the detector should be sensitive enough to measure the power of the reflected signal or the reflected power.

[0043] Such detectors (usually logarithmic detectors) are complex and costly to implement. Therefore, it is desirable to be able to use a simpler detector to implement the impedance matching phase.

[0044] Here it is considered that the impedance of device 1 is initially matched to one of the sources of the sub-GHz RF signal, and due to the environment in which device 1 is arranged, the impedance of device 1 is modified. As a result, the impedance of device 1 does not match the impedance of the source. To suppress this impedance mismatch, the impedance matching phase is then implemented in situ in the usage environment of device 1.

[0045] During this impedance matching phase, since network 3 includes at least two variable components with adjustable (capacitive and / or inductive) values, when the values of the components change, the reflected power exhibits multiple local minima, each local minimum corresponding to a different association or combination of the values of the variable components with adjustable values. As a result, the implementation of the impedance matching phase requires trying a very large number of combinations of the values of the variable components with adjustable values to find the minimum reflected power, that is, the local minimum corresponding to the lowest reflected power. Therefore, the duration of the impedance matching phase implemented using a device such as device 1 is very long.

[0046] Especially when device 1 and the source of the sub-GHz RF signal belong to an electronic system powered by a battery, a long impedance matching phase is not desirable. In fact, during the impedance matching phase, even if the impedance of device 1 matches the impedance of the source and the reflected power has a minimum value, the source can transmit the sub-GHz RF signal at the maximum power it can provide, so that the reflected power can still be measured by the detector.

[0047] As a result, the impedance matching phase implemented using device 1 is very power-consuming. Therefore, it is desirable to be able to reduce the duration of the impedance matching phase and the power consumption it generates.

[0048] Figure 2 The impedance offsets that device 1 can correct are shown using a Smith chart.

[0049] The Smith chart is well-known to those skilled in the art. The Smith chart can specifically represent the impedance of a load (here, the impedance of device 1) normalized with respect to a reference impedance (here, the impedance of the source of the sub-GHz RF signal). The impedance of device 1 normalized by the impedance of the source is also referred to as the normalized impedance of device 1. If the chart corresponds to the case where the two impedances are equal to, for example, 50 ohms, the center is O.

[0050] In the Smith chart, a set of reduced impedances belonging to the same circle centered at the center O of the chart corresponds to the same reflection coefficient of the signal on the load, that is, in this example, to the same reflection coefficient of the RF signal on device 1, where the signal is provided by an RF source connected to terminal 100 of device 1. When the coefficient is expressed in dB, this coefficient is currently denoted by the initials RL of Return Loss. The normalized impedances arranged inside such a circle correspond to an RL coefficient that is less than the normalized impedances arranged on the circle.

[0051] Figure 2 Circle 200 corresponding to the normalized impedance of device 1 is shown, where the RL coefficient is equal to a threshold RLth, and the threshold RLth is preferably less than -5 dB, for example, equal to -13 dB in this example. In the following description, for example, if the normalized impedance of device 1 is arranged on or inside circle 200, that is, if the normalized impedance corresponds to an RL coefficient less than or equal to the threshold RLth, it can be considered that the impedance of device 1 matches the impedance of the source that transmits the sub-GHz RF signal to terminal 100.

[0052] Figure 2 The set of normalized impedance device 1 is shown by the region A1 bounded by a solid line. The set of normalized impedance device 1 can be corrected by implementing an in-situ impedance matching phase, that is, it can be intercepted into circle 200 by appropriately modifying the values of the variable components of the adjustable network 3 of device 1. In other words, region A1 represents the set of impedance mismatches of the impedance of device 1 that can be corrected to restore impedance matching with the source. In other words, region A1 represents the set of normalized impedances that device 1 can adopt.

[0053] The inventors have observed that the impedance shift of a device of type device 1 caused by the usage environment of device 1 (i.e., the environment in which device 1 is arranged to be used) is due to the presence of conductive elements (e.g., metal elements, such as pipes) close to the device.

[0054] In addition, when the impedance of device 1 matches that of the source and device 1 experiences an impedance mismatch caused by a conductive element in the vicinity of the device, the normalized impedance of device 1 represented in the Smith chart shifts from the center of the chart to the edge of the chart. The inventors have observed that, regardless of what the conductive element causing the mismatch is and its position relative to device 1, once the conductive element is close enough to modify the impedance of device 1, this displacement of the normalized impedance of device 1 approximately follows the same direction as indicated by arrow 202 in Figure 2 That is to say, the impedance mismatch experienced by device 1 with a given configuration of network 3 and given antenna 2 is predictable because it follows this direction 202.

[0055] Here, the inventors have utilized the fact that Figure 1 the impedance mismatch of devices of the type including a given network 3 and given antenna 2 is predictable. Specifically, the inventors propose to maintain only one variable component with a settable value in the impedance matching network of the device.

[0056] Figure 3 An embodiment of the impedance matching device 1' is shown in circuit form.

[0057] Device 1' is similar to the device 1 in Figure 1 that it includes an antenna 2, a terminal 100, and an impedance matching network 3' that couples the terminal 100 to the antenna 2. The network 3' of device 1' is the single impedance matching network of device 1'.

[0058] Similar to the network 3 described with reference to Figure 1 , the network 3' includes inductive components and / or capacitive components that are coupled together and coupled to node 102. The inductive and / or capacitive components of network 3' couple the input terminal 304 of network 3' to the output terminal 306 of network 3', and the terminals 304 and 306 are respectively coupled to the terminal 100 and the antenna 2, and the terminal 306 is preferably connected to the antenna 2.

[0059] The network 3' differs from the network 3 in that it includes a single variable inductor or capacitor component with a settable value, and the set of other inductive and / or capacitive components in network 3' has fixed values.

[0060] According to one embodiment, the variable component with a settable value is a capacitor, and a variable capacitor with a settable capacitance value is easier to implement than a variable inductor with a settable inductance value. In an alternative embodiment, the variable component with a settable value may alternatively be an inductor.

[0061] According to one embodiment, the components of network 3' are discrete components assembled on a printed circuit board.

[0062] In Figure 3In the example of [0], the network 3' includes: a fixed capacitor C1' with a fixed capacitance value connected between terminal 304 and node 102; a fixed inductor L1 with a fixed inductance value and a fixed capacitor C2' with a fixed capacitance value connected between terminals 304 and 306, the inductor L1 being connected to terminal 304; and a fixed inductor L2 with a fixed inductance value and a variable capacitor C3 with a settable capacitance value connected in parallel between terminal 306 and node 102.

[0063] The capacitance and inductance values of the fixed components with fixed values of the network 3' are determined such that: the normalized impedance of the device 1' subjected to impedance mismatch caused by the conductive element close to the device 1' belongs to the region in the Smith chart corresponding to the set of possible capacitance or inductance values of the variable component with settable values of the network 3', and this region includes the center O of the chart. In other words, the capacitance and inductance values of the fixed components with fixed values of the network 3' are determined such that: the normalized impedance of the device 1' subjected to impedance mismatch caused by the conductive element belongs to the set of normalized impedances that the device 1' can adopt when the capacitance or inductance value of the variable component with settable values is modified. In other words, the values of the components with fixed values of the network 3' are determined such that: the impedance mismatch of the device 1' caused by the conductive element can be corrected by modifying the value of the variable component with its settable capacitance or inductance value.

[0064] For example, for a given network 3' and a given antenna 2, the capacitance and inductance values of the fixed components with fixed values are determined by performing the following successive steps using, for example, a simulation tool:

[0065] 1) Select the capacitance and inductance values of the components of the network 3' so as to allow the impedance of the device 1' to be matched to the impedance of the source of the sub-GHz RF signal when the device 1' is in an anechoic environment;

[0066] 2) For these selected capacitance and inductance values, determine the set of normalized impedances of the device 1', the set of normalized impedances corresponding to the set of possible capacitance or inductance values of the variable component with settable values;

[0067] 3) Sense one or more impedance mismatches through the conductive element and, for each of these impedance mismatches, determine the normalized impedance of the device 1'; and

[0068] 4) Verify whether each normalized impedance determined in step 3) is included in the set of normalized impedances of the device 1' determined in step 2). In other words, step 4) consists of: verifying whether the normalized impedance calculated in step 3) belongs, in the Smith chart, to the region representing the set of normalized impedances acquired by the device 1' when the entire range of possible capacitance or inductance values of the variable component with settable values is scanned.

[0069] After modifying at least one of the values selected in step 1) and / or at least one of the values of the network variable components having settable values, steps 2) and 3) are repeated as long as each normalized impedance calculated in step 3) is outside the set of normalized impedances calculated in step 2). When each normalized impedance calculated in step 3) belongs to the set of normalized impedances calculated in step 2), the determination of the capacitance and inductance values of the fixed components with fixed values of network 3’ ends. The determined capacitance and inductance values are the capacitance and inductance values used during the last implementation of steps 2) and 3).

[0070] A person skilled in the art can determine the capacitance and inductance values of the fixed components with fixed values of the network in a manner different from the above example.

[0071] Referring again to Figure 2 , the region A2 bounded by the dashed line represents the set of normalized impedances of device 1’, and the set of normalized impedances corresponds to the set of possible capacitance or inductance values of the variable components with settable values of network 3’. In Figure 2 , the region A2 represents the previously indicated situation in which the capacitance and inductance values of the fixed components with fixed values of network 3’ have been determined. Therefore, when device 1’ experiences an impedance mismatch caused by a conductive element in its environment, the normalized impedance of device 1’ moves along direction 202. When the normalized impedance of device 1’ stays in region A2, an appropriate modification of the capacitance value of variable capacitor C3 enables the normalized impedance of device 1’ to be brought into circle 200. In other words, when the normalized impedance of device 1’ that has experienced an impedance mismatch stays in region A2, the impedance matching phase enables the normalized impedance of device 1’ to be brought into region A2, that is, enables the impedance of device 1’ to be readjusted using the impedance of the source of the sub-GHz RF signal.

[0072] Due to the fact that the impedance matching network 3’ of device 1’ includes a single variable component with a settable value, the duration of the impedance matching phase implemented using device 1’ is shorter than the duration of the impedance matching phase implemented using a device of type 1’ whose impedance matching network includes at least two variable components with settable values.

[0073] In addition, since network 3’ includes a single variable capacitor C3 with a settable value, when the capacitance value of capacitor C3 changes, the reflected power has a single minimum value, rather than multiple local minimum values as in a device of type 1.

[0074] Here, the inventors have utilized the fact that when the value of variable capacitor C3 changes to use a measurement circuit or detector with a lower sensitivity than that required for the impedance matching phase in a device of the type shown in Figure 1 , there is a single minimum reflected power.

[0075] Indeed, in a device of type 1, due to the presence of multiple local minima of the reflected power, it is necessary to know the values of these local minima in order to determine which of these local minima corresponds to the lowest reflected power. The impedance matching is then carried out by controlling the capacitance or inductance value of the variable components of the network 3 with settable values such that their values are the values corresponding to the local minimum with the lowest reflected power. In contrast, in device 1', since there is only one minimum of the reflected power, it is not necessary to precisely know the corresponding value of the reflected power.

[0076] According to one embodiment, as Figure 3 shown, the detector of device 1' includes a directional coupler 4. The coupler 4 includes a port 401 which is configured to be connected to a source of sub-GHz RF signals, and the port 401 is coupled, preferably connected, to terminal 100. The coupler 4 further includes a port 402. The coupler 4 is configured to transmit the sub-GHz RF signal received by its port 401 to port 402. The port 402 is coupled, preferably connected, to terminal 304 of network 3'. The coupler 4 further includes a port 403. The coupler 4 is configured to transmit the sub-GHz RF signal received by its port 402 to port 403. The sub-GHz RF signal received by port 402 corresponds to the sub-GHz RF signal reflected by the components of network 3' and antenna 2, and the reflected signal propagates towards terminal 100. The signal on port 403 actually corresponds to an attenuated form of the signal received by port 402. This attenuation is caused by the coupling loss between ports 402 and 403 and is, for example, of the order of 20 dB.

[0077] In Figure 3 the example, the coupler 4 further includes a port 404, and an attenuated form of the signal received by port 401 is transmitted towards port 404. This attenuation is caused by the coupling loss between ports 401 and 404 and is, for example, equal to the coupling loss between ports 402 and 403. A resistor 5 is connected between port 404 and node 102 so that the impedance observed from port 404 matches the impedance of port 404 of the coupler 4, which is actually equal to the impedance of the source of sub-GHz RF signals.

[0078] According to another example (not shown), the coupler 4 does not include port 404, and the resistor 5 then forms part of the coupler 4.

[0079] According to an embodiment in which the components of network 3' are discrete components assembled on a printed circuit board, the coupler 4 is a discrete component assembled on the same printed circuit board.

[0080] The detector of device 1' further includes a diode 6, which couples port 403 to measurement terminal 104 of device 1'. The electrode of diode 6 (its anode) is coupled, preferably connected, to port 403, and the other electrode of diode 6 (its cathode) is coupled, preferably connected, to terminal 104.

[0081] Diode 6 is configured to rectify a sub-GHz RF signal present at port 403 and transfer the corresponding rectified voltage Vmes to terminal 104.

[0082] According to one embodiment in which the components of network 3' are discrete components assembled on a printed circuit board, diode 6 is preferably a discrete component assembled on the same printed circuit board.

[0083] The detector of device 1' further includes a low-pass filter 7 connected to terminal 104. Filter 7 is configured to smooth the rectified voltage Vmes present at terminal 104 such that voltage Vmes 104 is a DC voltage. In this example, low-pass filter 7 includes a capacitor 701 connected between terminal 104 and node 102 and a resistor 702 connected between terminal 104 and node 102 in parallel with capacitor 701. The value of resistor 702 is selected such that the impedance observed at port 104 is equal to the impedance of port 403 of coupler 4.

[0084] According to one embodiment in which the components of network 3' are discrete components assembled on a printed circuit board, filter 7 is preferably formed by one or more discrete components assembled on the same printed circuit board.

[0085] Voltage Vmes represents the reflected power. More specifically, the higher and lower the value of voltage Vmes respectively, the higher and lower the reflected power respectively. When the reflected power is minimized, i.e., when the impedance of device 1' matches the impedance of the RF source connected to terminal 100, voltage Vmes is minimized.

[0086] Measurement terminal 104 is configured to be connected to Figure 4 an analog-to-digital converter (ADC) not shown. When the ADC is connected to terminal 104, it forms part of the detector of device 1'. The ADC is configured to transfer a signal or digital code by a plurality of bits, and the digital code represents the value of voltage Vmes and thus the value of the reflected power.

[0087] The ADC includes a conversion range defined by a maximum voltage Vmax and a minimum voltage Vmin. If the value of the voltage Vmes on terminal 104 is greater than or equal to the voltage Vmax, the ADC will indicate that the measured voltage Vmes is equal to the voltage Vmax. If the value of the voltage Vmes on terminal 104 is less than or equal to the voltage Vmin, the ADC will indicate that the measured value Vmes is equal to the voltage Vmin. The voltage Vmin determines the maximum sensitivity of the detector, i.e., the minimum power of the signal transmitted to the detector by port 403, which results in the voltage Vmes on terminal 104 being within the conversion range of the ADC.

[0088] During the impedance matching phase performed in situ, as long as the coefficient RL is greater than the threshold RLlim (in dB) determined by the relationship RLlim = Ds + C – Pi, the voltage Vmes is greater than the voltage Vmin, where Ds is the maximum sensitivity of the detector, in dBm; Pi is the signal power transmitted to terminal 100, in dBm; and C represents the coupling loss between ports 402 and 403, in dB.

[0089] As an example, when the power Pi is equal to 10 dBm, the coupling loss C is equal to 20 dB, and the maximum sensitivity Ds is equal to -23 dBm, the threshold RLlim is equal to -13 dB.

[0090] According to one embodiment, the ADC of device 1’ belongs to a microcontroller (not shown) configured to implement the impedance matching phase by using device 1’. Preferably, the microcontroller includes a digital-to-analog converter or DAC, which is configured to control the variable components (e.g., capacitor C3) with settable values of network 3’. Preferably, the microcontroller further includes a microprocessor that receives data from the ADC and provides the data to the DAC to control the setting of the capacitance and inductance values of the variable components.

[0091] Figure 4 An embodiment of the method of using device 1’ is illustrated in the form of a flowchart. In fact, this usage method corresponds to a method for in situ matching the impedance of device 1’ with the impedance of a radio frequency source connected to terminal 101 of device 1’.

[0092] In this method, the capacitance or inductance value of the variable component is changed, and as long as the measured voltage Vmes decreases or remains constant, the voltage Vmes is measured for each value adopted by the variable component, and as long as the measured voltage Vmes strictly increases, the change in the variable component value stops. This makes it possible to measure the voltage Vmes only on a part of the possible value range of the variable component, which makes it possible to reduce the time required to implement this method. We take advantage here of the fact that when the value of the variable component changes, there is only one minimum value of the reflected power.

[0093] At step 900 (box "Start"), the initial capacitance value Cinit of the variable capacitor C3 is selected. For example, the value Cinit is the current value of the variable capacitor C3 at the start of the method, its maximum value Cmax or its minimum value Cmin, preferably its current value. At step 900, the capacitance and inductance values of the fixed components with fixed values of network 3' have been set as previously described (in advance), and the device 1' and the components of the radio frequency source connected to terminal 100 ( Figure 3 ) are in their operating environment. In fact, the device 1' then forms part of an electronic system that includes an ADC connected to terminal 104 and a circuit for controlling the variable components with adjustable values of network 3'.

[0094] In the next step 902 (box "Set Order"), the scanning direction or rolling direction in which the capacitance value of the variable capacitor C3 starts from the value Cinit is determined, either from the increasing direction or the decreasing direction. More specifically, the increasing or decreasing order of the successive capacitance values of the variable capacitor C3 is determined such that during the subsequent steps of the method, at least the first two measurement results of the voltage Vmes decrease, or in other words, do not increase strictly.

[0095] This step can be implemented by a person skilled in the art, for example, by selecting the scanning direction, by measuring the voltage Vmes of at least the first two successive capacitance values of the variable capacitor C3 for this scanning direction, by verifying whether the selected scanning direction corresponds to a decreasing measured voltage Vmes, and by modifying the scanning direction as needed.

[0096] In the next step 904 (box "Measure"), the voltage Vmes on terminal 104 is measured for the value Cinit of the variable capacitor C3. It should be noted that if the previous step 902 included measuring the voltage Vmes on terminal 104 for the value Cinit, then this step 904 can be omitted.

[0097] In the next step 906 (box "Change Value"), the capacitance value of the variable capacitor C3 is modified with respect to the scanning direction fixed at step 902.

[0098] In the next step 908 (box "Measure"), the voltage Vmes on terminal 104 is measured for the current capacitance value of the variable capacitor C3.

[0099] At the next step 910 (box "Last measurement > Second last measurement"), it is verified whether the last measured voltage Vmes is strictly greater than the second last measured voltage Vmes. Here, we refer to the "measured voltage Vmes" as the measurement result or value of the voltage Vmes provided by the ADC connected to terminal 104. Usually when the voltage Vmes at terminal 104 exceeds the ADC conversion range, the measured voltage Vmes can correspond to a value different from the voltage Vmes actually present at terminal 104.

[0100] If the last measured voltage Vmes is not strictly greater than the second last measured voltage Vmes (branch "No" of box 910), the method continues at step 912 (box "VAL = VALmin or VALmax"). If the last measured voltage Vmes is strictly greater than the second last measured voltage Vmes (branch "Yes" of box 910), the method continues at step 914 (box "End").

[0101] At step 912, it is verified whether the current capacitance value of the variable capacitor C3 is equal to its maximum value Cmax or equal to its minimum value Cmin. More specifically, if the capacitance value of the variable capacitor C3 is scanned in increasing order, it is checked whether the current capacitance value of the variable capacitor C3 is equal to its maximum value Cmax, and if the capacitance value of the variable capacitor C3 is scanned in decreasing order, it is checked whether the current capacitance value of the variable capacitor C3 is equal to its minimum value Cmin.

[0102] If this is the case (branch "Yes" of box 912), the method continues at step 914. If this is not the case (branch "No" of box 912), the process continues at step 906.

[0103] Step 914 includes selecting a capacitance value for the variable capacitor C3 such that the impedance of device 1' can be adapted to the impedance of the source of the sub-GHz RF signal. The variable capacitor C3 is then controlled so that it adopts the selected capacitance value. To this end, the capacitance value of the variable capacitor C3 corresponding to the smallest measured voltage Vmes is determined from all the capacitance values obtained by the variable capacitor C3 in the previous steps, and then the capacitance value of the variable capacitor C3 is selected from this set.

[0104] Regarding Figure 4 The described implementation of the method allows the impedance of device 1' to be adapted to the impedance of the source of the sub-GHz RF signal.

[0105] Indeed, in the case where the set determined in step 914 includes several capacitance values of the variable capacitor C3, these capacitance values all correspond to the measured voltage Vmes that is equal to the voltage Vmin. In other words, these values all correspond to the voltage Vmes on terminal 104, and the voltage Vmes is less than the voltage Vmin of the ADC. Therefore, these capacitance values of the capacitor C3 all correspond to a coefficient RL that is less than the threshold RLlim.

[0106] Furthermore, in the case where the set determined in step 914 includes only one capacitance value, this means that the voltage Vmes corresponding to this capacitance value of the variable capacitor C3 is the smallest, and thus corresponds to the smallest reflected power of the considered device 1'. This occurs when the voltage Vmes has a minimum value greater than the voltage Vmin of the ADC, that is, when the coefficient RL remains above the threshold RLlim regardless of the capacitance value of the variable capacitor C3. Even in this case, the above method can minimize the power reflected by the device 1' as much as possible, and thus can adapt the impedance of the device 1' to the impedance of the sub-GHz RF signal source. This case corresponds, for example, to an impedance mismatch where the normalized impedance of the device 1' does not belong to the region A2( Figure 2 )

[0107] According to one embodiment, the variable component whose capacitance or inductance value can be set is controlled such that its capacitance or inductance value is equal to the median of the set determined in step 914. Using the median here means that in the set, there are as many values below the median as there are above it in the set, and there is at most one value.

[0108] According to one embodiment, the method is implemented according to a request from the user of the device 1' and / or periodically.

[0109] According to one embodiment, the above method is implemented by a microcontroller, which includes an ADC connected to terminal 104 of the device 1' and a control circuit for the variable capacitor C3, such as a DAC. The microcontroller includes a microprocessor or processing unit associated with a memory, and the memory includes instructions that, when read by the microprocessor of the microcontroller, cause the implementation of the method.

[0110] It should be noted that although Figure 3 the implementation of' shows the use of a single variable component as the variable capacitor, the single component can alternatively be one of the inductors. In the case where the variable component is an inductor and the operation is to determine the inductance value that adapts the impedance of the device 1' to the impedance of the sub-GHz RF signal source, the above process also applies.

[0111] Now it will be described with respect to Figure 5 , Figure 6 and Figure 7 ​Figure 4 An example of an implementation of the method.

[0112] Figure 5 Illustrates an example of an implementation of the method Figure 4 described. Figure 5 The example corresponds to the case where, over the entire range of possible capacitance values of the variable capacitor C3, the voltage Vmes on terminal 104 decreases to a minimum value and then increases from that minimum value, and where the minimum value of the voltage Vmes on terminal 104 is less than the minimum voltage Vmin of the ADC.

[0113] Curve 1000 represents the variation of the voltage Vmes on terminal 104 as a function of the capacitance value of the variable capacitor C3 of network 3'. The horizontal axis 1002 represents the voltage Vmin of the ADC connected to the measurement terminal 104 of device 1'. Point 1003 represents the voltage Vmes measured by the detector of device 1', i.e., the measurement result of the voltage Vmes provided by the ADC. In Figure 5 order not to overload the figure, a reduced number of points are shown and only two of these points 1003 are referenced. Each point 1003 is obtained for the corresponding capacitance value of the variable capacitor C3 acquired during the implementation of the method.

[0114] In this example, the capacitance value Cinit of the variable capacitor C3 is the current capacitance value of the variable capacitor C3 at the start of the method ( Figure 4 step 900), and the capacitance value of the variable capacitor C3 is scanned in the increasing direction ( Figure 4 step 902).

[0115] A number of measurements of the voltage Vmes ( Figure 4 step 904) are then performed by modifying the capacitance value of the variable capacitor C3 between every two consecutive measurements ( Figure 4 step 906).

[0116] Until the capacitance value val2 of the variable capacitor C3, each measured voltage Vmes is less than the previously measured voltage Vmes ( Figure 4 step 910, branch "no").

[0117] More specifically, in this example, for the continuously increasing capacitance values of the variable capacitor C3 from the value Cinit to the value val1, each measurement result of the voltage Vmes is strictly less than the previous measurement result of the voltage Vmes, and for the continuously increasing capacitance values of the variable capacitor C3 from the value val1 to the value val2, each measurement result of the voltage Vmes is equal to the previous measurement result of the voltage Vmes.

[0118] On the other hand, when the variable capacitor C3 changes from the capacitance value val2 to the capacitance value val3 ( Figure 4 step 906), the measured voltage Vmes has a value val3 ( Figure 4 step 908) that is strictly greater than the measured voltage Vmes having a value val2 ( Figure 4 step 910, branch “yes”). As a result, without scanning all the capacitance values of the variable capacitor C3, the modification of the capacitance value of the variable capacitor C3 and the measurement of the voltage Vmes for each capacitance value of the variable capacitor C3 are stopped. This can reduce the duration of the implementation of the method as compared to the duration of the implementation of a method in which all the capacitance values of the variable capacitor C3 are scanned.

[0119] Among all the successive capacitance values obtained by the variable capacitor C3, the set of capacitance values corresponding to the smallest measured voltage Vmes is determined ( Figure 4 step 914). In this example, the set includes all the capacitance values of the variable capacitor C3 from the capacitance value val1 to the capacitance value val2, which all correspond to a voltage Vmes on terminal 104 that is less than the voltage Vmin and thus corresponds to a coefficient RL that is less than the threshold RLlim. The capacitance value val4 of the variable capacitor C3 is then selected from this set, and the variable capacitor C3 is controlled so that its capacitance value is equal to the selected capacitance value.

[0120] Preferably, the capacitance value val4 is the median capacitance value of the set. In Figure 5 this case, this can make it closer to the smallest reflected power as compared to randomly selecting the capacitance value val4 in the set.

[0121] Figure 6 illustrates another example of the implementation manner of the method described with respect to Figure 4 . Figure 6 The example corresponds to the case where, over the entire range of possible capacitance values of the variable capacitor C3, the voltage Vmes only decreases when the capacitance value of the variable capacitor C3 is scanned in increasing order; and where the voltage Vmes on terminal 104 takes a value less than the minimum voltage Vmin of the ADC.

[0122] Curve 1004 represents the variation of the voltage Vmes on terminal 104 with the capacitance value of the variable capacitor C3 of network 3’. As shown in Figure 5 , axis 1002 represents the voltage Vmin, and point 1003 represents the voltage Vmes measured by the detector of device 1’. The number of points represented and the number of reference points are reduced so as not to overload the figure. Each point 1003 is obtained for the corresponding capacitance value of the variable capacitor C3 acquired during the implementation of the method.

[0123] In this example, the capacitance value Cinit of the variable capacitor C3 is the current capacitance value of the variable capacitor C3 at the start of the method ( Figure 4 step 900 in Figure 4 ), and the capacitance value of the variable capacitor C3 is scanned in increasing order (

[0124] By modifying the capacitance value of the variable capacitor C3 between every two consecutive measurements ( Figure 4 step 906 in Figure 4 ), a number of measurements of the voltage Vmes are performed (

[0125] Until the capacitance value Cmax, each measured voltage Vmes is less than or equal to the previously measured voltage Vmes ( Figure 4 step 910 in

[0126] More specifically, in this example, for the capacitance values of the variable capacitor C3 from the Cinit value to the capacitance value val5, each measurement result of the voltage Vmes is strictly less than the previous measurement result of the voltage Vmes, and for the capacitance values of the variable capacitor C3 from the capacitance value val5 to the value Cmax, each measurement result of the voltage Vmes is equal to the previous measurement result of the voltage Vmes.

[0127] The set of capacitance values corresponding to the minimum measured voltage Vmes is then determined ( Figure 4 step 914 in

[0128] The capacitance value val6 of the variable capacitor C3 is then selected from this set of capacitance values of the variable capacitor C3, and the variable capacitor C3 is controlled such that its capacitance value is equal to the selected capacitance value.

[0129] Figure 7 illustrates yet another example of the implementation of the method described with respect to Figure 4 The example in Figure 7 corresponds to the case where, over the entire range of possible capacitance values of the variable capacitor C3, the voltage Vmes at terminal 104 decreases to a minimum value and then increases from that minimum value, and the minimum voltage Vmes at terminal 104 is greater than the voltage Vmin of the ADC.

[0130] Curve 1006 represents the variation of the voltage Vmes on terminal 104 as a function of the capacitance value of the variable capacitor C3 of network 3’. The horizontal axis 1002 represents the voltage Vmin. The points 1003 represent the voltage Vmes measured by the detector of device 1’, and the number of points represented and the number of reference points have been reduced so as not to overload the figure. Each point 1003 is obtained for the corresponding capacitance value of the variable capacitor C3 acquired during the implementation of the method.

[0131] In this example, the capacitance value Cinit of the variable capacitor C3 is the current capacitance value of the variable capacitor C3 at the start of the process ( Figure 4 step 900), and the capacitance value of the variable capacitor C3 is scanned in the increasing direction ( Figure 4 step 902).

[0132] A number of measurements of the voltage Vmes ( Figure 4 step 904) are performed by modifying the capacitance value of the variable capacitor C3 between every two consecutive measurements ( Figure 4 step 906).

[0133] Until the capacitance value val7, each measured voltage Vmes is strictly less than the previously measured voltage Vmes ( Figure 4 step 910, branch “no”). On the other hand, when the variable capacitor C3 adopts the capacitance value val8 after the value val7 ( Figure 4 step 906), the measurement result of the voltage Vmes corresponding to the capacitance value val8 ( Figure 4 step 908) is strictly greater than the previous measurement result of the voltage Vmes corresponding to the capacitance value val7 ( Figure 4 step 910, branch “yes”). As a result, without scanning all the capacitance values of the variable capacitor C3, the modification of the capacitance value of the variable capacitor C3 and the measurement of the voltage Vmes for each capacitance value of the variable capacitor C3 are stopped. This can reduce the duration of the implementation of the method compared to the duration of the implementation of a method in which all the capacitance values of the variable capacitor C3 would be scanned.

[0134] Here, the set of capacitance values corresponding to the minimum measurement result of the voltage Vmes ( Figure 4 step 914) includes only the capacitance value val7. The variable capacitor C3 is then controlled so that its capacitance value is equal to this single capacitance value val7 of the set.

[0135] Embodiments and variations in which the threshold RLlim is equal to -13 dB have been described above. Modifying the value of the threshold RLlim is within the capabilities of a person skilled in the art. For example, the value of the threshold RLlim can be decreased by providing an increased power Pi in such a way that RLlim = Ds + C - Pi, where the coupling loss C and the sensitivity Ds of the detector are inherent characteristics of the device 1' in relation to the coupler 4 and the ADC used.

[0136] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variations can be combined, and other variations will be conceivable to a person skilled in the art. Specifically, the implementation of the network 3' is not limited to Figure 3 the example shown, and a person skilled in the art will be able to provide other examples of the network 3' that include multiple inductive and / or capacitive components, including a single variable component with a settable (capacitive or inductive) value, and for these other examples, will know how to implement the combination Figure 4 of the methods described.

[0137] Finally, based on the functional indications given above, the actual implementation of the described embodiments and variations is within the capabilities of a person skilled in the art. Specifically, a person skilled in the art will know how to change the value of an adjustable value component, for example, in a constant step. For example, when the component is controlled by the output voltage of a digital-to-analog converter, this constant step is determined, for example, by the change in the output voltage of the converter between two consecutive binary codes provided at the input of the converter.

Claims

1. A circuit, comprising: A directional coupler, comprising: a first port configured to be connected to a source of a radio frequency signal; a second port configured to output a first signal in response to the radio frequency signal received by the first port; and a third port configured to output a second signal in response to a reflection of the first signal; An impedance matching network, comprising a plurality of fixed components having fixed inductance and capacitance values and a single variable component having a variable inductance or capacitance value, wherein input terminals of the impedance matching network are coupled to the second port of the coupler, and output terminals of the impedance matching network are configured to be connected to an antenna; and A diode coupling the third port of the coupler to a measurement terminal, the measurement terminal being configured to be connected to an analog-to-digital converter, Wherein after an impedance mismatch caused by a conductive element disposed close to the circuit, the capacitance and inductance values of the plurality of fixed components set a normalized impedance of the circuit to a region of a Smith chart determined by all of the inductance or capacitance values of the variable component.

2. The circuit according to claim 1, wherein the impedance matching network is the only impedance matching network of the circuit.

3. The circuit according to claim 1, further comprising a low-pass filter connected to the measurement terminal.

4. The circuit according to claim 1, wherein the variable component is a capacitor having a settable capacitance.

5. The circuit according to claim 1, wherein the impedance matching network comprises: A first fixed capacitor connected between the input terminals of the impedance matching network and a node configured to receive a reference potential; A first fixed inductor and a second fixed capacitor connected in series between the input terminals and the output terminals of the impedance matching network; A second fixed inductor connected between the output terminal and the node; and The variable component connected between the output terminal and the node.

6. The circuit according to claim 5, wherein the variable component is a capacitor having a settable capacitance.

7. The circuit according to claim 1, further comprising: The source of the radio frequency signal connected to the first port of the coupler of the circuit; And The analog-to-digital converter connected to the measurement terminal of the circuit.

8. The circuit according to claim 7, further comprising the antenna connected to the output terminal.

9. The circuit according to claim 7, further comprising a microcontroller, the microcontroller comprising: The analog-to-digital converter; A digital-to-analog converter configured to control the setting of the inductance or capacitance of the variable component; And A processor configured to receive a measurement result from the analog-to-digital converter and provide a control signal to the digital-to-analog converter.

10. The circuit according to claim 9, wherein the processor is configured to determine the inductance or capacitance value of the variable component by: a) Select an initial inductance or capacitance value of the variable component and obtain the measured voltage on the measurement terminal from the analog-to-digital converter; And b) Changing the inductance or capacitance value of the variable component in the determined scan direction and obtaining an additional measured voltage on the measurement terminal from the analog-to-digital converter; where step b) is repeated until the additional measured voltage is strictly greater than the penultimately obtained measured voltage.

11. The circuit according to claim 10, further comprising, after step b): c) determining a set that includes each inductance or capacitance value of the variable component corresponding to the minimum voltage measurement result; and d) controlling the variable component to set the inductance or capacitance value of the variable component to belong to the set.

12. The circuit according to claim 11, wherein the inductance or capacitance value of the variable component is controlled to be the median value of the set.

13. The circuit according to claim 10, further comprising, before step a): determining the inductance and capacitance values of the fixed component such that after an impedance mismatch caused by the presence of a conductive element arranged close to the circuit, the normalized impedance of the circuit belongs to the region determined by all the inductance or capacitance values of the variable component in the Smith chart.

14. The circuit according to claim 13, wherein the determination includes: 1) selecting the inductance and capacitance values of the fixed component, for which the impedance of the circuit matches the impedance of the source of the radio frequency signal in an anechoic environment; 2) calculating the normalized impedance of the circuit for each inductance or capacitance value of the variable component; 3) arranging a conductive element near the circuit and calculating the additional normalized impedance of the circuit; and 4) repeating steps 2) and 3) by modifying at least one of the inductance and capacitance values selected in step 1) as long as the additional normalized impedance calculated in step 3) is outside the set including all the normalized impedances calculated in step 2).

15. The circuit according to claim 13, wherein the determination includes: 1) determining the inductance and capacitance values of the fixed component, for which the impedance of the circuit matches the impedance of the source of the radio frequency signal in an anechoic environment; 2) calculating the normalized impedance of the circuit for each inductance or capacitance value of the variable component; 3) arranging a conductive element near the circuit and calculating the additional normalized impedance of the circuit; and 4) repeating steps 2) and 3) by modifying the inductance or capacitance value of the variable component as long as the additional normalized impedance calculated in step 3) is outside the set including all the normalized impedances calculated in step 2).

16. The circuit according to claim 11, wherein steps a), b) and c) are implemented in a periodic manner.

17. The circuit according to claim 11, wherein steps a), b) and c) are implemented in response to a user request.

18. A method for determining the inductance or capacitance value of a single variable component within an impedance matching network, the impedance matching network including a plurality of fixed components having fixed inductance and capacitance values and the single variable component having a variable inductance or capacitance value, the method comprising: Determine the inductance and capacitance values of the fixed component such that after an impedance mismatch caused by the presence of a conductive element near the circuit arrangement including the impedance matching network, the normalized impedance belongs to the region determined by all inductance or capacitance values of the variable component in the Smith chart; and then: a) Select an initial inductance or capacitance value of the variable component and obtain a measurement result of a voltage that indicates the power of the reflected signal received by the impedance matching network; and b) Change the inductance or capacitance value of the variable component in the determined scan direction and obtain additional measurement results of the voltage that indicates the power of the reflected signal; where step b) is repeated until the additional measured voltage is strictly greater than the measurement result of the voltage indicating the power of the reflected signal obtained second to last.

19. The method according to claim 18, further comprising, after step b): c) Determine a set that includes each inductance or capacitance value of the variable component corresponding to the minimum voltage measurement result; and d) Control the variable component to set the inductance or capacitance value of the variable component to belong to the set.

20. The method according to claim 19, wherein the inductance or capacitance value of the variable component is controlled to be the median of the set.

21. The method according to claim 18, wherein determining includes: 1) Determine the inductance and capacitance values of the fixed component for which, in an anechoic environment, the impedance matches the impedance of the source of the RF signal applied to the impedance matching network; 2) Calculate the normalized impedance for each inductance or capacitance value of the variable component; 3) Bring a conductive element close to the circuit arrangement and calculate an additional normalized impedance; and 4) Repeat steps 2) and 3) by modifying at least one of the inductance and capacitance values selected in step 1) as long as the additional normalized impedance calculated in step 3) is outside the set of all normalized impedances calculated in step 2).

22. The method according to claim 18, wherein determining includes: 1) Determine the inductance and capacitance values of the fixed component for which, in an anechoic environment, the impedance matches the impedance of the source of the RF signal applied to the impedance matching network; 2) Calculate the normalized impedance for each inductance or capacitance value of the variable component; 3) Bring a conductive element close to the circuit arrangement and calculate an additional normalized impedance; and 4) Repeat steps 2) and 3) by modifying the inductance or capacitance value of the variable component as long as the additional normalized impedance calculated in step 3) is outside the set of all normalized impedances calculated in step 2).

23. The method according to claim 18, wherein steps a), b) and c) are implemented in a periodic manner.

24. The method according to claim 18, wherein steps a), b) and c) are implemented in response to a user request.

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