Program running method and device on micro control chip and storage medium
By dividing the non-volatile memory of a microcontroller chip into multiple storage areas and utilizing an offset address and bus access signal verification mechanism, the low efficiency problem in the microcontroller chip program development and debugging process is solved, and efficient program switching and debugging are achieved.
Patent Information
- Application Number
- CN202111011858.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-08-31
- Publication Date
- 2025-10-21
- Estimated Expiration
- 2041-08-31
AI Technical Summary
In the prior art, the process of developing and debugging microcontroller chip programs is cumbersome and inefficient, especially when multiple debugging and switching between different programs are required, and the compilation, downloading and resetting operations are repetitive and cumbersome.
The non-volatile memory is divided into multiple storage areas, and multiple applications are downloaded to these areas. By obtaining the offset address and verifying the bus access signal, address translation is performed to run the application. The flash option byte is used to select different programs for debugging and running.
It improves the efficiency of program development and operation on microcontroller chips, shortens the development cycle, and realizes flexible switching and efficient debugging between different programs.
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Figure CN113741971B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of data processing, and in particular to a method, device and storage medium for running a program on a microcontroller chip. Background Art
[0002] A microcontroller unit (MCU), also known as a single-chip microcomputer or single-chip microcomputer, typically contains non-volatile memory for storing program instructions and data. When the MCU is running, the internal CPU fetches instructions from the non-volatile memory and executes them, then issues bus requests for instructions or data depending on the program's execution state. On the MCU, users develop a program based on the MCU's characteristics, compile it, and save it to the MCU's internal non-volatile memory. This allows the MCU to fetch instructions and data from the internal non-volatile memory and begin operations.
[0003] In the prior art, after developing a standalone program based on an MCU, the program is compiled and downloaded to non-volatile memory using software and a debugger. The MCU chip is then reset to execute the user-written program. If the user's program is unstable and requires different versions to continuously debug parameters, the process becomes repetitive and cumbersome, requiring constant compilation, downloading, resetting, executing the program, and then observing the debugging results. Furthermore, if the user needs to execute several completely different program segments based on different environments, each segment must be compiled and downloaded separately to the MCU to complete the process. This makes the program execution process more cumbersome and inefficient. Summary of the Invention
[0004] The present invention provides a method, device and storage medium for running programs on a microcontroller chip, which can download multiple programs developed simultaneously into a non-volatile memory on the microcontroller chip, and then debug and run the programs, thereby improving the efficiency of program development and operation on the microcontroller chip.
[0005] To solve the above technical problems, the embodiments of the present invention provide the following technical solutions:
[0006] A method for running a program on a microcontroller chip, characterized in that the method comprises:
[0007] Dividing a non-volatile memory into a plurality of storage areas, and downloading at least one application to at least one storage area in the non-volatile memory;
[0008] Get the offset address corresponding to the storage area where the application is downloaded;
[0009] Acquire a bus access signal, and verify the bus access signal according to the offset address;
[0010] If the verification is successful, address conversion is performed according to the offset address to obtain a program access address, and the application program is run according to the program access address.
[0011] A program running device on a microcontroller chip, characterized by comprising:
[0012] a partitioning unit, configured to partition a non-volatile memory into a plurality of storage areas, and download at least one application program to at least one storage area in the non-volatile memory;
[0013] An acquisition unit, used to acquire an offset address corresponding to a storage area for downloading an application program;
[0014] a verification unit, configured to obtain a bus access signal and verify the bus access signal according to the offset address;
[0015] The running unit is configured to perform address conversion according to the offset address to obtain a program access address when the verification by the verification unit passes, and run the application program according to the program access address.
[0016] A storage medium stores a plurality of instructions suitable for loading by a processor to execute the steps in the program running method on the microcontroller chip.
[0017] The embodiments provided by the present application can divide a non-volatile memory into multiple storage areas, download at least one application to at least one storage area in the non-volatile memory, obtain the offset address corresponding to the storage area where the application is downloaded, obtain a bus access signal, and verify the bus access signal based on the offset address. If the verification passes, the address is converted based on the offset address to obtain a program access address, and the application is run based on the program access address. The embodiments of the present application can divide the non-volatile memory on a microcontroller chip into multiple storage areas, and then download multiple programs to these storage areas. After the chip is powered on, different programs are selected for debugging and running based on the non-volatile memory option bytes, thereby improving the efficiency of program development and running on the microcontroller chip and shortening the program development cycle. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0019] Figure 1This is a flow chart of a method for running a program on a microcontroller chip provided by an embodiment of the present invention;
[0020] Figure 2 This is a schematic diagram of the storage of the option byte area of the flash memory on the microcontroller chip provided by an embodiment of the present invention;
[0021] Figure 3 is another flow chart of the method for running a program on a microcontroller chip provided by an embodiment of the present invention;
[0022] Figure 4 A schematic diagram of the structure of a program running device on a microcontroller chip provided by an embodiment of the present invention;
[0023] Figure 5 Another structural diagram of a program running device on a microcontroller chip provided by an embodiment of the present invention;
[0024] Figure 6 It is a structural diagram of a terminal device provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0025] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts shall fall within the scope of protection of the present invention.
[0026] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present invention. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute a separate or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0027] An embodiment of the present invention provides a method for running a program on a microcontroller chip. The execution subject of the method for running a program on a microcontroller chip can be a program running device on a microcontroller chip provided by an embodiment of the present invention, or a server integrating the program running device on a microcontroller chip, wherein the program running device on a microcontroller chip can be implemented in hardware or software.
[0028] In this embodiment, the program running device on the microcontroller chip will be described from the perspective of the program running device. The program running device on the microcontroller chip can be specifically integrated into a terminal device, which is a terminal device having a storage unit and capable of running application programs.
[0029] A method for running a program on a microcontroller chip, characterized in that the method comprises:
[0030] Dividing a non-volatile memory into a plurality of storage areas, and downloading at least one application to at least one storage area in the non-volatile memory;
[0031] Get the offset address corresponding to the storage area where the application is downloaded;
[0032] Acquire a bus access signal, and verify the bus access signal according to the offset address;
[0033] If the verification is successful, address conversion is performed according to the offset address to obtain a program access address, and the application program is run according to the program access address.
[0034] Before describing the technical solution of the present invention, a brief explanation of the relevant technical terms is given first:
[0035] MCU: A microcontroller chip reduces the frequency and specifications of the central processing unit (CPU) and integrates memory, timers, USB, A / D converters, UART, PLC, DMA and other peripheral interfaces, and even LCD driver circuits on a single chip, forming a chip-level computer that can provide different control combinations for different applications.
[0036] Non-volatile memory: refers to a memory in which the stored data does not disappear when the current is turned off.
[0037] Virtual address: The address sent by the CPU CORE to read program data.
[0038] Physical address: The access address when accessing peripherals.
[0039] Address mapping: A method of converting virtual addresses into physical addresses.
[0040] Flash: Flash memory is a non-volatile memory that can modify the data in it through specific programs.
[0041] Flash option byte: Flash option byte, stored in a special location segment of Flash.
[0042] See also Figure 1 , Figure 1 1 is a flow chart of a method for running a program on a microcontroller chip provided by an embodiment of the present invention. The method for running a program on a microcontroller chip includes:
[0043] Step 101: Divide a non-volatile memory into multiple storage areas, and download at least one application program to at least one storage area in the non-volatile memory.
[0044] In one embodiment, a digital circuit module is designed inside the microcontroller chip MCU, which can divide the non-volatile memory on the MCU into multiple independent intervals, that is, divide the flash memory into multiple storage areas, where the sizes of the above-mentioned multiple storage areas can be the same or different. For example, the non-volatile memory can be evenly divided into N storage areas, where N is a positive integer greater than or equal to 1.
[0045] Furthermore, when partitioning the non-volatile memory, the partitioning can be performed based on the size of the physical address. For example, if the non-volatile memory needs to be divided into three storage areas, namely a first storage area, a second storage area, and a third storage area, the physical address of the first storage area can be set to 0, the physical address of the second storage area can be set to 1 to X, and the physical address of the third storage area can be set to X+1 to Y.
[0046] In one embodiment, after the non-volatile memory is divided into multiple storage areas, at least one application can be further downloaded to each of the multiple storage areas. It should be noted that when dividing the non-volatile memory, the size of each storage area can be set according to user instructions. For example, the user can set the size of the divided storage area based on the capacity of the application to be downloaded to store the corresponding application to be downloaded. This application does not further limit this.
[0047] Step 102: Obtain an offset address in the storage area for downloading the application.
[0048] It's important to note that when non-volatile memory is divided into multiple storage areas, each of these areas has a corresponding offset address. The offset address is the offset of an address within a segment relative to the segment start address (segment address) after the computer's memory is segmented. The offset address is also called the offset. Because the arithmetic logic unit (ALU) within the 8086 / 8088 CPU can only perform 16-bit operations, and the 8086 / 8088 has 20 address lines with a direct addressing capacity of 1MB, the 20-bit physical address used by the 8086 / 8088 is composed of the corresponding segment address plus the offset address.
[0049] In an embodiment of the present application, the offset address corresponding to each of the aforementioned storage areas is stored in a preset byte of the non-volatile memory. In a preferred embodiment, the preset byte may be an option byte of the flash memory, so that the offset address corresponding to the storage area for the downloaded application can be obtained from the option byte. In other embodiments, the preset byte may be a byte other than an option byte.
[0050] Furthermore, the security bit and valid bit corresponding to the offset address can also be stored in the option byte of the above-mentioned flash memory. Therefore, after obtaining the offset address corresponding to the above-mentioned storage area, the corresponding valid bit information and security bit information can be further obtained. The above-mentioned valid bit information and security bit information can be combined with the offset address to verify the bus access signal subsequently obtained. In other words, the step of obtaining the offset address corresponding to the storage area for downloading the application can include:
[0051] Extracting an offset address corresponding to a storage area of the downloaded application from preset bytes of the non-volatile memory;
[0052] Acquire valid bit information and security bit information corresponding to the offset address.
[0053] The above offset address represents the offset relative to the logical address of the CPU CORE when the application reads it. The security bit information can be used to store information such as the host ID and whether the privileged mode is enabled. The valid bit can be used to indicate whether the current option wn is valid. The option word stored in the flash option byte area is option w1, option w2, option w3...option wn, etc. Please refer to Figure 2 . In this embodiment, the value of option w1 in the flash memory option byte can be set by the chip manufacturer, or it can be modified by the user's own program in privileged mode. Option w1 mainly specifies the user's default startup offset address, usually mapping a flash memory physical address to the logical address when the CPUCORE is started. Furthermore, option w1 to option wn can also be modified by the user program itself in privileged mode. For example, if three applications are stored in the flash memory, option w1 corresponds to the offset address of application 1, option w2 corresponds to the offset address of application 2, and so on. The user can specify the security bit and valid bit of the option word at the same time.
[0054] Step 103: Acquire a bus access signal and verify the bus access signal according to the offset address.
[0055] In one embodiment, after obtaining the bus access signal, it is necessary to further verify the security and validity of the bus access signal. If the bus access is unsafe or invalid, the access status can be saved and an error message can be returned to the CPU CORE or bus host. If the bus access is safe and valid, the subsequent steps can be continued to run the application.
[0056] The aforementioned bus may be an Advanced High Performance Bus (AHB), which consists of an AHB bus master, an AHB bus slave, and an infrastructure. The infrastructure, for example, consists of an arbiter, a data multiplexer, an address control multiplexer, and a decoder. The following table lists the basic AHB signals and their corresponding bit widths, sources, and descriptions:
[0057]
[0058]
[0059] The AHB signal in this embodiment may be HTRANS, HMASTER, HPROT or the like. After determining that the offset address and security bit information are valid, the security information may be extracted from the signal for comparison. If the comparison is successful, it is determined that the bus access signal verification has passed.
[0060] Step 104: If the verification passes, address conversion is performed according to the offset address to obtain a program access address, and the application program is run according to the program access address.
[0061] In one embodiment, if the bus access is determined to be a safe and valid access, the logical address issued by the CORE in the MCU can be remapped. Then, after the offset address specified in the option byte is successfully mapped, it will be used as the first address for program access, that is, the program access address, so that the application can be run. In other embodiments, the application can also modify the option byte to achieve the execution of the next different application after the current application is executed. Specifically, after the MCU is reset, the offset address set in the flash memory option byte can be used to execute several independent application programs stored in the flash memory.
[0062] For example, let's say a user develops three independent applications for the MCU and compiles each application at base address 0, resulting in three hexadecimal images, each no larger than 256KB. During download, applications 1, 2, and 3 (Program 1, Program 2, and Program 3) can be downloaded to the corresponding program regions at 0x0000_0000, 0x0004_0000, and 0x0008_0000, respectively. Note that the total flash memory capacity is greater than the sum of the three hexadecimal images. After downloading, the user can modify the values of option bytes (options W1, W2, and W3) in the flash memory using a tool. If the user runs the first application independently, only option W1 needs to be modified. The application download offset address is written to the offset address. Assuming the offset address is on a 64KB boundary, 0x0000 is written to option W1. The security bit can be set to access in the current core privileged mode (for example, the value is 'b0011') and the valid bit can be set to valid ('b1'). After writing the option byte, reset the MCU and the MCU will execute Application 1. To switch to Application 2, similarly, modify Option W2 using the tool. Write the corresponding offset address 0x0004 to the offset address of Option W2, set the security bit to Core 1 privileged mode ('b0011), the valid bit to valid ('b1), and set the valid bit of Option W1 to invalid ('b0).
[0063] For example, after developing three independently running applications based on an MCU, a user may want to run Application 1, then Application 2, then Application 3, and then return to Application 1. To do this, when Application 1 starts running, disable Option W1, set Application 2's Option W2 offset to 0x0004, set the security bit to 'b0011, and enable the valid bit to 'b1. Similarly, when Application 2 starts running, disable the valid bits of Option W1 and Option W2 in Application 1 and Application 2, and set Option W3 in Application 3's Option W3 offset to 0x0008, set the security bit to '0011, and enable the valid bit to 'b1. When Application 3 starts running, disable the valid bit of Option W3, set Application 1's Option W1 offset to 0x0000, set the security bit to 'b0011, and enable the valid bit to 'b1. Recompile Applications 1, 2, and 3 and download them to 0x0000_0000, 0x0004_0000, and 0x0008_0000, respectively. After resetting the MCU chip, application 1 is executed. After resetting again, application 2 is executed. And so on. These three application programs are executed repeatedly.
[0064] Therefore, the above embodiment allows the development of different applications without having to consider the base address of the application during compilation. Instead, different applications can be downloaded to different offset addresses and the corresponding option bytes can be modified. Different applications can be selected for startup and execution, and switching between them is also possible.
[0065] As can be seen from the above, the program running method on the microcontroller chip provided by the embodiment of the present application can divide the non-volatile memory into multiple storage areas, download at least one application program to at least one storage area in the non-volatile memory, obtain the offset address corresponding to the storage area where the application program is downloaded, obtain the bus access signal, and verify the bus access signal according to the offset address. If the verification passes, the address is converted according to the offset address to obtain the program access address, and the application program is run according to the program access address. The embodiment of the present application can divide the non-volatile memory on the microcontroller chip into multiple storage areas, and then download multiple programs to these storage areas. After power-on, different programs are selected for debugging and running according to the option bytes of the non-volatile memory, thereby improving the efficiency of program development and running on the microcontroller chip.
[0066] The method for running a program on a microcontroller chip described in the previous embodiment will be further described in detail below with examples.
[0067] In this embodiment, the program running device on the microcontroller chip is specifically integrated into a terminal device as an example for description.
[0068] See also Figure 3 , Figure 3 Another flow chart of the method for running a program on a microcontroller chip provided by an embodiment of the present invention. The method flow may include:
[0069] Step 201 : Divide a non-volatile memory into multiple storage areas, and download at least one application program to at least one storage area in the non-volatile memory.
[0070] In one embodiment, the non-volatile memory in the microcontroller chip MCU is divided into multiple independent sections, that is, the flash memory is divided into multiple storage areas. Specifically, the non-volatile memory can be divided according to the size of the physical address.
[0071] Step 202 : extracting the offset address corresponding to the storage area for downloading the application program, and the valid bit information and security bit information corresponding to the offset address from the preset bytes of the non-volatile memory.
[0072] Specifically, when the flash memory is divided into multiple storage areas, each area has a corresponding offset address, along with the corresponding valid and security bits. These are stored in the flash memory option byte. After the system is powered on, the offset address, along with the associated valid and security bits, is automatically loaded from the flash memory option byte and stored internally.
[0073] The offset address represents the offset relative to the CPU core's logical address when read by the application. The security bit information can be used to store information such as the host ID and whether privileged mode is enabled. The valid bit can be used to indicate whether the current option wn is valid. After reading the flash memory option byte data, it can be stored in the internal data register.
[0074] Step 203 , judging whether the offset address and security bit information in the current byte area are valid based on the valid bit information, and if so, executing step 204 .
[0075] In one embodiment, the validity bit of option wn is used to determine whether the offset address and security bit of option w in the current option byte area are valid. If valid, the next step is executed to determine its security. If invalid, an interrupt signal is generated to notify the host and the current process is terminated.
[0076] In another embodiment, if there are multiple valid bits, the priority of these multiple valid bits needs to be further determined. For example, the priority of multiple valid bit information can be determined based on the byte data. For example, the principle of determining the priority here is that the smaller the n in option wn, the higher its priority. Only when the valid bit of the higher priority is invalid, the valid bit of the lower level will be checked. If all valid bits are set to invalid, the valid bit of option w1 will be automatically set to valid. That is, the step of determining whether the offset address and security bit information in the current byte area are valid based on the valid bit information may include:
[0077] Whether the offset address and security bit information in the current byte area of the valid bit information are valid is determined in order of priority.
[0078] Step 204: Acquire a bus access signal and extract security information from the bus access signal.
[0079] Step 205: Match the security bit information with the security information in the bus access signal.
[0080] In one embodiment, the security information in the bus access signal is used to determine whether the bus access is a safe and valid access. If the bus access is unsafe or invalid, the current access status is saved and an error message is returned to the core or bus master. If the bus access is a safe and valid access, subsequent steps can be performed to map the offset address.
[0081] Step 206: If the match is successful, it is determined that the bus access signal verification is passed and a prompt message is generated.
[0082] After the match is successful, the bus access can be determined to be safe and valid. For example,
[0083] After selecting the valid bits of option w1, option w2…option wn, the system further obtains bus access signals, such as the AHB bus, HTRANS, HMASTER, and HPROT signals, extracts security information such as the host type currently accessing the flash memory and whether it is in privileged mode, and compares it with the security bit to determine whether the host has the security bit set and whether it is operating in privileged mode. If the access is relatively successful, a security valid signal (i.e., a prompt message) is issued; otherwise, a special interrupt signal is issued to the bus or the corresponding host.
[0084] Step 207 : Obtain the offset address and the logical address in the bus access signal according to the prompt information, remap the logical address to the offset address to obtain the program access address, and run the application according to the program access address.
[0085] In one embodiment, an offset address must first be selected. For example, the offset addresses in option w1, option w2, and option wn are loaded based on the aforementioned safety and validity signal. After the offset address is selected, it is modified in an address adder with the current logical address issued by the core or bus. The modified address includes the original bus address and the relative offset address. Ultimately, the program access address is obtained, and the application is run based on the program access address.
[0086] Therefore, in this embodiment, the MCU product can support multi-image startup, develop different programs separately, compile without considering the base address of the program, download different applications to different offset addresses, and modify the corresponding option bytes. By modifying the option bytes, different applications can be selected to start and execute, and different applications can be switched between each other. The security bit ensures that only approved security cores and privileged modes can initiate operations of the corresponding programs.
[0087] For example, if a user develops three applications for an MCU, the MCU developer places the offset address of the first application block in the address offset, sets the security bit to core 1 privileged mode access, and sets the validity bit to valid. Therefore, when the MCU chip is powered on, it boots from application 1 by default. Within application 1 (running in privileged mode), the user can use option bytes to set the offset addresses and security and validity attributes of other application blocks. Offset addresses can be bounded by 16KB, 32KB, 64KB, or 128KB.
[0088] Furthermore, you can also edit several application programs and compile them at the same time. The base address of the application program is not considered during compilation, and different application program images are downloaded to different program area offset addresses during downloading. Then, the above program area offset address is downloaded to the offset addresses of option w1, option w2, etc. in different option bytes through a tool, and the corresponding security bit and valid bit are set at the same time, so that different application programs can be run. In addition, the above offset address can also be downloaded through a program. For example, in application program 1, by modifying the offset address and security valid bit of option w1, option w2, etc., it is possible to run other applications (application program 2, application program 3) after application program 1 is run. Therefore, in this embodiment, after running the application program according to the program access address, the above method also includes:
[0089] receiving modification information of an offset address in a preset byte of a non-volatile memory;
[0090] A new program access address is determined again according to the modified information, and an application program corresponding to the new program access address is run.
[0091] As can be seen from the above, the program execution method on a microcontroller chip provided in an embodiment of the present application can divide a non-volatile memory into multiple storage areas and download at least one application program to at least one storage area in the non-volatile memory. From the preset bytes of the non-volatile memory, the offset address corresponding to the storage area where the application program is to be downloaded, as well as the valid bit information and security bit information corresponding to the offset address, are extracted. Based on the valid bit information, a bus access signal is determined to be valid. If so, the security information in the bus access signal is extracted. The security bit information is matched with the security information in the bus access signal. If the match is successful, the bus access signal is determined to have passed verification and a prompt message is generated. Based on the prompt message, the offset address and the logical address in the bus access signal are obtained, the logical address is remapped to the offset address to obtain a program access address, and the application program is executed according to the program access address. In an embodiment of the present application, the non-volatile memory on a microcontroller chip can be divided into multiple storage areas, and multiple programs can be downloaded into these storage areas. After power-on, different programs can be selected for debugging and execution based on the option bytes of the non-volatile memory, thereby improving the efficiency of program development and execution on the microcontroller chip.
[0092] To facilitate better implementation of the method for executing a program on a microcontroller chip provided in an embodiment of the present invention, an embodiment of the present invention also provides a device based on the method for executing a program on a microcontroller chip. The meanings of the terms herein are the same as those in the method for executing a program on a microcontroller chip described above. For specific implementation details, please refer to the description in the method embodiment.
[0093] In this embodiment, the program running device on the microcontroller chip will be described from the perspective of the program running device. The program running device on the microcontroller chip can be specifically integrated into a system consisting of multiple terminal devices, each of which is a terminal device having a storage unit and a display screen and having a video playback function.
[0094] See also Figure 4 , Figure 4 A schematic diagram of a structure of a program running device 300 on a microcontroller chip provided by an embodiment of the present invention. The program running device 300 on the microcontroller chip may include:
[0095] a partitioning unit 301, configured to partition a non-volatile memory into a plurality of storage areas, and download at least one application to at least one storage area in the non-volatile memory;
[0096] An acquiring unit 302 is configured to acquire an offset address corresponding to a storage area for downloading an application program;
[0097] a verification unit 303, configured to obtain a bus access signal and verify the bus access signal according to the offset address;
[0098] The running unit 304 is configured to perform address conversion according to the offset address to obtain a program access address when the verification by the verification unit 303 is passed, and run the application program according to the program access address.
[0099] In one embodiment, see Figure 5 , Figure 5 Another structural diagram of a program running device 300 on a microcontroller chip provided by an embodiment of the present invention. The acquisition unit 302 may include:
[0100] A first extraction subunit 3021 is configured to extract an offset address corresponding to a storage area of the downloaded application from preset bytes of the non-volatile memory;
[0101] An acquiring subunit 3022 is configured to acquire valid bit information corresponding to the offset address;
[0102] The judging subunit 3023 is configured to judge whether the offset address in the current byte area is valid based on the valid bit information.
[0103] The verification unit 303 is specifically configured to obtain a bus access signal when the determination subunit 3023 determines that the bus access signal is positive, and verify the bus access signal according to the offset address.
[0104] In one embodiment, the obtaining subunit 3022 is further configured to obtain security bit information corresponding to the offset address;
[0105] Furthermore, the verification unit 303 may include:
[0106] A second extraction subunit 3031 is configured to extract security information from the bus access signal;
[0107] The matching subunit 3032 is configured to match the security bit information with the security information in the bus access signal. If the match is successful, it is determined that the bus access signal has passed the verification and a prompt message is generated.
[0108] As can be seen from the above, the embodiment of the present invention can divide the non-volatile memory into multiple storage areas, and download at least one application to at least one storage area in the non-volatile memory, obtain the offset address corresponding to the storage area where the application is downloaded, obtain the bus access signal, and verify the bus access signal according to the offset address. If the verification passes, the address is converted according to the offset address to obtain the program access address, and the application is run according to the program access address. The embodiment of the present application can divide the non-volatile memory on the microcontroller chip into multiple storage areas, and then download multiple programs to these storage areas. After power-on, different programs are selected for debugging and running according to the option bytes of the non-volatile memory, thereby improving the efficiency of program development and operation on the microcontroller chip.
[0109] The embodiment of the present invention further provides a terminal device 600, such as Figure 6 As shown, the terminal device 600 may include a radio frequency (RF) circuit 601, a memory 602 including one or more computer-readable storage media, an input unit 603, a display unit 604, a sensor 605, an audio circuit 606, a wireless fidelity (WiFi) module 607, a processor 608 including one or more processing cores, and a power supply 609. Those skilled in the art will understand that Figure 6 The structure of the terminal device 600 shown in the figure does not constitute a limitation on the terminal device 600, and the terminal device 600 may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently.
[0110] The RF circuit 601 can be used to receive and send signals during information transmission or calls. In particular, after receiving downlink information from the base station, it is handed over to one or more processors 608 for processing; in addition, uplink data is sent to the base station. Generally, the RF circuit 601 includes but is not limited to an antenna, at least one amplifier, a tuner, one or more oscillators, a subscriber identity module (SIM) card, a transceiver, a coupler, a low noise amplifier (LNA), a duplexer, etc. In addition, the RF circuit 601 can also communicate with the network and other devices via wireless communication. Wireless communication can use any communication standard or protocol, including but not limited to Global System of Mobile Communications (GSM), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA), Long Term Evolution (LTE), email, Short Messaging Service (SMS), etc.
[0111] The memory 602 can be used to store software programs and modules. The processor 608 executes various functional applications and information processing by running the software programs and modules stored in the memory 602. The memory 602 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, a target data playback function, etc.); the data storage area may store data created according to the use of the terminal device 600 (such as audio data, a phone book, etc.). In addition, the memory 602 may include a high-speed random access memory and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other volatile solid-state storage device. Accordingly, the memory 602 may also include a memory controller to provide the processor 608 and the input unit 603 with access to the memory 602.
[0112] The input unit 603 can be used to receive input digital or character information and generate keyboard, mouse, joystick, optical, or trackball signal input related to user settings and function control. Specifically, in one embodiment, the input unit 603 may include a touch-sensitive surface and other input devices. A touch-sensitive surface, also known as a touch display or touchpad, can detect user touch operations on or near it (for example, operations performed by a user using a finger, stylus, or any other suitable object or accessory on or near the touch-sensitive surface) and drive corresponding connected devices according to a pre-set program. Optionally, the touch-sensitive surface may include a touch detection device and a touch controller. The touch detection device detects the user's touch direction and detects signals generated by the touch operation, transmitting the signals to the touch controller. The touch controller receives the touch information from the touch detection device, converts it into touch point coordinates, and then sends it to the processor 608. It can also receive and execute commands from the processor 608. In addition, touch-sensitive surfaces can be implemented using various types, such as resistive, capacitive, infrared, and surface acoustic wave. In addition to the touch-sensitive surface, the input unit 603 may also include other input devices. Specifically, other input devices may include, but are not limited to, one or more of a physical keyboard, function keys (such as a volume control key, a switch key, etc.), a trackball, a mouse, a joystick, and the like.
[0113] The display unit 604 can be used to display information input by the user or information provided to the user and various graphical user interfaces of the terminal device 600. These graphical user interfaces can be composed of graphics, text, icons, videos and any combination thereof. The display unit 604 may include a display panel. Optionally, the display panel can be configured in the form of a liquid crystal display (LCD), an organic light-emitting diode (OLED), etc. Further, the touch-sensitive surface can cover the display panel. When the touch-sensitive surface detects a touch operation on or near it, it is transmitted to the processor 608 to determine the type of touch event. The processor 608 then provides corresponding visual output on the display panel according to the type of touch event. Although in Figure 6 In the embodiment, the touch-sensitive surface and the display panel are used as two independent components to realize input and output functions, but in some embodiments, the touch-sensitive surface and the display panel can be integrated to realize input and output functions.
[0114] The terminal device 600 may also include at least one sensor 605, such as a light sensor, a motion sensor, and other sensors. Specifically, the light sensor may include an ambient light sensor and a proximity sensor, wherein the ambient light sensor may adjust the brightness of the display panel according to the brightness of the ambient light, and the proximity sensor may turn off the display panel and / or backlight when the terminal device 600 is moved to the ear. As a type of motion sensor, the gravity acceleration sensor can detect the magnitude of acceleration in all directions (generally three axes), and can detect the magnitude and direction of gravity when stationary. It can be used for applications that recognize the posture of the mobile phone (such as horizontal and vertical screen switching, related games, magnetometer posture calibration), vibration recognition related functions (such as pedometer, tapping), etc.; as for other sensors that can be configured in the terminal device 600, such as gyroscopes, barometers, hygrometers, thermometers, infrared sensors, etc., they will not be described in detail here.
[0115] The audio circuit 606, speaker, and microphone provide an audio interface between the user and the terminal device 600. The audio circuit 606 converts received audio data into electrical signals and transmits them to the speaker, which then converts them into sound signals for output. The microphone, on the other hand, converts collected sound signals into electrical signals, which are then received by the audio circuit 606 and converted into audio data. The audio data is then processed by the output processor 608 and transmitted via the RF circuit 601 to, for example, another terminal device 600. Alternatively, the audio data is output to the memory 602 for further processing. The audio circuit 606 may also include an earphone jack to allow communication between an external headset and the terminal device 600.
[0116] WiFi is a short-range wireless transmission technology. The terminal device 600 can help users send and receive emails, browse web pages and access streaming media through the WiFi module 607. It provides users with wireless broadband Internet access. Figure 6 A WiFi module 607 is shown, but it is understandable that it is not an essential component of the terminal device 600 and can be omitted as needed without changing the essence of the invention.
[0117] Processor 608 is the control center of terminal device 600. It connects all components of the phone using various interfaces and circuits. By running or executing software programs and / or modules stored in memory 602 and accessing data stored in memory 602, it executes various functions of terminal device 600 and processes data, thereby providing overall monitoring of the phone. Optionally, processor 608 may include one or more processing cores. Preferably, processor 608 integrates an application processor and a modem processor. The application processor primarily handles the operating system, user interface, and application programs, while the modem processor primarily handles wireless communications. It is understood that the modem processor may not be integrated into processor 608.
[0118] The terminal device 600 also includes a power supply 609 (e.g., a battery) for powering various components. Preferably, the power supply can be logically connected to the processor 608 via a power management system, thereby enabling the power management system to manage charging, discharging, and power consumption. The power supply 609 can also include one or more DC or AC power supplies, a recharging system, a power failure detection circuit, a power converter or inverter, a power data indicator, and other arbitrary components.
[0119] Although not shown, the terminal device 600 may also include a camera, a Bluetooth module, etc., which will not be described in detail here. Specifically, in this embodiment, the processor 608 in the terminal device 600 will load the executable files corresponding to one or more application processes into the memory 602 according to the following instructions, and the processor 608 will run the applications stored in the memory 602 to implement various functions:
[0120] Dividing a non-volatile memory into a plurality of storage areas, and downloading at least one application to at least one storage area in the non-volatile memory;
[0121] Get the offset address corresponding to the storage area where the application is downloaded;
[0122] Acquire a bus access signal, and verify the bus access signal according to the offset address;
[0123] If the verification is successful, address conversion is performed according to the offset address to obtain a program access address, and the application program is run according to the program access address.
[0124] In the above embodiments, the description of each embodiment has its own focus. For the part not described in detail in a certain embodiment, please refer to the detailed description of the program running method on the microcontroller chip above, which will not be repeated here.
[0125] As can be seen from the above, the terminal device 600 of the embodiment of the present invention can divide the non-volatile memory into multiple storage areas, download at least one application to at least one storage area in the non-volatile memory, obtain the offset address corresponding to the storage area where the application is downloaded, obtain a bus access signal, and verify the bus access signal based on the offset address. If the verification is successful, the address is converted based on the offset address to obtain a program access address, and the application is run according to the program access address. The embodiment of the present application can divide the non-volatile memory on the microcontroller chip into multiple storage areas, then download multiple programs into these storage areas, and then debug and run the programs, thereby improving the efficiency of program execution on the microcontroller chip.
[0126] Those skilled in the art will appreciate that all or part of the steps in the various methods of the above embodiments may be accomplished by instructions, or by controlling related hardware through instructions. The instructions may be stored in a computer-readable storage medium and loaded and executed by a processor.
[0127] To this end, an embodiment of the present application further provides a storage medium on which a plurality of instructions are stored, wherein the instructions are suitable for loading by a processor to execute the steps in the program running method on the above-mentioned microcontroller chip.
[0128] The specific implementation of the above operations can be found in the previous embodiments and will not be repeated here.
[0129] The storage medium may include a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.
[0130] Since the instructions stored in the storage medium can execute the steps in any method for running a program on a microcontroller chip provided in the embodiments of the present invention, the beneficial effects that can be achieved by any method for running a program on a microcontroller chip provided in the embodiments of the present invention can be achieved. Please refer to the previous embodiments for details and will not be repeated here.
[0131] The above is a detailed introduction to the program running method, device and storage medium on the microcontroller chip provided by the embodiments of the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core ideas. At the same time, for those skilled in the art, according to the ideas of the present invention, there may be changes in the specific implementation methods and application scopes. In summary, the contents of this specification should not be understood as limiting the present invention.
Claims
1. A method for running a program on a microcontroller chip, characterized in that: The method comprises: Dividing a non-volatile memory into a plurality of storage areas, and downloading at least one application to at least one storage area in the non-volatile memory; Obtain the offset address corresponding to the storage area for downloading the application program, as well as the security bit information and valid bit information corresponding to the offset address from the option byte; determining whether the offset address in the current byte area is valid according to the valid bit information, and if so, obtaining a bus access signal, and verifying the bus access signal according to the security bit information; If the verification is successful, address conversion is performed according to the offset address to obtain a program access address, and the application program is run according to the program access address.
2. The method for running a program on a microcontroller chip according to claim 1, wherein: The step of obtaining the offset address corresponding to the storage area for downloading the application program includes: The offset address corresponding to the storage area of the downloaded application is extracted from the preset bytes of the non-volatile memory.
3. The method for running a program on a microcontroller chip according to claim 1 or 2, wherein: After obtaining the offset address corresponding to the storage area for downloading the application, the method further includes: Obtaining security bit information corresponding to the offset address; The step of verifying the bus access signal according to the offset address includes: extracting security information from the bus access signal; matching the security bit information with the security information in the bus access signal; If the match is successful, it is determined that the bus access signal verification is passed and a prompt message is generated.
4. The method for running a program on a microcontroller chip according to claim 1, wherein: The method further comprises: If there are multiple valid bit information, the priority of the multiple valid bit information is determined from low to high according to the byte number storing the valid bit; The step of determining whether the offset address in the current byte area is valid according to the valid bit information includes: Whether the offset address in the current byte area of the valid bit information is valid is determined in sequence according to the priority.
5. The method for running a program on a microcontroller chip according to claim 3, wherein: The step of performing address conversion according to the offset address to obtain a program access address includes: Acquire the offset address and the logical address in the bus access signal according to the prompt information; The logical address is remapped to the offset address to obtain a program access address.
6. The method for running a program on a microcontroller chip according to claim 2, wherein: After running the application program according to the program access address, the method further includes: receiving modification information of an offset address in a preset byte of the non-volatile memory; A new program access address is determined again according to the modification information, and an application program corresponding to the new program access address is run.
7. A program running device on a microcontroller chip, characterized in that: include: a partitioning unit, configured to partition a non-volatile memory into a plurality of storage areas, and download at least one application program to at least one storage area in the non-volatile memory; An acquisition unit, configured to acquire, from the option byte, an offset address corresponding to a storage area for downloading an application program, and security bit information and valid bit information corresponding to the offset address; a verification unit, configured to determine whether the offset address in the current byte area is valid based on the valid bit information, and if so, obtain a bus access signal and verify the bus access signal based on the security bit information; The running unit is configured to perform address conversion according to the offset address to obtain a program access address when the verification by the verification unit passes, and run the application program according to the program access address.
8. The program running device on a microcontroller chip according to claim 7, characterized in that: The acquisition unit includes: a first extraction subunit, configured to extract an offset address corresponding to a storage area of the downloaded application from preset bytes of the non-volatile memory; an acquiring subunit, configured to acquire valid bit information corresponding to the offset address; a judging subunit, configured to judge whether the offset address in the current byte area is valid according to the valid bit information; The verification unit is specifically configured to obtain a bus access signal when the judgment subunit determines that the answer is yes, and verify the bus access signal according to the offset address.
9. A storage medium, characterized in that: The storage medium stores a plurality of instructions, and the instructions are suitable for being loaded by a processor to execute the steps of the program running method on a microcontroller chip according to any one of claims 1 to 6.
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