Flyback Converter with Fast Load Transient Detection

Abstract

The present invention is entitled "Flyback Converter with Fast Load Transient Detection." The present invention provides a flyback converter that can detect the increase in output current caused by a load transient change, thereby responding to the load transient more quickly.

Description

Technical Field

[0001] The present application relates to switching power converters, and more particularly, to a flyback converter with fast load transient detection and response capabilities. Background Art

[0002] To regulate the output voltage, the flyback converter includes a feedback loop that generates an error signal based on the difference (error) between the output voltage and the desired output voltage. The feedback loop includes a compensation circuit that applies a gain to the error signal to generate a control signal. Regarding the generation of the control signal, it should be noted that it can occur on the primary side or the secondary side of the transformer of the flyback converter. If the feedback loop generates the control signal on the secondary side, the resulting regulation of the output voltage is called secondary side regulation (SSR). In contrast, if the feedback loop generates the control signal on the primary side, the output voltage regulation is denoted as primary-only regulation or primary-side regulation (PSR).

[0003] The output voltage is isolated from the primary side of the flyback converter by a transformer. To detect the output voltage in a PSR flyback converter, the primary side controller usually detects the auxiliary winding voltage during the transformer reset time. The transformer reset time extends from the turn-off of the primary side power switch to when the secondary winding current has ramped down to zero. The output voltage can be indirectly detected by the feedback voltage on the auxiliary winding and the primary side power switch transistor is controlled. Therefore, it is conventional practice in a PSR flyback converter that if the output voltage is less than a threshold voltage, the secondary side controller triggers an undervoltage alarm. The secondary side controller then transmits the undervoltage alarm to the primary side controller through an isolated signal channel (e.g., an optocoupler) to trigger the primary side controller to turn on the power switch transistor. Then, this turning on of the power switch transistor enables the primary side controller to detect the feedback voltage on the auxiliary winding to indirectly detect the output voltage. However, it should be noted that there are some errors in the indirect detection of the output voltage. In contrast, the secondary side controller in an SSR flyback converter can directly detect the output voltage. Therefore, the resulting error signal generation in the SSR flyback converter is generally more accurate than the corresponding error signal generation in the PSR flyback converter. After compensating the error signal to form the control signal, the secondary side controller in the SSR flyback converter transmits the control signal to the primary side controller through an isolated signal channel (such as an opto-isolator). The primary side controller then adjusts the period of the power switch transistor by changing the pulse width modulation or the frequency pulse modulation to regulate the output voltage. In another variation of the SSR flyback converter, the secondary side controller itself processes the control signal to determine the power switch modulation. In this SSR variation, the secondary side controller transmits the power switch control command (such as a turn-on command and / or a turn-off command) to the primary side through an opto-isolator.

[0004] Although SSR flyback converters can provide improved output voltage regulation, their use is often accompanied by significant delays in responding to load transients. For example, under light or no load conditions, the power switching frequency is reduced to a very slow rate. Since the power switch is no longer actually in action, the output voltage is supported by the output capacitor. However, this output capacitor discharges rapidly when a load is suddenly applied, causing the output voltage to begin to lose regulation. In order to detect the load application condition in an SSR flyback, a conventional secondary-side controller includes an analog-to-digital converter (ADC) that converts the output voltage into a digital signal, which is then processed to form an error signal and ultimately a control signal voltage. Depending on the specific SSR implementation, the control signal voltage or power switch command is transmitted to the primary side through an optocoupler, whereupon the power switching frequency is accelerated to restore the output voltage to regulation. However, digitization by the ADC typically requires a sample-and-hold delay and an ADC comparator delay. The digitization delay can be expressed as a detection delay based on Vout. This detection delay will now be discussed along with some other exemplary waveforms.

[0005] exist Figure 1 Some exemplary waveforms of a conventional SSR flyback converter are shown in . The cycle of the power switch is represented by the primary sense resistor voltage (Vipk) appearing on the primary side sense resistor in series with the power switch transistor. Before time T0, the SSR flyback converter is in a low load state, so the pulses of the primary sense resistor voltage are performed at a relatively slow rate. Therefore, before time T0, the output voltage Vout is supported by the output capacitor. At time T0, the sudden application of the load (for example, a consumer plugs his mobile device into a charger including an SSR flyback converter) causes the output current Iout to suddenly increase. Since the output voltage Vout is only passively supported by the output capacitor, the output voltage Vout begins to drop at time T0. Due to the detection delay based on Vout, the secondary side controller does not transmit a signal to the optocoupler until time T1. Depending on the implementation, the transmission can be the transmission of a control signal voltage or a power switch cycle command. Therefore, at time T1, the secondary side optocoupler drive current begins to increase. A primary response delay occurs starting at time T1, which ends at time T2 of the power switch transistor switching cycle, causing the voltage Vipk to start ramping up. Subsequently, the secondary side optocoupler drive current also continues to increase. Subsequent cycles of the power switch transistor cause the output voltage to rise back to the set voltage. However, it should be noted that there is a voltage margin requirement for an acceptable minimum output voltage (Vout_min). The delay from time T0 to time T2 can cause the output voltage to drop below the acceptable minimum output voltage. Similar processing delays also occur in the PSR flyback converter.

[0006] Therefore, there is a need in the art for a flyback converter with faster load transient detection and response. Summary of the invention

[0007] According to a first aspect of the present disclosure, a secondary side controller for a flyback converter is provided, the secondary side controller comprising: a secondary side detection resistor, the secondary side detection resistor being used to generate a secondary side detection resistor voltage in response to an output current; a compensation circuit, the compensation circuit being used to multiply an error signal by a gain to generate a control signal; and an output current detection circuit, the output current detection circuit being configured to command the compensation circuit to increase the gain in response to detecting that the secondary side detection resistor voltage is greater than a threshold value.

[0008] According to a second aspect of the present disclosure, a secondary side controller for a flyback converter is provided, the secondary side controller comprising: a secondary side detection resistor, the secondary side detection resistor being used to generate a secondary side detection resistor voltage in response to an output current of the flyback converter; an output current detection circuit, the output current detection circuit being configured to issue an output signal in response to detecting that the secondary side detection resistor voltage is greater than a threshold value; an undervoltage threshold control circuit, the undervoltage threshold control circuit being configured to increase a threshold voltage from a default value to a higher value in response to the control of the output signal; and an undervoltage comparator, the undervoltage comparator being configured to issue an output signal in response to the output voltage of the flyback converter being greater than the threshold voltage.

[0009] According to a third aspect of the present disclosure, a method for detecting an increase in a load of a flyback converter is provided, the method comprising: processing a secondary side detection resistor voltage to detect the application of the load; and triggering an action of a power switch transistor in response to detecting the application of the load.

[0010] By reading the following specific embodiments, these and other aspects of the present invention will be more fully understood. When reading the following description of specific exemplary embodiments in conjunction with the accompanying drawings, other aspects, features and embodiments will become apparent to those of ordinary skill in the art. Although features can be discussed relative to certain embodiments and the following drawings, all embodiments may include one or more of the advantageous features discussed herein. In other words, although one or more embodiments may be discussed as having certain advantageous features, one or more of such features may also be used according to the various embodiments discussed herein. In a similar manner, although exemplary embodiments may be discussed as equipment, system or method embodiments below, it should be understood that such exemplary embodiments may be implemented in various equipment, systems and methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 Some operating waveforms of a conventional flyback converter that detects load transients by digitizing the output voltage via an analog-to-digital converter are shown.

[0012] Figure 2A A flyback converter according to one aspect of the present disclosure is shown wherein a secondary side controller detects application of a load by an increase in output current.

[0013] Figure 2B According to one aspect of the present disclosure, a flyback converter is provided for an embodiment in which a secondary side regulation is used. Figure 2A A more detailed view of the secondary-side controller.

[0014] Figure 3 Shows Figure 2B Some operating waveforms of the flyback converter.

[0015] Figure 4 According to one aspect of the present disclosure, a flyback converter is provided for an embodiment in which primary side regulation is used. Figure 2A A more detailed view of the secondary-side controller.

[0016] Figure 5 According to one aspect of the present disclosure Figure 4 A more detailed view of a portion of the primary side controller in a flyback converter.

[0017] Figure 6 According to one aspect of the present disclosure Figure 5 Some operating waveforms of the first implementation of the flyback converter.

[0018] Figure 7 According to one aspect of the present disclosure Figure 5 Some operating waveforms of the second implementation of the flyback converter.

[0019] Embodiments of the present disclosure and their advantages are best understood by referring to the following detailed description.It should be appreciated that like reference numerals are used to identify like elements shown in one or more of the figures of the drawings. DETAILED DESCRIPTION

[0020] The present invention provides a flyback converter in which the output current is used to detect load transients. The resulting detection of load transients will be faster than conventional output voltage-based (Vout-based) detection because the output current changes lead the output voltage changes by nearly 90 degrees. In addition, the response time is improved. The present invention can provide these load transient detection and response improvements for flyback converters having both SSR and PSR.

[0021] As discussed above, conventionally the flyback converter feedback loop generates an error signal based on the difference (error) between the output voltage and the desired output voltage. The feedback loop includes a compensation circuit that applies a gain to the error signal to generate a control signal voltage. In an SSR flyback converter, the control signal voltage generation is performed on the secondary side of the transformer. In contrast, in a PSR flyback converter, the control signal voltage generation is performed on the primary side of the transformer.

[0022] exist Figure 2A An exemplary flyback converter 100 with improved transient load detection and response is shown in FIG. The flyback converter 100 may have a PSR or a SSR. When the primary side controller 105 drives on the power switch transistor S1, an input voltage Vin, such as provided by full-bridge rectification of the AC voltage from the AC mains, drives the primary winding current through the transformer T1. A sense resistor Rsense is coupled between the drain of the power switch transistor S1 and ground. When the voltage across the sense resistor Rsense is equal to or higher than the desired peak voltage Vipk, the primary side controller 105 turns off the power switch transistor S1.

[0023] As is known in the art of flyback, the secondary winding current in transformer T1 is rectified so as to be turned on when the primary winding current is conducting. The rectification can be performed by output diode D1. Alternatively, the secondary winding can be connected in series with a synchronous rectifier switching transistor controlled by a secondary side controller 115 to manage the rectification of the secondary winding current. The secondary side controller 115 can directly detect the output voltage on the output terminal connected to the secondary winding. As discussed above, conventionally the secondary side controller digitizes the output voltage in the ADC for detecting load transients (sudden application of load) in the output voltage. During the low load state, the power switch transistor S1 switches relatively slowly so that the output voltage is passively supported by the output capacitor Cout connected between the output terminal and the secondary side ground. This passive support of the output voltage causes the output voltage to decrease rapidly in response to the load application. To increase the load transient detection speed, the secondary side controller 115 detects the load transient by connecting a secondary side sense resistor RS in series with the secondary winding (e.g., the secondary side sense resistor Rs can be inserted into the secondary side ground terminal). The secondary side controller 115 monitors the voltage across the secondary side sense resistor Rs to detect the output current increase that occurs in response to the sudden application of the load. Advantageously, the output current increase leads the output voltage change by 90 degrees, so that the secondary side controller 115 can respond quickly to the load transient.

[0024] The speed at which the secondary side controller 115 responds to load transient detection relative to driving the isolated signal channel 110, which provides electrical isolation between the secondary and primary sides of the transformer T1, depends on whether the flyback converter uses an SSR or a PSR to regulate the output voltage. The SSR implementation will be discussed first, followed by a discussion of the PSR implementation. In addition, the following discussion will assume that the electrical isolation in the isolated signal channel 110 is provided by an opto-isolator. However, it should be understood that a digital isolator may be used in an alternative implementation.

[0025] exist Figure 2B The secondary side controller 115 for an SSR implementation is shown in more detail in FIG. The output current sensing circuit 201 includes a differential amplifier 205 that senses the voltage across the secondary side sensing resistor RS through two input resistors of resistance R. The closed loop gain of the differential amplifier 205 depends on the comparison of the resistance of the feedback resistor to the input resistance R. Figure 2B In the embodiment of the present invention, the feedback resistor is 23R, making it 23 times larger than the input resistor R, but it should be understood that the closed-loop gain of the differential amplifier 205 can be changed in alternative embodiments. The differential amplifier 205 amplifies the secondary side sense resistor voltage to drive the low pass filter (LPF) 210 in the output current detection circuit 201. The LPF 210 is used to smooth the output of the differential amplifier 205 to reduce noise sensitivity. The comparator 220 in the output current detection circuit 201 compares the filtered output voltage from the LPF 210 with the threshold voltage. In order to provide adjustability of the threshold voltage, a multiplexer 225 such as controlled by the logic circuit 215 can select the threshold voltage from a plurality of candidate threshold voltages. As an example, the candidate threshold voltage can be 0.2V, 0.3V, 0.4V and 0.5V. In an alternative embodiment, the threshold voltage can also be fixed. When the comparator 220 senses that the filtered and amplified sense resistor voltage is greater than the threshold voltage, a load transient is detected.

[0026] In order to transmit the load transient detection, the secondary side controller 115 can adjust the feedback gain. For example, the secondary side controller 115 can include an ADC that digitizes the output voltage to form a digital value V. The digital adder 240 generates a digital error signal Verror by subtracting a digital reference Vref from the digital value V. During normal operation, the compensator circuit 230 compensates the error signal Verror by multiplying the error signal Verror with a gain to generate a control signal Vcom. A digital-to-analog converter (DAC) 235 converts the control signal Vcom into a control voltage. Based on the control voltage, the secondary side controller 115 drives the secondary side optocoupler drive current in the optocoupler 200 to transmit the control voltage to the primary side controller 105. It should be noted that in normal operation, the gain applied by the compensation circuit 230 can be relatively small to prevent the output voltage from oscillating due to an unstable feedback loop. However, in response to the transient detection indicated by the output signal from the comparator 220, the compensator 230 applies an increased gain to generate the control signal Vcom. Thus, the primary side controller 105 can quickly respond to the resulting increased control voltage received through the optocoupler 200 (or, in alternative embodiments, through another type of isolated signal channel such as a digital isolator).

[0027] exist Figure 3 Some exemplary waveforms of an SSR implementation of the secondary side controller 115 are shown in FIG. Prior to time T0, the flyback converter is in a low load state, so the power switching cycle is relatively slow, as evidenced by the pulses of the primary side sense resistor voltage Vipk. The output current Iout is substantially zero, and the output Vout is in regulation. Just before time T0, a load is suddenly applied, which causes the output of the comparator 220 (denoted as Comp_Iout output) that senses the power supply voltage to increase. In response, the output of the comparator 220 (denoted as Comp_Iout output) is detected with respect to the power supply voltage. Figure 1 Compared to the conventional Vout-based detection delay discussed above, the secondary side optocoupler drive current starts ramping up at time T0 with almost no delay. From time T0 to T1 is the primary response delay, and then the output voltage increases through the control of the power switch transistor. Therefore, even if a load is suddenly applied, the output voltage will not drop below an acceptable voltage margin.

[0028] Now go to Figure 4, a secondary side controller 115 for a PSR is shown. The isense amplifier 415 and comparator 420 are shown in simplified form, but can be arranged as discussed with respect to the differential amplifier 205, LPF 210, and comparator 220 to issue a comparator output signal in response to load transient detection by detecting a threshold increase in the output current. During normal operation (no light load), the undervoltage (UV) comparator 400 functions by comparing the output voltage to a reference voltage Vref (such as a reference voltage Vref generated by a VrefDAC 405), which digitizes a digital value from a UV threshold control circuit 410. During normal operation, the reference voltage should be less than the output voltage by a certain voltage margin. However, in response to the comparator output signal from the comparator 420 (indicating that a load transient has been detected), the UV threshold control circuit 410 increases the digital value so that the reference voltage Vref from the Vref DAC 405 increases. Therefore, the comparator 400 can respond to load transients faster because the voltage margin between the desired output voltage and the increased reference voltage Vref is reduced. As used herein, if a binary signal is true, it is considered that the binary signal (such as generated by the comparator) is sent, regardless of whether the binary signal is high level effective or low level effective. Therefore, if it is considered in this article that the comparator output signal is sent and it is high level effective, the effective signal is for a positive voltage (such as a power supply voltage). On the contrary, if the signal is low level effective, the effective signal is for a ground indication.

[0029] The UV alarm obtained by issuing the output signal of the comparator 400 is transmitted to the primary side through the isolation signal channel 110 (for example, an optical isolator or a digital isolator). In order to increase the response speed of the primary side controller 105 to the obtained UV alarm, as shown in FIG. Figure 5 As shown, the primary side controller 105 may include a comparator 505 that sends an output signal in response to a received signal from the isolated signal channel 110 exceeding a threshold voltage Vth. During normal operation, the primary side controller 105 receives a control signal voltage less than the threshold voltage through the isolated signal channel 110. Then, the primary side controller 105 processes the control signal voltage through a feedback loop to control the switch of the power switch transistor S1, such as by controlling the peak detection resistor voltage Vipk. However, this closed-loop processing requires some delay. Therefore, the primary side controller 105 includes a switch driver 510 that responds to the output signal from the comparator 505 in an open-loop manner to turn on the power switch transistor S1 until the detection resistor voltage reaches a certain predefined threshold. Except for the control circuit that responds to the power switch transistor S1, the remaining functional modules for closed-loop control in the primary side controller 105 can be powered off during the low power mode to save power.

[0030] exist Figure 6 Some exemplary operating waveforms of such open-loop control are shown in FIG. Before time T0, the flyback converter operates in a low-load state, such that the switching of the power switch (as judged by the peak sense resistor voltage Vipk) is relatively infrequent. Load application occurs just before time T0, causing the output current to increase. As shown in FIG. Figure 4 As discussed, the increase in the output current is detected, causing the output signal from the comparator 420 to rise to increase the reference voltage Vref, which is compared with the output voltage by the UV comparator 400. The increased reference voltage Vref is Figure 6 The output voltage crosses the threshold 620 at time T1, causing the secondary side optocoupler drive current (in an optocoupler embodiment) to begin to increase. Then at time T2, the primary side receive signal (e.g., signal voltage) from the optocoupler (or from another form of isolation channel 110) exceeds the threshold voltage of comparator 505. The threshold voltage is Figure 6 , represented by threshold voltage 610. The output signal of comparator 505 is then issued to cause switch driver 510 to pulse power switch transistor S1 until the primary side sense resistor voltage increases to threshold 605. This pulse of power switch transistor S1 then enables primary side controller 105 to measure the output voltage using primary side feedback techniques, so that the subsequent value of the primary side sense resistor peak voltage is determined by the feedback loop.

[0031] exist Figure 7 Some waveforms showing the variation of the primary side regulation are shown in Figure 2. During normal operation, the UV comparator ( Figure 4 ) uses a default undervoltage threshold voltage 710. Before time T0, the flyback converter operates in a light load state, causing the power switch transistor S1 to switch relatively infrequently, as indicated by pulses of the primary side sense resistor voltage (primary Vipeak). During this low load state, the output current Iout is substantially zero. But just before time T0, the sudden application of a load causes the output current to increase, which causes the output signal of comparator 420 to be issued. Subsequently, the output signal from comparator 420 increases the undervoltage threshold voltage to a higher value 715. At time T1, the output voltage Vout drops to 715. The resulting undervoltage alarm (in an optocoupler implementation) is then transmitted by increasing the secondary side optocoupler drive current. Therefore, starting from time T2, the primary side received signal voltage begins to increase until it crosses the threshold voltage 705 at time T3. Therefore, comparator 505 issues an output signal to trigger the power switch transistor turn-on time starting from time T3.

[0032] Therefore, the primary side sense resistor voltage starts to rise at time T3. The primary side controller 105 may include a comparator that compares the primary side sense resistor voltage with a relatively low threshold voltage 720. A digital clock in the primary side controller that may be awakened at time T3 measures the elapsed time from time T3 until the threshold voltage 720 is exceeded. The elapsed time may be designated as Tinit. In order to determine when to turn off the power switch transistor S1 after time T3, the primary side controller 105 may trigger a shutdown event after a delay period of Tinit*n has passed from time T3. The variable n may be a fixed value or may be set by the user. After the initial power switch cycle at time T4 ends, as described with respect to Figure 6 The closed loop approach discussed controls the switching of the subsequent power switch transistor S1.

[0033] Those skilled in the art will now appreciate that, without departing from the scope of the present disclosure, various modifications, substitutions and changes may be made to the materials, devices, configurations and methods of use of the apparatus of the present invention. In view of this, the scope of the present disclosure should not be limited to the scope of the specific embodiments shown and described herein, as they are only some examples thereof, but should be fully commensurate with the scope of the claims appended hereto and their functional equivalents.

Claims

1. A secondary side controller for a flyback converter, the secondary side controller comprising: a secondary side sense resistor connected in series with a secondary side winding of the flyback converter, the secondary side sense resistor being configured to conduct an output current from the secondary side winding to generate a secondary side sense resistor voltage in response to the output current; an analog-to-digital control circuit configured to digitize the output voltage into a digital value; an adder configured to form a digital error signal in response to a difference between the digital value and a reference value; a compensation circuit configured to multiply the digital error signal by a gain to generate a digital control signal; as well as a digital-to-analog converter configured to convert the digital control signal into a voltage signal, wherein the secondary-side controller is configured to drive an isolated signal channel in response to the voltage signal; as well as An output current detection circuit is configured to command the compensation circuit to increase the gain in response to detecting that the secondary side detection resistor voltage is greater than a threshold voltage.

2. The secondary side controller according to claim 1, wherein: The output current detection circuit comprises: a differential amplifier for amplifying the secondary side sense resistor voltage to provide an amplified voltage; a filter for filtering the amplified voltage to provide a filtered voltage; and A comparator is configured to compare the filtered voltage with the threshold.

3. The secondary side controller according to claim 2, wherein: The filter is a low pass filter.

4. The secondary side controller according to claim 2, further comprising: A multiplexer is used to select from a plurality of candidate threshold voltages to provide the threshold voltage.

5. The secondary side controller of claim 4, further comprising logic circuitry for controlling the multiplexer.

6. The secondary side controller according to claim 1, wherein: The secondary side controller is configured to drive an isolated signal channel in response to the voltage signal to alert the primary side controller of the application of the load.

7. The secondary side controller according to claim 6, wherein: The isolated signal path includes an optocoupler.

8. The secondary side controller according to claim 7, wherein: The secondary side controller is configured to drive the optocoupler with a secondary side optocoupler drive current.

9. The secondary side controller according to claim 2, wherein: The differential amplifier has a first input connected to a first terminal of the secondary-side sense resistor through a first input resistor, and has a second input connected to a second terminal of the secondary-side sense resistor through a second input resistor.

10. The secondary side controller according to claim 9, wherein: The differential amplifier further includes a feedback resistor connected between an output terminal of the differential amplifier and the second input terminal.

11. A secondary side controller, the secondary side controller comprising: a secondary side sense resistor for generating a secondary side sense resistor voltage in response to an output current of the flyback converter; an output current detection circuit configured to issue an output signal in response to detecting that the secondary-side detection resistor voltage is greater than a threshold value; an undervoltage threshold control circuit configured to increase a threshold voltage from a default value to a higher value in response to the issuance of the output signal; and an undervoltage comparator configured to issue an undervoltage output signal in response to the output voltage of the flyback converter being greater than the threshold voltage.

12. The secondary side controller according to claim 11, wherein: The output current detection circuit comprises: a differential amplifier for amplifying the secondary side sense resistor voltage to provide an amplified voltage; a filter for filtering the amplified voltage to provide a filtered voltage; and A comparator is configured to compare the filtered voltage with the threshold.

13. The secondary side controller according to claim 12, wherein: The filter is a low pass filter, and the secondary side controller further comprises: a multiplexer for selecting from a plurality of candidate threshold voltages to provide the threshold voltage; and A logic circuit is used to control the multiplexer.

14. The secondary side controller according to claim 12, wherein: The secondary side controller is configured to drive an isolated signal channel in response to issuance of the undervoltage output signal to alert the primary side controller of the application of a load.

15. The secondary side controller according to claim 14, wherein: The isolated signal path includes an optical coupler.

16. The secondary-side controller of claim 14, further comprising a primary-side controller, the primary-side controller comprising: a primary side comparator configured to compare a received signal from the isolated signal channel with a threshold value to detect the application of the load; as well as A switch driver is configured to determine a duration of a power switch transistor being turned on in response to an output signal from the primary-side comparator.

17. A method of detecting application of a load to a flyback converter, the method comprising: detecting a secondary-side sense resistor voltage across a sense resistor connected in series with a secondary-side winding of the flyback converter, the secondary-side sense resistor being configured to conduct an output current from the secondary-side winding to generate a secondary-side sense resistor voltage; processing said secondary side sense resistor voltage to detect said application of said load; as well as increasing a gain of a secondary side compensation circuit in response to detecting said application of said load to provide increased gain; generating an error signal in response to a difference between the output voltage and a reference voltage; multiplying the error signal by the increased gain to provide a control signal; And transmitting the control signal to the primary side controller through the isolated signal channel to trigger the cycle of the power switch transistor.

18. The method according to claim 17, wherein: The processing of the secondary side sense resistor voltage includes: amplifying the secondary side sense resistor voltage to provide an amplified voltage; filtering the amplified voltage to provide a filtered voltage; and The filtered voltage is compared to a threshold voltage to detect the application of the load.

19. The method according to claim 18, further comprising: increasing a brownout threshold voltage in response to detecting said application of said load to provide an increased brownout threshold voltage; as well as An undervoltage alarm is issued in response to the output voltage being less than the undervoltage threshold voltage.

Images