Diaphragm assembly for EUV lithography and method for manufacturing the diaphragm assembly

By using a stacked structure of polycrystalline silicon or single crystal silicon diaphragm layer and mechanical protection material in the diaphragm assembly of an extreme ultraviolet lithography device, the problems of film deformation and damage are solved, and the mechanical stability and manufacturing reliability of the diaphragm assembly are improved.

CN113777894BActive Publication Date: 2024-12-20ASML NETHERLANDS BV
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Patent Information

Application Number
CN202111094353.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2015-07-17
Filing Date
2016-07-04
Publication Date
2024-12-20
Estimated Expiration
2036-07-04

AI Technical Summary

Technical Problem

When manufacturing the diaphragm assembly of an extreme ultraviolet lithography device, the film is prone to deform or damage, resulting in reduced performance or rupture, and the prior art is difficult to effectively prevent the diaphragm assembly from deforming or damage during the manufacturing process.

Method used

Using a laminated structure including a flat substrate and at least one diaphragm layer, a diaphragm assembly of a polycrystalline or single crystal silicon diaphragm layer is formed by selectively removing the inner region of the substrate and providing mechanical protective material at the boundary to maintain The stability of the diaphragm.

Benefits of technology

Improves the mechanical stability of the diaphragm assembly, reduces the possibility of deformation and damage, and ensures the reliability and performance of the diaphragm during manufacturing and use.

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Abstract

A method of manufacturing a diaphragm assembly for EUV lithography, the method comprising: providing a stack comprising a flat substrate and at least one diaphragm layer, wherein the flat substrate comprises an inner region and a border region surrounding the inner region; and selectively removing the inner region of the flat substrate. The diaphragm assembly comprises: a diaphragm formed by the at least one diaphragm layer; and a border holding the diaphragm, the border being formed by the border region of the flat substrate. The stack is provided with a mechanical protection material, the mechanical protection material being configured to mechanically protect the border region during the step of selectively removing the inner region of the flat substrate.
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Description

[0001] This application is a divisional application of the patent application with application number 201680042163.3 and invention name “Method for manufacturing diaphragm assembly” whose original applicant is “ASML Netherlands B.V.” and whose entry date into the Chinese national phase is January 17, 2018 (international application date is 2016-07-04 and international application number is PCT / EP2016 / 065703). Technical Field

[0002] The invention relates to a method for producing a diaphragm assembly and a diaphragm assembly. Background Art

[0003] A lithographic apparatus is a machine that applies a desired pattern to a substrate (usually a target portion of a substrate). For example, a lithographic apparatus can be used in the manufacture of an integrated circuit (IC). In this case, a pattern forming device, optionally referred to as a mask or a reticle, can be used to generate a circuit pattern to be formed on a single layer of the IC. The pattern can be transferred to a target portion (e.g., including a portion, one or more dies) on a substrate (e.g., a silicon wafer). The transfer of the pattern is usually performed by imaging the pattern onto a layer of radiation-sensitive material (resist) disposed on the substrate. Typically, a single substrate will contain a network of adjacent target portions that are continuously patterned.

[0004] Photolithography is widely regarded as one of the key steps in manufacturing ICs and other devices and / or structures. However, as the size of features manufactured using photolithography becomes smaller and smaller, photolithography is becoming a more critical factor in allowing the manufacture of miniature ICs or other devices and / or structures.

[0005] A theoretical estimate of the limit of pattern printing can be given by the Rayleigh law for resolution, as shown in equation (1):

[0006]

[0007] Where λ is the wavelength of the radiation used, NA is the numerical aperture of the projection system used to print the pattern, k1 is a process-dependent adjustment factor also known as the Rayleigh constant, and CD is the characteristic size (or critical dimension) of the printed feature. From equation (1), it is known that the reduction of the minimum printable size of the feature can be achieved in three ways: by shortening the exposure wavelength λ, by increasing the numerical aperture NA, or by reducing the value of k1.

[0008] In order to shorten the exposure wavelength and thus reduce the minimum printable size, it has been proposed to use an extreme ultraviolet (EUV) radiation source. EUV radiation is electromagnetic radiation with a wavelength in the range of 10-20 nm, for example a wavelength in the range of 13-14 nm. It has further been proposed that EUV radiation with a wavelength of less than 10 nm may be used, for example a wavelength in the range of 5-10 nm, for example a wavelength of 6.7 nm or 6.8 nm. Such radiation is referred to by the terms "extreme ultraviolet radiation" or "soft X-ray radiation". Available sources include, for example, laser-generated plasma sources, discharge plasma sources or sources based on synchrotron radiation provided by electron storage rings.

[0009] The lithographic apparatus includes a pattern forming device (e.g., a mask or a reticle). Radiation is provided through the pattern forming device or reflected from the pattern forming device to form an image on a substrate. A diaphragm assembly may be provided to protect the pattern forming device from suspended particles and other forms of contaminants in the air. The diaphragm assembly for protecting the pattern forming device may be referred to as a film. Contaminants on the surface of the pattern forming device may cause defects to be manufactured on the substrate. The diaphragm assembly may include a boundary and a diaphragm extending across the boundary. For example, due to the thinness of the diaphragm, it is difficult to manufacture a diaphragm assembly and the diaphragm assembly does not deform during the process. In particular, when the diaphragm in the diaphragm assembly is supported only at the boundary, there is no other support or reinforcement device such as a grid or substrate under the diaphragm to provide additional mechanical strength, so that the diaphragm assembly may become more easily deformed. In addition, a thin film assembly with a large diaphragm area required for a lithographic pattern forming device is likely to deform under stress. Deformation of the diaphragm assembly may result in reduced performance, damage to the diaphragm, or even rupture, which is not desired.

[0010] It is desirable to reduce the likelihood of deformation or damage to a diaphragm component, such as a membrane, during its manufacture. Summary of the invention

[0011] According to one aspect of the present invention, a method for manufacturing a diaphragm assembly for EUV lithography is provided, the method comprising: providing a stack comprising a flat substrate and at least one diaphragm layer, wherein the flat substrate comprises an inner region and a border region surrounding the inner region; and selectively removing the inner region of the flat substrate so that the diaphragm assembly comprises: a diaphragm formed by the at least one diaphragm layer; and a boundary maintaining the diaphragm, the boundary being formed by the border region of the flat substrate; wherein the stack is provided with a mechanical protective material, the mechanical protective material being configured to mechanically protect the border region during the step of selectively removing the inner region of the flat substrate.

[0012] According to one aspect of the present invention, a diaphragm assembly for EUV lithography is provided, the diaphragm assembly comprising: a diaphragm, the diaphragm being formed by at least one diaphragm layer comprising polycrystalline silicon or single crystal silicon; and a boundary, the boundary retaining the diaphragm; wherein the diaphragm is covered by an upper cover layer and a lower cover layer, each of the upper cover layer and the lower cover layer comprising at least one of the following: Ru, Zr, Mo, silicon oxide, zirconium oxide, aluminum oxide, boron nitride, ruthenium oxide, ruthenium nitride, zirconium nitride, molybdenum oxide or molybdenum nitride or molybdenum silicide, wherein the boundary is formed by a flat substrate, the flat substrate comprising an inner region and a boundary region surrounding the inner region, wherein the boundary is formed by selectively removing the inner region of the flat substrate, wherein the flat substrate comprises an oxide layer and a non-oxide layer, so that the boundary comprises the oxide layer and the non-oxide layer, wherein the oxide layer is between the non-oxide layer and the at least one diaphragm layer, wherein the boundary comprises a mask layer, wherein the boundary region of the flat substrate is between the mask layer and the at least one diaphragm layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Embodiments of the invention will now be described, by way of example only, with reference to the accompanying schematic drawings, in which corresponding reference numerals indicate corresponding parts, and in which:

[0014] Figure 1 A lithographic apparatus according to an embodiment of the present invention is shown;

[0015] Figure 2 is a more detailed view of the lithography apparatus;

[0016] Figure 3 yes Figure 1 and Figure 2 A more detailed view of the source collector module of the device;

[0017] Figures 4 to 37 schematically illustrates the stages for manufacturing a thin film according to an embodiment of the present invention;

[0018] Figures 38 to 39 shows a thin film according to an embodiment of the present invention; and

[0019] Fig.40 A LPCVD chamber used in a method of manufacturing a thin film according to an embodiment of the present invention is schematically shown.

[0020] The features and advantages of the present invention will become more apparent from the detailed description given below in conjunction with the accompanying drawings; similar reference numerals represent corresponding elements in all the drawings. In the drawings, similar reference numerals generally represent identical, functionally similar and / or structurally similar elements. DETAILED DESCRIPTION

[0021] Figure 1 The lithographic apparatus 100 including a source collector module SO according to an embodiment of the present invention is schematically shown. The lithographic apparatus 100 includes:

[0022] an illumination system (or illuminator) IL configured to condition a radiation beam B (e.g., EUV radiation);

[0023] a support structure (e.g., mask table) MT configured to support a patterning device (e.g., mask or reticle) MA and connected to a first positioning device PM configured to accurately position the patterning device;

[0024] a substrate table (eg, a wafer table) WT configured to hold a substrate (eg, a resist-coated wafer) W and connected to a second positioning device PW configured to accurately position the substrate; and

[0025] A projection system (eg a reflective projection system) PS is configured to project the pattern imparted to the radiation beam B by the patterning device MA onto a target portion C of the substrate W (eg comprising one or more dies).

[0026] The illumination system IL may include various types of optical components, such as refractive, reflective, magnetic, electromagnetic, electrostatic or other types of optical components, or any combination thereof, to direct, shape, or control the radiation.

[0027] The support structure MT holds the patterning device MA in a manner that depends on the orientation of the patterning device, the design of the lithographic apparatus, and other conditions such as whether the patterning device is held in a vacuum environment. The support structure MT may use mechanical, vacuum, electrostatic or other clamping techniques to hold the patterning device MA. The support structure MT may be a frame or a table, for example, which may be fixed or movable as required. The support structure MT may ensure that the patterning device MA is in a desired position (e.g. relative to the projection system PS).

[0028] The term “patterning device” should be broadly interpreted as referring to any device that can be used to impart a pattern to the radiation beam B in its cross-section so as to form a pattern in a target portion C of the substrate W. The pattern imparted to the radiation beam B may correspond to a specific functional layer in a device being formed in the target portion C, such as an integrated circuit.

[0029] The pattern forming device MA can be transmissive or reflective. Examples of pattern forming devices include masks, programmable mirror arrays, and programmable liquid crystal display (LCD) panels. Masks are well known in lithography and include mask types such as binary mask types, alternating phase shift mask types, attenuated phase shift mask types, and various hybrid mask types. An example of a programmable mirror array uses a matrix arrangement of small mirrors, each of which can be independently tilted to reflect an incident radiation beam in different directions. The tilted mirrors impart a pattern to the radiation beam reflected by the mirror matrix.

[0030] Similar to the illumination system IL, the projection system PS may include various types of optical components, such as refractive, reflective, magnetic, electromagnetic, electrostatic, or other types of optical components, or any combination thereof, as appropriate for the exposure radiation used, or for other factors such as the use of a vacuum. It may be desirable to use a vacuum for EUV radiation, as other gases may absorb too much radiation. Therefore a vacuum environment may be provided over the entire beam path by means of vacuum walls and a vacuum pump.

[0031] As shown here, the lithographic apparatus 100 is of a reflective type (eg, employing a reflective mask).

[0032] The lithographic apparatus 100 may be of a type having two (dual-stage) or more substrate tables WT (and / or two or more support structures MT). In such a "multi-stage" lithographic apparatus, additional substrate tables WT (and / or additional support structures MT) may be used in parallel, or preparatory steps may be performed on one or more substrate tables WT (and / or one or more support structures MT) while one or more other substrate tables WT (and / or one or more other support structures MT) are being used for exposure.

[0033] refer to Figure 1 , the illumination system IL receives a beam of extreme ultraviolet radiation from a source collector module SO. Methods for producing EUV light include, but are not necessarily limited to, converting a material into a plasma state, the material having at least one element having one or more emission lines in the EUV range, such as xenon, lithium, or tin. In one such method, generally referred to as laser produced plasma ("LPP"), the desired plasma can be produced by irradiating a fuel, such as a droplet, a beam, or a cluster of a material having the desired emission line element, with a laser beam. The source collector module SO can be a laser (in Figure 1The formed plasma emits output radiation, such as EUV radiation, which is collected using a radiation collector disposed in a source collector module SO. The laser and source collector module SO may be separate entities, for example when a CO2 laser is used to provide the laser beam for fuel excitation.

[0034] In this case, the laser is not considered to form part of the lithographic apparatus 100, and the radiation beam B is delivered from the laser to the source collector module SO by means of a beam delivery system comprising, for example, suitable directing mirrors and / or a beam expander. In other cases, the source may be an integral part of the source collector module SO, for example when the source is a discharge produced plasma EUV generator, commonly referred to as a DPP source.

[0035] The illumination system IL may comprise an adjuster for adjusting the angular intensity distribution of the radiation beam. Typically, at least the outer and / or inner radial extent (generally referred to as σ-outer and σ-inner, respectively) of the intensity distribution in a pupil plane of the illumination system IL may be adjusted. Furthermore, the illumination system IL may comprise various other components, such as a faceted field mirror arrangement and a faceted pupil mirror arrangement. The illumination system IL may be used to adjust the radiation beam B to have a desired uniformity and intensity distribution in its cross-section.

[0036] The radiation beam B is incident on the patterning device (e.g. mask) MA held on a support structure (e.g. mask table) MT and is patterned by the patterning device MA. After having been reflected by the patterning device (e.g. mask) MA, the radiation beam B passes through a projection system PS which focuses the radiation beam B onto a target portion C of the substrate W. With the help of a second positioning device PW and a position sensor PS2 (e.g. interferometer device, linear encoder or capacitive sensor), the substrate table WT can be precisely moved, for example in order to position a different target portion C in the path of the radiation beam B. Similarly, the first positioning device PM and a further position sensor PS1 can be used to precisely position the patterning device (e.g. mask) MA relative to the path of the radiation beam B. The patterning device (e.g. mask) MA and the substrate W can be aligned using mask alignment marks M1, M2 and substrate alignment marks P1, P2.

[0037] The controller 500 controls the overall operation of the lithographic apparatus 100, and in particular performs the operation process further described below. The controller 500 can be embodied as a suitably programmed general-purpose computer, which includes a central processing unit, volatile and non-volatile storage devices, one or more input and output devices (such as a keyboard and a screen), one or more network connections, and one or more interfaces to various parts of the lithographic apparatus 100. It should be understood that a one-to-one relationship between the control computer and the lithographic apparatus 100 is not necessary. In an embodiment of the present invention, one computer can control multiple lithographic apparatuses 100. In an embodiment of the present invention, multiple network computers can be used to control one lithographic apparatus 100. The controller 500 can also be configured to control one or more associated processing devices and substrate handling devices in a lithographic unit (lithocell) or cluster (cluster), and the lithographic apparatus 100 forms a part of the lithographic unit or cluster. The controller 500 can also be configured to be attached to the monitoring system of the lithographic unit or cluster and / or the overall control system of the factory floor (fab).

[0038] Figure 2 The lithographic apparatus 100 is shown in more detail, including a source collector module SO, an illumination system IL, and a projection system PS. The source collector module SO is constructed and arranged so that a vacuum environment is maintained within an enclosure 220 of the source collector module SO. A plasma 210 for emitting EUV radiation can be formed by a discharge-generated plasma source. EUV radiation can be generated by a gas or vapor, such as xenon, lithium vapor, or tin vapor, wherein a radiation-emitting plasma 210 is formed to emit radiation in the EUV range of the electromagnetic spectrum. The radiation-emitting plasma 210 is formed by, for example, a discharge that causes at least partially ionized plasma. For example, a partial pressure of 10Pa of Xe, Li, Sn vapor, or any other suitable gas or vapor may be required to effectively generate radiation. In one embodiment, an excited plasma of tin (Sn) is provided to generate EUV radiation.

[0039] The radiation emitted by the radiation emitting plasma 210 is transferred from the source chamber 211 to the collector chamber 212 via a gas barrier or contaminant trap 230 (also referred to as a contaminant barrier or fin trap in some cases) optionally positioned within or behind an opening in the source chamber 211. The contaminant trap 230 may include a channel structure. The contaminant trap 230 may also include a gas barrier or a combination of a gas barrier and a channel structure. The contaminant trap 230 further shown here includes at least a channel structure, as known in the prior art.

[0040] The collector cavity 212 may include a radiation collector CO, which may be a so-called grazing incidence collector. The radiation collector CO has an upstream radiation collector side 251 and a downstream radiation collector side 252. Radiation passing through the radiation collector CO may be reflected off the grating spectral filter 240 to be focused at a virtual source point IF. The virtual source point IF is often referred to as an intermediate focus, and the source collector module SO is arranged such that the virtual source point IF is located at or near the opening 221 of the enclosing structure 220. The virtual source point IF is an image of the emitting radiation plasma 210.

[0041] The radiation then passes through an illumination system IL which may comprise a faceted field mirror arrangement 22 and a faceted pupil mirror arrangement 24 arranged to provide a desired angular distribution of the unpatterned beam 21 at the patterning device MA and a desired uniformity of radiation intensity at the patterning device MA. Upon reflection of the unpatterned beam 21 at the patterning device MA held by the support structure MT, a patterned beam 26 is formed and the patterned beam 26 is imaged by the projection system PS via reflective elements 28, 30 onto a substrate W held by a substrate table WT.

[0042] Typically, more elements than shown may be present in the illumination system IL and the projection system PS. A grating spectral filter 240 may optionally be present, depending on the type of lithographic apparatus. Furthermore, more mirrors may be present than shown in the figures, for example, more than 200 mirrors may be present in the projection system PS. Figure 2 1-6 additional reflective elements beyond the elements shown.

[0043] like Figure 2 As shown, the radiation collector CO is shown in the figure as a nested collector with grazing incidence reflectors 253, 254 and 255, just as an example of a radiation collector CO. The grazing incidence reflectors 253, 254 and 255 are arranged axially symmetrically around the optical axis O. This type of radiation collector CO is preferably used in combination with a discharge produced plasma source, usually called a DPP source.

[0044] Alternatively, the source collector module SO may be as follows Figure 3 A portion of the LPP radiation system shown. The laser LA is arranged to inject laser energy into a fuel, such as xenon (Xe), tin (Sn) or lithium (Li), thereby generating a radiation emitting plasma 210 with an electron temperature of several tens of eV. The high-energy radiation generated during the deexcitation and recombination of these ions is emitted by the plasma, collected by the near normal incidence radiation collector CO and focused onto an opening 221 of the enclosing structure 220.

[0045] like Figure 1As shown in , in an embodiment, the lithographic apparatus 100 comprises an illumination system IL and a projection system PS. The illumination system IL is configured to emit a radiation beam B. The projection system PS is separated from the substrate table WT by an intervening space. The projection system PS is configured to project a pattern imparted to the radiation beam B onto the substrate W. The pattern is for EUV radiation of the radiation beam B.

[0046] The space between the projection system PS and the substrate table WT may be at least partially evacuated.The intervening space may be bounded by a solid surface at the location of the projection system PS, from which the used radiation is directed towards the substrate table WT.

[0047] In one embodiment, the lithographic apparatus 100 comprises a dynamic airlock. The dynamic airlock comprises a diaphragm assembly 80. In one embodiment, the dynamic airlock comprises a hollow portion covered by the diaphragm assembly 80 located in the intervening space. The hollow portion is located around the path of the radiation. In one embodiment, the lithographic apparatus 100 comprises a blower configured to flush the interior of the hollow portion with an airflow. The radiation travels through the diaphragm assembly 80 and then impinges on the substrate W.

[0048] In one embodiment, the lithographic apparatus 100 comprises a diaphragm assembly 80. As explained above, in one embodiment, the diaphragm assembly 80 is used for a dynamic gas lock. In this case, the diaphragm assembly 80 is used as a filter for filtering DUV radiation. Additionally or alternatively, in one embodiment, the diaphragm assembly 80 is a thin film of a pattern forming device MA for EUV lithography. The diaphragm assembly 80 of the present invention can be used for a dynamic gas lock or for a thin film or for another purpose. In one embodiment, the diaphragm assembly 80 comprises a diaphragm formed by at least one diaphragm layer 50, wherein the at least one diaphragm layer 50 is configured to transmit at least 80% of the incident EUV radiation. In order to ensure maximum EUV transmission and minimize the impact on imaging performance, it is preferred that the diaphragm is supported only at the borders. The area of ​​the diaphragm is preferably in the range of 500 square millimeters to 25000 square millimeters, more preferably in the range of 800 square millimeters to 20000 square millimeters, and even more preferably in the range of 1000 square millimeters to 18500 square millimeters.

[0049] In an embodiment, the pellicle is configured to seal the patterning device MA to protect the patterning device MA from airborne particles and other forms of contaminants. Contaminants on the surface of the patterning device MA may cause manufacturing defects on the substrate W. For example, in an embodiment, the pellicle is configured to reduce the possibility that particles may migrate into the stepping field of the patterning device MA in the lithographic apparatus 100, i.e., to prevent particles from landing on the imaging surface of the patterning device MA.

[0050] If the patterning device MA is not protected, contamination may require cleaning or discarding the patterning device MA. Cleaning the patterning device MA interrupts valuable manufacturing time and discarding the patterning device MA is costly. Replacing the patterning device MA also interrupts valuable manufacturing time.

[0051] Figures 4 to 37 Schematically illustrating stages of a method for manufacturing a diaphragm assembly 80 according to an embodiment of the present invention. In an embodiment, the method for manufacturing a diaphragm assembly 80 includes providing a stack 40. Figure 4 As shown in FIG. 4 , the stack 40 comprises a flat substrate 41. The stack may also comprise several other material layers deposited on the flat surface 41, which layers have various protective functions during the manufacturing process of the mask assembly 80, or are used to enhance the properties of the diaphragm assembly 80, such as resistance to chemicals / environment and / or improved (thermo)mechanical strength and / or reduced imaging effects (e.g., by reducing thin film reflections).

[0052] In one embodiment, the flat substrate 41 is formed of silicon. For example, the flat substrate 41 has a shape such as a square, a circle, or a rectangle. The shape of the flat substrate 41 is not particularly limited. The size of the flat substrate 41 is not particularly limited. For example, in one embodiment, the flat substrate 41 has a diameter in the range of about 100 mm to about 500 mm (e.g., about 200 mm). The thickness of the flat substrate 41 is not particularly limited. For example, in one embodiment, the flat substrate 41 has a thickness of at least 300 microns, optionally at least 400 microns. In one embodiment, the flat substrate 41 has a thickness of at most 1000 microns, optionally at most 800 microns. In one embodiment, the flat substrate 41 has a thickness of about 725 microns.

[0053] Silicon can be crystallized into a diamond cubic crystal structure. In one embodiment, the flat substrate 41 comprises cubic crystals of silicon. In one embodiment, the flat substrate 41 has <100> Crystal direction.

[0054] In one embodiment, a method for manufacturing a diaphragm assembly 80 includes the step of etching a planar substrate 41. It is contemplated that embodiments of the present invention achieve a reduction in the time required to perform the step of etching a planar substrate 41. The portion of the planar substrate 41 referred to further herein as the boundary region 72 forms a portion of a boundary 75 of the diaphragm assembly 80 (after removal of the inner region of the planar substrate), such as, for example, in Fig.37 and Fig.38 . Boundary 75 holds the diaphragm of diaphragm assembly 80. It is contemplated that embodiments of the present invention achieve increased mechanical strength of boundary 75 of diaphragm assembly 80. Boundary 75 is at least partially formed by planar substrate 41. Boundary 75 may be referred to as a diaphragm assembly carrier.

[0055] In one embodiment, the flat substrate 41 is polished. The stack 40 has a top side and a bottom side. The top side is shown in Figures 4 to 40 The bottom side is shown as being in Figures 4 to 40 In one embodiment, the flat substrate 41 is polished at both the top side and the bottom side. However, this is not necessary. In one embodiment, the flat substrate 41 is polished on only one of the top side and the bottom side.

[0056] like Figure 5 As shown in FIG. 1 , in one embodiment, the flat substrate 41 includes an oxide layer 42. The oxide layer 42 is part of the flat substrate 41. The remaining part of the flat substrate 41 forms a non-oxide layer of the flat substrate 41. The oxide layer 42 is a sacrificial layer. The oxide layer 42 forms an etching stopper when the non-oxide layer of the flat substrate 41 is etched. Fig.33 As shown in FIG. 4 , for example, a flat substrate 41 is etched from the bottom side. The oxide layer 42 is resistant to the etchant.

[0057] In one embodiment, the oxide layer 42 has a thickness greater than 100 nanometers, optionally greater than 200 nanometers, and optionally greater than 300 nanometers. For example, in one embodiment, the oxide layer 42 has a thickness of about 350 nanometers or about 400 nanometers. In one embodiment, the oxide layer has a thickness less than 5 micrometers and preferably less than 1 micrometer. It is expected that embodiments of the present invention achieve improved robustness to the step of etching the flat substrate 41.

[0058] In one embodiment, the oxide layer 42 is formed as a thin oxide layer on the outer surface of the planar substrate 41. In one embodiment, the oxide layer 42 is formed by a thermal oxidation process, for example, as a thermal wet oxide.

[0059] In one embodiment, the oxide layer 42 and the etchant for etching the flat substrate 41 are configured such that the etching rate of the oxide layer 42 in the etchant is less than about 5 nm / min, for example, about 3 nm / min. In one embodiment, the oxide layer 42 comprises amorphous silicon dioxide.

[0060] like Figures 9 to 37 As shown in FIG, the stack 40 includes at least one diaphragm layer 45, 50. Fig.38 and Fig.39 As shown in FIG. 8 , the diaphragm assembly 80 includes a diaphragm formed from at least one diaphragm layer 50 .

[0061] In one embodiment, at least one diaphragm layer 50 includes polysilicon. In one embodiment, the polysilicon is formed by crystallizing amorphous silicon in at least one diaphragm layer 45. For example, Figure 8As shown in FIG. 4 , in one embodiment, the diaphragm layer 45 is added to the stack 40 as an amorphous silicon layer. When the temperature is increased, the amorphous silicon layer crystallizes into a polycrystalline silicon layer. Figure 16 to Figure 17 The transformation shown in Fig.16 The diaphragm layer 45 shown as an amorphous silicon layer is transformed into Fig.17 The diaphragm layer 50 is shown as a polysilicon layer.

[0062] In one embodiment, the polysilicon layer is doped in-situ during its growth. By adding p-type or n-type doping, the conductivity of the silicon increases, which has a positive effect on the power handling of the EUV source.

[0063] like Figure 6 As shown in FIG. 1 , in one embodiment, the stack 40 includes a lower sacrificial layer 43. The lower sacrificial layer 43 is disposed between the flat substrate 41 and at least one diaphragm layer 45, 50. When the flat substrate 41 includes an oxide layer 42, the lower sacrificial layer 43 is disposed between the oxide layer 42 and at least one diaphragm layer 45, 50.

[0064] In an embodiment, the planar substrate 41 includes an inner region 71 and a border region 72. The border region 72 surrounds the inner region 71. The inner region 71 and the border region 72 are in the plane of the planar substrate 41. In an embodiment, the border region 72 surrounds the inner region 71 in the plane of the planar substrate 41.

[0065] In one embodiment, a method for manufacturing a diaphragm assembly 80 includes selectively removing an inner region 71 of a planar substrate 41. In one embodiment, a wet etchant such as potassium hydroxide (KOH) is used to selectively remove the non-oxide layer of the planar substrate 41. Alternatively, the non-oxide layer of the planar substrate 41 is selectively removed by a dry etching process or by any known means for removing the non-oxide layer of the planar substrate 41. The oxide layer 42 of the planar substrate 41 is resistant to the etchant used to selectively remove the inner region 71 of the non-oxide layer of the planar substrate 41.

[0066] like Fig.35 As shown in , any layers present at the bottom of the diaphragm, such as the oxide layer 42 of the flat substrate 41, are selectively removed. Any suitable method may be used to perform the selective removal so as to leave the bottom of the diaphragm free.

[0067] The lower sacrificial layer 43 protects the at least one diaphragm layer 45 , 50 during the selective removal of any layer present at the bottom of the diaphragm, such as the oxide layer 42 of the planar substrate 41 .

[0068] The thickness of the lower sacrificial layer 43 is not particularly limited. In one embodiment, the thickness of the lower sacrificial layer 43 is at least about 5 nanometers, optionally at least about 10 nanometers. In one embodiment, the thickness of the lower sacrificial layer 43 is at most about 100 nanometers, optionally at most about 50 nanometers. In one embodiment, the thickness of the lower sacrificial layer 43 is about 20 nanometers.

[0069] In one embodiment, a lower sacrificial layer 43 is provided to both the top and bottom surfaces of the stack 40, such as Figure 6 The lower sacrificial layer 43 may be removed from the bottom surface of the stack 40 in a later process or processing step, such as Fig.12 . However, this is not necessary. In an alternative embodiment, the lower sacrificial layer 43 is applied only to the top surface of the stack 40 or only to the bottom of the stack 40. The lower sacrificial layer 43 at the top surface of the stack 40 is positioned between the flat substrate 41 and the diaphragm layers 45, 50 that form the diaphragm of the diaphragm assembly 80.

[0070] In one embodiment, the lower sacrificial layer 43 is formed of a material such as amorphous silicon. However, this is not necessarily the case.

[0071] The method of depositing the lower sacrificial layer 43 onto the stack 40 is not particularly limited. In one embodiment, the lower sacrificial layer 43 is applied to the stack 40 by chemical vapor deposition. For example, in one embodiment, the lower sacrificial layer 43 is applied to the stack 40 by low pressure chemical vapor deposition at a temperature in the range of 300° C. to 700° C. However, this is not necessarily the case. For example, in an alternative embodiment, the lower sacrificial layer 43 is applied to the stack 40 by, for example, sputtering or by a thin film forming method.

[0072] like Figure 7 As shown in FIG. 1 , in one embodiment, the stack 40 includes a lower cover layer 44. The lower cover layer 44 is disposed between the flat substrate 41 and the diaphragm layers 45 and 50. When the stack 40 includes a lower sacrificial layer 43, the lower cover layer 44 is disposed between the lower sacrificial layer 43 and the diaphragm layers 45 and 50. Fig.38 and Fig.39 As shown in FIG. 1 , in one embodiment, lower cover layer 44 forms part of a diaphragm of a diaphragm assembly 80 manufactured by a method according to one embodiment of the present invention.

[0073] The lower cover layer 44 is configured as a diaphragm layer 50 containing the diaphragm of the diaphragm assembly 80 produced by the manufacturing method. When an upper cover layer 46 (such as, for example, Fig. 9 The lower cover layer 44 and the upper cover layer 46 are configured to reduce the distribution of fragments when the diaphragm of the diaphragm assembly 80 breaks.

[0074] In one embodiment, each of the lower cover layer 44 and the upper cover layer 46 has a thickness less than 3 nanometers. In one embodiment, the combined thickness of the lower cover layer 44, the diaphragm layer 45, and the upper cover layer 46 is about 50 nanometers.

[0075] During use of the lithographic apparatus 100, the diaphragm assembly 80 may break. When the diaphragm assembly 80 breaks, the diaphragm may break into many particles. In particular, if the diaphragm layer 50 is formed of a material having a brittle property, the diaphragm layer 50 may break into many particles when the diaphragm assembly 80 breaks. Fragments from the broken diaphragm assembly 80 may contaminate other parts of the lithographic apparatus 100. For example, fragments from the broken diaphragm assembly 80 may contaminate optical components of the lithographic apparatus 100. Contamination from the fragments of the broken diaphragm assembly 80 may reduce the quality of optical functions performed by the optical components of the lithographic apparatus 100.

[0076] For example, in one embodiment, the diaphragm layer 50 is formed of polycrystalline silicon. Polycrystalline silicon has a brittle property. Therefore, the diaphragm assembly 80 including a diaphragm including the diaphragm layer 50 formed of polycrystalline silicon may break into many particles when the diaphragm assembly 80 is broken. It is expected that embodiments of the present invention achieve improved mechanical properties of the diaphragm assembly 80.

[0077] like Figure 7 As shown in FIG. 1 , in one embodiment, a lower cover layer 44 is applied to the top and bottom surfaces of the stack 40. The lower cover layer 44 may be removed in a later process step, such as Fig.12 However, this is not necessary. For example, in an alternative embodiment, the lower cover layer 44 is applied only to the top surface of the stack 40. The lower cover layer 44 at the top surface of the stack 40 is disposed between the flat substrate 41 and the diaphragm layers 45, 50.

[0078] In one embodiment, the material for the lower cap layer 44 is a low stress nitride (i.e., a nitride having a film stress (such as a tensile stress) of 300 MPa or less). For example, in one embodiment, the material for the lower cap layer 44 is amorphous silicon nitride. However, other low stress nitrides may be suitable. In one embodiment, the lower cap layer 44 is thick enough to allow the lower cap layer 44 to perform its function of containing the diaphragm layer 50 when the diaphragm assembly 80 is broken. In one embodiment, the thickness of the lower cap layer 44 is at least about 1 nanometer, optionally at least about 2 nanometers. In one embodiment, the lower cap layer 44 is thin enough so that the diaphragm of the diaphragm assembly 80 including the lower cap layer 44 has sufficiently good optical properties, particularly transmission of EUV radiation. In one embodiment, the thickness of the lower cap layer 44 is at most about 10 nanometers, optionally at most about 5 nanometers. In one embodiment, the thickness of the lower cap layer 44 is about 2.5 nanometers.

[0079] The method of applying the lower cover layer 44 to the stack 40 is not particularly limited. In one embodiment, the lower cover layer 44 is applied to the stack by chemical vapor deposition (CVD), for example, low pressure chemical vapor deposition (LPCVD) at a temperature of about 850° C. However, in an alternative embodiment, for example, the lower cover layer 44 is applied to the stack 40 by sputtering or by a thin film forming method. In this case, the term low stress means that the lower cover layer 44 has a low tensile stress.

[0080] It is not essential to provide the lower cover layer 44. In one embodiment, the stack 40 does not include any lower cover layer 44. In one embodiment, the diaphragm assembly 80 produced by the manufacturing method does not include any lower cover layer 44.

[0081] Figure 8 The step of applying the diaphragm layer 45 to the stack 40 is shown. Figure 8 As shown in FIG. 4 , in one embodiment, the membrane layer 45 is applied to both the top and bottom surfaces of the stack 40. The membrane layer 45 may be removed from the bottom side of the stack 40 in a later process step, such as Fig.12 However, this is not necessary. In an alternative embodiment, the diaphragm layer 45 is applied only to the top side of the stack 40. The diaphragm layer 45 at the top side of the stack 40 becomes the diaphragm layer 50 in the diaphragm assembly 80 produced by the manufacturing method, as shown in FIG. Fig.38 and Fig.39 as shown in the .

[0082] In one embodiment, the diaphragm layer 45 is applied to the stack 40 by chemical vapor deposition. For example, in one embodiment, the diaphragm layer 45 is applied by low pressure chemical vapor deposition at a temperature of about 560° C. However, other methods such as sputtering and thin film forming can be used. Fig.40 An exemplary apparatus suitable for performing a low pressure chemical vapor deposition process is further explained.

[0083] In one embodiment, the diaphragm layer 45 is thin enough so that its transmission of EUV radiation is high enough, for example greater than 50%. In one embodiment, the thickness of the diaphragm layer 45 is at most about 200 nanometers, optionally at most about 150 nanometers. A 150 nanometer thick pure Si diaphragm will transmit about 77% of the incident EUV radiation. In one embodiment, the thickness of the diaphragm layer 45 is at most about 100 nanometers. A 100 nanometer thick pure Si diaphragm will transmit about 84% of the incident EUV radiation.

[0084] In an embodiment, diaphragm layer 45 is thick enough so that it is mechanically stable when diaphragm assembly 80 is secured to patterning device MA of lithographic apparatus 100 and during use of lithographic apparatus 100. In an embodiment, diaphragm layer 45 has a thickness of at least about 10 nanometers, optionally at least about 20 nanometers, optionally at least about 35 nanometers. In an embodiment, diaphragm layer 45 has a thickness of about 55 nanometers.

[0085] like Fig. 9 As shown in FIG. 1 , in one embodiment, the stack 40 includes an upper cover layer 46. Figure 7 The characteristics of the upper cover layer 46 may be selected and varied in the same manner as described for the characteristics of the lower cover layer 44. Therefore, the characteristics of the upper cover layer 46 will not be described in further detail herein.

[0086] The upper cover layer 46 is arranged such that the diaphragm layers 45, 50 are arranged between the flat substrate 41 and the upper cover layer 46. It is not necessary to provide the upper cover layer 46. In an embodiment, the stack 40 does not include any upper cover layer 46. In an embodiment, the diaphragm assembly 80 produced by the manufacturing method does not include any upper cover layer 46 in the diaphragm of the diaphragm assembly 80.

[0087] like Fig.10 As shown in FIG. 4 , in one embodiment, the stack 40 includes an upper sacrificial layer 47 . The upper sacrificial layer 47 is arranged such that the diaphragm layers 45 , 50 are arranged between the flat substrate 41 and the upper sacrificial layer 47 .

[0088] Other features of the upper sacrificial layer 47 may be selected and varied in the same manner as the features of the lower sacrificial layer 43 may be selected and varied. The features of the lower sacrificial layer 43 are described above with particular reference to Figure 6 Therefore, additional features of the upper sacrificial layer 47 will not be discussed in further detail herein.

[0089] In one embodiment, the stack 40 includes a protective layer (not shown). The protective layer is applied to the stack 40 so that the diaphragm layer 45 is disposed between the flat substrate 41 and the protective layer. When the stack 40 is provided with an upper sacrificial layer 47, the upper sacrificial layer 47 is disposed between the diaphragm layer 45 and the protective layer.

[0090] like Fig.11 As shown in FIG, in one embodiment, a method for manufacturing a diaphragm assembly 80 includes applying a front side lacquer layer 51 to the top side of the stack 40. The front side lacquer layer 51 is configured to protect the layers at the top side of the stack 40 from a subsequent etching process performed on the bottom side of the stack 40.

[0091] In one embodiment, the front side paint layer 51 has a thickness of about 2 micrometers or less. In one embodiment, the front side paint layer is applied using a spin coating method.

[0092] like Fig.12 As shown in FIG. 8 , in one embodiment, a method for manufacturing a diaphragm assembly 80 includes removing a diaphragm layer 45 from the bottom side of the stack 40. In one embodiment, the step of removing the diaphragm layer 45 from the bottom side of the stack 40 also includes removing the lower sacrificial layer 43, the lower cover layer 44, the upper cover layer 46, and / or the upper sacrificial layer 47 from the bottom side of the stack 40. Of course, if one or more of these layers are not provided at all or one or more of these layers are not provided to the bottom side of the stack 40, the step of removing the layers from the bottom side of the stack 40 is not necessary.

[0093] In one embodiment, the step of removing the membrane layer 45 from the bottom side of the stack 40 is performed by a dry etching process. In one embodiment, the dry etching process includes exposing the membrane layer 45 to ion bombardment, which causes the removal of portions of the membrane layer 45 from the exposed surface. In one embodiment, the ions are from a plasma, such as a fluorocarbon, for example carbon tetrafluoride (CF4). Fig.12 As shown in FIG, the dry etching process is stopped when the oxide layer 42 of the flat substrate 41 has been reached at the bottom side of the stack 40. If there is no oxide layer 42 at the bottom side of the stack 40, the dry etching process is stopped when the flat substrate 41 has been reached at the bottom side of the stack 40.

[0094] like Fig.13 As shown in FIG. 1 , in one embodiment, a method for manufacturing a diaphragm assembly 80 includes removing a front side paint layer 51. In one embodiment, the front side paint layer 51 is removed by an etching process. The front side paint layer 51 may have been damaged due to handling during the process of removing the nitride layer and the silicon layer from the bottom side of the stack 40. Therefore, the front side paint layer 51 may be replaced by first removing the front side paint layer 51.

[0095] like Fig.14 As shown in FIG. 1 , in one embodiment, a method for manufacturing a diaphragm assembly 80 includes applying a replacement front side paint layer 52 to the top side of the stack 40. The replacement front side paint layer 52 is configured to protect the top side of the stack from an etching process applied to the bottom side of the stack 40. In one embodiment, the replacement front side paint layer 52 has a thickness of about 2 microns or less. In one embodiment, the replacement front side paint layer 52 is applied using a spin coating method.

[0096] However, it is not necessary to provide a replacement front side paint layer 52. For example, if the front side paint layer 51 has not been particularly damaged by handling, it may not be necessary to replace the front side paint layer 51 with a replacement front side paint layer 52. Alternatively, if there is no oxide layer 42 at the bottom side of the stack 40, it may not be necessary to provide a replacement front side paint layer 52 after the front side paint layer 51 has been removed.

[0097] like Fig.15 As shown in FIG. 1 , in one embodiment, a method for manufacturing a diaphragm assembly 80 includes removing an oxide layer 42 from the bottom side of the stack 40. In one embodiment, a wet etching process is used to remove the oxide layer 42. For example, in one embodiment, the etchant can be a wet etchant, such as a buffered oxide etch. The etching process is stopped when the non-oxide layer of the flat substrate 41 is exposed at the bottom side of the stack 40.

[0098] like Fig.16 As shown in FIG. 8 , in one embodiment, a method for manufacturing a diaphragm assembly 80 includes removing the replacement front side paint layer 52. In one embodiment, the replacement front side paint layer 52 is removed by an etching process.

[0099] In one embodiment, a method for manufacturing a diaphragm assembly 80 includes selectively removing an inner region 71 of a planar substrate 41. As a result, the diaphragm assembly 80 includes a diaphragm from the diaphragm layer 50 and a boundary 75 that retains the diaphragm. The boundary 75 is formed by the boundary region 72 of the planar substrate 41.

[0100] Boundary 75 improves the mechanical stability of the membrane of membrane assembly 80. It is contemplated that embodiments of the present invention achieve improved mechanical stability of membrane assembly 80. This makes it easier to package and transport membrane assembly 80 without damaging membrane assembly 80. This also makes it easier to attach membrane assembly 80 to patterning device MA by a frame without damaging membrane assembly 80.

[0101] In an embodiment, the border 75 of the diaphragm assembly 80 is configured to be connected to a frame that connects the diaphragm assembly 80 to the patterning device MA. The frame need not be directly attached to the diaphragm of the diaphragm assembly 80. The frame can be attached to the border 75 of the diaphragm assembly 80. This reduces the possibility that the diaphragm of the diaphragm assembly 80 will be damaged during the process of assembling the diaphragm assembly 80 to the patterning device MA.

[0102] like Fig.17 As shown in, in one embodiment, the step of selectively removing the inner region 71 of the planar substrate 41 includes depositing the mask material 49 to the top surface of the stack 40 and the bottom surface of the stack 40. In one embodiment, the step of selectively removing the inner region 71 of the planar substrate 41 includes selectively removing the mask material 49 so that the mask layer is formed by the mask material 49 deposited to the bottom surface of the stack 40 corresponding to the boundary region 72 of the planar substrate 41. In one embodiment, the step of selectively removing the inner region 71 of the planar substrate 41 includes anisotropically etching the inner region 71 of the planar substrate 41.

[0103] Fig.17There is schematically shown a mask material 49 deposited to the top and bottom surfaces of the layer stack 40. The mask material 49 is deposited such that a diaphragm layer 50 is disposed between the planar substrate 41 and the mask material 49.

[0104] The mask material 49 is used as a mask (ie, as a masking layer) for the process of etching the flat substrate 41 from the bottom side of the stack 40, for example, as an etch stop. Fig.17 As shown in , masking is provided by initially covering both the top and bottom surfaces of the stack 40 with a masking material 49 .

[0105] In one embodiment, the mask material 49 includes amorphous silicon nitride (e.g., a-Si3N4 or SiN). The mask material 49 is resistant to the method used to selectively remove the inner region 71 of the planar substrate 41. For example, in one embodiment, a wet etchant such as KOH is used to selectively remove the inner region 71 of the planar substrate 41. Therefore, in one embodiment, the mask material 49 is chemically resistant to KOH.

[0106] In one embodiment, the mask material 49 is thick enough to provide a robust etch barrier to an etchant used to selectively remove the interior region 71 of the planar substrate 41. In one embodiment, the thickness of the mask material 49 is at least about 50 nanometers, optionally at least about 100 nanometers. In one embodiment, the mask material 49 is thin enough so as not to add a significant volume to the diaphragm assembly 80 produced by the manufacturing method. In particular, the mask material 49 may remain as part of the border 75 at the bottom side of the diaphragm assembly 80 produced by the manufacturing method. In one embodiment, the thickness of the mask material 49 is at most about 500 nanometers, optionally at most about 200 nanometers. In one embodiment, the thickness of the mask material 49 is about 120 nanometers.

[0107] In one embodiment, the mask material 49 is deposited by chemical vapor deposition. For example, in one embodiment, the mask material 49 is applied by low pressure chemical vapor deposition at a temperature of about 850°C.

[0108] By applying a high temperature, it is possible to change the properties of the diaphragm layer 45. For example, when the diaphragm layer 45 is initially applied as amorphous silicon, the diaphragm layer 45 can be transformed into a diaphragm layer 50 formed of polycrystalline silicon. The temperature causes the amorphous silicon to crystallize into polycrystalline silicon.

[0109] Polycrystalline silicon has a high transmittance to EUV radiation. Polycrystalline silicon has good mechanical strength. It is easier to manufacture a diaphragm assembly 80 having a diaphragm formed of polycrystalline silicon than to manufacture a diaphragm formed of another material such as a polycrystalline material or even single crystal silicon (because single crystal silicon may have defects such as pinholes in the crystalline structure). Polycrystalline silicon substantially filters EUV radiation.

[0110] However, it is not necessary for the diaphragm of the diaphragm assembly 80 to be formed of polysilicon. For example, in an alternative embodiment, the diaphragm of the diaphragm assembly 80 is formed of a polycrystalline diaphragm.

[0111] In another alternative embodiment, the diaphragm of the diaphragm assembly 80 is formed of single crystal silicon. In this embodiment, the single crystal silicon diaphragm can be formed by silicon-on-insulator (SOI) technology. The starting material for this product is a so-called SOI substrate. An SOI substrate is a substrate that includes a silicon carrier substrate with a thin single crystal silicon layer on top of a buried isolating SiO2 layer. In one embodiment, the thickness of the single crystal silicon layer can be in the range of between about 5 nanometers to about 5 microns. In one embodiment, the silicon diaphragm layer is disposed on the SOI substrate before the SOI substrate is used in the manufacturing method.

[0112] like Fig.18 As shown in , some mask material 49 may be removed at the upper side of the diaphragm. The mask material 49 may be removed by an etching process or any known removal method. Alternatively, in an embodiment, the mask material 49 is only provided at the lower side of the diaphragm, in which case it is not necessary to remove any mask material 49 from the upper side of the diaphragm.

[0113] like Fig.18 As shown in FIG. 4 , in one embodiment, the step of removing the mask material 49 from the top surface of the stack 40 involves removing substantially all of the mask material 49 from the top surface and the side surfaces of the stack 40. However, this is not necessarily the case. Fig.19 As shown in FIG. 4 , in an alternative embodiment, masking material 49 remains in a peripheral region of a top surface of stack 50 and / or at edge surfaces of stack 40 .

[0114] The mask material 49 at the peripheral region of the top surface of the stack 40 and at the edge surface of the stack 40 may form part of the boundary 75 of the diaphragm assembly 80 produced by the manufacturing method. The mask material 49 at the peripheral region of the top surface of the stack 40 and at the edge surface of the stack 40 may also protect the lower layers so that the lower layers may also form part of the boundary 75 of the diaphragm assembly 80. It is expected that embodiments of the present invention achieve an improvement in the mechanical strength of the boundary 75, thereby resulting in an improvement in the mechanical stability of the diaphragm assembly 80.

[0115] like Fig. 20As shown in FIG. 1 , in one embodiment, the step of selectively removing the mask material 49 from the bottom surface of the stack 40 includes applying a front side masking lacquer layer 53 to the top side of the stack 40. In one embodiment, the front side masking lacquer layer 53 has a thickness of about 3 microns or less. In one embodiment, the front side masking lacquer layer 53 is applied by a spraying method. The front side masking lacquer layer 53 is configured to protect the front side of the stack 40 from the etching process used to selectively remove the masking material 49 from the back surface of the stack 40.

[0116] like Fig.21 As shown in FIG. 1 , in one embodiment, the step of selectively removing the mask material 49 from the rear surface of the stack 40 includes applying a rear masking lacquer layer 54 to the rear surface of the stack 40. In one embodiment, the rear masking lacquer layer 54 has a thickness of about 3 microns or less. In one embodiment, the rear masking lacquer layer 54 is applied by a spraying method.

[0117] The backside masking lacquer layer 54 is configured to protect selective areas (eg, the border region 72 corresponding to the planar substrate 41 ) from an etching process used to selectively remove the masking material 49 from the back surface of the stack 40 .

[0118] like Fig. 22 As shown in FIG. 1 , in one embodiment, the step of selectively removing the mask material 49 from the back surface of the stack includes exposing a selected area of ​​the back mask lacquer layer 54 (e.g., corresponding to the inner area 71 of the flat substrate 41). The exposure process is configured to define a diaphragm assembly area. In one embodiment, multiple diaphragm assembly areas can be defined for a single substrate. A single substrate can be used to form multiple diaphragm assemblies 80.

[0119] like Fig. 22 As shown in FIG. 1 , in one embodiment, an exposure mask 60 is provided to pattern the light radiated onto the backside mask lacquer layer 54. The exposure mask 60 includes a mask opening 61. The mask opening 61 defines a zone or area that will correspond to an inner region 71 of the planar substrate 41. The inner region 71 of the planar substrate 41 corresponds to an area of ​​the diaphragm assembly 80 that has a diaphragm but does not have a boundary 75 through which EUV radiation can be transmitted.

[0120] like Fig. 22 As shown in FIG. 6 , a radiation source 62 is provided. The radiation source 62 irradiates the rear mask lacquer layer 54 through the mask opening 61 of the exposure mask 60. The exposed area 55 of the rear mask lacquer layer 54 is formed, as shown in FIG. Fig. 22 as shown in the .

[0121] like Fig.23As shown in FIG. 1 , in one embodiment, the step of selectively removing the mask material 49 from the rear surface of the stack 40 includes removing the exposed areas 55 of the rear mask lacquer layer 54. In one embodiment, the exposed areas 55 are dissolved. It should be noted that in the process of selectively removing the mask material 49 from the rear surface of the stack 40, a positive mask or a negative mask can be used.

[0122] like Fig.24 As shown in , in one embodiment, the step of selectively removing the mask material 49 from the rear surface of the stack 40 includes etching the mask material 49 in the area corresponding to the exposed area 55 that is removed (e.g., dissolved). When the exposed area 55 is removed, an etch opening 56 is created in its place. The mask material 49 in the area corresponding to the etch opening 56 is removed. The etch opening 56 extends into the area where the mask material 49 is removed from the rear surface of the stack 40. In one embodiment, the step of selectively removing the mask material 49 at the area of ​​the rear surface of the stack 40 corresponding to the etch opening 56 includes dry etching the mask material 49.

[0123] As described above, in one embodiment, a photolithography process and a dry etching process are used to structure the lower surface of the stack 40. Alternatively, in one embodiment, an alternative structure method is used to structure the lower surface of the stack 40.

[0124] like Fig.25 As shown in FIG, in one embodiment, the method for manufacturing the diaphragm assembly 80 includes removing the front masking lacquer layer 53 and the back masking lacquer layer 54. After the step of selectively removing the masking material 49 has been completed, the front masking lacquer layer 53 and the back masking lacquer layer 54 are no longer needed. The front masking lacquer layer 53 and the back masking lacquer layer 54 can be removed so that they do not interfere with subsequent process steps.

[0125] As mentioned above Fig.19 As mentioned, in one embodiment, the mask material 49 remains in a peripheral region at the top surface of the stack 40 and / or at the edge surfaces of the stack 40. Fig.26 As shown in FIG. 4 , in this embodiment, masking material 49 remains in the peripheral region of the top surface of stack 40 and at the edge surfaces of stack 40 after front side masking varnish layer 53 and back side masking varnish layer 54 have been removed.

[0126] like Fig. 27 As shown in , in one embodiment, the method for manufacturing the diaphragm assembly 80 includes removing any layers on top of the diaphragm, such as the upper sacrificial layer 47. As a result, the diaphragm is unconstrained on the top side. Of course, if the sacrificial layer 47 is not provided, the method does not include any step of removing the upper sacrificial layer 47.

[0127] As mentioned above about Fig.19and Fig.26 As mentioned, in one embodiment, the mask material 49 remains in the peripheral region of the top surface of the stack 40 and at the edge surfaces of the stack 40. Fig.28 As shown in FIG. 1 , in this embodiment, the upper sacrificial layer 47 remains in the peripheral region at the top surface of the stack 40 and at the edge surface of the stack 40 after the process of removing the upper sacrificial layer 47 has been completed. Therefore, the step of removing the upper sacrificial layer 47 may not result in the entire upper sacrificial layer 47 being removed.

[0128] like Figure 29 to Figure 32 As shown in , in one embodiment, a method for manufacturing a diaphragm assembly 80 includes providing a stack 40 having a mechanical protection material 66. The mechanical protection material 66 is configured to mechanically protect a border region 72 during the step of selectively removing an inner region 71 of a flat substrate 41. The step of selectively removing the inner region 71 of the flat substrate 41 may cause damage to the diaphragm assembly 80 during the manufacture of the diaphragm assembly 80. At this stage of the manufacturing method, the stack 40 is particularly thin. When the inner region 71 of the flat substrate 41 is selectively removed, the stack 40 includes a mixture of extremely thin portions (where the inner region 71 has been removed) and thin portions (corresponding to the border 75 of the border region 72 where the flat substrate 41 has not yet been removed). This may cause mechanical stress on the stack 40. The stack 40 may break or otherwise be damaged undesirably.

[0129] The mechanical protection material 66 mechanically protects the stack 40, particularly the border region 72, during the step of selectively removing the inner region 71 of the flat substrate 41. It is contemplated that embodiments of the present invention achieve a reduced likelihood of the diaphragm assembly 80 being damaged or destroyed during the manufacture of the diaphragm assembly 80. It is contemplated that embodiments of the present invention achieve improved productivity in the manufacture of the diaphragm assembly 80.

[0130] like Fig.29 As shown in , in one embodiment, the step of providing the mechanical protection material 66 includes applying a protection material mask 65 to the bottom surface of the stack 40. The protection material mask 65 substantially covers the entire bottom surface of the stack 40. The protection material mask 65 is configured to prevent the mechanical protection material 66 from contacting the bottom surface of the stack 40. The possibility of the mechanical protection material 66 undesirably filling the etch opening 56 at the bottom surface of the stack 40 is reduced. In one embodiment, the protection material mask 65 takes the form of a foil. The foil can be applied by, for example, a thin film forming method.

[0131] like Fig.30As shown in FIG. 1 , in one embodiment, the step of providing mechanical protection material 66 includes a combination of surrounding the stack 40 with the mechanical protection material 66 and a protection material mask 65. This is a delicate step. When particles are present at the top surface of the stack 40 before applying the mechanical protection material 66, the particles may undesirably cause etching on the diaphragm layer 50 or the upper cap layer 46 when the mechanical protection material 66 is removed.

[0132] In one embodiment, the mechanical protection material 66 is thick enough to provide adequate mechanical protection to the stack 40. In one embodiment, the mechanical protection material has a thickness of at least about 1 micron, optionally at least about 2 microns. In one embodiment, the mechanical protection material 66 is thin enough to substantially reduce the process time required to apply the mechanical protection material 66. In one embodiment, the mechanical protection material has a thickness of at most about 10 microns, optionally at most about 5 microns. In one embodiment, the mechanical protection material 66 has a thickness of about 4 microns.

[0133] The mechanical protection material 66 is mechanically sufficiently stable to provide mechanical protection to the border region 72 during the step of selectively removing the inner region 71 of the flat substrate 41. The mechanical protection material 66 can be a conformal coating for protecting the coated surface, which has good barrier properties such as anti-solvent (e.g., insoluble at room temperature), anti-humidity, anti-corrosion, and anti-chemical attack. It is generally desired that the mechanical protection material 66 provides a uniform layer thickness without pinholes. In one embodiment, the step of selectively removing the inner region 71 of the flat substrate 41 includes using a chemical etchant to selectively remove the inner region 71 of the flat substrate 41. For example, in one embodiment, the chemical etchant is KOH that provides temporary wet etching protection. The mechanical protection material is chemically resistant to the chemical etchant. For example, in one embodiment, the mechanical protection material 66 is chemically resistant to KOH. This means that when a chemical etchant is used, the mechanical protection material 66 is not etched away at all, or is etched away at a much lower etching rate than the inner region 71 of the flat substrate 41.

[0134] In one embodiment, the mechanical protection material 66 is a cross-linked polymer. In one embodiment, the mechanical protection material 66 is an organic polymer. In one embodiment, the mechanical protection material 66 is a poly(p-xylene) polymer, such as Parylene or For example, Parylene C is pinhole-free and has been used in layer thicknesses as low as about 600 nanometers.

[0135] In one embodiment, the mechanical protection material 66 is applied as a continuous layer having substantially no pores therein. The mechanical protection material 66 forms a layer that is impermeable to the etchant. During the process step of using the etchant to selectively remove portions of the planar substrate 41, the etchant cannot diffuse through the mechanical protection material 66 applied to the stack 40.

[0136] like Fig.31 As shown in FIG. 1 , in one embodiment, the step of providing the mechanical protection material 66 includes removing the protection material mask 65. When the protection material mask 65 is removed, any mechanical protection material 66 attached to the protection material mask 65 is also removed. As a result, Fig.31 As shown in , the mechanical protection material 66 remains at the top surface and edge surfaces of the stack 40.

[0137] Fig.32 Shown in Fig.31 An alternative embodiment of the embodiment shown in Fig.32 In the embodiment shown in , the mask material 49 along with the upper sacrificial layer 47 have remained at the peripheral area of ​​the top surface of the stack 40 .

[0138] Fig.33 The steps of selectively removing the inner region 71 of the flat substrate 41 are schematically shown. When KOH is used as an etchant, an etching time of about 12 hours may be required. The boundary region 72 of the flat substrate 41 continues to exist after the etching process. Alternatively, in an embodiment, the inner region 71 of the flat substrate 41 may be removed by a dry etching process or any known means for removing the inner region 71 of the flat substrate 41.

[0139] Fig.33 The etching process is schematically shown as being ideally anisotropic. However, the etching process may not be perfectly anisotropic, such as Fig.34 As shown in . Fig.34 An alternative embodiment is shown where masking material 49 has remained in the peripheral region at the top surface of stack 40 .

[0140] The oxide layer 42 is resistant to the etchant used to selectively remove the inner region 71 of the planar substrate 41. When the oxide layer 42 is provided, the etching process is stopped when the oxide layer 42 is exposed at the bottom side of the stack 40.

[0141] like Fig.35 As shown in , any layers present at the bottom of the diaphragm, such as oxide layer 42, are removed by any suitable method. As a result, the bottom of the diaphragm is left unconstrained.

[0142] Fig.36 An alternative embodiment is shown where masking material 49 has remained in the peripheral region at the top surface of stack 40 .

[0143] like Fig.37 As shown in FIG. 1 , in one embodiment, a method for manufacturing a diaphragm assembly includes removing a mechanical protection material 66. The mechanical protection material 66 is removed after selectively removing an inner region 71 of a planar substrate 41. The mechanical protection material 66 is provided to the stack 40 before the step of selectively removing the inner region 71 of the planar substrate 41. The mechanical protection material 66 is applied before the KOH etching of the planar substrate 41.

[0144] In one embodiment, the mechanical protection material 66 is removed by performing a barrel etching process. In one embodiment, the etching process to remove the mechanical protection material 66 is performed using oxygen plasma.

[0145] like Fig.38 As shown in FIG. 1 , a diaphragm assembly 80 produced by the manufacturing method includes a diaphragm including a diaphragm layer 50 (also including a lower cover layer 44 and an upper cover layer 46) and a boundary 75. The boundary 75 is formed by a boundary region 72 of the flat substrate 41. In one embodiment, the boundary 75 includes portions of other layers of the stack 40. In particular, as Fig.39 As shown in, in one embodiment, the boundary 75 (in addition to the boundary area 72 of the flat substrate 41) also includes a portion of the mask material 49, the upper sacrificial layer 47, the upper covering layer 46, the diaphragm layer 50, the lower covering layer 44, the lower sacrificial layer 43, the oxide layer 42 of the flat substrate 41 and the mask material at the bottom surface of the diaphragm assembly 80.

[0146] Fig.36 An alternative embodiment is shown where masking material 49 has remained in the peripheral region at the top surface of stack 40 .

[0147] Fig.40 A low pressure chemical vapor deposition (LPCVD) chamber 90 used in a method of manufacturing a diaphragm assembly according to an embodiment of the present invention is schematically shown. LPCVD can be used to apply layers such as a lower sacrificial layer 43, a lower capping layer 44, a diaphragm layer 45, an upper capping layer 46, an upper sacrificial layer 47, and a mask material 49.

[0148] like Fig.40 As shown in FIG. 1 , in one embodiment, LPCVD chamber 90 includes tube 91. Tube 91 is configured to receive stack 40 of layers deposited thereon. In one embodiment, tube 91 comprises quartz.

[0149] In one embodiment, the LPCVD chamber 90 includes a furnace 92. The furnace 92 is configured to heat the wall of the tube 91. For example, the furnace may heat the wall of the tube 91 to a target temperature. In one embodiment, the furnace 92 is formed around the tube 91.

[0150] In one embodiment, the LPCVD chamber 90 includes a gas inlet 93. The gas inlet is configured to allow gas to flow into the tube 91. In one embodiment, the LPCVD chamber 90 includes a pressure detector 95. The pressure detector 95 is configured to sense the pressure inside the tube 91. Based on the measurement from the pressure detector 95, the gas flow to the tube through the gas inlet 93 can be controlled to provide a target pressure inside the tube 91.

[0151] In one embodiment, the LPCVD chamber 90 includes a loading door 94. The loading door 94 is configured to open and close to control access to the interior of the tube 91. When the loading door 94 is open, the stack 40 can be inserted into the tube 91. When the loading door 94 is closed, the stack 40 cannot be inserted into the tube 91. Closing the loading door 94 allows the temperature and pressure inside the tube 91 to be more accurately and easily controlled.

[0152] It is contemplated that embodiments of the present invention achieve a reduction in out-of-band radiation reaching the substrate W. Such out-of-band radiation may be emitted by a Sn plasma based EUV source. Out-of-band radiation includes radiation in the DUV range (100 to 400 nanometers). In the case of an LPP EUV source, out-of-band radiation includes radiation from a laser, typically in the IR radiation range (such as at a wavelength of 10.6 micrometers), which may otherwise present a large amount of undesirable radiation.

[0153] The resist may be sensitive to out-of-band wavelengths. Therefore, by reducing out-of-band radiation, image quality may be improved. Unwanted radiation (especially 10.6 micron radiation in the LPP source) may cause undesired heating of the patterning device MA, substrate W and optics. By reducing out-of-band radiation, heating of the patterning device MA, substrate W and optics is reduced.

[0154] DUV radiation may cause blooming of the resist. By reducing the DUV radiation reaching the substrate W, the blooming of the resist may be reduced. Particles on the pattern forming device MA may cause image quality degradation. It is contemplated that embodiments of the present invention achieve a reduction in particles on the pattern forming device MA. By reducing particles on the pattern forming device MA, image quality may be improved.

[0155] In an embodiment, the membrane assembly 80 can be used as a membrane placed in front of the pattern forming device MA and thus protect the pattern forming device MA. It is expected that embodiments of the present invention achieve reduced fragility of the membrane. It is expected that embodiments of the present invention make it easier to produce membrane assemblies at high volumes. It is expected that embodiments of the present invention achieve processing of self-supporting membranes integrated in a frame.

[0156] In one embodiment, the diaphragm assembly 80 is configured to transmit at least 90% of radiation having a wavelength of 13.5 nanometers or another wavelength in the EUV radiation range used for photolithographic exposure. In one embodiment, the diaphragm assembly 80 is configured to transmit less than 5% of DUV radiation (approximately 100 to 400 nanometers).

[0157] In one embodiment, the diaphragm layer 50 of the diaphragm assembly 80 includes silicon. Silicon is one of the most transparent elements to EUV radiation. Silicon is a commonly processed and available material. In one embodiment, the diaphragm layer 50 is covered with one or more layers selected from the following materials: Ru, Zr, Mo, silicon oxide, zirconium oxide, aluminum oxide, boron nitride, ruthenium oxide, ruthenium nitride, zirconium nitride, molybdenum oxide or molybdenum nitride. The diaphragm assembly 80 can be used in an environment containing hydrogen radicals. This combination is expected to reduce hydrogen-induced outgassing and the subsequent redeposition of silicon.

[0158] In one embodiment, the diaphragm assembly 80 is applied as a film or as part of a dynamic air lock. Alternatively, the diaphragm assembly 80 may be applied in other filtering areas such as an intervention space, or in a beam splitter.

[0159] Although the lithographic apparatus is described in detail herein for use in the manufacture of ICs (integrated circuits), it should be understood that the lithographic apparatus described herein may have other applications, such as the manufacture of integrated optical systems, guidance and detection patterns for magnetic domain memories, flat panel displays, liquid crystal displays (LCDs), thin film magnetic heads, etc. The substrate referred to herein may be processed before or after exposure, such as in a track (a tool that typically applies a layer of resist to a substrate and develops the exposed resist), a metrology tool, and / or an inspection tool. Where applicable, the disclosure herein may be applied to such and other substrate processing tools. In addition, the substrate may be processed more than once, such as to produce a multi-layer IC, so that the term "substrate" used herein may also refer to a substrate that already contains multiple processed layers.

[0160] Although specific embodiments of the present invention have been described above, it should be appreciated that the present invention may be implemented in a manner different from that described above. For example, various paint layers may be replaced by non-paint layers that perform the same function.

[0161] The above description is intended to be illustrative rather than limiting. Accordingly, those skilled in the art will appreciate that modifications may be made to the described invention without departing from the scope of the claims set forth hereinafter.

Claims

1. A membrane assembly for EUV lithography, the membrane assembly being configured to enclose a pattern forming device (MA) on itself to protect the pattern forming device (MA) from airborne particles and other forms of contaminants and to prevent the particles from landing on the imaging surface of the pattern forming device MA, or the membrane assembly is used for a dynamic air lock, and the membrane assembly include: a diaphragm formed of at least one diaphragm layer comprising silicon; and a boundary, the boundary holding the diaphragm such that the diaphragm is supported only at the boundary; wherein the diaphragm is covered by an upper cover layer and a lower cover layer, wherein the lower cover layer comprises a low stress nitride and is configured to at least partially prevent deformation of the diaphragm assembly under stress, and wherein the upper cover layer comprises at least one of the following: Ru, Zr, Mo, silicon oxide, zirconium oxide, aluminum oxide, boron nitride, ruthenium oxide, ruthenium nitride, zirconium nitride, molybdenum oxide, molybdenum nitride or molybdenum silicide, wherein the upper cover layer and the lower cover layer have a thickness of at least 1 nanometer and at most 10 nanometers, wherein the diaphragm layer is disposed between the upper cover layer and the boundary, and The lower cover layer is disposed between the diaphragm layer and the boundary. 2 . The diaphragm assembly of claim 1 , wherein the diaphragm layer comprises at least one polysilicon layer. 3 . The diaphragm assembly according to claim 1 , wherein the diaphragm layer has a thickness in the range from 20 nanometers to 150 nanometers. 4 . The diaphragm assembly according to claim 1 , wherein the upper cover layer has a thickness in the range from 1 nm to 3 nm. 5 . The diaphragm assembly according to claim 1 , wherein the lower cover layer has a thickness in the range from 1 nm to 5 nm.

6. The diaphragm assembly of claim 1 or 2, wherein the boundary comprises a non-oxidized layer.

7. The diaphragm assembly of claim 1 or 2, wherein the boundary comprises a masking layer.

8. The diaphragm assembly of claim 7, wherein the mask layer comprises silicon nitride. 9 . The diaphragm assembly of claim 7 , wherein the mask layer has a thickness in a range from 50 nanometers to 500 nanometers. 10 . The diaphragm assembly according to claim 1 , wherein the diaphragm layer is a polysilicon layer doped with a p-dopant or an n-dopant.

11. The diaphragm assembly of claim 1 or 2, wherein the diaphragm assembly comprises an oxide layer.

12. The diaphragm assembly of claim 11, wherein the oxide layer comprises silicon dioxide.

13. The diaphragm assembly according to claim 1 or 2, wherein the area of ​​the diaphragm is preferably in the range from 500 square millimeters to 25,000 square millimeters.

14. The diaphragm assembly of claim 1 or 2, wherein the EUV radiation transmission through the diaphragm is greater than 50%, preferably at least 77%, even more preferably at least 84% and most preferably at least 90% of incident EUV radiation.

15. The diaphragm assembly of claim 1 or 2, wherein the diaphragm is configured to transmit less than 5% of DUV radiation.

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