An amplifier
By introducing energy storage capacitor CRES into the amplifier as a floating power supply and using its discharge to reduce the overdrive voltage during the amplification process, the problem of difficult to balance between high gain and low power consumption of existing amplifiers is solved, and an amplifier design with high gain and low power consumption is achieved.
Patent Information
- Application Number
- CN202111071494.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-09-14
- Publication Date
- 2025-04-18
- Estimated Expiration
- 2041-09-14
AI Technical Summary
While achieving high gain, existing amplifiers are difficult to meet the requirements of low power consumption at the same time, limiting their application in portable electronic devices.
By introducing energy storage capacitor CRES as a floating power supply, the bias current is provided to the amplifier, and the discharge of capacitor CRES is used to reduce the overdrive voltage of the input transistor during the amplification process, thereby improving the energy efficiency of the amplifier.
The high gain and low power consumption of the amplifier are achieved, improving its application prospects in low-power and high-energy-efficient comparator designs.
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Figure CN113810002B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of electronic circuits, and in particular to an amplifier. Background Art
[0002] The operational amplifier is one of the most important basic circuit units in analog integrated circuits and mixed analog and digital integrated circuits. It can amplify and transmit signals. At the same time, by adding appropriate peripheral components, it can also realize signal calculation, filtering and other functions.
[0003] As semiconductor technology continues to advance, the feature size of semiconductor technology is also shrinking, the integration of chips is getting higher and higher, and power consumption has become one of the factors restricting the development of analog integrated circuits and mixed analog and digital integrated circuits. The power supply voltage and static current of the integrated circuit chip jointly determine the power consumption of the chip.
[0004] Nowadays, in the application of some electronic systems, such as portable products, in order to meet the requirements of long-term work, they need to have lower power supply voltage and lower power consumption. At the same time, low power consumption also responds to the environmental protection concept of green energy conservation and emission reduction, and conforms to the trend of the times.
[0005] In recent years, scholars at home and abroad have done a lot of research on the topic of low-power amplifiers. In short, amplifiers are constantly moving forward in the direction of high gain and low power consumption. Summary of the invention
[0006] In view of the deficiencies in the prior art, the present invention discloses an amplifier for achieving high gain and low power consumption of the amplifier.
[0007] The present invention is achieved through the following technical solutions:
[0008] The present invention provides an amplifier, comprising one or more transistors, one or more switches and one or more capacitors integrated in the same circuit, wherein the transistors, switches and capacitors are connected to form an output terminal V of the amplifier. ON and V OP And input terminal V IP and V IN ;at the same time,
[0009] When the amplifier is in reset state, the output terminal V ON 、V OP and capacitor C X The upper plate of the cm ;
[0010] When the amplifier is in the amplifying state, the differential input signal is amplified and the differential input signal is output at the output terminal V ON and V OPThe differential output voltage is obtained. Under the action of the differential input signal, the node V S- The potential of the node V S+ The potential rises.
[0011] Furthermore, the transistors include M1, M2, M3, M4, M5, M6, M7 and M8; the switches include S1 and S2; the capacitors include C RES and C X .
[0012] Furthermore, the sources of the transistors M1 and M2 are connected to each other and connected to the capacitor C through a switch. RES The drains of the transistors M1 and M2 are connected to the sources of the transistors M3 and M4 respectively.
[0013] Furthermore, the gates of the transistors M3 and M4 are connected to a bias voltage V BP The drains of transistors M3 and M4 are connected to the drains of transistors M5 and M6 and capacitor C X The upper plate is connected to form the output terminal V of the amplifier ON and V OP .
[0014] Furthermore, the capacitor C X The upper plate of the cm phase, with its lower plate connected to ground potential.
[0015] Furthermore, the gates of the transistors M5 and M6 are connected to a bias voltage V BN , whose source is connected to the drain of transistors M7 and M8.
[0016] Furthermore, the sources of the transistors M7 and M8 are connected to each other and connected to the capacitor C through a switch. RES The lower plate of the transistors M1 and M7 are connected to serve as the input terminal V of the amplifier. IP , the gates of transistors M2 and M8 are connected as the input terminal V of the amplifier IN .
[0017] Furthermore, when the amplifier is in a reset state, the capacitor C RES The upper plate is connected to the power supply potential, and the capacitor C RES The upper plate potential is precharged to the power supply potential, and the capacitor C RES The lower plate of the amplifier is connected to the ground potential, and switches S1 and S2 are turned on. ON , V OP and capacitor C X The upper plate of the cm .
[0018] Furthermore, when the amplifier is in the amplification state, the capacitor C RES The upper plate is connected to the source of transistors M1 and M2, and the capacitor C RES The lower plate is connected to the source of transistors M7 and M8, and the capacitor C RES As the floating power supply begins to discharge, it provides bias current for the amplifier and the amplifier starts to work.
[0019] Furthermore, when the amplifier is working, the differential input signal is amplified and the differential input signal is output at the output terminal V ON , V OP A differential output voltage is obtained. Under the action of the differential input signal, transistors M1, M2, M3, M4, M5, M6, M7 and M8 all work in the weak inversion region, and the node V S- The potential of the node V S+ The potential rises.
[0020] Furthermore, the amplifier includes two working states: reset and amplification. reset is high level, φ amp When it is low, the amplifier is in reset state. reset is low level, φ amp When it is high, the amplifier is in amplification state.
[0021] The beneficial effects of the present invention are:
[0022] The present invention introduces an energy storage capacitor C into the amplifier structure. RES As a floating power supply, it provides bias current for the amplifier, so that the amplifier can amplify normally. And during the amplification process, the energy storage capacitor C RES The discharge reduces the overdrive voltage of the input transistor, thereby improving the high energy efficiency of the amplifier. At the same time, the amplifier also adopts an inverter-based structure to achieve current reuse, which also improves the energy efficiency of the amplifier. Therefore, the present invention has a broad application prospect in low-power, high-efficiency comparator design, especially in full-dynamic comparator design. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0024] Figure 1 It is a schematic diagram of an amplifier circuit. DETAILED DESCRIPTION
[0025] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. Example
[0026] This embodiment discloses Figure 1 The amplifier shown in the figure has a specific circuit structure as follows: transistors M1, M2, M3, M4, M5, M6, M7, M8, switches S1, S2 and capacitor C RES , C X composition.
[0027] In this embodiment, the sources of transistors M1 and M2 are connected and connected to capacitor C through a switch. RES The drains of the transistors M1 and M2 are connected to the sources of the transistors M3 and M4 respectively.
[0028] In this embodiment, the gates of transistors M3 and M4 are connected to each other and to a bias voltage V BP , the drains of transistors M3 and M4 are connected to the drains of transistors M5 and M6 and capacitor C X and serve as the output terminals V ON , V OP .
[0029] In this embodiment, two capacitors C X The upper plate of the cm Phase connection, capacitor C X The lower plate is connected to ground potential.
[0030] In this embodiment, the gates of transistors M5 and M6 are connected to each other and to a bias voltage V BN The source of transistors M7 and M8 is connected to the drain of transistors M7 and M8. The source of transistors M7 and M8 is connected to the capacitor C through the switch. RES The lower plate.
[0031] In this embodiment, the gates of transistors M1 and M7 are connected to serve as the input terminal V of the amplifier. IP , the gates of transistors M2 and M8 are connected as the input terminal V of the amplifier IN .
[0032] This embodiment introduces an energy storage capacitor C in the amplifier structure.RES As a floating power supply, it provides bias current for the amplifier, so that the amplifier can amplify normally.
[0033] In this embodiment, during the amplification process, the energy storage capacitor C RES The discharge reduces the overdrive voltage of the input transistor and improves the energy efficiency of the amplifier. Example
[0034] In terms of specific application, this embodiment provides two states of operation of an amplifier, and uses them to explain the principle, as follows: the amplifier has two working modes: reset and amplification:
[0035] In this embodiment, when φ reset is high level, φ amp When it is low, the amplifier is in reset state. reset is low level, φ amp When it is high, the amplifier is in the amplification state.
[0036] In this embodiment, when φ reset is high level, φ amp When it is low, the amplifier is in reset state. Capacitor C RES The upper plate is connected to the power supply potential, and the capacitor C RES The upper plate potential is precharged to the power supply potential, and the capacitor C RES The lower plate is connected to the ground potential. And switches S1 and S2 are turned on, and the output terminal V ON , V OP and capacitor C X The upper plate of the cm .
[0037] In this embodiment, when φ reset is low level, φ amp When it is high level, the amplifier is in the amplification state. Capacitor C RES The upper plate is connected to the source of transistors M1 and M2, and the capacitor C RES The lower plate of is connected to the source of transistors M7 and M8, so the capacitor C RES As the floating power supply begins to discharge, it provides bias current for the amplifier. The amplifier starts to work, amplifies the differential input signal, and outputs the signal at the output of the amplifier. ON , V OP A differential output voltage is obtained.
[0038] Under the action of the differential input signal, transistors M1 to M8 all work in the weak inversion region, and the node V S- The potential of the node V S+The potential of increases, resulting in a decrease in the overdrive voltages of transistors M1, M3, M5, and M7, thereby reducing the power consumption of the amplifier and improving the energy efficiency.
[0039] The amplifier of the embodiment is also based on an amplifier structure of an inverter, which realizes current reuse and also improves the energy efficiency of the amplifier.
[0040] In summary, the present invention uses an energy storage capacitor C RES As a floating power supply, it provides bias current for the amplifier, so that the amplifier can amplify normally. And in the amplification process, due to the capacitor C RES The discharge reduces the overdrive voltage of the input transistor, achieving high energy efficiency of the amplifier. At the same time, the amplifier structure based on the inverter realizes current reuse, which also improves the energy efficiency of the amplifier. This invention has a broad application prospect in the design of low-power and high-efficiency comparators, especially in the design of full-dynamic comparators.
[0041] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. An amplifier, characterized in that: The invention comprises one or more transistors, one or more switches and one or more capacitors integrated in the same circuit, wherein the transistors, switches and capacitors are connected to form the output terminal V of the amplifier. ON and V OP And input terminal V IP and V IN ;at the same time, When the amplifier is in reset state, the output terminal V ON 、V OP and capacitor C X The upper plate of the cm ; When the amplifier is in the amplifying state, the differential input signal is amplified and the differential input signal is output at the output terminal V ON and V OP The differential output voltage is obtained. Under the action of the differential input signal, the node V S- The potential of the node V S+ The potential rises; The transistors include M1, M2, M3, M4, M5, M6, M7 and M8; the switches include S1 and S2; the capacitors include C RES and C X ; The sources of the transistors M1 and M2 are connected to each other and connected to the capacitor C through a switch. RES The drains of transistors M1 and M2 are connected to the sources of transistors M3 and M4 respectively; The gates of the transistors M3 and M4 are connected to a bias voltage V BP The drains of transistors M3 and M4 are connected to the drains of transistors M5 and M6 and capacitor C X The upper plate is connected to form the output terminal V of the amplifier ON and V OP ; The capacitor C X The upper plate of the cm connected, with its lower plate connected to ground potential; The gates of the transistors M5 and M6 are connected to a bias voltage V BN , whose source is connected to the drain of transistors M7 and M8; The sources of the transistors M7 and M8 are connected to each other and connected to the capacitor C through a switch. RES The lower plate of the transistors M1 and M7 are connected to serve as the input terminal V of the amplifier. IP , the gates of transistors M2 and M8 are connected as the input terminal V of the amplifier IN .
2. An amplifier according to claim 1, characterized in that: When the amplifier is in reset state, the capacitor C RES The upper plate is connected to the power supply potential, and the capacitor C RES The upper plate potential is precharged to the power supply potential, and the capacitor C RES The lower plate of the amplifier is connected to the ground potential, and switches S1 and S2 are turned on. ON , V OP and capacitor C X The upper plate of the cm .
3. An amplifier according to claim 1, characterized in that: When the amplifier is in the amplification state, the capacitor C RES The upper plate is connected to the source of transistors M1 and M2, and the capacitor C RES The lower plate is connected to the source of transistors M7 and M8, and the capacitor C RES As the floating power supply begins to discharge, it provides bias current for the amplifier and the amplifier starts to work.
4. An amplifier according to claim 3, characterized in that: When the amplifier is working, the differential input signal is amplified and the differential input signal is output at the output terminal V ON , V OP A differential output voltage is obtained. Under the action of the differential input signal, transistors M1, M2, M3, M4, M5, M6, M7 and M8 all work in the weak inversion region, and the node V S- The potential of the node V S+ The potential rises.
Citation Information
Patent Citations
High-energy-efficiency amplifier
CN216162679U