Method of manufacturing a semiconductor package structure

Abstract

The manufacturing method of the semiconductor package structure provided by the present disclosure can avoid damaging the glass carrier plate during cutting by setting a thick adhesive layer and cooperating with the precision of the cutting machine, thereby realizing the reuse of the glass carrier plate. Moreover, the softness of the adhesive layer can be used as a buffer during the cutting process to reduce the occurrence of wafer surface cracking. Alternatively, the singulation cutting process is arranged after the glass carrier plate and adhesive layer removal process, so there is no risk of glass carrier damage caused by cutting.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and more specifically to a method for manufacturing semiconductor packaging structures. Background Technology

[0002] Wafers with a double-sided structure have conductive pillars and bumps on their upper and lower surfaces. When dicing tape is attached to the conductive pillars for individual dicing, the tape is only about 5-10µm thick, which is not enough to effectively cover the uneven surface of the conductive pillars on the wafer. This can easily lead to problems such as air bubbles (about 50%-70% of the area) and poor adhesion between the two. Even if external force is added for bonding, the effect is still limited. Furthermore, due to poor adhesion, the back side of the wafer is also prone to severe cracking (about 10µm-15µm) and water seepage and contamination.

[0003] Alternatively, during the dicing process, glass is used as a carrier plate, and the wafer is placed on the glass carrier plate for dicing and then the glass carrier plate is removed. However, the current dicing process cuts directly to the glass carrier plate, so the glass carrier plate becomes waste, resulting in the glass carrier plate being unusable and wasting resources. Summary of the Invention

[0004] This disclosure presents a method for manufacturing a semiconductor package structure.

[0005] In a first aspect, this disclosure provides a method for manufacturing a semiconductor package structure, including:

[0006] A double-sided wafer is bonded to a glass substrate using an adhesive layer;

[0007] The double-sided wafer is cut along the direction of the adhesive layer, and the cutting stops at the position within the adhesive layer.

[0008] Remove the glass substrate and the adhesive layer.

[0009] In some alternative embodiments, the double-sided wafer includes:

[0010] A wafer has a first surface and a second surface that are opposite each other;

[0011] A conductive post is disposed on the first surface;

[0012] A bump is provided on the second surface.

[0013] In some alternative embodiments, the adhesive layer is disposed on the second surface and covers the bump.

[0014] In some alternative embodiments, the thickness of the adhesive layer is between 30 micrometers and 120 micrometers.

[0015] In some alternative embodiments, prior to dicing the double-sided wafer, the method further includes:

[0016] The first cut adhesive film is bonded to the surface of the glass substrate away from the adhesive layer.

[0017] In some alternative embodiments, after dicing the double-sided wafer, the method further includes:

[0018] The second cut adhesive film is bonded to the conductive post;

[0019] The second cutting adhesive is bonded to the first surface and covered with the conductive post using a vacuum bonding method.

[0020] In some alternative embodiments, before bonding the second cutting adhesive to the first surface and covering the conductive post using a vacuum bonding method, the method further includes:

[0021] A protective film is applied to the glass substrate.

[0022] In some alternative embodiments, dicing the double-sided wafer along the direction toward the adhesive layer includes:

[0023] The double-sided wafer is cut using a cutting tool of a cutting machine along the direction toward the adhesive layer, and the Z-axis accuracy of the cutting machine is ±3 micrometers.

[0024] Secondly, this disclosure provides another method for manufacturing a semiconductor packaging structure, including: bonding a double-sided structure wafer to a glass substrate using an adhesive layer;

[0025] The cutting adhesive film is bonded to the surface of the glass substrate away from the adhesive layer;

[0026] Remove the glass substrate and the adhesive layer;

[0027] The double-sided wafer is cut along the direction of the cutting adhesive film.

[0028] In some alternative embodiments, the double-sided wafer includes:

[0029] A wafer has a first surface and a second surface that are opposite each other;

[0030] A conductive post is disposed on the first surface;

[0031] A bump is provided on the second surface.

[0032] In some alternative embodiments, the step of bonding the cutting adhesive film to the surface of the glass substrate away from the adhesive layer includes...

[0033] The cutting adhesive film is bonded to the conductive post;

[0034] The cutting adhesive is bonded to the first surface and the conductive post is covered using a vacuum bonding method.

[0035] In some alternative embodiments, before applying the cutting adhesive to the first surface and covering the conductive post using a vacuum bonding method, the method further includes:

[0036] A protective film is applied to the glass substrate.

[0037] In some alternative embodiments, after the cutting adhesive is bonded to the first surface and the conductive post is covered using a vacuum bonding method, the method further includes:

[0038] Remove the protective film.

[0039] The semiconductor packaging structure manufacturing method disclosed herein, by setting a sufficiently thick adhesive layer and controlling the precision of the dicing machine, can avoid damage to the glass substrate during dicing, thereby enabling the reuse of the glass substrate. Furthermore, the soft properties of the adhesive layer can be utilized as a buffer during the dicing process, reducing the occurrence of wafer surface cracking. Alternatively, the monomer dicing process can be arranged after the removal of the glass substrate and adhesive layer, thus eliminating the risk of damage to the glass substrate during dicing. Attached Figure Description

[0040] Other features, objects, and advantages of this disclosure will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0041] Figures 1 to 9 This is a schematic diagram of the structure in the first manufacturing process of the semiconductor packaging structure according to the present disclosure;

[0042] Figures 10 to 16 This is a schematic diagram of the second manufacturing process of the semiconductor packaging structure according to the present disclosure.

[0043] Symbol explanation:

[0044] 1-Double-sided structure wafer, 11-Wafer, 12-Conductive pillar, 13-Bump, 2-Adhesive layer, 3-Glass substrate, 4-First cutting adhesive film, 5-Second cutting adhesive film, 6-Protective film, 7-Cutting tool, 8-Vacuum laminator. Detailed Implementation

[0045] The specific embodiments of this disclosure will be described below with reference to the accompanying drawings and examples. Those skilled in the art can easily understand the technical problems solved by this disclosure and the resulting technical effects through the content described herein. It is understood that the specific embodiments described herein are merely illustrative of the relevant invention and not intended to limit the invention. Furthermore, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings.

[0046] It should be noted that the structures, proportions, sizes, etc., depicted in the accompanying drawings are only for illustrative purposes to aid those skilled in the art in understanding and reading the content described herein, and are not intended to limit the implementation conditions of this disclosure. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of this disclosure, should still fall within the scope of the technical content disclosed herein. Furthermore, terms such as "above," "first," "second," and "a" used in this specification are merely for clarity of description and are not intended to limit the scope of this disclosure. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this disclosure's implementation.

[0047] It should be readily understood that the meanings of “on,” “above,” and “on top of” in this disclosure should be interpreted in the broadest sense, such that “on” means not only “directly on something,” but also “on something” including intermediate components or layers existing between the two.

[0048] Furthermore, for ease of description, spatial relative terms such as “below,” “under,” “lower,” “above,” and “upper” may be used herein to describe the relationship of one element or component to another element or component shown in the accompanying drawings. In addition to the orientations described in the figures, spatial relative terms are also intended to cover different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90° or otherwise), and the spatial relative descriptive terms used herein may be interpreted accordingly.

[0049] Furthermore, the embodiments and features described herein can be combined with each other, unless otherwise specified. This disclosure will now be described in detail with reference to the accompanying drawings and embodiments.

[0050] Figures 1 to 9 This is a schematic diagram of the first manufacturing process of the semiconductor packaging structure according to the present disclosure. The figures have been simplified for better understanding of various aspects of the present disclosure.

[0051] like Figure 1As shown, a double-sided wafer 1 is provided. The double-sided wafer 1 may include a wafer 11, conductive pillars 12, and bumps 13. The conductive pillars 12 and bumps 13 are respectively disposed on the two end faces of the wafer 11.

[0052] Here, wafer 11 can be used to fabricate electronic integrated circuits (EICs). Conductive pillar 12 can be a copper pillar, and bump 13 can be a tin bump.

[0053] like Figure 2 As shown, the double-sided wafer 1 is bonded to the glass substrate 3 using the adhesive layer 2.

[0054] Here, the thickness of adhesive layer 2 can be between 30 micrometers and 120 micrometers. Adhesive layer 2 needs to be thick enough not only to cover the protrusion 13, but also to prevent damage to the glass carrier plate 3 during individual cutting. If the thickness of adhesive layer 2 is less than 30 micrometers, there is a risk of damaging the glass carrier plate 3.

[0055] Here, the glass substrate 3 can provide good support and effectively prevent the serious cracking of the back side of the wafer 11.

[0056] like Figure 3 As shown, the first cutting adhesive film 4 is bonded to the surface of the glass carrier plate 3 away from the adhesive layer 2.

[0057] like Figure 4 As shown, the cutting tool 7 of the cutting machine cuts the double-sided structure wafer 1 along the direction towards the adhesive layer 2, and the cutting stops at the position in the adhesive layer 2.

[0058] Here, the Z-axis accuracy of the cutting machine is ±3 micrometers, and the Z-axis error is ±12µm. With sufficient thickness of the adhesive layer 2 and controlled Z-axis accuracy, the cutting tool 7 stops cutting after reaching the adhesive layer 2 without damaging the glass substrate 3, avoiding the risk of damage during cutting. Consequently, the glass substrate 3 can be reused after removal, reducing costs. Furthermore, the soft properties of the adhesive layer 2 act as a buffer during the cutting process, reducing the occurrence of surface cracking on the wafer 11.

[0059] like Figure 5 As shown, after removing the first cutting adhesive film 4, the second cutting adhesive film 5 is bonded to the conductive post 12.

[0060] like Figure 6 As shown, a protective film 6 is provided on the glass carrier plate 3.

[0061] like Figure 7As shown, a vacuum laminator 8 is used to bond the second dicing adhesive to the wafer 11 and cover the conductive pillars 12. Here, the protective film 6 prevents the second dicing adhesive film 5 from adhering to the cavity of the vacuum laminator 8.

[0062] Here, a vacuum mounting method is used to wrap the conductive post 12 with the second cutting adhesive film 5 and remove any air bubbles in the middle. Specifically, after removing the air bubbles using a vacuum method, pressure is applied to wrap the conductive post 12 with the second cutting adhesive film 5 and bond it to the wafer 11. This prevents contaminants from seeping in when removing the glass substrate 3 and the adhesive layer 2.

[0063] Here, the vacuum laminator 8 has a vacuuming time of 60 seconds, an upper film pressure / time of 0.6MPa / 120 seconds, and a temperature of 50 degrees Celsius.

[0064] In addition, the second cutting adhesive film 5 needs to have a sufficient thickness (greater than the conductive post 12) so that the second cutting adhesive film 5 can effectively cover the uneven surface of the conductive post 12.

[0065] like Figure 8 As shown, remove the protective film 6.

[0066] like Figure 9 As shown, the glass carrier plate 3 and adhesive layer 2 are removed.

[0067] Here, the second cut adhesive film 5 can be used as a requirement for subsequent die attach operations.

[0068] Figures 10 to 16 This is a schematic diagram of the second manufacturing process of the semiconductor packaging structure according to the present disclosure. The figures have been simplified for better understanding of various aspects of the present disclosure.

[0069] use Figures 1 to 9 The first manufacturing process shown can prevent or reduce the degree of chipping on the back side of wafer 11 (e.g., less than 10 μm), and the back side of wafer 11 is free of bubbles and voids and contamination.

[0070] like Figure 10 As shown, a double-sided wafer 1 is provided. The double-sided wafer 1 may include a wafer 11, conductive pillars 12, and bumps 13. The conductive pillars 12 and bumps 13 are respectively disposed on the two end faces of the wafer 11.

[0071] like Figure 11 As shown, the double-sided wafer 1 is bonded to the glass substrate 3 using adhesive layer 2. The second dicing film 5 is bonded to the conductive post 12.

[0072] like Figure 12 As shown, a protective film 6 is provided on the glass carrier plate 3.

[0073] like Figure 13 As shown, a vacuum bonding machine 8 is used to bond the second cutting adhesive onto the wafer 11 and cover the conductive pillars 12.

[0074] like Figure 14 As shown, remove the protective film 6.

[0075] like Figure 15 As shown, the glass carrier plate 3 and adhesive layer 2 are removed.

[0076] like Figure 16 As shown, the double-sided structure wafer 1 is cut along the direction of the cutting adhesive film.

[0077] Compared to Figures 1 to 9 The first manufacturing process shown is as follows: Figures 10 to 16 The difference in the second manufacturing process shown is that the monomer cutting process is arranged after the process of removing the glass carrier 3 and the adhesive layer 2, so that there is no risk of damage to the glass carrier caused by cutting.

[0078] Although this disclosure has been described and illustrated with reference to specific embodiments thereof, such descriptions and illustrations are not limiting of this disclosure. It will be readily understood by those skilled in the art that various changes can be made and equivalent elements can be substituted within embodiments without departing from the true spirit and scope of this disclosure as defined by the appended claims. Illustrations may not be drawn to scale. Differences may exist between the technical representation in this disclosure and actual equipment due to variables in the manufacturing process, etc. Other embodiments of this disclosure may exist that are not specifically described. The description and drawings should be considered illustrative rather than restrictive. Modifications may be made to adapt particular circumstances, materials, composition, methods, or processes to the objectives, spirit, and scope of this disclosure. All such modifications fall within the scope of the appended claims. While the methods disclosed herein have been described with reference to specific operations performed in a particular order, it should be understood that these operations may be combined, subdivided, or reordered to form equivalent methods without departing from the teachings of this disclosure. Therefore, unless specifically indicated herein, the order and grouping of operations do not limit this disclosure.

Claims

1. A method for manufacturing a semiconductor package structure, comprising: providing a double-side structure wafer, the double-side structure wafer comprising a wafer having opposite first and second surfaces, the double-side structure wafer further comprising conductive pillars disposed on the first surface and bumps disposed on the second surface; adhering the double-side structure wafer to a glass carrier using an adhesive layer, the adhesive layer being disposed on the second surface and covering the bumps; cutting the double-side structure wafer along a direction of the double-side structure wafer towards the adhesive layer, the cutting being stopped at the adhesive layer; adhering a first cutting film to the first surface of the double-side structure wafer; providing a protective film on the glass carrier; adhering the second cutting film to the first surface and covering the conductive pillars using a vacuum lamination method; removing the glass carrier and the adhesive layer.

2. The method of claim 1, wherein, The adhesive layer has a thickness between 30 microns and 120 microns.

3. The method of claim 1, wherein, Before the cutting the double-side structure wafer, the method further comprises: adhering a first cutting film to a surface of the glass carrier away from the adhesive layer.

4. The method of claim 1, wherein, The cutting the double-side structure wafer along a direction of the double-side structure wafer towards the adhesive layer comprises: cutting the double-side structure wafer along a direction of the double-side structure wafer towards the adhesive layer using a cutting tool of a cutting machine, the cutting machine having a Z-axis accuracy of ±3 microns. 5.A method for manufacturing a semiconductor package structure, comprising: providing a double-side structure wafer, the double-side structure wafer comprising a wafer having opposite first and second surfaces, the double-side structure wafer further comprising conductive pillars disposed on the first surface and bumps disposed on the second surface; adhering the double-side structure wafer to a glass carrier using an adhesive layer, the adhesive layer being disposed on the second surface and covering the bumps; providing a protective film on the glass carrier; adhering a cutting film to a surface of the glass carrier away from the adhesive layer, comprising adhering the cutting film to the conductive pillars and adhering the cutting film to the first surface and covering the conductive pillars using a vacuum lamination method; removing the protective film; removing the glass carrier and the adhesive layer; cutting the double-side structure wafer along a direction of the double-side structure wafer towards the cutting film.

Images