Substrate structure with heat dissipation structure and manufacturing method thereof

Abstract

A substrate structure with a heat dissipation structure and a manufacturing method thereof, wherein a coarse circuit build-up layer structure and a fine circuit build-up layer structure are sequentially formed on the top of a reinforcement structure layer. An external circuit layer and a protective layer are formed at the bottom of the reinforcement structure layer. A heat dissipation structure is formed in the reinforcement structure layer, the coarse circuit build-up layer structure and the fine circuit build-up layer structure, and a plurality of heat dissipation parts of the heat dissipation structure are respectively exposed at the bottom of the reinforcement structure layer and the surface of the fine circuit build-up layer structure. Since the fine circuit build-up layer structure is flat, it can be directly electrically connected to at least one chip, and the heat energy generated by the chip is dissipated through the heat dissipation structure through the fine circuit build-up layer structure and the coarse circuit build-up layer structure from the heat dissipation part exposed at the bottom of the reinforcement structure layer, thereby achieving the purpose of improving the heat dissipation effect and use efficiency.

Description

Technical Field

[0001] The invention relates to a substrate structure, and in particular to a substrate structure with a heat dissipation structure and a manufacturing method thereof. Background Art

[0002] With the rapid development of the electronics industry, many electronic products are rapidly developing in different fields such as the Internet of Things (IoT), 5G mobile networks (5th generation wireless systems, 5G), biotechnology, artificial intelligence chips (AI chips), etc. By applying these electronic products, relevant service networks can be connected in series to improve people's quality of life and convenience.

[0003] These electronic products include multiple electronic components, processors, etc., and through the mutual operation of these electronic components and / or processors, the electronic products provide one or more functions. Therefore, when assembling electronic products, the electronic components and processors are first placed on the corresponding substrate structure. Then, the substrate structure is placed on a large carrier board according to the requirements, and the electronic components or processors on the substrate structure are electrically connected to each other to complete the assembly of the electronic product.

[0004] For electronic products, a large amount of heat energy will be generated during the operation process, and most of this heat energy is generated by electronic components and processors. The heat energy includes the inside of the electronic components or the inside of the processor, the circuits in the substrate structure, and the joints used for electrical connection between the electronic components and the substrate structure, or the joints used for electrical connection between the processor and the substrate structure. Among them, the joints used for electrical connection between the electronic components and the substrate structure, or the joints used for electrical connection between the processor and the substrate structure, are particularly prone to accumulate a large amount of heat energy and cause the temperature to rise. The main reason is that because the size of these contacts is too small, the heat energy generated by the energy accumulation cannot be effectively dissipated. This will make it easy for electronic components and processors to malfunction due to excessive temperature. Therefore, how to improve the heat dissipation effect has become an issue that needs to be improved urgently. Summary of the invention

[0005] In view of the heat dissipation problems existing in the above-mentioned prior art, the purpose of the present invention is to provide a substrate structure with a heat dissipation structure and a manufacturing method thereof. By forming a heat dissipation structure connected to the substrate structure on the substrate structure, the heat energy generated at the connection point for electrical connection between the electronic component and the substrate structure, or the connection point for electrical connection between the processor and the substrate structure, or the heat energy in the substrate structure, can be quickly discharged from the substrate structure through the heat dissipation structure, thereby achieving the purpose of improving the heat dissipation effect and the use efficiency.

[0006] The technical means adopted to achieve the above-mentioned purpose is to make the above-mentioned substrate structure with heat dissipation structure include the following structure.

[0007] The reinforcing structural layer has an opposite top and bottom.

[0008] A coarse circuit build-up layer structure is formed on top of the strengthening structure layer.

[0009] The fine circuit build-up structure is formed on the coarse circuit build-up structure and is electrically connected to the coarse circuit build-up structure. The surface of the fine circuit build-up structure is flat and has a plurality of exposed connection pads.

[0010] The heat dissipation structure is formed in the strengthening structure layer, the coarse circuit build-up structure and the fine circuit build-up structure, and the plurality of heat dissipation parts of the heat dissipation structure are respectively exposed at the bottom of the strengthening structure layer and the surface of the fine circuit build-up structure.

[0011] The external circuit layer is formed at the bottom of the strengthening structure layer and is electrically connected to the coarse circuit build-up layer structure. The external circuit layer has a connection surface.

[0012] A protection layer is formed on the external circuit layer and the bottom of the reinforcement structure. The protection layer has a plurality of openings so that a portion of the connection surface of the external circuit layer is exposed on the protection layer.

[0013] Optionally, it further includes a plurality of surface treatment layers, which are respectively formed on the exposed connection pads in the fine circuit build-up layer structure, on the exposed heat dissipation portion in the heat dissipation structure, and on the exposed connection surface in the external circuit layer.

[0014] Optionally, the fine circuit build-up structure includes one or more fine circuit layers.

[0015] Optionally, the line width of the plurality of coarse lines in the coarse line build-up layer structure is greater than 10 microns.

[0016] Optionally, the line width of the plurality of fine lines in the fine line build-up structure is less than or equal to 10 microns.

[0017] Optionally, at least one chip is further electrically connected to the fine circuit build-up layer structure of the substrate structure with a heat dissipation structure, the chip is arranged on the fine circuit build-up layer structure, and multiple contacts of the chip are respectively electrically connected to corresponding connection pads of some of the fine circuit build-up layer structures.

[0018] Optionally, the thickness of the dielectric layer of the coarse circuit build-up structure is greater than the thickness of the dielectric layer of the fine circuit build-up structure.

[0019] Optionally, the plurality of fine circuits in the fine circuit build-up layer structure and the plurality of thick circuits in the thick circuit build-up layer structure are not connected to the heat dissipation structure.

[0020] Another technical means adopted to achieve the above purpose is to make the manufacturing method of the substrate structure with heat dissipation structure include multiple steps. The first step is to form a fine circuit build-up layer structure on the carrier board, and the fine circuit build-up layer structure includes a first heat dissipation circuit of the heat dissipation structure.

[0021] The second step is to form a coarse circuit build-up structure on the fine circuit build-up structure and electrically connect the coarse circuit build-up structure to the fine circuit build-up structure. The coarse circuit build-up structure includes a second heat dissipation circuit of the heat dissipation structure and is connected to the first heat dissipation circuit.

[0022] The third step is to form a reinforcement structure layer on the coarse circuit build-up structure, and to form a third heat dissipation circuit and an external circuit layer of the heat dissipation structure on the reinforcement structure layer, wherein the third heat dissipation circuit is connected to the second heat dissipation circuit, and the third heat dissipation circuit has multiple heat dissipation parts and is exposed on the reinforcement structure layer, and the external circuit layer is electrically connected to the coarse circuit build-up structure.

[0023] The fourth step is to remove the carrier board so that the plurality of heat dissipation portions of the first heat dissipation circuit of the heat dissipation structure are exposed outside the fine circuit build-up layer structure, and the plurality of connection pads of the fine circuit build-up layer structure are exposed outside.

[0024] Optionally, before removing the carrier board, a protective layer is disposed on the strengthening structure layer and the external circuit layer, and the protective layer has a plurality of openings so that a portion of the external circuit layer is exposed outside the protective layer.

[0025] Optionally, a surface treatment layer is provided on the exposed connection pads in the fine circuit build-up layer structure, on the exposed heat dissipation portion in the heat dissipation structure, and on the exposed portion in the external circuit layer.

[0026] Optionally, at least one chip is disposed on the fine circuit build-up layer structure, wherein the chip has a plurality of contacts and is respectively electrically connected to corresponding connection pads of a portion of the fine circuit build-up layer structure.

[0027] According to the above content, since the heat dissipation structure is formed on the substrate structure, the heat energy generated by the electrical connection between the fine circuit build-up layer structure and the corresponding chip, as well as the heat energy generated in the substrate structure, can be guided to the bottom of the substrate structure through the heat dissipation structure to dissipate the heat outward, so as to effectively achieve heat dissipation. In addition, since the fine circuit build-up layer structure is flat, the exposed connection pads can be directly electrically connected to the corresponding chip without the need for other flattening processes, and accurate connection can be effectively achieved. According to the above content, the present invention can achieve the purpose of improving the heat dissipation effect and usage efficiency.

[0028] In order to further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, such description and the attached drawings are only used to illustrate the present invention and are not intended to limit the scope of rights of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0030] Figure 1 is a schematic diagram of a substrate structure with a heat dissipation structure according to an embodiment of the present invention;

[0031] Figure 2 is a flow chart of a manufacturing method according to an embodiment of the present invention;

[0032] Figure 3 is a first schematic diagram of manufacturing a fine line build-up layer structure of the present invention;

[0033] Figure 4 is a second schematic diagram of manufacturing a fine circuit build-up layer structure of the present invention;

[0034] Figure 5 is a third schematic diagram of manufacturing a fine circuit build-up layer structure of the present invention;

[0035] Figure 6 is a schematic diagram of manufacturing a coarse circuit build-up layer structure of the present invention;

[0036] Figure 7 It is a schematic diagram of manufacturing a strengthening structure layer and an external circuit layer of the present invention;

[0037] Figure 8 is a schematic diagram of manufacturing a protective layer of the present invention;

[0038] Fig. 9It is a schematic diagram of manufacturing the surface treatment layer of the present invention.

[0039] Reference numerals

[0040] 10 Fine Line Build-up Structure

[0041] 11 connection pads

[0042] 12First dielectric layer

[0043] 121 First blind hole

[0044] 13 Thin Lines

[0045] 14 Second dielectric layer

[0046] 141 Second blind hole

[0047] 20 thick line layer structure

[0048] 21 Thick Line

[0049] 22 Thick line dielectric layer

[0050] 221 third blind hole

[0051] 30 Strengthening structure layer

[0052] 31 Top

[0053] 32 bottom

[0054] 33 connecting line segments

[0055] 34 Fourth blind hole

[0056] 40 heat dissipation structure

[0057] 41 First heat dissipation circuit

[0058] 411 heat dissipation unit

[0059] 412 first heat dissipation connection section

[0060] 42 Second heat dissipation circuit

[0061] 421 second heat dissipation connection section

[0062] 43 The third heat dissipation circuit

[0063] 431 heat dissipation unit

[0064] 432 third heat dissipation connection section

[0065] 51 external circuit layer

[0066] 511 connection surface

[0067] 52 protection layers

[0068] 521 Opening

[0069] 53 surface treatment layer

[0070] 60 chips

[0071] 61 contacts

[0072] 62 electrical connection layer

[0073] Steps S71, S72, S73, S74

[0074] 80 load plate

[0075] 81 bonding layer DETAILED DESCRIPTION

[0076] The drawings shown in the present invention are partial cross-sectional schematic diagrams of the substrate structure. The number, size, and connection method of the related structures shown in the drawings are for reference only and are not intended to limit the specific structure of the substrate structure of the present invention. In addition, the directional relationship described in the present invention is based on the positional relationship between the related structures or the directions shown in the drawings, and is not intended to be limiting. Moreover, the first, second, or third mentioned in the present invention are only used for name distinction and are not intended to be limiting.

[0077] For an embodiment of a substrate structure with a heat dissipation structure, please refer to Figure 1 The substrate structure with heat dissipation structure includes a fine circuit build-up layer structure 10 , a coarse circuit build-up layer structure 20 , a strengthening structure layer 30 , a heat dissipation structure 40 , an external circuit layer 51 and a protection layer 52 .

[0078] The strengthening structure layer 30 has a top portion 31 and a bottom portion 32 , and the coarse circuit build-up layer structure 20 is formed on the top portion 31 of the strengthening structure layer 30 .

[0079] The fine circuit build-up structure 10 is formed on the coarse circuit build-up structure 20 and is electrically connected thereto.

[0080] The heat dissipation structure 40 is formed in the strengthening structure layer 30, the coarse circuit build-up structure 20 and the fine circuit build-up structure 10. The heat dissipation structure 40 exposes the bottom 32 of the strengthening structure layer 30 and the fine circuit build-up structure 10.

[0081] The external circuit layer 51 is formed on the bottom 32 of the strengthening structure layer 30 and is electrically connected to the rough circuit build-up layer structure 20. The external circuit layer 51 has a connection surface 511.

[0082] The protection layer 52 is formed on the external circuit layer 51 and the strengthening structure layer 30. The protection layer 52 has a plurality of openings 521 so that a portion of the connection surface 511 of the external circuit layer 51 is exposed outside the protection layer 52.

[0083] In this embodiment, the substrate structure with heat dissipation structure of the present invention can be further electrically connected to at least one chip 60 , and related contents will be described later.

[0084] For the manufacturing method of the substrate structure with heat dissipation structure, please refer to Figure 2 The production process shown includes steps S71 to S75. Figure 2 The manufacturing method is shown in the flowchart, and the Figures 3 to 9 The schematic diagrams showing the relative relationship, formation method and connection relationship of the related structures are used to illustrate the structure and manufacturing method of the substrate structure with a heat dissipation structure.

[0085] Please refer to Figure 2 and Figure 3 As shown in step S71, the fine circuit build-up layer structure 10 is formed on the carrier board 80, and the first heat dissipation circuit 41 of the heat dissipation structure 40 is included in the fine circuit build-up layer structure 10. According to actual design requirements, the number of layers of the fine circuit build-up layer structure 10 can be one or more layers. In this example, two layers are used for explanation, but this example is not limited to this.

[0086] Please refer to Figure 3 and Figure 4 As shown, a bonding layer 81 is provided on the carrier board 80. The first layer of the fine circuit build-up structure 10 is first formed on the bonding layer 81, and a plurality of heat dissipation portions 411 of the first heat dissipation circuit 41 of the heat dissipation structure 40 are formed. The first layer of the fine circuit build-up structure 10 includes a plurality of connection pads 11 and a first dielectric layer 12.

[0087] The first layer connection pads 11 of the fine circuit build-up structure 10 and the heat dissipation parts 411 of the first heat dissipation circuits 41 are formed on the bonding layer 81. The connection pads 11 and the heat dissipation parts 411 are not connected to each other.

[0088] Please refer to Figure 3 and Figure 4 As shown, the first dielectric layer 12 is formed on the bonding layer 81, the connection pads 11 and the heat dissipation portions 411. The first dielectric layer 12 covers the connection pads 11 and the heat dissipation portions 411 to complete the manufacturing of the first layer of the fine line build-up structure 10.

[0089] Please refer to Figure 3 and Figure 4As shown. A plurality of first blind holes 121 are formed on the first dielectric layer 12. The first blind holes 121 are respectively formed on the corresponding connection pads 11 and the heat dissipation portion 411 of the corresponding first heat dissipation circuit 41. Part of the surface of the corresponding connection pad 11 and the heat dissipation portion 411 of the corresponding first heat dissipation circuit 41 is exposed to the first dielectric layer 12 through the corresponding first blind holes 121.

[0090] Please refer to Figure 4 , 5 The second layer of the fine line build-up structure 10 is formed on the first layer of the fine line build-up structure 10, and a plurality of first heat dissipation connection segments 412 of the first heat dissipation line 41 of the heat dissipation structure 40 are formed. The second layer of the fine line build-up structure 10 includes a plurality of fine lines 13 and a second dielectric layer 14.

[0091] The thin circuits 13 are formed on the first dielectric layer 12. The thin circuits 13 are electrically connected to the corresponding connection pads 11 via the corresponding first blind holes 121. Similarly, the first heat dissipation connection segments 412 of the first heat dissipation circuit 41 are formed on the first dielectric layer 12. The first heat dissipation connection segments 412 of the first heat dissipation circuit 41 are connected to the corresponding heat dissipation portions 411 via the corresponding first blind holes 121. The thin circuits 13 are not connected to the first heat dissipation connection segments 412 of the first heat dissipation circuit 41.

[0092] Please refer to Figure 4 , 5 As shown, the second dielectric layer 14 is formed on the first dielectric layer 12, the fine lines 13, and the first heat dissipation connection section 412 of the first heat dissipation line 41. The second dielectric layer 14 covers the fine lines 13 and the first heat dissipation connection section 412 of the first heat dissipation line 41 to complete the second layer manufacturing of the fine line build-up structure 10 and the manufacturing of the fine line build-up structure 10. The fine line build-up structure 10 is supported by the carrier board 80, so that the surface of the fine line build-up structure 10 is flat.

[0093] In this embodiment, the line width of the fine circuit 13 of the fine circuit build-up structure 10 mentioned above is less than or equal to 10 micrometers (μm).

[0094] In one example, the first heat dissipation circuit 41 of the heat dissipation structure 40 is made of copper. The connection pad 11 and the fine circuit 13 of the fine circuit build-up structure 10 are made of copper. The first blind holes 121 are drilled by laser drilling. When drilling the first blind holes 121, the heat dissipation portion 411 of the first heat dissipation circuit 41 and the connection pads 11 can be used as a blocking structure to avoid drilling too deep to ensure improved reliability. The blind holes mentioned in the following text are all drilled by laser drilling, and for the sake of brevity, they will not be described in detail.

[0095] In one example, the first dielectric layer 12 and the second dielectric layer 14 may be made of polyimide (PI) or ABF (Ajinomoto Build-up Film, ABF), but are not limited thereto. The first dielectric layer 12 and the second dielectric layer 14 may be made by coating, plating or lamination. In addition to providing support, the first dielectric layer 12 and the second dielectric layer 14 may also provide insulation. This avoids short circuits caused by interconnection between lines stacked up and down, thereby improving reliability.

[0096] After the fine line build-up structure 10 is completed, please refer to Figure 2 , 6 As shown in step S72, the coarse circuit build-up structure 20 is formed on the fine circuit build-up structure 10. The coarse circuit build-up structure 20 is electrically connected to the fine circuit build-up structure 10. The coarse circuit build-up structure 20 includes a second heat dissipation circuit 42 of the heat dissipation structure 40, and is connected to the first heat dissipation circuit 41. The coarse circuit build-up structure 20 includes a plurality of coarse circuits 21 and a coarse circuit dielectric layer 22. The second heat dissipation circuit 42 includes a plurality of second heat dissipation connection sections 421. Among them, the number of layers of the coarse circuit build-up structure 20 may include one or more layers, and the specific number of layers is designed according to actual needs. In an example as shown in the figure, one layer is used for explanation, but it is not limited to what is shown in the figure.

[0097] A plurality of second blind holes 141 are formed on the second dielectric layer 14. The second blind holes 141 are respectively formed on the corresponding fine circuits 13 in the fine circuit build-up structure 10 and on the first heat dissipation connection segment 412 of the first heat dissipation circuit 41. Partial surfaces of the corresponding fine circuits 13 and the corresponding first heat dissipation connection segment 412 are respectively exposed to the second dielectric layer 14 through the corresponding second blind holes 141.

[0098] The thick circuits 21 are formed on the second dielectric layer 14 of the thin circuit build-up structure 10. The thick circuits 21 are electrically connected to the corresponding thin circuits 13 in the thin circuit build-up structure 10 via the corresponding second blind holes 141. Similarly, the second heat dissipation connection segments 421 of the second heat dissipation circuit 42 are formed on the second dielectric layer 14. The second heat dissipation connection segments 421 are connected to the corresponding first heat dissipation connection segments 412 in the first heat dissipation circuit 41 via the corresponding second blind holes 141. The thick circuits 21 and the second heat dissipation connection segments 421 are not connected to each other.

[0099] After the thick circuits 21 and the second heat dissipation connection segments 421 are formed, the thick circuit dielectric layer 22 is formed on the fine circuit build-up structure 10, the thick circuits 21, and the second heat dissipation connection segments 421. The thick circuit dielectric layer 22 covers the thick circuits 21 and the second heat dissipation connection segments 421 of the second heat dissipation circuits 42 to complete the manufacturing of the thick circuit build-up structure 20.

[0100] In one example, the line width of the rough circuit 21 of the aforementioned rough circuit build-up layer structure 20 is greater than 10 microns.

[0101] In one example, the thickness of the coarse line dielectric layer 22 of the coarse line build-up structure 20 is greater than the thickness of the first dielectric layer 12 and the thickness of the second dielectric layer 14 in the fine line build-up structure 10. In other words, the thickness of the dielectric layer in the coarse line build-up structure 20 is greater than the thickness of one or more dielectric layers in the fine line build-up structure 10.

[0102] In one example, the second heat dissipation circuit 42 is made of copper. The thick circuit 21 of the thick circuit build-up structure 20 is made of copper. When forming the second blind holes 141, the second heat dissipation circuit 42 and the thick circuit 21 can be used as a blocking structure to avoid drilling too deep, thereby ensuring improved reliability.

[0103] In one example, the thick line dielectric layer 22 can be a film (Prepreg) composed of epoxy resin (Epoxy) or BT (Bismaleimide Triazine) resin and glass fiber, or polyimide (PI), or ABF (Ajinomoto Build-up Film, ABF) material, but it is not limited to this example. In one example, the thick line dielectric layer 22 can be made by coating, plating or lamination. In one example, in addition to providing support, the thick line dielectric layer 22 can also provide insulation. Avoid the problem of short circuit caused by the interconnection between the lines stacked up and down, so as to improve reliability.

[0104] After the coarse circuit build-up layer structure 20 is completed, please refer to Figure 2 , 7 As shown in step S73, the strengthening structure layer 30 is formed on the coarse circuit build-up layer structure 20. The third heat dissipation circuit 43 of the heat dissipation structure 40 and the external circuit layer 51 are formed on the strengthening structure layer 30. The third heat dissipation circuit 43 is connected to the second heat dissipation circuit 42. The plurality of heat dissipation portions 431 of the third heat dissipation circuit 43 are exposed outside the strengthening structure layer 30. The external circuit layer 51 is electrically connected to the coarse circuit build-up layer structure 20.

[0105] In one example, a plurality of third blind holes 221 are formed on the coarse line dielectric layer 22 of the coarse line build-up layer structure 20. The third blind holes 221 are respectively formed on the corresponding coarse lines 21 in the coarse line build-up layer structure 20 and on the corresponding second heat dissipation connection segments 421 in the second heat dissipation lines 42. Partial surfaces of the corresponding coarse lines 21 and the corresponding second heat dissipation connection segments 421 are respectively exposed to the coarse line dielectric layer 22 through the corresponding third blind holes 221.

[0106] A plurality of connection line segments 33 are formed on the coarse line dielectric layer 22 of the coarse line build-up structure 20. The connection line segments 33 are electrically connected to the corresponding coarse lines 21 in the coarse line build-up structure 20 via corresponding third blind holes 221. Similarly, a plurality of third heat dissipation connection segments 432 of the third heat dissipation line 43 are formed on the coarse line dielectric layer 22. The third heat dissipation connection segments 432 are connected to the corresponding second heat dissipation connection segments 421 in the second heat dissipation line 42 via corresponding third blind holes 221. The connection line segments 33 and the third heat dissipation connection segments 432 are not connected to each other.

[0107] After the connection line segments 33 and the third heat dissipation connection segments 432 are completed, the strengthening structure layer 30 is formed on the coarse circuit build-up layer structure 20, the connection line segments 33 and the third heat dissipation connection segments 432. The strengthening structure layer 30 covers the connection line segments 33 and the third heat dissipation connection segments 432. The top 31 of the strengthening structure layer 30 is connected to the coarse circuit build-up layer structure 20.

[0108] Next, a plurality of fourth blind holes 34 are formed on the strengthening structure layer 30. The fourth blind holes 34 are respectively formed on the corresponding connection line segments 33 and the corresponding third heat dissipation connection segments 432 in the strengthening structure layer 30. Partial surfaces of the corresponding connection line segments 33 and the corresponding third heat dissipation connection segments 432 are respectively exposed to the strengthening structure layer 30 through the corresponding fourth blind holes 34.

[0109] Then, a plurality of heat dissipation parts 431 of the third heat dissipation circuit 43 and the external circuit layer 51 are respectively formed on the bottom 32 of the reinforcement structure layer 30. The heat dissipation parts 431 are respectively connected to the corresponding third heat dissipation connection sections 432 via the corresponding fourth blind holes 34. The heat dissipation parts 431 of the third heat dissipation circuit 43 are exposed at the bottom 32 of the reinforcement structure layer 30. The external circuit layer 51 is electrically connected to the corresponding connection circuit section 33 via the corresponding fourth blind holes 34. The external circuit layer 51 is electrically connected to the coarse circuit 21 of the coarse circuit build-up layer structure 20 via the corresponding connection circuit section 33. The external circuit layer 51 is electrically connected to the fine circuit build-up layer structure 10 via the coarse circuit build-up layer structure 20. The external circuit layer 51 is not connected to the heat dissipation parts 431 of the third heat dissipation circuit 43. Therefore, the fine circuit 13 in the fine circuit build-up layer structure 10 and the coarse circuit 21 in the coarse circuit build-up layer structure 20 are not connected to the heat dissipation structure.

[0110] In one example, the material of the reinforcing structure layer 30 can be imitation pearl layer, or a film (Prepreg) composed of epoxy resin (Epoxy) or BT (Bismaleimide Triazine) resin and glass fiber, but it is not limited to this example. In one example, the reinforcing structure layer 30 can be made by coating, plating or lamination.

[0111] In one example, after the external circuit layer 51 is completed. To protect the external circuit layer 51, please refer to Figure 7 , 8 As shown. A protective layer 52 is formed on the reinforcing structure layer 30 and the external circuit layer 51. The plurality of openings 521 are formed on the protective layer 52. Part of the connection surface 511 of the external circuit layer 51 is exposed on the protective layer 52. In one example, the protective layer 52 can be made by coating or lamination. The protective layer 52 is formed to protect the external circuit layer 51 in subsequent applications (for example, when soldered on another circuit board), and can be used as a solder mask to improve manufacturing reliability.

[0112] Please refer to Figure 2 , 9 As shown in step S74, the carrier board 80 is removed, so that the heat dissipation portion 411 of the first heat dissipation circuit 41 of the heat dissipation structure 40 is exposed to the fine circuit build-up structure 10, and the plurality of connection pads 11 of the fine circuit build-up structure 10 are exposed.

[0113] In one example, the bonding layer 81 may be removed or the bonding layer 81 may lose its adhesiveness by a lift-off process such as laser, etching, heating, UV or developing, so as to remove the carrier 80. After the carrier 80 is removed, the heat dissipation portion 411 of the first heat dissipation circuit 41 of the heat dissipation structure 40 is exposed to the first dielectric layer 12 of the fine circuit build-up structure 10, and the connection pad 11 of the fine circuit build-up structure 10 is exposed to the first dielectric layer 12 of the fine circuit build-up structure 10.

[0114] In addition, in order to enhance the protection effect and the electrical connection effect, surface treatment is further performed. The surface treatment is to form a surface treatment layer 53 on the exposed connection pad 11 in the fine circuit build-up structure 10, on the heat dissipation portion 411 of the fine circuit build-up structure 10 exposed in the first heat dissipation circuit 41 of the heat dissipation structure 40, on the heat dissipation portion 431 of the bottom 32 of the reinforcement structure layer 30 exposed in the third heat dissipation circuit 43 of the heat dissipation structure 40, and on the connection surface 511 of the external circuit layer 51 exposed to the protective layer 52. The surface treatment layer 53 covers the surface of the exposed connection pad 11, the exposed heat dissipation portion 411, 431 and the exposed connection surface 511, thereby providing a protective effect. In one example, the surface treatment layer 53 is a metal material or an anti-oxidation organic film, specifically gold, silver, palladium, nickel, tin or an organic solderability preservative film OSP (Organic Solderability Preservative).

[0115] After completing the fabrication instructions for the substrate structure of the present invention, please refer to Figure 1 As shown. The substrate structure with a heat dissipation structure can be electrically connected to at least one chip 60. The chip 60 is arranged on the fine circuit build-up layer structure 10. The chip 60 includes a plurality of contacts 61 and is electrically connected to the corresponding connection pads 11 in the fine circuit build-up layer structure 10, respectively. In one example, before the chip 60 is bonded to the substrate structure, an electrical connection layer 62 can be formed on the fine circuit build-up layer structure 10. The electrical connection layer 62 is electrically connected to the exposed connection pads 11 in the fine circuit build-up layer structure 10. Thereby, the bonding and conductive effects are improved. In one example, the electrical connection layer 62 may include a solder ball or a solder layer, and the material may include tin, copper, silver, lead, etc.

[0116] After the chip 60 is combined with the substrate structure of the present invention. The heat energy generated when the chip 60 is conducting is conducted to the heat dissipation portion 431 of the third heat dissipation circuit 43 exposed at the bottom 32 of the reinforcement structure layer 30 through the heat dissipation portion 411 of the first heat dissipation circuit 41 exposed at the fine circuit build-up layer structure 10, the second heat dissipation circuit 42 of the heat dissipation structure 40, and the third heat dissipation circuit 43, so as to effectively dissipate the heat energy generated by the chip 60, thereby achieving the heat dissipation function. In addition, since the surface of the fine circuit build-up layer structure 10 is flat, it is beneficial for the exposed connection pad 11 to be directly electrically connected to the chip 60. Since no other flattening process is required, accurate connection can be effectively achieved. Thereby, the purpose of improving the heat dissipation effect and performance is achieved.

[0117] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention.

Claims

1. A substrate structure with a heat dissipation structure, characterized in that: The substrate structure with heat dissipation structure comprises: A strengthening structural layer having an opposing top and bottom; A coarse circuit build-up layer structure is formed on the top of the strengthening structure layer, wherein the line width of a plurality of coarse circuits in the coarse circuit build-up layer structure is greater than 10 microns; A fine circuit build-up structure is formed on the coarse circuit build-up structure and is electrically connected to the coarse circuit build-up structure, wherein the surface of the fine circuit build-up structure is flat and has a plurality of exposed connection pads, and the line width of the plurality of fine circuits in the fine circuit build-up structure is less than or equal to 10 microns; A heat dissipation structure is formed in the strengthening structure layer, the coarse circuit build-up layer structure and the fine circuit build-up layer structure, wherein a plurality of heat dissipation parts of the heat dissipation structure are respectively exposed at the bottom of the strengthening structure layer and the surface of the fine circuit build-up layer structure; An external circuit layer is formed at the bottom of the strengthening structure layer and is electrically connected to the coarse circuit build-up layer structure, and the external circuit layer has a connection surface; A protective layer is formed on the external circuit layer and the bottom of the reinforcing structure, and the protective layer has a plurality of openings so that a portion of the connection surface of the external circuit layer is exposed on the protective layer. The fine circuit build-up layer structure is further electrically connected to at least one chip, and a plurality of contacts of the chip are electrically connected to corresponding connection pads of a portion of the fine circuit build-up layer structure, and are electrically isolated from the heat dissipation structure.

2. The substrate structure with heat dissipation structure according to claim 1, characterized in that: It further includes a plurality of surface treatment layers, which are respectively formed on the exposed connection pads in the fine circuit build-up layer structure, on the exposed heat dissipation part in the heat dissipation structure, and on the exposed connection surface in the external circuit layer.

3. The substrate structure with heat dissipation structure according to claim 1, characterized in that: The fine circuit build-up structure includes one or more fine circuit layers.

4. The substrate structure with heat dissipation structure according to claim 1, characterized in that: The thickness of the dielectric layer of the coarse circuit build-up structure is greater than the thickness of the dielectric layer of the fine circuit build-up structure.

5. The substrate structure with heat dissipation structure according to claim 1, characterized in that: The plurality of fine circuits in the fine circuit build-up structure and the plurality of coarse circuits in the coarse circuit build-up structure are not connected to the heat dissipation structure.

6. A method for manufacturing a substrate structure with a heat dissipation structure, characterized in that: The method comprises the following steps: Forming a fine circuit build-up layer structure on the carrier board, wherein the fine circuit build-up layer structure includes a first heat dissipation circuit of the heat dissipation structure; A coarse circuit build-up structure is formed on the fine circuit build-up structure and is electrically connected to the fine circuit build-up structure, wherein the coarse circuit build-up structure comprises a second heat dissipation circuit of the heat dissipation structure and is connected to the first heat dissipation circuit, wherein the line width of a plurality of coarse circuits in the coarse circuit build-up structure is greater than 10 microns, and the line width of a plurality of fine circuits in the fine circuit build-up structure is less than or equal to 10 microns; A strengthening structure layer is formed on the coarse circuit build-up layer structure, and a third heat dissipation circuit and an external circuit layer of the heat dissipation structure are formed on the strengthening structure layer, wherein the third heat dissipation circuit is connected to the second heat dissipation circuit, and the third heat dissipation circuit has a plurality of heat dissipation parts and is exposed on the strengthening structure layer, and the external circuit layer is electrically connected to the coarse circuit build-up layer structure; The carrier plate is removed to expose the plurality of heat dissipation portions of the first heat dissipation circuit of the heat dissipation structure to the fine circuit build-up layer structure, and the plurality of connection pads of the fine circuit build-up layer structure to the outside. The fine circuit build-up layer structure is further electrically connected to at least one chip, and a plurality of contacts of the chip are electrically connected to corresponding connection pads of a portion of the fine circuit build-up layer structure, and are electrically isolated from the heat dissipation structure.

7. The method for manufacturing a substrate structure with a heat dissipation structure according to claim 6, characterized in that: Before removing the carrier board, a protective layer is disposed on the strengthening structure layer and the external circuit layer, and the protective layer has a plurality of openings so that a portion of the external circuit layer is exposed outside the protective layer.

8. The method for manufacturing a substrate structure with a heat dissipation structure according to claim 7, characterized in that: A surface treatment layer is provided on the exposed connection pad in the fine circuit build-up layer structure, on the exposed heat dissipation portion in the heat dissipation structure, and on the exposed portion in the external circuit layer.

9. The method for manufacturing a substrate structure with a heat dissipation structure according to claim 8, characterized in that: At least one chip is disposed on the fine circuit build-up layer structure. The chip has a plurality of contacts, and is respectively electrically connected to corresponding connection pads in some of the fine circuit build-up layer structures.

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