Ka-band GaN MMIC Power Amplifier Circuit and Amplifier

Abstract

The present invention provides a Ka-band GaN MMIC power amplifier circuit and an amplifier. The circuit includes: a plurality of cascaded amplification modules, the first amplification module includes a first amplification unit, and the other amplification modules include a matching network unit and an amplification unit; one end of a microstrip line ML1 in the matching network unit is connected to the output end of the previous-stage amplification unit, and the other end is respectively connected to one end of a microstrip line ML2 and one end of a capacitor C1. The other end of the microstrip line ML2 is connected to the input end of the current amplification unit, and the other end of the capacitor C1 is grounded. The power amplifier circuit adopts a simple and compact matching network unit and uses microstrip lines to replace inductors. There are no inductor components in the entire chip, avoiding the problem of large chip area with inductor components. While ensuring that other performance indicators are met, the chip area is greatly reduced, thereby improving the power density.

Description

Technical Field

[0001] The present invention belongs to the technical field of monolithic microwave integrated circuit (MMIC) amplifiers, and particularly relates to a Ka-band GaN MMIC power amplifier circuit and an amplifier. Background Art

[0002] Due to the continuous increase in the demand for satellite communication around the world, the frequency used for satellite communication has gradually expanded from the C band to the Ku band and then to the Ka band. This requires more transceiver communication links in the satellite communication system to cover different frequency bands. As an important part of the satellite communication system, high power density, large output power, wide operating bandwidth, low development cost, and miniaturization of communication equipment have become the research trends of power amplifiers. The MMIC power amplifier made of GaN material can achieve larger output power, wider operating bandwidth, higher operating efficiency, and stronger radiation resistance, so it has a very broad application prospect in the field of satellite communication.

[0003] As an inductance of a radio frequency device has a large volume, and in order to avoid signal crosstalk in the chip matching circuit, it is usually necessary to place the inductance at intervals from other circuits. This results in the disadvantage that the chip with inductance has a large size. Therefore, it has become a difficult problem to meet the requirements of dense miniaturization of Ka-band GaN MMIC power amplifiers. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a Ka-band GaN MMIC power amplifier circuit and an amplifier to solve the problem of meeting the requirements of dense miniaturization of Ka-band GaN MMIC power amplifiers.

[0005] The first aspect of the embodiments of the present invention provides a Ka-band GaN MMIC power amplifier circuit, including: a plurality of cascaded amplification modules, where the first amplification module includes a first amplification unit, and all amplification modules except the first amplification module include a matching network unit and an amplification unit;

[0006] The input end of the first amplification unit serves as the input end of the first amplification module for inputting a radio frequency signal; the input end of the current matching network unit is connected to the output end of the previous-stage amplification unit, the output end of the current matching network unit is connected to the input end of the current amplification unit, the output end of the current amplification unit is connected to the input end of the matching network unit of the subsequent-stage amplification module, and the output end of the last amplification unit in the last amplification module serves as the output end of the last amplification module for outputting a radio frequency signal;

[0007] The matching network unit includes: a microstrip line ML1, a microstrip line ML2, and a capacitor C1; one end of the microstrip line ML1 is connected to the output end of the pre-stage amplification unit, and the other end is respectively connected to one end of the microstrip line ML2 and one end of the capacitor C1. The other end of the microstrip line ML2 is connected to the input end of the current amplification unit, and the other end of the capacitor C1 is grounded.

[0008] In one embodiment, the last amplification module further includes a reactive matching unit;

[0009] The input end of the reactive matching unit is connected to the output end of the last amplification unit of the last amplification module, and the first output end of the reactive matching unit serves as the output end of the last amplification module.

[0010] In one embodiment, the first amplification module further includes an input network unit;

[0011] The first input end of the input network unit serves as the input end of the first amplification module, and the output end of the input network unit is connected to the input end of the first amplification unit.

[0012] In one embodiment, each amplification module further includes a gate bias unit and a drain bias unit;

[0013] The input end of the gate bias unit is used to connect to a first power supply; the output end of the gate bias unit is respectively connected to the input end of the current amplification unit and the output end of the current matching network unit / the input network unit;

[0014] The input end of the drain bias unit is used to connect to a second power supply, the output end of the drain bias unit is connected to the output end of the current amplification unit, or the output end of the drain bias unit is connected to the second output end of the reactive matching unit of the last amplification module;

[0015] The first power supply and the second power supply are different.

[0016] In one embodiment, the amplification unit of each amplification module includes: a transistor;

[0017] The gate of the transistor serves as the input end of the current amplification unit, the drain of the transistor serves as the output end of the current amplification unit, and the source of the transistor is grounded.

[0018] In one embodiment, the last amplification module includes at least four transistors, and the reactive matching unit includes: a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a microstrip line ML5, a microstrip line ML6, a microstrip line ML7, a microstrip line ML8, a microstrip line ML9, a microstrip line ML10, a microstrip line ML11, a microstrip line ML12, and a microstrip line ML13;

[0019] One end of the capacitor C3 is respectively connected to the drain of the first transistor in the last amplification module and one end of the microstrip line ML5, and the other end of the capacitor C3 is grounded;

[0020] One end of the capacitor C4 is respectively connected to the drain of the second transistor in the last amplification module and one end of the microstrip line ML6, and the other end of the capacitor C4 is grounded;

[0021] One end of the capacitor C5 is respectively connected to the drain of the third transistor in the last amplification module and one end of the microstrip line ML7, and the other end of the capacitor C5 is grounded;

[0022] One end of the capacitor C6 is respectively connected to the drain of the fourth transistor in the last amplification module and one end of the microstrip line ML8, and the other end of the capacitor C6 is grounded;

[0023] The other end of the microstrip line ML5 and the other end of the microstrip line ML6 are connected and then connected to one end of the microstrip line ML9. The other end of the microstrip line ML7 and the other end of the microstrip line ML8 are connected and then connected to one end of the microstrip line ML10. The other end of the microstrip line ML9 is connected to one end of the microstrip line ML11. The other end of the microstrip line ML11 is respectively connected to one end of the microstrip line ML12 and one end of the microstrip line ML13. The other end of the microstrip line ML12 is connected to the other end of the microstrip line ML10. The other end of the microstrip line ML13 serves as the output end of the reactive matching unit.

[0024] In one embodiment, when there are three cascaded amplification modules, the gate width ratio of the amplification unit in the second amplification module to the amplification unit in the third amplification module is 2.5.

[0025] The second aspect of the embodiments of the present invention provides a power amplifier, including the Ka-band GaN MMIC power amplifier circuit provided in any of the above embodiments.

[0026] The beneficial effects of the embodiments of the present invention compared with the prior art are as follows: In the embodiments of the present invention, the power amplifier circuit is composed of multiple cascaded amplification modules, adopts a simple and compact matching network unit, and uses microstrip lines to replace inductors. There are no inductor elements in the entire chip, avoiding the problem of large chip area with inductor components. While ensuring that other performance indicators are met, the chip area is greatly reduced, thereby improving the power density. Description of the Drawings

[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0028] Figure 1 It is a schematic structural diagram of a Ka-band GaN MMIC power amplifier circuit provided by an embodiment of the present invention;

[0029] Figure 2 It is a schematic structural diagram of a matching network unit provided by an embodiment of the present invention;

[0030] Figure 3 It is a schematic structural diagram of a Ka-band GaN MMIC power amplifier circuit provided by another embodiment of the present invention;

[0031] Figure 4 It is a schematic circuit diagram of a Ka-band GaN MMIC power amplifier circuit provided by an embodiment of the present invention;

[0032] Figure 5 It is a schematic structural diagram of a reactance-type matching unit provided by an embodiment of the present invention. Specific Embodiments

[0033] In the following description, specific details such as specific system structures and technologies are presented for the purpose of illustration rather than limitation, so as to thoroughly understand the embodiments of the present invention. However, those skilled in the art should clearly understand that the present invention can also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to avoid unnecessary details from interfering with the description of the present invention.

[0034] To illustrate the technical solutions described in the present invention, the following will be described through specific embodiments.

[0035] Embodiment 1

[0036] As Figure 1 shown, this embodiment provides a Ka-band GaN MMIC power amplifier circuit, which may include: a plurality of cascaded amplification modules. The first amplification module 10 includes a first amplification unit 101, and all amplification modules except the first amplification module 10 include a matching network unit and an amplification unit; As Figure 1It may further include a second amplification module 20, a current amplification module M... and a last amplification module N, where N is greater than or equal to 3 and M is less than N. The second amplification module 20 includes a second matching network unit 202 and a second amplification unit 201. The current amplification module M includes a current matching network unit M2 and a current amplification unit M1.

[0037] The input end of the first amplification unit 101 serves as the input end of the first amplification module 10 for inputting a radio frequency signal; the input end of the current matching network unit M2 is connected to the output end of the pre-stage amplification unit. For example, Figure 1 when the pre-stage amplification unit is the second amplification unit, the input end of the current matching network unit M2 is connected to the output end of the second amplification unit 201. The output end of the current matching network unit M2 is connected to the input end of the current amplification unit M1, and the output end of the current amplification unit M1 is connected to the input end of the matching network unit of the post-stage amplification module. The output end of the amplification unit N1 in the last amplification module N serves as the output end of the last amplification module N for outputting a radio frequency signal;

[0038] For example, Figure 2 As shown, the matching network unit includes: a microstrip line ML1, a microstrip line ML2, and a capacitor C1; one end of the microstrip line ML1 is connected to the output end of the pre-stage amplification unit, and the other end is respectively connected to one end of the microstrip line ML2 and one end of the capacitor C1. The other end of the microstrip line ML2 is connected to the input end of the current amplification unit M, and the other end of the capacitor C1 is grounded.

[0039] The matching network unit is set in a simple and compact T-shaped structure, and microstrip lines are used to replace inductors. Since high-impedance microstrip lines exhibit inductive characteristics, microstrip lines can be used to replace inductors in the matching network, so that the entire matching network unit does not contain inductor components, avoiding the defect of large chip area of inductive devices. While ensuring that other performance indicators are met, the chip area is greatly reduced, thereby improving the power density. In addition, the capacitor C1 can be a MIM capacitor, and a metal-insulator-metal (MIM) capacitor is used to replace the ideal capacitor.

[0040] Optionally, as Figure 3 shown, the last amplification module N further includes a reactive matching unit N3;

[0041] The input end of the reactive matching unit N3 is connected to the output end of the amplification unit (i.e., the last amplification unit N1) of the last amplification module N, and the first output end of the reactive matching unit N3 serves as the output end of the last amplification module N. The reactive matching unit N3 is used to achieve power synthesis of the last amplification unit N1, so that a final output of one path of power is output through the radio frequency output end.

[0042] Optionally, asFigure 3 As shown, the first amplification module 10 further includes an input network unit 102;

[0043] The first input end of the input network unit 102 serves as the input end of the first amplification module 10 for inputting a radio frequency signal, and the output end of the input network unit 102 is connected to the input end of the first amplification unit 101. The input network unit 102 can play a role in network matching. When there are two amplification units 101 in the first amplification module 10, that is, two transistors, power coordination is performed between the two input network units 102, thereby playing a role in power distribution and matching.

[0044] Optionally, each amplification module may further include a gate bias unit and a drain bias unit; as Figure 3 shown, the first amplification module 10 includes a first gate bias unit 103 and a first drain bias unit 104, the second amplification module 20 includes a second gate bias unit 203 and a second drain bias unit 204, the current amplification module M includes a current gate bias unit M3 and a current drain bias unit M4, and the last amplification module N includes a last gate bias unit N4 and a last drain bias unit N5.

[0045] As Figure 3 shown, the input ends of the respective gate bias units are used to connect to a first power supply; the output ends of the gate bias units are respectively connected to the input end of the current amplification unit and the output end of the current matching network unit / the input network unit. Since the first amplification module 10 includes the input network unit 102, the output end of the first gate bias unit 103 included in the first amplification module 10 is respectively connected to the output end of the input network unit 102 and the input end of the first amplification unit 101. Other amplification modules except the first amplification module 10 do not include the input network unit but include the matching network unit. Therefore, the output ends of the gate bias units in other amplification modules are respectively connected to the output end of the matching network unit and the input end of the current amplification unit.

[0046] The input end of the drain bias unit is used to connect to a second power supply, and the output end of the drain bias unit is connected to the output end of the current amplification unit, or the output end of the drain bias unit is connected to the second output end of the reactive matching unit of the last amplification module.

[0047] It should be noted that the first power supply and the second power supply are different. The first power supply is a power supply that provides a negative voltage, which can be represented by Vg, and the second power supply is a power supply that provides a positive voltage, which can be represented by Vd. For example, the first power supply can be a -20V power supply, and the second power supply can be a 20V power supply.

[0048] As Figure 3As shown, the output terminal of the first drain bias unit 104 of the first amplification module 10 is connected to the output terminal of the first amplification unit 101 to supply power to the drain of the active device in the first amplification unit 101 through the first drain bias unit 104. Similarly, the output terminal of the second drain bias unit 204 of the second amplification module 20 is connected to the output terminal of the second amplification unit 201 to supply power to the drain of the active device in the second amplification unit 201 through the second drain bias unit 204. Since the last amplification module N includes a reactive matching unit N3, the output terminal of the last drain bias unit N5 in the last amplification module N is connected to the second output terminal of the reactive matching unit N3.

[0049] Next, we will describe the circuit connections corresponding to each module in detail.

[0050] As Figure 4 shown, we will take a three-stage cascaded amplification module as an example for description, that is, the first amplification module 10, the second amplification module 20, and the third amplification module 30 are cascaded, where the amplification units in each stage of the amplification module are 2:4:8, that is, the first amplification module 10 includes two first amplification units 101, the second amplification module 20 includes four second amplification units 201, and the third amplification module 30 includes eight third amplification units 301. The input terminal of each amplification unit is correspondingly connected to a matching network unit, and a reactive matching unit 303 is connected after the third amplification unit 301 of the third amplification module 30.

[0051] Each amplification unit in each amplification module includes: a transistor; the transistor can be a High Electron Mobility Transistor (HEMT).

[0052] The gate of the transistor serves as the input terminal of the current amplification unit, the drain of the transistor serves as the output terminal of the current amplification unit, and the source of the transistor is grounded.

[0053] As Figure 4 shown, the specific circuit structure of the input network unit 102 can be two microstrip lines connected in series, with one end serving as the input terminal of the input network unit 102 and the other end serving as the output terminal of the input network unit 102. A grounding capacitor can also be connected to the output terminal, or it can be other circuit structures, which are not limited in this embodiment.

[0054] Optionally, the structures of each gate bias unit are the same, and the structures of each drain bias unit are also the same. The circuit structures of the gate bias unit and the drain bias unit can also be the same. As Figure 3 shown, the circuit structures of the gate bias unit and the drain bias unit can also be other circuit structures, which are not limited in this embodiment.

[0055] Optionally, as Figure 4 shown, between the pre-stage amplification module and the current amplification module, there may further include: an inter-stage network unit, configured to enable an amplification unit in the pre-stage amplification module to correspondingly connect two current amplification units through the matching network unit in the current amplification module, so as to amplify the input radio frequency signal. In this embodiment, the specific circuit structure of the inter-stage network unit is not limited, and it may be composed of a capacitor C2, a microstrip line ML3, and a microstrip line ML4 as Figure 4 shown, or other circuit structures may also be adopted.

[0056] Refer to Figure 4 . In , the radio frequency input terminal is respectively connected to two input network units, and a filtering capacitor C11 is connected between the radio frequency input terminal and the input network unit. The structures of the two input network units are exactly the same, and we only describe one of the input network units. One end of the filtering capacitor C11 is connected to the radio frequency input terminal, and the other end is connected to the input terminal of the input network unit. The output terminal of the input network unit is respectively connected to the gate of the transistor HEMT1 and the output terminal of the first gate bias unit 103.

[0057] The source of the transistor HEMT1 is grounded, and the drain is respectively connected to the input terminal of the inter-stage network unit and the first drain bias unit, and is connected to the second power supply through the first drain bias unit. The second power supply may be a DC power supply.

[0058] The output terminal of the inter-stage network unit has two, which are respectively connected to the corresponding second matching network units, and these two second matching network units are arranged in the second amplification module 20. As Figure 4 shown, the other end of the microstrip line ML3 is connected to one end of the microstrip line ML1. The other end of the microstrip line ML1 is respectively connected to one end of the microstrip line ML2, one end of the capacitor C1, and the second gate bias unit. The other end of the microstrip line ML2 is respectively connected to the gate of the transistor HEMT2 and the second gate bias unit 203, and the other end of the capacitor C1 is grounded.

[0059] The other end of the microstrip line ML4 is connected to another transistor HEMT2 through another second matching network unit, which will not be described in detail. For specific reference, see Figure 4 .

[0060] The source of the transistor HEMT2 is grounded, and the drain is connected to the output terminal of the second drain bias unit 204 and the inter-stage network unit of the third amplification module. Refer to Figure 4 . There are a total of 4 second amplification units, each of which is connected to 2 third amplification units through an inter-stage network unit and a third matching network unit. Then, there are a total of 8 third amplification units. For the specific connection relationship of the 8 transistors HEMT3, refer to Figure 4 .

[0061] The final amplification module includes at least 4 transistors. Figure 4 and Figure 5 includes 8 transistors. An impedance matching unit is connected after the 8 transistors. Due to the drawback in the prior art that the parallel inductance in the chip matching circuit causes part of the signal to ground, resulting in high loss. Therefore, in this embodiment, the impedance matching unit is adopted to solve the problem of high loss.

[0062] As Figure 4 and Figure 5 shown, the impedance matching unit 303 includes: capacitor C3, capacitor C4, capacitor C5, capacitor C6, microstrip line ML5, microstrip line ML6, microstrip line ML7, microstrip line ML8, microstrip line ML9, microstrip line ML10, microstrip line ML11, microstrip line ML12, and microstrip line ML13;

[0063] One end of the capacitor C3 is respectively connected to the drain of the first transistor in the final amplification module and one end of the microstrip line ML5, and the other end of the capacitor C3 is grounded;

[0064] One end of the capacitor C4 is respectively connected to the drain of the second transistor in the final amplification module and one end of the microstrip line ML6, and the other end of the capacitor C4 is grounded;

[0065] One end of the capacitor C5 is respectively connected to the drain of the third transistor in the final amplification module and one end of the microstrip line ML7, and the other end of the capacitor C5 is grounded;

[0066] One end of the capacitor C6 is respectively connected to the drain of the fourth transistor in the final amplification module and one end of the microstrip line ML8, and the other end of the capacitor C6 is grounded;

[0067] The other end of the microstrip line ML5 and the other end of the microstrip line ML6 are connected and then connected to one end of the microstrip line ML9. The other end of the microstrip line ML7 and the other end of the microstrip line ML8 are connected and then connected to one end of the microstrip line ML10. The other end of the microstrip line ML9 is connected to one end of the microstrip line ML11. The other end of the microstrip line ML11 is respectively connected to one end of the microstrip line ML12 and one end of the microstrip line ML13. The other end of the microstrip line ML12 is connected to the other end of the microstrip line ML10. The other end of the microstrip line ML13 serves as the output end of the impedance matching unit.

[0068] Figure 4 and Figure 5 in, 8 transistors HEMT3 are connected to two impedance matching units 303. Figure 4 and Figure 5In it, the microstrip line ML13 and the microstrip line ML14 are combined together again, that is, the other end of the microstrip line ML13 is connected to the other end of the microstrip line ML14 after being connected in series with the microstrip line ML15 and the microstrip line ML16. The radio frequency output terminal is located between the microstrip line ML15 and the microstrip line ML16. A filtering capacitor is also connected between the radio frequency output terminal and the microstrip line ML15 and the microstrip line ML16.

[0069] Figure 5 In it, the reactive matching unit 303 is divided into three levels. The first level 51 leads out from the drains of 8 HEMT3s in the third amplifier unit 30 through microstrip lines. Each microstrip line branch is grounded through a capacitor, and then 4 output terminals are led out after being synthesized in pairs. The second level 52 combines the 4 output terminals of the first level 51 in pairs through microstrip lines again to lead out 2 output terminals. The third level 53 completes the final synthesis and is connected to the radio frequency output terminal, and a third drain bias circuit 305 is connected perpendicular to the radio frequency transmission direction. The reactive matching unit 303 does not contain a parallel inductor, avoiding the ground loss caused by the parallel inductor, and thus improving the efficiency. In addition, the reactive matching unit is in a cluster type, matching the impedance to the intermediate impedance first and then finally to the system impedance, having the functions of power synthesis and impedance matching, and connecting the third drain bias unit 305 to the synthesis network, making the structure flexible and compact.

[0070] Optionally, when there are three cascaded amplification modules, the gate width ratio of the amplification unit in the second amplification module to the amplification unit in the third amplification module is 2.5, which promotes the best performance of the efficiency characteristics of the power amplifier circuit. It should be noted that the gate width ratio of the amplification unit in the second amplification module to the amplification unit in the third amplification module can also be other values.

[0071] It should be noted that the matching network unit and the reactive matching unit in this embodiment can be used for MMICs of various materials, such as GaN, GaAs, etc.

[0072] The above Ka-band GaN MMIC power amplifier circuit is composed of multiple cascaded amplification modules. The power amplifier circuit adopts a simple and compact matching network unit, and uses microstrip lines to replace inductors. There are no inductor components in the entire chip, avoiding the problem of large chip area with inductive devices. While ensuring that other performance indicators are met, the chip area is greatly reduced, thereby improving the power density. An efficient reactance-type matching unit is used in the last amplification module. There is no shunt inductor in this matching topology, avoiding the ground loss caused by the shunt inductor, and thus improving the efficiency. In addition, the reactance-type matching unit is in a cluster type, integrating power combining and impedance matching, and connecting the third drain bias unit to the matching network, having the advantages of flexibility and compactness. The drive ratio of the Ka-band GaN MMIC power amplifier is 2.5. At this drive ratio, the output power of the second amplification module drives the transistor HEMT3 in the third amplification unit to reach the saturation state without over-saturation, promoting the best performance of the efficiency characteristics of the power amplifier circuit.

[0073] This embodiment also provides a power amplifier, including the Ka-band GaN MMIC power amplifier circuit provided in any of the above embodiments, and having the beneficial effects brought by the Ka-band GaN MMIC power amplifier circuit provided in any of the above embodiments.

[0074] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A Ka-band GaN MMIC power amplifier circuit, characterized in that, Including: A plurality of cascaded amplification modules, the first amplification module includes a first amplification unit, and all amplification modules except the first amplification module include a matching network unit and an amplification unit; The input end of the first amplification unit serves as the input end of the first amplification module for inputting a radio frequency signal; the input end of the current matching network unit is connected to the output end of the previous-stage amplification unit, the output end of the current matching network unit is connected to the input end of the current amplification unit, the output end of the current amplification unit is connected to the input end of the matching network unit of the subsequent-stage amplification module, and the output end of the last amplification unit in the last amplification module serves as the output end of the last amplification module for outputting a radio frequency signal; The matching network unit includes: a microstrip line ML1, a microstrip line ML2, and a capacitor C1; one end of the microstrip line ML1 is connected to the output end of the previous-stage amplification unit, and the other end is respectively connected to one end of the microstrip line ML2 and one end of the capacitor C1. The other end of the microstrip line ML2 is connected to the input end of the current amplification unit, and the other end of the capacitor C1 is grounded; Wherein, the last amplification module further includes a reactive matching unit; The input end of the reactive matching unit is connected to the output end of the last amplification unit of the last amplification module, and the first output end of the reactive matching unit serves as the output end of the last amplification module; The last amplification module includes at least four transistors, and the reactive matching unit includes: a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a microstrip line ML5, a microstrip line ML6, a microstrip line ML7, a microstrip line ML8, a microstrip line ML9, a microstrip line ML10, a microstrip line ML11, a microstrip line ML12, and a microstrip line ML13; One end of the capacitor C3 is respectively connected to the drain of the first transistor in the last amplification module and one end of the microstrip line ML5, and the other end of the capacitor C3 is grounded; One end of the capacitor C4 is respectively connected to the drain of the second transistor in the last amplification module and one end of the microstrip line ML6, and the other end of the capacitor C4 is grounded; One end of the capacitor C5 is respectively connected to the drain of the third transistor in the last amplification module and one end of the microstrip line ML7, and the other end of the capacitor C5 is grounded; One end of the capacitor C6 is respectively connected to the drain of the fourth transistor in the last amplification module and one end of the microstrip line ML8, and the other end of the capacitor C6 is grounded; The other ends of the microstrip line ML5 and the microstrip line ML6 are connected and then connected to one end of the microstrip line ML9. The other ends of the microstrip line ML7 and the microstrip line ML8 are connected and then connected to one end of the microstrip line ML10. The other end of the microstrip line ML9 is connected to one end of the microstrip line ML11. The other end of the microstrip line ML11 is respectively connected to one end of the microstrip line ML12 and one end of the microstrip line ML13. The other end of the microstrip line ML12 is connected to the other end of the microstrip line ML10, and the other end of the microstrip line ML13 serves as the output end of the reactive matching unit; The first amplification module further includes an input network unit; the first input end of the input network unit serves as the input end of the first amplification module, and the output end of the input network unit is connected to the input end of the first amplification unit; The input network unit includes two series-connected microstrip lines. One end of the two series-connected microstrip lines serves as the input end of the input network unit, and the other end of the two series-connected microstrip lines serves as the output end of the input network unit. The other end of the two series-connected microstrip lines is also connected to a grounding capacitor; When there are three cascaded amplification modules, the gate width ratio of the amplification unit in the second amplification module to the amplification unit in the third amplification module is 2.

5.

2. The Ka-band GaN MMIC power amplifier circuit according to claim 1, wherein Each amplification module further includes a gate bias unit and a drain bias unit; The input end of the gate bias unit is used to connect to a first power supply; the output end of the gate bias unit is respectively connected to the input end of the current amplification unit and the output end of the current matching network unit / the input network unit; The input end of the drain bias unit is used to connect to a second power supply, the output end of the drain bias unit is connected to the output end of the current amplification unit, or the output end of the drain bias unit is connected to the second output end of the reactance matching unit of the last amplification module; The first power supply and the second power supply are different.

3. The Ka-band GaN MMIC power amplifier circuit according to claim 1, characterized in that, The amplification unit of each amplification module includes: a transistor; The gate of the transistor serves as the input end of the current amplification unit, the drain of the transistor serves as the output end of the current amplification unit, and the source of the transistor is grounded.

4. A power amplifier, characterized in that, It includes the Ka-band GaN MMIC power amplifier circuit according to any one of the above claims 1-3.

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