Display device and tiled display

Abstract

The present disclosure relates to a display device and a tiled display. The display device includes a substrate including a display portion, a pad portion, and a bending portion between the display portion and the pad portion; a display layer disposed on a first surface of the display portion and including pixels; a pad electrode disposed on a first surface of the pad portion; and a metal layer disposed on a second surface of the display portion and on a second surface of the pad portion. The second surface of the display portion is opposite to the first surface of the display portion, and the second surface of the pad portion is opposite to the first surface of the pad portion. A thickness of the bending portion is less than at least one of a thickness of the display portion and a thickness of the pad portion. A planar shape of the bending portion is determined by the metal layer.

Description

TECHNICAL FIELD

[0001] The disclosure relates to a display apparatus and a tiled display having the same. BACKGROUND

[0002] As the information-oriented society develops, various demands for display apparatuses are increasing. For example, display apparatuses are employed by various electronic devices such as smart phones, digital cameras, laptop computers, navigation apparatuses, and smart TVs. The display apparatuses can be flat panel display apparatuses such as liquid crystal display apparatuses, field emission display apparatuses, or organic light emitting display apparatuses. Among such flat panel display apparatuses, light emitting display apparatuses include light emitting elements that can emit light by themselves so that each pixel of a display panel can emit light by itself. Accordingly, the light emitting display apparatuses can display images without a backlight unit that supplies light to the display panel.

[0003] For a display apparatus having a large screen, a large number of pixels can be provided and thus a defect rate of light emitting elements can increase while productivity or reliability can decrease. To overcome such problems, a tiled display can provide a large screen by connecting a plurality of display apparatuses having a relatively small size. Such a tiled display can include a boundary between the plurality of display apparatuses, which can be referred to as a seam. The seam can be a non-display area or a bezel area between the plurality of display apparatuses adjacent to each other. In a case where a single image can be displayed full screen (e.g., a large screen tiled display), such a boundary or seam between the respective display apparatuses can be visible, thereby hindering a viewer from being immersed in the image.

[0004] It should be appreciated that the background section is intended to provide a context for the technology. However, the background section can also include ideas, concepts or recognitions not yet known to the skilled artisan that are part of the disclosure disclosed herein. SUMMARY

[0005] An aspect of the disclosure can provide a tiled display that eliminates visible seams between a plurality of display apparatuses by preventing recognition of a boundary or non-display area between the display apparatuses so that a viewer can be immersed in a displayed image.

[0006] It should be noted that aspects of the disclosure are not limited to those described above. Other aspects of the disclosure will be apparent to those of ordinary skill in the art from the description of the application below.

[0007] According to embodiments of the disclosure, a display device can include a substrate including a display portion, a pad portion, and a bending portion between the display portion and the pad portion; a display layer disposed on a first surface of the display portion, the display layer including a pixel; a pad electrode disposed on a first surface of the pad portion; and a metal layer disposed on a second surface of the display portion and a second surface of the pad portion. The second surface of the display portion can be opposite to the first surface of the display portion, and the second surface of the pad portion can be opposite to the first surface of the pad portion. A thickness of the bending portion can be less than at least one of a thickness of the display portion and a thickness of the pad portion, and a planar shape of the bending portion can be determined by the metal layer.

[0008] The metal layer can include a metal oxide that can resist dry etching. An etching rate of the metal layer can be lower than an etching rate of the substrate.

[0009] A thermal conductivity of the metal layer can be higher than a thermal conductivity of the substrate.

[0010] The pad portion can overlap the display portion in a thickness direction in a case where the bending portion is bent.

[0011] The display device can further include a protection film covering the metal layer disposed on the second surface of the display portion and the metal layer disposed on the second surface of the pad portion.

[0012] A portion of the protection film covering the metal layer disposed on the second surface of the display portion and another portion of the protection film covering the metal layer disposed on the second surface of the pad portion can face each other in a case where the bending portion is bent.

[0013] The display device can further include a flexible film electrically connected to the pad electrode, and a source driver disposed on the flexible film. The flexible film and the source driver can overlap the display portion in a thickness direction in a case where the bending portion is bent.

[0014] The display layer can include a thin film transistor layer disposed on the display portion and including at least one thin film transistor, a light emitting element layer disposed on the thin film transistor layer and including a light emitting element electrically connected to the at least one thin film transistor, a wavelength conversion layer disposed on the light emitting element layer and including a wavelength conversion portion overlapping the light emitting element, and a color filter layer disposed on the wavelength conversion layer and including a color filter overlapping the wavelength conversion portion.

[0015] According to embodiments of the disclosure, a tiled display can include display devices each including a substrate including a display portion, a pad portion, and a bending portion between the display portion and the pad portion, coupling members for coupling the display devices to each other, and a cover member for covering the display devices and the coupling members. Each of the display devices can include a display layer disposed on a first surface of the display portion, the display layer including pixels, a pad electrode disposed on a first surface of the pad portion, and a metal layer disposed on a second surface of the display portion and a second surface of the pad portion. The second surface of the display portion can be opposite to the first surface of the display portion, and the second surface of the pad portion can be opposite to the first surface of the pad portion. A thickness of the bending portion can be less than at least one of a thickness of the display portion and a thickness of the pad portion, and a planar shape of the bending portion can be determined by the metal layer.

[0016] The metal layer can include a metal oxide that can resist dry etching. An etching rate of the metal layer can be lower than an etching rate of the substrate.

[0017] A thermal conductivity of the metal layer can be higher than a thermal conductivity of the substrate.

[0018] The bending portion of each of the display devices can overlap the coupling members in a thickness direction.

[0019] The bending portion of each of the display devices can be disposed between the display portions of adjacent ones of the display devices.

[0020] Each of the display devices can further include a flexible film electrically connected to the pad electrode, and a source driver disposed on the flexible film. The flexible film and the source driver can overlap the display portion in a thickness direction.

[0021] The pad portion can overlap the display portion in a thickness direction.

[0022] Each of the display devices can further include a protection film covering the metal layer disposed on the second surface of the display portion and the metal layer disposed on the second surface of the pad portion.

[0023] A portion of the protection film covering the metal layer disposed on the second surface of the display portion and another portion of the protection film covering the metal layer disposed on the second surface of the pad portion can face each other.

[0024] The display layer can include a thin film transistor layer disposed on the display portion and including at least one thin film transistor, a light emitting element layer disposed on the thin film transistor layer and including a light emitting element electrically connected to the at least one thin film transistor, a wavelength conversion layer disposed on the light emitting element layer and including a wavelength conversion portion overlapping the light emitting element, and a color filter layer disposed on the wavelength conversion layer and including a color filter overlapping the wavelength conversion portion.

[0025] Each of the display apparatuses can further include an encapsulation layer covering an upper surface and side surfaces of the display layer. The coupling member can be disposed between the encapsulation layers of adjacent ones of the display apparatuses in the tiled display.

[0026] The covering member can cover the encapsulation layer of each of the display apparatuses.

[0027] According to embodiments of the present disclosure, each of the display apparatuses of the tiled display can include a curved portion having a thickness less than a thickness of the display portion or the pad portion, so that a bending stress at the curved portion can be reduced. Each of the display apparatuses can include the curved portion that can be recessed downward from the display portion or the pad portion, thereby reducing a distance between the display apparatuses. As a result, a non-display area or a boundary between the display apparatuses can be prevented from being perceived.

[0028] According to embodiments of the present disclosure, each of the display apparatuses of the tiled display can include a metal layer, and thus can form the curved portion without using a separate mask, so that a processing step and a process time can be reduced. Each of the display apparatuses can not include a separate heat dissipation layer, so that a thickness of the display apparatuses can be reduced and manufacturing costs can be saved. Since each of the display apparatuses can include the metal layer, a thickness of the display apparatuses can be reduced compared to the display apparatuses including the separate heat dissipation layer, thereby preventing layer separation in a case where the curved portion is bent.

[0029] It should be noted that the effects of the present disclosure are not limited to those described above and that other effects of the present disclosure will be apparent to those ordinarily skilled in the art from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0030] The above and other aspects and features of the present disclosure will become more apparent by describing in detail embodiments thereof with reference to the attached drawings, in which:

[0031] Figure 1 is a schematic plan view illustrating a tiled display according to an embodiment of the present disclosure;

[0032] Figure 2 is a schematic plan view illustrating a display apparatus according to an embodiment of the present disclosure;

[0033] Figure 3 is a sectional view taken alongFigure 2 is a schematic cross-sectional view taken along the line I-I' of

[0034] Figure 4 is a schematic plan view showing a pixel of a display device according to an embodiment of the present disclosure;

[0035] Figure 5 is a schematic cross-sectional view taken along the line II-II' of Figure 4

[0036] Figure 6 is a schematic view showing a light emitting diode according to an embodiment of the present disclosure;

[0037] Figure 7 is a schematic plan view showing a coupling structure of a tiled display according to an embodiment of the present disclosure;

[0038] Figure 8 is a schematic cross-sectional view taken along the line III-III' of Figure 7

[0039] Figure 9 is a schematic cross-sectional view showing a first processing step during a process of manufacturing a display device according to an embodiment of the present disclosure;

[0040] Figure 10 is a schematic cross-sectional view showing a second processing step during a process of manufacturing a display device according to an embodiment of the present disclosure;

[0041] Figure 11 is a schematic cross-sectional view showing a third processing step during a process of manufacturing a display device according to an embodiment of the present disclosure; and

[0042] Figure 12 is a schematic cross-sectional view showing a fourth processing step during a process of manufacturing a display device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0043] In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of various embodiments or implementations of the present invention. "Embodiment" and "implementation" as used herein are interchangeable terms and are used herein as non-limiting examples of apparatuses or methods employing one or more inventive concepts disclosed herein. It will be apparent, however, that individual embodiments can be practiced without some or all of these specific details. In other instances, well known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring the various embodiments. Further, various embodiments can be different but need not be mutually exclusive. For example, specific shapes, configurations, and features of an embodiment can be used or implemented in another embodiment without departing from the inventive concepts.​​

[0044] Unless otherwise stated, the illustrated embodiments should be understood to provide features of different details of some ways in which the inventive concept can be adopted in practice. Accordingly, features, components, modules, layers, films, panels, regions, and / or aspects of each embodiment (hereinafter individually or collectively referred to as “elements”) can be additionally combined, separated, interchanged, and / or rearranged, unless otherwise stated, without departing from the inventive concept.

[0045] Boundaries between adjacent elements are often indicated in the drawings with cross-hatching or by shadows. Accordingly, the presence of cross-hatching or shadows in no way limits the scope of potential architectural, material, material property, dimensional, scaling, commonality of elements between illustrations, and / or any other characteristic, attribute, property, and / or the like of an element, unless otherwise stated. Moreover, in the drawings, the size and relative sizes of elements can be exaggerated for clarity and / or descriptive purposes. When embodiments can be practiced differently, a particular sequence of processes can be performed other than as described. For example, two consecutively described processes can be executed substantially simultaneously or in the reverse order described. Also, identical reference numerals have been used to designate identical elements.

[0046] When an element is referred to as being “on” another element, “connected to” another element, or “coupled to” another element, it can be directly on, connected, or coupled to the other element or intervening elements can be present. In contrast, when an element is referred to as being “directly on,” “directly connected to,” or “directly coupled to” another element, there are no intervening elements present. In this context, the term “connected” can refer to physical or electrical and / or fluid connection, with or without intervening elements. Also, X-axis, Y-axis, and Z-axis do not limit the three axes of a rectangular coordinate system, such as x, y, and z axes, and can be interpreted in a broader sense. For example, the X-axis, Y-axis, and Z-axis can be perpendicular to each other, or can represent different directions that can not be perpendicular to each other. For the purposes of the present disclosure, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” can be interpreted to mean only X, only Y, only Z, or any combination of any two or more of X, Y, and Z, such as, for example, XYZ, XYY, YZ, and ZZ. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. In addition, the terms “and” and “or” can be used jointly or severally, and should be interpreted as “and / or” in general.

[0047] Although the terms "first," "second," etc. can be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Thus, a first element discussed below could be termed a second element without departing from the teachings of the present disclosure.

[0048] Spatially relative terms, such as "beneath," "below," "lower," "above," "upper," "on," "over," "higher," "side" (as in "sidewall"), and the like, can be used herein for ease of description to describe one element's or feature's relationship to another element(s) or feature(s) as illustrated in the figures. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientations depicted in the figures. For example, if a device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the term "below" can encompass both an orientation of above and below. Moreover, the device can be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and, accordingly, the spatially relative descriptors used herein are to be interpreted in the context of the specific applications to which they are used. The terms "first," "second," and the like, do not necessarily have an ordinal meaning. Rather, these terms are used herein "merely" to describe a "certain" number of things and do not imply an order or sequence among or between the things, unless specifically stated, understood, or otherwise clear, for example, from the context in which the terms are utilized.

[0049] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, the use of the terms "comprises," "comprising," "includes," and / or "including," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. It will be understood that the terms "substantially," "approximately," and other like terms, as used herein, are used in a permissible sense of "essentially," "sufficiently," or "approximately" to provide a degree of inexactness and / or imperfection, and are not intended to convey a degree of inexactness or imperfection that is unacceptable to one of ordinary skill in the art.

[0050] Various embodiments are described herein with reference to cross-sectional illustrations and / or exploded illustrations, which are idealized embodiments and / or intermediate structures that are illustrated in isolation and / or with relative positioning for the sake of visualizing such embodiments. Consequently, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Therefore, embodiments disclosed herein should not necessarily be construed as limited to the particular illustrated shapes of regions, but are to include deviations in shapes that result from, for example, manufacturing. In this manner, regions illustrated in the figures can have original shapes that are not necessarily represented precisely in the illustrations, and thus, the shapes illustrated in the figures are not necessarily to be construed as limiting.

[0051] As is traditional in the field of electronics, some embodiments are described and illustrated herein in terms of functional blocks, units, and / or modules. Those skilled in the art will recognize that these blocks, units, and / or modules are implemented by electronic (or optical) circuitry, which can consist of a number of components such as logic circuits, discrete components, microprocessors, hardwired circuitry, memory elements, and / or wiring that can be formed using semiconductor-based manufacturing techniques or other techniques including those that are not semiconductor-based. In this regard, blocks, units, and / or modules are tangible in that they consist of physical hardware elements, such as those listed above. In cases where blocks, units, and / or modules are implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform various functions discussed herein and can optionally be driven by firmware and / or software. It is also contemplated that each of the blocks, units, and / or modules can be implemented by dedicated hardware as is common in the art. Also, it is noted that each of the blocks, units, and / or modules can be physically separated or integrated together, as is also common in the art. Moreover, each of the blocks, units, and / or modules can be physically combined with other ones of the blocks, units, and / or modules, as is also common in the art.

[0052] The term "overlapped" can include layers, stacks, facing or facing towards, extending over, extending under, covering or partially covering, or any other appropriate term as would be understood and appreciated by one of ordinary skill in the art.

[0053] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0054] Figure 1is a schematic plan view showing a tiled display according to an embodiment of the disclosure.

[0055] Referring to Figure 1 The tiled display TD can include a plurality of display devices 10. The plurality of display devices 10 can be arranged in, but not limited to, a grid pattern. The plurality of display devices 10 can extend in a first direction (X-axis direction) or a second direction (Y-axis direction), and the tiled display TD can have a certain shape. The plurality of display devices 10 can all have the same size. However, it should be understood that the disclosure is not limited thereto. For example, the plurality of display devices 10 can have different sizes.

[0056] Each of the plurality of display devices 10 can have a rectangular shape including a longer side and a shorter side. The display devices 10 can be arranged such that the longer sides or the shorter sides of the display devices 10 can extend from each other. Some of the display devices 10 can be disposed on an edge of the tiled display TD to form one side of the tiled display TD. Some other display devices 10 can be disposed at a corner of the tiled display TD and can form two adjacent sides of the tiled display TD. Yet some other display devices 10 can be disposed inside the tiled display TD and can be surrounded by other display devices 10.

[0057] Each display device 10 can include a display area DA and a non-display area NDA. The display area DA can include pixels for displaying an image. The non-display area NDA can be disposed adjacent to (e.g., surrounding) the display area DA, and in an embodiment, can surround the display area DA and can not display an image.

[0058] The tiled display TD can have, but is not limited to, a substantially planar shape. The tiled display TD can have a three-dimensional shape, which provides a three-dimensional experience to a viewer. For example, in a case where the tiled display TD has a three-dimensional shape, at least some of the display devices 10 can have a curved shape. As another example, the display devices 10 can have a flat shape and can extend from each other at an angle, so that the tiled display TD can have a three-dimensional shape.

[0059] The tiled display TD can be formed by connecting the non-display areas NDA of adjacent display devices 10 to each other. The plurality of display devices 10 can extend from each other by a joining member or an adhesive member. Accordingly, the non-display areas NDA between the display devices 10 can be surrounded by the display areas DA of adjacent display devices 10. The display areas DA of the display devices 10 can be so close to each other that a viewer can not recognize the non-display areas NDA between the display devices 10 or the boundaries between the display devices 10. The reflectivity of external light at the display areas DA of the plurality of display devices 10 can be substantially equal to the reflectivity of external light at the non-display areas NDA between the display devices 10. Accordingly, the tiled display TD can immerse a viewer in an image by eliminating the seams between the display devices 10 by preventing the non-display areas NDA or the boundaries between the plurality of display devices 10 from being perceived.

[0060] Figure 2 FIG. 1 is a schematic plan view illustrating a display device according to an embodiment of the present disclosure.

[0061] Referring to Figure 2 The display device 10 can include pixels arranged in rows and columns in the display area DA. Each pixel can include a light emitting area LA defined by a pixel defining layer, and can emit light having a peak wavelength through the light emitting area LA. For example, the display area DA of each display device 10 can include a first light emitting area LA1, a second light emitting area LA2, and a third light emitting area LA3. In each of the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3, light generated by a light emitting element of the display device 10 can be emitted out of the display device 10.

[0062] The first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3 can emit light having a peak wavelength to the outside of the display device 10. The first light emitting area LA1 can emit light of a first color, the second light emitting area LA2 can emit light of a second color, and the third light emitting area LA3 can emit light of a third color. For example, the light of the first color can be red light having a peak wavelength in a range of about 610 to about 650 nm, the light of the second color can be green light having a peak wavelength in a range of about 510 to about 550 nm, and the light of the third color can be blue light having a peak wavelength in a range of about 440 nm to about 480 nm. However, it should be understood that the present disclosure is not limited thereto.

[0063] The first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3 can be repeatedly and sequentially arranged along a first direction (X-axis direction) of the display area DA. For example, a width of the first light emitting area LA1 in the first direction (X-axis direction) can be greater than a width of the second light emitting area LA2 in the first direction. A width of the second light emitting area LA2 in the first direction can be greater than a width of the third light emitting area LA3 in the first direction. As another example, a width of the first light emitting area LA1 in the first direction (X-axis direction), a width of the second light emitting area LA2 in the first direction, and a width of the third light emitting area LA3 in the third direction can be substantially equal.

[0064] In an embodiment, an area of the first light emitting area LA1 can be greater than an area of the second light emitting area LA2, and an area of the second light emitting area LA2 can be greater than an area of the third light emitting area LA3. As another example, an area of the first light emitting area LA1, an area of the second light emitting area L2, and an area of the third light emitting area LA3 can be substantially equal.

[0065] The display area DA of the display device 10 can include a light blocking area BA surrounding the light emitting area LA. For example, the display area DA can include a first light blocking area BA1, a second light blocking area BA2, and a third light blocking area BA3. The first light blocking area BA1, the second light blocking area BA2, and the third light blocking area BA3 can be disposed adjacent to (e.g., on a side of) the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3, respectively, thereby preventing mixing of light emitted from the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3.

[0066] Figure 3 is a schematic cross-sectional view taken along a line I-I' of Figure 2

[0067] Referring to Figure 2 and Figure 3 The display area DA of each display device 10 can include a first light emitting area LA1, a second light emitting area LA2, and a third light emitting area LA3. In each of the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3, light generated by a light emitting diode ED of the display device 10 can be emitted from the display device 10.

[0068] The display device 10 can include a substrate 100, a buffer layer BF, a display layer DPL, and an encapsulation layer ENC.

[0069] ​The substrate 100 can be a base substrate or a base member, and can be made of an insulating material such as a polymer resin. For example, the substrate 100 can be a flexible substrate that is bendable, foldable, or rollable. The substrate 100 can include, but is not limited to, polyimide (PI).

[0070] A buffer layer BF can be disposed on the substrate 100. The buffer layer BF can be formed of an inorganic film that can prevent air or moisture from penetrating. For example, the buffer layer BF can include a plurality of inorganic films that are alternately stacked on each other.

[0071] The display layer DPL can include a thin film transistor layer TFTL, a light emitting element layer EML, a wavelength conversion layer WLCL, and a color filter layer CFL.

[0072] The thin film transistor layer TFTL can include a thin film transistor TFT, a gate insulating layer GI, an interlayer dielectric layer ILD, a first passivation layer PAS1, and a first planarization layer OC1.

[0073] The thin film transistor TFT can be disposed on the buffer layer BF, and can form a pixel circuit of each of a plurality of pixels. For example, the thin film transistor TFT can be a driving transistor or a switching transistor of the pixel circuit. The thin film transistor TFT can include a semiconductor layer ACT, a gate electrode GE, a source electrode SE, and a drain electrode DE.

[0074] The semiconductor layer ACT can be disposed on the buffer layer BF. The semiconductor layer ACT can overlap the gate electrode GE, the source electrode SE, and the drain electrode DE. The semiconductor layer ACT can be in direct contact with the source electrode SE and the drain electrode DE, and can face the gate electrode GE with the gate insulating layer GI interposed therebetween.

[0075] The gate electrode GE can be disposed on the gate insulating layer GI. The gate electrode GE can overlap the semiconductor layer ACT with the gate insulating layer GI interposed therebetween.

[0076] The source electrode SE and the drain electrode DE can be disposed on the interlayer dielectric layer ILD such that they can be spaced apart from each other. The source electrode SE can be in contact with one end of the semiconductor layer ACT through a contact hole formed in the gate insulating layer GI and the interlayer dielectric layer ILD. The drain electrode DE can be in contact with the other end of the semiconductor layer ACT through a contact hole formed in the gate insulating layer GI and the interlayer dielectric layer ILD. The drain electrode DE can be electrically connected to the first electrode AE of the light emitting element EL through a contact hole formed in the first passivation layer PAS1 and the first planarization layer OC1.

[0077] A gate insulating layer GI can be disposed on the semiconductor layer ACT. For example, the gate insulating layer GI can be disposed on the semiconductor layer ACT and the buffer layer BF, and can insulate the semiconductor layer ACT from the gate electrode GE. The gate insulating layer GI can include a contact hole through which the source electrode SE penetrates and a contact hole through which the drain electrode DE penetrates.

[0078] An interlayer dielectric layer ILD can be disposed on the gate electrode GE. For example, the interlayer dielectric layer ILD can include a contact hole through which the source electrode SE penetrates and a contact hole through which the drain electrode DE penetrates. The contact holes of the interlayer dielectric layer ILD can be electrically connected to the contact holes of the gate insulating layer GI.

[0079] A first passivation layer PAS1 can be disposed over the thin film transistor TFT to protect the thin film transistor TFT. For example, the first passivation layer PAS1 can include a contact hole through which the first electrode AE penetrates.

[0080] A first planarization layer OC1 can be disposed on the first passivation layer PAS1 to provide a planar surface on the thin film transistor TFT. For example, the first planarization layer OC1 can include a contact hole through which the first electrode AE of the light emitting element EL penetrates. The contact hole in the first planarization layer OC1 can be electrically connected to the contact hole in the first passivation layer PAS1.

[0081] A light emitting element layer EML can include the light emitting element EL, a first bank BNK1, a second bank BNK2, a second passivation layer PAS2, and a second planarization layer OC2.

[0082] The light emitting element EL can be disposed on the thin film transistor TFT. The light emitting element EL can include the first electrode AE, the second electrode CE, and a light emitting diode ED.

[0083] The first electrode AE can be disposed on the first planarization layer OC1. For example, the first electrode AE can be disposed on the first bank BNK1 disposed on the first planarization layer OC1 to cover the first bank BNK1. The first electrode AE can be disposed to overlap one of the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3 defined by the second bank BNK2. The first electrode AE can be electrically connected to the drain electrode DE of the thin film transistor TFT. The first electrode AE can be, but is not limited to, an anode electrode of the light emitting diode ED.

[0084] The second electrode CE can be disposed on the first planarization layer OC1. For example, the second electrode CE can be disposed on the first bank BNK1 disposed on the first planarization layer OC1 to cover the first bank BNK1. The second electrode CE can be disposed to overlap one of the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3 defined by the second bank BNK2. For example, the second electrode CE can receive a common voltage applied to all pixels. The second electrode CE can be, but is not limited to, a cathode electrode of the light emitting diode ED.

[0085] The first insulating layer IL1 can cover a portion of the first electrode AE and a portion of the second electrode CE adjacent to each other, and can insulate the first electrode AE and the second electrode CE from each other.

[0086] The light emitting diode ED can be disposed between the first electrode AE and the second electrode CE above the first planarization layer OC1. The light emitting diode ED can be disposed on the first insulating layer IL1. One end of the light emitting diode ED can be electrically connected to the first electrode AE, and the other end of the light emitting diode ED can be electrically connected to the second electrode CE. For example, the light emitting diode ED can include active layers having the same material so that they can emit light of the same wavelength or light of the same color. The light emitted from each of the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3 can have the same color. For example, the light emitting diode ED can emit light of a third color or blue light having a peak wavelength in a range of about 440 nm to about 480 nm. Accordingly, the light emitting element layer EML can emit light of the third color or blue light.

[0087] The second bank BNK2 can be disposed on the first planarization layer OC1 to define the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3. For example, the second bank BNK2 can surround each of the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3. However, it should be understood that the present disclosure is not limited thereto. The second bank BNK2 can separate and insulate the first electrode AE or the second electrode CE of the light emitting element EL from the first electrode AE or the second electrode CE of another light emitting element EL. The second bank BNK2 can be disposed in the first light blocking area BA1, the second light blocking area BA2, and the third light blocking area BA3.

[0088] The second passivation layer PAS2 can be disposed on the light emitting element EL and the second bank BNK2. The second passivation layer PAS2 can cover the light emitting element EL to protect the light emitting element EL. The second passivation layer PAS2 can prevent impurities such as moisture and air from penetrating from the outside to prevent damage to the light emitting element EL.

[0089] A second planarization layer OC2 can be disposed on the second passivation layer PAS2 to provide a flat surface across the light emitting element layer EML. The second planarization layer OC2 can include an organic material. For example, the second planarization layer OC2 can be at least one of an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, and a polyimide resin.

[0090] The wavelength conversion layer WLCL can include a first capping layer CAP1, a first light blocking member BK1, a first wavelength conversion unit WLC1, a second wavelength conversion unit WLC2, a light transmission unit LTU, a second capping layer CAP2, and a third planarization layer OC3.

[0091] The first capping layer CAP1 can be disposed on the second planarization layer OC2 of the light emitting element layer EML. The first capping layer CAP1 can seal the first wavelength conversion unit WLC1 and the second wavelength conversion unit WLC2 and the lower surface of the light transmission unit LTU. The first capping layer CAP1 can include an inorganic material. For example, the first capping layer CAP1 can include at least one of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, cerium oxide, and silicon oxide.

[0092] The first light blocking member BK1 can be disposed on the first capping layer CAP1 in the first light blocking area BA1, the second light blocking area BA2, and the third light blocking area BA3. The first light blocking member BK1 can overlap the second bank BNK2 in the thickness direction. The first light blocking member BK1 can block transmission of light. The first light blocking member BK1 can improve a color gamut by preventing light from intruding and mixing among the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3. When viewed from the top, the first light blocking member BK1 can be arranged in a lattice shape around the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3.

[0093] The first light blocking member BK1 can include an organic light blocking material, a liquid-repellent component, or a combination thereof. Here, the liquid-repellent component can be composed of a fluorine-containing monomer or a fluorine-containing polymer, and specifically, can include a fluorine-containing aliphatic polycarbonate. For example, the first light blocking member BK1 can be made of a black organic material including the liquid-repellent component. The first light blocking member BK1 can be formed by a coating and exposure process on an organic light blocking material containing the liquid-repellent component or the like.

[0094] Since the first light-blocking member BK1 can include a liquid-repellent component, the first wavelength conversion unit WLC1 and the second wavelength conversion unit WLC2 and the light-transmitting unit LTU can be separated so that they can correspond to the respective light-emitting areas LA. For example, in the case where the first wavelength conversion unit WLC1 and the second wavelength conversion unit WLC2 and the light-transmitting unit LTU are formed by an inkjet method, an ink composition can flow on the upper surface of the first light-blocking member BK1. In this regard, the first light-blocking member BK1 can include a liquid-repellent component, and thus can guide the flow of the ink composition to the light-emitting area. Accordingly, the first light-blocking member BK1 can prevent the ink composition from mixing.

[0095] The first wavelength conversion unit WLC1 can be disposed on the first capping layer CAP1 in the first light-emitting area LA1. The first wavelength conversion unit WLC1 can be surrounded by the first light-blocking member BK1. The first wavelength conversion unit WLC1 can include a first base resin BS1, a first scatterer SCT1, and a first wavelength shifter WLS1.

[0096] The first base resin BS1 can include a material having a relatively high transmittance. The first base resin BS1 can be made of a transparent organic material. For example, the first base resin BS1 can include at least one organic material among an epoxy resin, an acrylic resin, a Cardo resin, and an imide resin.

[0097] The first scatterer SCT1 can have a refractive index different from that of the first base resin BS1, and can form an optical interface with the first base resin BS1. For example, the first scatterer SCT1 can include a light-scattering material or light-scattering particles that scatter at least a portion of the transmitted light. For example, the first scatterer SCT1 can include a metal oxide such as titanium oxide (TiO2), zirconium oxide (ZrO2), aluminum oxide (Al2O3), indium oxide (In2O3), zinc oxide (ZnO), tin oxide (SnO2), or a combination thereof, or can include an organic particle such as an acrylic resin, a polyurethane resin, or a combination thereof. The first scatterer SCT1 can scatter light in a random direction regardless of the incident direction of the incident light without substantially changing the peak wavelength of the incident light.

[0098] The first wavelength shifter WLS1 can convert or shift the peak wavelength of the incident light to a first peak wavelength. For example, the first wavelength shifter WLS1 can convert blue light provided from the display device 10 to red light having a single peak wavelength in the range of about 610 nm to about 650 nm, and output the light. The first wavelength shifter WLS1 can be a quantum dot, a quantum rod, a phosphor, or a combination thereof. The quantum dot can be a particle substance that emits light having a color as an electron jumps from a conduction band to a valence band.

[0099] For example, the quantum dots can be semiconductor nanocrystal materials. Quantum dots can have a specific band gap depending on their composition and size, and can absorb light and emit light having an intrinsic wavelength. Examples of the semiconductor nanocrystals of the quantum dots can include Group IV nanocrystals, Group II-VI compound nanocrystals, Group III-V compound nanocrystals, Group IV-VI nanocrystals, or combinations thereof.

[0100] The Group II-VI compound can be selected from the group consisting of binary compounds (selected from the group consisting of CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnO, HgS, HgSe, HgTe, MgSe, MgS, and mixtures thereof), ternary compounds (selected from the group consisting of InZnP, AgInS, CuInS, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnTe, CdHgS, CdHgSe, CdHgTe, HgZnS, HgZnSe, HgZnTe, MgZnSe, MgZnS, and mixtures thereof), and quaternary compounds (selected from the group consisting of HgZnTeS, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe, HgZnSTe, and mixtures thereof).

[0101] The Group III-V compound can be selected from the group consisting of binary compounds (selected from the group consisting of GaN, GaP, GaAs, GaSb, AlN, AlP, AlAs, AlSb, InN, InP, InAs, InSb, and mixtures thereof), ternary compounds (selected from the group consisting of GaNP, GaNAs, GaNSb, GaPAs, GaPSb, AlNP, AlNAs, AlNSb, AlPAs, AlPSb, InGaP, InNP, InAlP, InNAs, InNSb, InPAs, InPSb, and mixtures thereof), and quaternary compounds (selected from the group consisting of GaAlNP, GaAlNAs, GaAlNSb, GaAlPAs, GaAlPSb, GaInNP, GaInNAs, GaInNSb, GaInPAs, GaInPSb, InAlNP, InAlNAs, InAlNSb, InAlPAs, InAlPSb, and mixtures thereof).

[0102] The group IV-VI compound can be selected from the group consisting of binary compounds (selected from the group consisting of SnS, SnSe, SnTe, PbS, PbSe, PbTe, and mixtures thereof), ternary compounds (selected from the group consisting of SnSeS, SnSeTe, SnSTe, PbSeS, PbSeTe, PbSTe, SnPbS, SnPbSe, SnPbTe, and mixtures thereof), and quaternary compounds (selected from the group consisting of SnPbSSe, SnPbSeTe, SnPbSTe, and mixtures thereof). The group IV element can be selected from the group consisting of Si, Ge, and mixtures thereof. The group IV compound can be a binary compound selected from the group consisting of SiC, SiGe, and mixtures thereof.

[0103] For example, the above-described binary, ternary, or quaternary compound can exist in a uniform concentration in a particle or can exist in a partially different concentration in the same particle.

[0104] For example, the quantum dot can have a core-shell structure including a core including a nanocrystal and a shell surrounding the core. The shell of the quantum dot can serve as a protective layer for maintaining a semiconductor property by preventing chemical denaturation of the core and can serve as a charging layer for imparting an electrophoretic property to the quantum dot. The shell can be a single layer or multiple layers. At an interface between the core and the shell, a concentration gradient of atoms in the shell can decrease in a direction toward the center. The shell of the quantum dot can be made of a metal or a nonmetal oxide, a semiconductor compound, a combination thereof, or the like.

[0105] For example, examples of the metal or nonmetal oxide can be, but are not limited to, binary compounds such as SiO2, Al2O3, TiO2, ZnO, MnO, Mn2O3, Mn3O4, CuO, FeO, Fe2O3, Fe3O4, CoO, Co3O4, and NiO or ternary compounds such as MgAl2O4, CoFe2O4, NiFe2O4, and CoMn2O4.

[0106] Examples of the semiconductor compound can include, but are not limited to, CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnSeS, ZnTeS, GaAs, GaP, GaSb, HgS, HgSe, HgTe, InAs, InP, InGaP, InSb, AlAs, AlP, AlSb, or the like.

[0107] The light output from the first wavelength converter WLS1 can have a full width at half maximum (FWHM) of an emission wavelength spectrum of about 45 nm or less, about 40 nm or less, or about 30 nm or less. In this way, color purity and a color gamut of colors displayed by the display device 10 can be further improved. The light output from the first wavelength converter WLS1 can propagate in different directions regardless of an incident direction of the incident light. Thus, lateral visibility of red colors displayed in the first light emitting area TA1 can be improved.

[0108] A portion of the blue light emitted from the light emitting element layer EML can pass through the first wavelength conversion unit WLC1 without being converted into red light by the first wavelength converter WLS1. In the case where such blue light can be incident on the first color filter CF1, it can be blocked by the first color filter CF1. On the other hand, the red light converted by the first wavelength conversion unit WLC1 can pass through the first color filter CF1 to be emitted to the outside. Thus, the first light emitting area LA1 can emit red light.

[0109] The second wavelength conversion unit WLC2 can be disposed on the first cap layer CAP1 in the second light emitting area LA2. The second wavelength conversion unit WLC2 can be surrounded by the first light blocking member BK1. The second wavelength conversion unit WLC2 can include a second base resin BS2, a second scatterer SCT2, and a second wavelength converter WLS2.

[0110] The second base resin BS2 can include a material having a relatively high light transmittance. The second base resin BS2 can be made of a transparent organic material. For example, the second base resin BS2 can be made of the same material as the first base resin BS1, or can be made of one of the above-listed materials of the first base resin BS1.

[0111] The second scatterer SCT2 can have a refractive index different from that of the second base resin BS2, and can form an optical interface with the second base resin BS2. For example, the second scatterer SCT2 can include a light scattering material or light scattering particles for scattering at least a portion of the transmitted light. For example, the second scatterer SCT2 can be made of the same material as the first scatterer SCT1, or can be made of one of the above-listed materials of the first scatterer SCT1. The second scatterer SCT2 can scatter light in random directions regardless of an incident direction of the incident light without substantially changing a peak wavelength of the incident light.

[0112] The second wavelength converter WLS2 can convert or transform a peak wavelength of the incident light to a second peak wavelength that can be different from the first peak wavelength of the first wavelength converter WLS1. For example, the second wavelength converter WLS2 can convert blue light provided from the display device 10 to blue light having a single peak wavelength in a range of about 510 nm to about 550 nm, and output the light. The second wavelength converter WLS2 can be a quantum dot, a quantum rod, a phosphor, or a combination thereof. The second wavelength converter WLS2 can include the above-listed materials of the first wavelength converter WLS1. The wavelength conversion range of the second wavelength converter WLS2 can be determined by the quantum dot, the quantum rod, the phosphor, or the combination thereof, so that it can be different from the wavelength conversion range of the first wavelength converter WLS1.

[0113] The light transmission unit LTU can be disposed on the first cap layer CAP1 in the third light emitting area LA3. The light transmission unit LTU can be surrounded by the first light blocking member BK1. The light transmission unit LTU can transmit the incident light without converting a peak wavelength thereof. The light transmission unit LTU can include a third base resin BS3 and a third scatterer SCT3.

[0114] The third base resin BS3 can include a material having a relatively high light transmittance. The third base resin BS3 can be made of a transparent organic material. For example, the third base resin BS3 can be made of the same material as the first base resin BS1 or the second base resin BS2, or can be made of one of the above-listed materials of the first base resin BS1 or the second base resin BS2.

[0115] The third scatterer SCT3 can have a refractive index different from that of the third base resin BS3, and can form an optical interface with the third base resin BS3. For example, the third scatterer SCT3 can include a light scattering material or light scattering particles that scatter at least a portion of the transmitted light. For example, the third scatterer SCT3 can be made of the same material as the first scatterer SCT1 or the second scatterer SCT2, or can be made of one of the above-listed materials of the first scatterer SCT1 or the second scatterer SCT2. The third scatterer SCT3 can scatter light in a random direction regardless of an incident direction of the incident light without substantially changing a peak wavelength of the incident light.

[0116] The first and second wavelength conversion units WLC1 and WLC2 and the light transmission unit LTU can be disposed on the light emitting element layer EML through the second planarization layer OC2 and the first capping layer CAP1. Accordingly, the display apparatus 10 can not need a separate substrate for the first and second wavelength conversion units WLC1 and WLC2 and the light transmission unit LTU. Accordingly, the first and second wavelength conversion units WLC1 and WLC2 and the light transmission unit LTU can be easily aligned with the first, second, and third light emitting areas LA1, LA2, and LA3, respectively, so that the thickness of the display apparatus 10 can be relatively reduced.

[0117] The second capping layer CAP2 can cover the first and second wavelength conversion units WLC1 and WLC2, the light transmission unit LTU, and the first light blocking member BK1. For example, the second capping layer CAP2 can seal the first and second wavelength conversion units WLC1 and WLC2 and the light transmission unit LTU to thereby prevent damage or contamination to the first and second wavelength conversion units WLC1 and WLC2 and the light transmission unit LTU. The second capping layer CAP2 can be made of the same material as the first capping layer CAP1, or can be made of the above-listed materials of the first capping layer CAP1.

[0118] The third planarization layer OC3 can be disposed on the second capping layer CAP2 to provide a planar top surface on the first and second wavelength conversion units WLC1 and WLC2 and the light transmission unit LTU. The third planarization layer OC3 can include an organic material. For example, the third planarization layer OC3 can be at least one of an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, and a polyimide resin.

[0119] The color filter layer CFL can include the second light blocking member BK2, the first, second, and third color filters CF1, CF2, and CF3, and the third passivation layer PAS3.

[0120] The second light blocking member BK2 can be disposed on the third planarization layer OC3 of the wavelength conversion layer WLCL in the first, second, and third light blocking areas BA1, BA2, and BA3. The second light blocking member BK2 can overlap the first light blocking member BK1 or the second dam BNK2 in a thickness direction. The second light blocking member BK2 can block transmission of light. The second light blocking member BK2 can improve a color gamut by preventing light from intruding and mixing among the first, second, and third light emitting areas LA1, LA2, and LA3. When viewed from the top, the second light blocking member BK2 can be arranged in a lattice shape around the first, second, and third light emitting areas LA1, LA2, and LA3.

[0121] The first color filter CF1 can be disposed on the third planarization layer OC3 in the first light emitting area LA1. The first color filter CF1 can be surrounded by the second light blocking member BK2. The first color filter CF1 can overlap the first wavelength conversion unit WLC1 in a thickness direction. The first color filter CF1 can selectively transmit light of a first color (e.g., red light), and can block and absorb light of a second color (e.g., green light) and light of a third color (e.g., blue light). For example, the first color filter CF1 can be a red color filter and can include a red colorant. The red colorant can be made of a red dye or a red pigment.

[0122] The second color filter CF2 can be disposed on the third planarization layer OC3 in the second light emitting area LA2. The second color filter CF2 can be surrounded by the second light blocking member BK2. The second color filter CF2 can overlap the second wavelength conversion unit WLC2 in a thickness direction. The second color filter CF2 can selectively transmit light of a second color (e.g., green light), and can block and absorb light of a first color (e.g., red light) and light of a third color (e.g., blue light). For example, the second color filter CF2 can be a green color filter and can include a green colorant. The green colorant can be made of a green dye or a green pigment.

[0123] The third color filter CF3 can be disposed on the third planarization layer OC3 in the third light emitting area LA3. The third color filter CF3 can be surrounded by the second light blocking member BK2. The third color filter CF3 can overlap the light transmission unit LTU in a thickness direction. The third color filter CF3 can selectively transmit light of a third color (e.g., blue light) and can block and absorb light of a first color (e.g., red light) and light of a second color (e.g., green light). For example, the third color filter CF3 can be a blue color filter and can include a blue colorant. The blue colorant can be made of a blue dye or a blue pigment.

[0124] The first color filter CF1, the second color filter CF2, and the third color filter CF3 can absorb a portion of light introduced from the outside of the display device 10 to reduce reflection of external light. Accordingly, the first color filter CF1, the second color filter CF2, and the third color filter CF3 can prevent color distortion due to reflection of external light.

[0125] The first color filter CF1, the second color filter CF2, and the third color filter CF3 can be disposed on the first wavelength conversion unit WLC1 and the second wavelength conversion unit WLC2 and the light transmission unit LTU by the third planarization layer OC3, and thus the display device 10 can not need separate substrates for the first color filter CF1, the second color filter CF2, and the third color filter CF3. Accordingly, the thickness of the display device 10 can be relatively reduced.

[0126] The third passivation layer PAS3 can cover the first color filter CF1, the second color filter CF2, and the third color filter CF3. The third passivation layer PAS3 can protect the first color filter CF1, the second color filter CF2, and the third color filter CF3.

[0127] The encapsulation layer ENC can be disposed on the third passivation layer PAS3 of the color filter layer CFL. For example, the encapsulation layer ENC can include at least one inorganic layer to prevent oxygen or moisture from permeating. The encapsulation layer ENC can include at least one organic layer to protect the display device 10 from foreign substances such as dust.

[0128] Figure 4 FIG. 1 is a schematic plan view illustrating a pixel of a display device according to an embodiment of the disclosure.

[0129] Referring to FIG. 1, Figure 3 and Figure 4 Each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can include a first electrode AE, a second electrode CE, a light emitting diode ED, a contact electrode CTE, and a second bank BNK2. The first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can correspond to the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3, respectively. The light emitting diode ED of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can emit light through the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3.

[0130] Each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can emit light of the same color. For example, each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can include the same type of light emitting diode ED and can emit light of a third color or blue light. As another example, the first sub-pixel SP1 can emit light of a first color or red light, the second sub-pixel SP2 can emit light of a second color or green light, and the third sub-pixel SP3 can emit light of a third color or blue light.

[0131] Each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can include a first electrode AE and a second electrode CE, a light emitting diode ED, a contact electrode CTE, and a second bank BNK2.

[0132] The first electrode AE and the second electrode CE can be electrically connected to the light emitting diode ED to receive a voltage, and the light emitting diode ED can emit light of a certain wavelength band. At least a portion of the first electrode AE and the second electrode CE can form an electric field in the pixel SP, and the light emitting diode ED can be aligned by the electric field.

[0133] For example, the first electrode AE can be a separate pixel electrode for each of the first, second, and third sub-pixels SP1, SP2, and SP3, and the second electrode CE can be a common electrode extending across the first, second, and third sub-pixels SP1, SP2, and SP3. One of the first and second electrodes AE and CE can be an anode electrode of the light emitting diode ED, and the other can be a cathode electrode of the light emitting diode ED.

[0134] The first electrode AE can include a first electrode trunk AE1 extending in a first direction (X-axis direction) and at least one first electrode branch AE2 branching from the first electrode trunk AE1 and extending in a second direction (Y-axis direction).

[0135] The first electrode trunk AE1 of each of the first, second, and third sub-pixels SP1, SP2, and SP3 can be spaced apart from the first electrode trunk AE1 of an adjacent sub-pixel, and the first electrode trunk AE1 can be disposed on an imaginary extension line of the first electrode trunk AE1 of the adjacent sub-pixel in the first direction (X-axis direction). The first electrode trunk AE1 of the first, second, and third sub-pixels SP1, SP2, and SP3 can receive different signals, respectively, and can be driven individually.

[0136] The first electrode branch AE2 can branch from the first electrode trunk AE1 and can extend in the second direction (Y-axis direction). One end of the first electrode branch AE2 can be electrically connected to the first electrode trunk AE1, and the other end of the first electrode branch AE2 can be spaced apart from the second electrode trunk CE1 opposite the first electrode trunk AE1.

[0137] The second electrode CE can include a second electrode trunk CE1 extending in the first direction (X-axis direction) and a second electrode branch CE2 branching from the second electrode trunk CE1 and extending in the second direction (Y-axis direction). The second electrode trunk CE1 of each of the first, second, and third sub-pixels SP1, SP2, and SP3 can be electrically connected to the second electrode trunk CE1 of an adjacent sub-pixel. The second electrode trunk CE1 can extend in the first direction (X-axis direction) to cross the sub-pixels SP. The second electrode trunk CE1 can be connected to a portion extending in one direction in an outside of the display area DA or the non-display area NDA.

[0138] The second electrode branch CE2 can be spaced apart from and face the first electrode branch AE2. One end of the second electrode branch CE2 can be electrically connected to the second electrode trunk CE1, and the other end of the second electrode branch CE2 can be spaced apart from the first electrode trunk AE1.

[0139] The first electrodes AE can be electrically connected to the thin film transistor layer TFTL of the display device 10 through the first contact holes CNT1, and the second electrodes CE can be electrically connected to the thin film transistor layer TFTL of the display device 10 through the second contact holes CNT2. For example, the first contact holes CNT1 can be formed in each of the first electrode trunks AE1, and the second contact holes CNT2 can be formed in the second electrode trunk CE1. However, it is to be understood that the present disclosure is not limited thereto.

[0140] The second banks BNK2 can be provided at boundaries between the pixels SP. The first electrode trunks AE1 can be spaced apart from each other with respect to the second banks BNK2. The second banks BNK2 can extend in the second direction (Y-axis direction) and can be provided at boundaries of the pixels SP arranged in the first direction (X-axis direction). The second banks BNK2 can also be provided at boundaries of the pixels SP arranged in the second direction (Y-axis direction). The second banks BNK2 can define boundaries between the pixels SP.

[0141] In a case where ink in which light emitting diodes ED can be dispersed can be jetted during a process of manufacturing the display device 10, the second banks BNK2 can prevent the ink from flowing over the boundaries of the pixels SP. The second banks BNK2 can separate the inks in which different light emitting diodes ED are dispersed so that the inks can not mix with each other.

[0142] The light emitting diodes ED can be provided between the first electrodes AE and the second electrodes CE. One end of the light emitting diodes ED can be electrically connected to the first electrodes AE, and the other end of the light emitting diodes ED can be electrically connected to the second electrodes CE. For example, the light emitting diodes ED can be electrically connected to the first electrodes AE through the first contact electrodes CTE1, and can be electrically connected to the second electrodes CE through the second contact electrodes CTE2.

[0143] The light emitting diodes ED can be spaced apart from each other and can be aligned substantially in parallel to each other. The spacing between the light emitting diodes ED is not particularly limited herein. Some of the light emitting diodes ED can be provided adjacent to each other, some other light emitting diodes ED can be spaced apart at a certain interval, and still some other light emitting diodes ED can be aligned at a non-uniform density in a certain direction. For example, the light emitting diodes ED can be arranged in a direction perpendicular to a direction in which the first electrode branches AE2 or the second electrode branches CE2 can extend. As another example, the light emitting diodes ED can be arranged in a direction inclined with respect to a direction in which the first electrode branches AE2 or the second electrode branches CE2 can extend.

[0144] The light emitting diodes ED can include active layers of the same material so that they can emit light of the same wavelength range or light of the same color. The first, second, and third sub-pixels SP1, SP2, and SP3 can emit light of the same color. For example, the light emitting diodes ED can emit light of a third color or blue light having a peak wavelength in a range of about 440 nm to about 480 nm. Accordingly, the light emitting element layer EML of the display apparatus 10 can emit light of the third color or blue light. As another example, the first, second, and third sub-pixels SP1, SP2, and SP3 can include light emitting diodes ED having different active layers, and can emit light of different colors.

[0145] The contact electrode CTE can include a first contact electrode CTE1 and a second contact electrode CTE2. The first contact electrode CTE1 can cover the first electrode branch AE2 and a portion of the light emitting diode ED, and can electrically connect the first electrode branch AE2 with the light emitting diode ED. The second contact electrode CTE2 can cover the second electrode branch CE2 and another portion of the light emitting diode ED, and can electrically connect the second electrode branch CE2 with the light emitting diode ED.

[0146] The first contact electrode CTE1 can be disposed on the first electrode branch AE2 and extend in the second direction (Y-axis direction). The first contact electrode CTE1 can contact the first end of the light emitting diode ED. The light emitting diode ED can be electrically connected to the first electrode AE through the first contact electrode CTE1.

[0147] The second contact electrode CTE2 can be disposed on the second electrode branch CE2 and extend in the second direction (Y-axis direction). The second contact electrode CTE2 can be spaced apart from the first contact electrode CTE1 in the first direction (X-axis direction). The second contact electrode CTE2 can contact the second end of the light emitting diode ED. The light emitting diode ED can be electrically connected to the second electrode CE through the second contact electrode CTE2.

[0148] For example, the widths of the first and second contact electrodes CTE1 and CTE2 can be greater than the widths of the first and second electrode branches AE2 and CE2, respectively. As another example, the first and second contact electrodes CTE1 and CTE2 can cover side surfaces of the first and second electrode branches AE2 and CE2, respectively.

[0149] Figure 5 is a schematic cross-sectional view taken along line II-II' of Figure 4

[0150] Referring to Figure 2 to Figure 5 ​The light emitting element layer EML of the display device 10 can be disposed on the thin film transistor layer TFTL, and can include a first insulating layer IL1, a second insulating layer IL2, and a third insulating layer IL3.

[0151] The first bank BNK1 can be disposed in the first light emitting area LA1, the second light emitting area LA2, and the third light emitting area LA3, respectively. Each of the first banks BNK1 can correspond to the first electrode AE or the second electrode CE. Each of the first electrode AE and the second electrode CE can be disposed on the corresponding first bank BNK1. For example, each of the first electrode branch AE2 and the second electrode branch CE2 can be disposed on the corresponding first bank BNK1. The first bank BNK1 can include, but is not limited to, polyimide (PI).

[0152] The first bank BNK1 can be disposed on the first planarization layer OC1, and a side surface of each of the first bank BNK1 can be inclined with respect to the first planarization layer OC1. For example, each of the first electrode AE and the second electrode CE can include a material having a high reflectivity, and can be disposed on the inclined surface of the first bank BNK1 to reflect light emitted from the light emitting diode ED in a direction toward an upper side of the display device 10.

[0153] In conjunction with Figure 4 With reference to Figure 5 The first electrode trunk AE1 can include a first contact hole CNT1 that penetrates the first planarization layer OC1. The first electrode trunk AE1 can be electrically connected to the thin film transistor TFT through the first contact hole CNT1. Accordingly, the first electrode AE can receive an electrical signal from the thin film transistor TFT.

[0154] The second electrode trunk CE1 can extend in the first direction (X-axis direction), and can also be disposed in a non-light emitting area in which the light emitting diode ED is not disposed. The second electrode trunk CE1 can include a second contact hole CNT2 that penetrates the first planarization layer OC1. The second electrode trunk CE1 can be electrically connected to the power electrode through the second contact hole CNT2. The second electrode CE can receive an electrical signal from the power electrode.

[0155] The first electrode AE and the second electrode CE can include a transparent conductive material. For example, each of the first electrode AE and the second electrode CE can include, but is not limited to, at least one of indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO).

[0156] The first and second electrodes AE and CE can include a conductive material having high reflectivity. For example, the first and second electrodes AE and CE can include a metal having high reflectivity such as silver (Ag), copper (Cu), aluminum (Al), or a combination thereof. The first and second electrodes AE and CE can reflect light emitted from the light emitting diode ED toward the upper side of the display device 10.

[0157] The first and second electrodes AE and CE can be configured of a stack of one or more transparent conductive materials and one or more metals having high reflectivity, or of a single layer including one or more transparent conductive materials and one or more metals having high reflectivity. For example, the first and second electrodes AE and CE can have a stack structure of ITO / silver (Ag) / ITO / IZO, or can be an alloy including aluminum (Al), nickel (Ni), lanthanum (La), or the like. However, it should be understood that the present disclosure is not limited thereto.

[0158] The first insulating layer IL1 can be disposed on the first planarization layer OC1, the first and second electrodes AE and CE. The first insulating layer IL1 can partially cover each of the first and second electrodes AE and CE. For example, the first insulating layer IL1 can expose portions of the first and second electrodes AE and CE corresponding to an upper surface of the first bank BNK1, and can cover other portions of the first and second electrodes AE and CE not corresponding to the upper surface. Accordingly, the first insulating layer IL1 can include an opening exposing the portions of the first and second electrodes AE and CE corresponding to the upper surface of the first bank BNK1.

[0159] The first insulating layer IL1 can include an inorganic insulating material, and can include a recessed portion between the first and second electrodes AE and CE. The recessed portion of the first insulating layer IL1 can be filled with the second insulating layer IL2. Accordingly, the second insulating layer IL2 can flatten an upper surface of the first insulating layer IL1, and thus the light emitting diode ED can be disposed on the first and second insulating layers IL1 and IL2.

[0160] The first insulating layer IL1 can protect the first and second electrodes AE and CE, and can insulate the first and second electrodes AE and CE from each other. The first insulating layer IL1 can prevent the light emitting diode ED from being directly contacted with and damaged by other elements.

[0161] A light emitting diode ED can be disposed between the first electrode AE and the second electrode CE on the first insulating layer IL1 and the second insulating layer IL2. One end of the light emitting diode ED can be electrically connected to the first electrode AE, and the other end of the light emitting diode ED can be electrically connected to the second electrode CE. For example, the light emitting diode ED can be electrically connected to the first electrode AE through the first contact electrode CTE1, and can be electrically connected to the second electrode CE through the second contact electrode CTE2.

[0162] The third insulating layer IL3 can be partially disposed on the light emitting diode ED disposed between the first electrode AE and the second electrode CE. The third insulating layer IL3 can partially cover the outer surface of the light emitting diode ED. The insulating layer IL3 can protect the light emitting diode ED.

[0163] The contact electrode CTE can include the first contact electrode CTE1 and the second contact electrode CTE2. The first contact electrode CTE1 can cover the first electrode branch AE2 and a portion of the light emitting diode ED, and can electrically connect the first electrode branch AE2 and the light emitting diode ED. The second contact electrode CTE2 can cover the second electrode branch CE2 and the other portion of the light emitting diode ED, and can electrically connect the second electrode branch CE2 and the light emitting diode ED.

[0164] The first contact electrode CTE1 can be disposed on the first electrode branch AE2 and extend in the second direction (Y-axis direction). The first contact electrode CTE1 can be in contact with the first end of the light emitting diode ED. The light emitting diode ED can be electrically connected to the first electrode AE through the first contact electrode CTE1.

[0165] The second contact electrode CTE2 can be disposed on the second electrode branch CE2 and extend in the second direction (Y-axis direction). The second contact electrode CTE2 can be spaced apart from the first contact electrode CTE1 in the first direction (X-axis direction). The second contact electrode CTE2 can be in contact with the second end of the light emitting diode ED. The light emitting diode ED can be electrically connected to the second electrode CE through the second contact electrode CTE2.

[0166] The contact electrode CTE can include a conductive material. For example, the contact electrode CTE can include, but is not limited to, ITO, IZO, ITZO, aluminum (Al), etc., or a combination thereof.

[0167] Figure 6 FIG. 1 is a schematic view illustrating a light emitting diode according to an embodiment of the disclosure.

[0168] Reference Figure 6The light emitting diode ED can be a light emitting diode. For example, the light emitting diode ED can have a size of micrometers or nanometers, and can be an inorganic light emitting diode including an inorganic material. The inorganic light emitting diode can be aligned between two electrodes facing each other, since polarity can be generated by forming an electric field in a specific direction between the two electrodes.

[0169] The light emitting diode ED can have a shape extending in one direction. The light emitting diode ED can have a shape of a rod, a wire, a tube, or the like. For example, the light emitting diode ED can have a cylindrical or rod shape. As another example, the light emitting diode ED can have various shapes including a polyhedral shape such as a cube, a cuboid, and a hexagonal column, or can have a shape that can extend in a direction having a portion inclined.

[0170] The light emitting diode ED can include a first semiconductor layer 111, a second semiconductor layer 113, an active layer 115, an electrode layer 117, and an insulating layer 118.

[0171] The first semiconductor layer 111 can be an n-type semiconductor. For example, in the case where the light emitting diode ED emits blue light, the first semiconductor layer 111 can include a semiconductor material having the following chemical formula: Al x Ga y In 1-x-y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1). The first semiconductor layer 111 can be at least one semiconductor material of n-doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The first semiconductor layer 111 can be doped with an n-type dopant such as Si, Ge, and Sn. The first semiconductor layer 111 can be n-GaN doped with n-type Si. The length of the first semiconductor layer 111 can be in a range of, but not limited to, from about 1.5 μm to about 5 μm.

[0172] The second semiconductor layer 113 can be disposed on the active layer 115. For example, in the case where the light emitting diode ED emits blue light or green light, the second semiconductor layer 113 can include a semiconductor material having the following chemical formula: Al x Ga y In 1-x-yN (0≤x≤2, 0≤y≤1, 0≤x+y≤1). For example, the second semiconductor layer 113 can be at least one semiconductor material among p-type doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The second semiconductor layer 113 can be doped with a p-type dopant such as Mg, Zn, Ca, Se, and Ba. The second semiconductor layer 113 can be p-GaN doped with p-type Mg. The length of the second semiconductor layer 113 can be in, but not limited to, a range of about 0.05 μm to about 0.10 μm.

[0173] Each of the first semiconductor layer 111 and the second semiconductor layer 113 can be, but is not limited to, composed of a single layer. For example, each of the first semiconductor layer 111 and the second semiconductor layer 113 can have a plurality of layers including a cladding layer or a tensile-strained barrier reduction (TSBR) layer.

[0174] The active layer 115 can be disposed between the first semiconductor layer 111 and the second semiconductor layer 113. The active layer 115 can include a material having a single or multiple quantum well structure. In a case where the active layer 115 includes a material having a multiple quantum well structure, quantum layers and well layers can be alternately stacked on each other. As electron-hole pairs are combined in the active layer 115 in response to an electrical signal applied through the first semiconductor layer 111 and the second semiconductor layer 113, the active layer 115 can emit light. For example, in a case where the active layer 115 emits blue light, it can include a material such as AlGaN, AlGaInN, or a combination thereof. In a case where the active layer 115 has a multiple quantum well structure in which quantum layers and well layers can be alternately stacked on each other, the quantum layers can include AlGaN, AlGaInN, etc., or a combination thereof, and the well layers can include GaN, AlInN, etc., or a combination thereof. The active layer 115 can include AlGaInN as a quantum layer and AlInN as a well layer to emit blue light.

[0175] In another embodiment, the active layer 115 can have a structure in which a semiconductor material having a large band gap energy and a semiconductor material having a small band gap energy can be alternately stacked on each other, and can include a group III to group V semiconductor material depending on a wavelength range of emitted light. The light emitted from the active layer 115 is not limited to blue light. In some implementations, the active layer 115 can emit red light or green light. The length of the active layer 115 can be in, but not limited to, a range of about 0.05 μm to about 0.10 μm.

[0176] The light emitted from the active layer 115 can be emitted in a longitudinal direction of the light emitting diode ED and through both side surfaces. The directionality of the light emitted from the active layer 115 can not be limited.

[0177] Electrode layer 117 may be an ohmic contact electrode. As another example, electrode layer 117 may be a Schottky contact electrode. A light-emitting diode (ED) may include at least one electrode layer 117. Where the ED can be electrically connected to an electrode or contact electrode CTE, electrode layer 117 may reduce the resistance between the ED and the electrode or contact electrode CTE. Electrode layer 117 may include a conductive metal. For example, electrode layer 117 may include at least one of aluminum (Al), titanium (Ti), indium (In), gold (Au), silver (Ag), indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO). Electrode layer 117 may include a semiconductor material doped with n-type or p-type impurities.

[0178] The insulating layer 118 may surround the outer surfaces of the semiconductor layer and the electrode layer. The insulating layer 118 may surround the outer surface of the active layer 115 and may extend in the direction in which the light-emitting diode ED can extend. The insulating layer 118 may protect the light-emitting diode ED. For example, the insulating layer 118 may surround the side surface of the light-emitting diode ED and may expose both ends of the light-emitting diode ED in the longitudinal direction.

[0179] Insulating layer 118 may include a material with insulating properties, such as silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon oxynitride (SiO) x N y The insulating layer 118 is made of aluminum nitride (AlN), aluminum oxide (Al2O3), or a combination thereof. Therefore, the insulating layer 118 prevents electrical short circuits that may occur when the active layer 115 comes into contact with the electrodes through which electrical signals can be transmitted to the light-emitting diode (ED). Because the insulating layer 118 protects the outer surface of the light-emitting diode (ED), including the active layer 115, it prevents a decrease in luminous efficiency.

[0180] The outer surface of the insulating layer 118 can be surface-treated. The light-emitting diodes (EDs) can be dispersed in ink, and the ink can be sprayed onto the electrodes so that the EDs can be aligned during the manufacturing process of the display device 10. The insulating layer 118 can be surface-treated to make it hydrophobic or hydrophilic, and thus the EDs can be dispersed in the ink without agglomerating together.

[0181] Figure 7 This is a schematic plan view showing the coupling structure of a splicing display according to an embodiment of the present disclosure. Figure 8 It is along Figure 7 A schematic cross-sectional view taken by line III-III'. In the following description, elements identical to those described above will be briefly described or omitted.

[0182] refer to Figure 7 and Figure 8 A video wall display TD may include multiple display devices 10, coupling members 20, and covering members 30. For example, according to Figure 7 In an embodiment, the video wall display TD may include a first display device 10-1 to a fourth display device 10-4 (hereinafter referred to as... Figure 1 (The display device 10 is indicated by the label), but the number of display devices 10 is not limited to four. The number of display devices 10 can be determined according to the size of the display devices 10 and the video wall display TD.

[0183] Each of the plurality of display devices 10 may include a substrate 100, a buffer layer BF, a display layer DPL, an encapsulation layer ENC, a metal layer MSK, a protective film PF, a pad electrode PD, a connection film ACF, a flexible film 210, and a source driver 220.

[0184] The substrate 100 may be a matrix substrate or a matrix component and may be made of an insulating material such as a polymer resin. For example, the substrate 100 may be a flexible substrate that can be bent, folded, or rolled up. The substrate 100 may include, but is not limited to, polyimide (PI).

[0185] The substrate 100 may include a display portion DP, a bent portion BP, and a pad portion PP.

[0186] The display portion DP can correspond to the display area DA of the display device 10. The thin-film transistor layer (TFTL), light-emitting element layer (EML), wavelength conversion layer (WLCL), color filter layer (CFL), and encapsulation layer (ENC) of the display device 10 can be sequentially stacked on the display portion DP. Therefore, the display portion DP can support the display layer DPL of the display device 10.

[0187] The curved portion BP can extend from one side of the display portion DP. The curved portion BP can be positioned between the display portion DP and the pad portion PP. The thickness of the curved portion BP can be less than the thickness of the display portion DP or the pad portion PP. The lower end of the curved portion BP can be recessed from the lower end of the display portion DP or the lower end of the pad portion PP. The lower end of the curved portion BP can have a level difference with the lower end of the display portion DP or the lower end of the pad portion PP. The display device 10 can include a curved portion BP with a thickness less than that of the display portion DP or the pad portion PP, thereby reducing the bending stress of the curved portion BP. Each display device 10 can include a curved portion BP that can be recessed from the display portion DP or the pad portion PP, thereby reducing the distance between the display devices 10. As a result, non-display areas or boundaries between the display devices 10 can be prevented from being perceived.

[0188] The bending portion BP can be formed by removing a lower portion of the substrate 100 between the display portion DP and the pad portion PP. For example, the bending portion BP can be formed by removing the lower portion of the substrate 100 through a dry etching process. However, it is understood that the present disclosure is not limited thereto. By using a dry etching process, the bending portion BP can be accurately formed without removing a portion of the display portion DP and the pad portion PP. The bending portion BP can be etched using a process gas satisfying the etching characteristics of the substrate 100 and a high-frequency power source. The bending portion BP can be etched through a physical or chemical reaction between electrons or ions generated in a plasma state of the process gas and the substrate 100.

[0189] The shape and area of the bending portion BP when viewed from the top can be determined by the metal layer MSK. During a process of forming the bending portion BP, the metal layer MSK can be used as a mask. Accordingly, the metal layer MSK can be used as a mask for determining the shape and area of the bending portion BP when viewed from the top.

[0190] The buffer layer BF, the gate insulating layer GI, the interlayer dielectric layer ILD, and the first passivation layer PAS1 can be sequentially stacked on the bending portion BP. The bending portion BP can support a connection line (not shown) connecting the pad electrode PD disposed on the pad portion PP to the thin film transistor TFT disposed on the display portion DP. The connection line can be disposed on the gate insulating layer GI or the interlayer dielectric layer ILD. For example, the connection line can be disposed on the same layer as the gate electrode GE, the source electrode SE, or the drain electrode DE of the thin film transistor TFT. The connection line can be electrically connected to the data line to supply a data voltage, and can be electrically connected to the scan line to supply a scan signal. For example, the connection line CWL can be formed on the same layer as and made of the same material as the source electrode SE or the drain electrode DE of the thin film transistor TFT. Accordingly, the connection line can connect the pad electrode PD to the gate electrode GE, the source electrode SE, or the drain electrode DE of the thin film transistor TFT.

[0191] The pad portion PP can be disposed at an edge of the substrate 100. Since the bending portion BP can be bent, the pad portion PP can overlap the display portion DP in a thickness direction or a Z-axis direction. The buffer layer BF, the gate insulating layer GI, the interlayer dielectric layer ILD, and the first passivation layer PAS1 can be sequentially stacked on the pad portion PP. The pad portion PP can support the pad electrode PD disposed on the first passivation layer PAS1. The connection line passing through the bending portion BP can extend to the pad portion PP and can be electrically connected to the pad electrode PD through a contact hole.

[0192] The metal layer MSK can be disposed on a lower surface of the substrate 100. The metal layer MSK can be disposed on another surface of the display portion DP opposite to a surface on which the display layer DPL can be disposed. The metal layer MSK can be disposed on another surface of the pad portion PP opposite to a surface on which the pad electrode PD can be disposed. The metal layer MSK can be disposed on a lower surface of the display portion DP and a lower surface of the pad portion PP before the bending portion BP can be formed.

[0193] The metal layer MSK can include a metal oxide that can be resistant to dry etching. An etching rate of the metal layer MSK can be lower than an etching rate of the substrate 100. Since the metal layer MSK can be resistant to dry etching, it can be used as a mask during a process of forming the bending portion BP. The metal layer MSK can determine a position, a planar shape, and a size of the bending portion BP. The metal layer MSK can determine an area to be etched during a process of etching a lower portion of the substrate 100. For example, the metal layer MSK can be used as a mask for etching the lower portion of the substrate 100 during a dry etching process. The metal layer MSK can be formed of a metal thin film including aluminum (Al), copper (Cu), nickel (Ni), ferrite, silver (Ag), or a combination thereof, but is not limited thereto.

[0194] The metal layer MSK can release heat generated inside the display device 10 to the outside. A thermal conductivity of the metal layer MSK can be higher than a thermal conductivity of the substrate 100. In a case where heat generated in the thin film transistor layer TFTL or the light emitting element layer EML is transferred through the substrate 100, the metal layer MSK can release the heat to the outside of the display device 10.

[0195] Accordingly, since the display device 10 can include the metal layer MSK, the bending portion BP can be formed without using a separate mask, so that a processing step and a process time can be reduced. The display device 10 can not include a separate heat dissipation layer, so that a thickness of the display device 10 can be reduced and manufacturing costs can be saved. Since the display device 10 can include the metal layer MSK, a thickness of the display device 10 can be reduced compared to a display device including a separate heat dissipation layer, thereby preventing layer separation in a case where the bending portion BP is bent.

[0196] A protective film PF can be disposed on the metal layer MSK. The protective film PF can be disposed on the metal layer MSK covering the display portion DP and on the metal layer MSK covering the pad portion PP. Since the bending portion BP can be bent, a portion of the protective film PF covering the metal layer MSK corresponding to the display portion DP and another portion of the protective film PF covering the metal layer MSK corresponding to the pad portion PP can face each other. The protective film PF corresponding to the pad portion PP can be attached to a lower surface of the protective film PF corresponding to the display portion DP by the adhesive member AM. The protective film PF corresponding to the pad portion PP can be attached to the lower surface of the protective film PF corresponding to the display portion DP so that it can be fixed and supported. Since the bending portion BP can be bent, the protective film PF can protect the metal layer MSK and the substrate 100 overlapping in the thickness direction or Z-axis direction.

[0197] A pad electrode PD can be disposed on the pad portion PP. The buffer layer BF, the gate insulating layer GI, the interlayer dielectric layer ILD, the first passivation layer PAS1, and the pad electrode PD can be sequentially stacked on the pad portion PP. The pad electrode PD can be exposed on the first passivation layer PAS1 and can be electrically connected to the connection line passing through the bending portion BP through the contact hole.

[0198] A connection film ACF can attach the flexible film 210 to the pad electrode PD. A surface of the connection film ACF can be attached to the pad electrode PD, and an opposite surface of the connection film ACF can be attached to the flexible film 210. For example, the connection film ACF can cover the entire pad electrode PD, but the present disclosure is not limited thereto.

[0199] The connection film ACF can include an anisotropic conductive film. In the case where the connection film ACF includes the anisotropic conductive film, the connection film ACF can have conductivity in an area in which the pad electrode PD and the contact pad of the flexible film 210 can contact each other, and can electrically connect the flexible film 210 to the pad electrode PD.

[0200] The flexible film 210 can be disposed on the pad portion PP. One side of the flexible film 210 can be electrically connected to the pad electrode PD, and the other side of the flexible film 210 can be electrically connected to a source circuit board (not shown). The flexible film 210 can transmit a signal from the source driver 220 to the display device 10. For example, the source driver 220 can be an integrated circuit (IC). The source driver 220 can convert digital video data into an analog data voltage according to a source control signal from a timing controller, and can supply the same to a data line of the display area DA through the flexible film 210.

[0201] The coupling member 20 can be disposed between every two display apparatuses 10 to couple side surfaces of adjacent display apparatuses 10 to each other. The coupling member 20 can be connected between side surfaces of the first to fourth display apparatuses 10-1 to 10-4 arranged in a lattice pattern to implement the tiled display TD. The coupling member 20 can couple side surfaces of the base 100 and the encapsulation layer ENC of each display apparatus 10 to side surfaces of the base 100 and the encapsulation layer ENC of an adjacent display apparatus 10. In Figure 8 particular, the coupling member 20 can couple a side surface of the encapsulation layer ENC, a side surface of the base 100, a side surface of the metal layer MSK, and a side surface of the protective film PF of the first display apparatus 10-1 to a side surface of the encapsulation layer ENC, a side surface of the base 100, a side surface of the metal layer MSK, and a side surface of the protective film PF of the second display apparatus 10-2.

[0202] For example, the coupling member 20 can be made of an adhesive or a double-sided tape having a relatively thin thickness, thereby reducing a gap between the plurality of display apparatuses 10. As another example, the coupling member 20 can be implemented as a coupling frame having a relatively small thickness so that a gap between the display apparatuses 10 can be reduced. Accordingly, the tiled display TD can prevent a viewer from recognizing a non-display area NDA or a boundary between the plurality of display apparatuses 10.

[0203] The covering member 30 can be disposed on upper surfaces of the plurality of display apparatuses 10 and the coupling member 20 to cover the plurality of display apparatuses 10 and the coupling member 20. For example, the covering member 30 can be disposed on an upper surface of the encapsulation layer ENC of each of the plurality of display apparatuses 10. The covering member 30 can protect an upper surface of the tiled display TD.

[0204] Figure 9 FIG. 1 is a schematic sectional view illustrating a first processing step during a process of manufacturing a display apparatus according to an embodiment of the disclosure.

[0205] Referring to Figure 9 The base 100 can be a base substrate or a base member, and can be made of an insulating material such as a polymer resin. For example, the base 100 can be a flexible base that is bendable, foldable, or rollable. The base 100 can include, but is not limited to, polyimide (PI). The base 100 can include a display portion DP and a pad portion PP.

[0206] The display portion DP can correspond to a display area DA of the display apparatus 10. The thin film transistor layer TFTL, the light emitting element layer EML, the wavelength conversion layer WLCL, the color filter layer CFL, and the encapsulation layer ENC of the display apparatus 10 can be sequentially stacked on the display portion DP. Accordingly, the display portion DP can support a display layer DPL of the display apparatus 10.

[0207] The pad portion PP can be disposed at an edge of the base 100. The pad portion PP can be spaced apart from the display portion DP. The buffer layer BF, the gate insulating layer GI, the interlayer dielectric layer ILD, the first passivation layer PAS1, and the pad electrode PD can be sequentially stacked on the pad portion PP. The pad portion PP can support the pad electrode PD disposed on the first passivation layer PAS1. The pad portion PP can be connected to the thin film transistor TFT disposed on the display portion DP by a connection line.

[0208] Figure 10 is a schematic cross-sectional view illustrating a second processing step during a process of manufacturing a display device according to an embodiment of the disclosure.

[0209] Referring to Figure 10 The encapsulation layer ENC of the display device 10 can be located on the carrier substrate CS. The carrier substrate CS can temporarily support the display device 10 during a process of etching the base 100. In a case where the encapsulation layer ENC of the display device 10 can be located on the carrier substrate CS, another surface of the base 100, which can be opposite to a surface facing the display layer DPL, can be exposed.

[0210] The metal layer MSK can be disposed on another surface of the display portion DP, which can be opposite to a surface facing the display layer DPL, and can be disposed on another surface of the pad portion PP, which can be opposite to a surface facing the pad electrode PD. A material forming the metal layer MSK can be applied on another surface of the base 100 and be patterned. For example, the material forming the metal layer MSK can be disposed on another surface of the base 100 and can be patterned using a photoresist process.

[0211] For example, the material forming the metal layer MSK can be a negative photoresist. The material forming the metal layer MSK can be placed on the entire another surface of the base 100, and a mask member can be disposed outside a location where the metal layer MSK is to be formed. In a case where light can be irradiated onto the mask member and the metal layer MSK, regions other than the metal layer MSK can be dissolved so that the metal layer MSK can be formed.

[0212] As another example, the material forming the metal layer MSK can be a positive photoresist. A mask member can be disposed at a location where the metal layer MSK is to be formed. In a case where light can be irradiated onto the mask member and the metal layer MSK, regions other than the metal layer MSK can be dissolved so that the metal layer MSK can be formed.

[0213] The metal layer MSK can include a metal oxide that can resist dry etching. The etching rate of the metal layer MSK can be lower than the etching rate of the substrate 100. Since the metal layer MSK can resist dry etching, it can be used as a mask during a process of forming the bending portion BP. The metal layer MSK can determine the position, planar shape, and size of the bending portion BP. The metal layer MSK can determine an area to be etched during a process of etching the lower portion of the substrate 100. For example, the metal layer MSK can be used as a mask for etching the lower portion of the substrate 100 during a dry etching process. The metal layer MSK can include, but is not limited to, a metal such as aluminum (Al), copper (Cu), or a combination thereof.

[0214] Figure 11 FIG. 4 is a schematic cross-sectional view illustrating a third processing step during a process of manufacturing a display device according to an embodiment of the present disclosure.

[0215] Referring to Figure 11 , the bending portion BP of the substrate 100 can be formed by removing the lower portion of the substrate 100 between the display portion DP and the pad portion PP. For example, the bending portion BP can be formed by removing the lower portion of the substrate 100 via a dry etching process. However, it should be understood that the present disclosure is not limited thereto. The thickness of the bending portion BP can be less than the thickness of the display portion DP or the thickness of the pad portion PP. The lower end of the bending portion BP can be recessed from the lower end of the display portion DP or the lower end of the pad portion PP.

[0216] The shape and area of the bending portion BP when viewed from the top can be determined by the metal layer MSK. The metal layer MSK can be used as a mask during a process of forming the bending portion BP. Accordingly, the metal layer MSK can be used as a mask for determining the shape and area of the bending portion BP when viewed from the top. The carrier substrate CS illustrated in FIG. 4 can be removed after the bending portion BP has been etched. Figure 10

[0217] By using a dry etching process, the bending portion BP can be accurately formed without removing a portion of the display portion DP and the pad portion PP. The bending portion BP can be etched using a process gas and a high-frequency power that satisfy the etching characteristics of the substrate 100. The bending portion BP can be etched by a physical or chemical reaction between electrons or ions generated in a plasma state of the process gas and the substrate 100.

[0218] A protective film PF can be disposed on the metal layer MSK. The protective film PF can be disposed on the metal layer MSK covering the display portion DP and the metal layer MSK covering the pad portion PP.

[0219] Figure 12 ​is a schematic cross-sectional view illustrating a fourth processing step during a process of manufacturing a display device according to an embodiment of the present disclosure.

[0220] Referring to Figure 12 The flexible film 210 can be attached to the pad electrode PD through the connection film ACF. One side of the flexible film 210 can be electrically connected to the pad electrode PD, and the other side of the flexible film 210 can be electrically connected to the source circuit board. Once the flexible film 210 has been electrically connected, the bending portion BP can be bent. Since the bending portion BP can be bent, the pad portion PP can overlap the display portion DP in the thickness direction or Z-axis direction.

[0221] Since the bending portion BP can be bent, a portion of the protective film PF of the cover metal layer MSK corresponding to the display portion DP and another portion of the protective film PF of the cover metal layer MSK corresponding to the pad portion PP can face each other. The protective film PF corresponding to the pad portion PP can be attached to the lower surface of the protective film PF corresponding to the display portion DP through the adhesive member AM. The protective film PF corresponding to the pad portion PP can be attached to the lower surface of the protective film PF corresponding to the display portion DP so that it can be fixed and supported. Since the bending portion BP can be bent, the protective film PF can protect the metal layer MSK and the substrate 100 overlapping in the thickness direction or Z-axis direction.

[0222] While embodiments of the present application have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the application as disclosed in the following claims and its equivalents.

Claims

1. A tiled display, wherein, The tiled display includes: display devices each including a substrate including a display portion, a pad portion, and a bending portion between the display portion and the pad portion; coupling members for coupling the display devices to each other; and a cover member for covering the display devices and the coupling members, wherein each of the display devices includes: a display layer disposed on a first surface of the display portion, the display layer including a pixel; a pad electrode disposed on a first surface of the pad portion; and a metal layer disposed on a second surface of the display portion and a second surface of the pad portion, the second surface of the display portion being opposite to the first surface of the display portion, and the second surface of the pad portion being opposite to the first surface of the pad portion, wherein a thickness of the bending portion is smaller than at least one of a thickness of the display portion and a thickness of the pad portion, and a planar shape of the bending portion is determined by the metal layer, and in a case where the bending portion is bent, the pad portion overlaps the display portion in a thickness direction, and the coupling member overlaps the bending portion of one of the display devices.

2. The tiled display according to claim 1, wherein the metal layer includes a dry-etch resistant metal oxide, and an etching rate of the metal layer is lower than an etching rate of the substrate.

3. The tiled display of claim 1, wherein, a thermal conductivity of the metal layer is higher than a thermal conductivity of the substrate, and / or, wherein the substrate includes an insulating material, and the insulating material includes a polymer resin or a polyimide.

4. The tiled display of claim 1, wherein, the bending portion of each of the display devices overlaps the coupling member in the thickness direction.

5. The tiled display of claim 1, wherein, each of the display devices further includes a protective film covering the metal layer disposed on the second surface of the display portion and the metal layer disposed on the second surface of the pad portion, wherein a portion of the protective film covering the metal layer disposed on the second surface of the display portion and another portion of the protective film covering the metal layer disposed on the second surface of the pad portion face each other, wherein each of the display devices further includes an adhesive member, the portion of the protective film being attached to the other portion of the protective film by the adhesive member in a case where the bending portion is bent.

6. The tiled display of claim 1, wherein, the display layer includes: a thin film transistor layer disposed on the display portion and including at least one thin film transistor; a light emitting element layer disposed on the thin film transistor layer and including a light emitting element electrically connected to the at least one thin film transistor; a wavelength conversion layer disposed on the light emitting element layer and including a wavelength conversion portion overlapping the light emitting element; and a color filter layer disposed on the wavelength conversion layer and including a color filter overlapping the wavelength conversion portion, wherein each of the display devices further includes an encapsulation layer covering an upper surface and side surfaces of the display layer, and The coupling member is disposed between the encapsulation layers of adjacent display devices of the display device.

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