Drive circuit for switches used in charge pumps

Abstract

The power converter includes a charge pump in which transistors switch between an on state and a non-conducting state, thereby interconnecting the pump capacitors in different arrangements at different times. Among the transistors, one transistor transitions to the on state when its source and gate are at equal potentials.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to U.S. Patent Application No. 16 / 402,874, filed May 3, 2019, entitled “Driving Circuit for Switches Used in a Charge Pump,” the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] This invention relates to power conversion, and more particularly to charge pumps. Background Technology

[0004] In a typical charge pump, a set of switches in a switching network interconnects the pump capacitors to form different capacitor networks at different times. By switching between different capacitor networks, the input voltage can be transformed into the output voltage. This type of network is often referred to as a "switched capacitor network".

[0005] Switching is typically implemented using field-effect transistors (FETs), which can switch between an on and off state by enhancing and depleting an inversion layer between two similarly doped semiconductor regions. To induce this switch, an electric field is typically present in the oppositely doped semiconductor region between the two similarly doped regions. These two similarly doped regions are typically referred to as the "source" and "drain." The oppositely doped region is typically referred to as the "channel."

[0006] To control the electric field, a conductive metal plate is typically placed on the oxide layer covering the channel region. This plate is usually called the "gate terminal." By depositing and removing charge on this gate terminal, the electric field within the channel region can be controlled. The circuit responsible for rapidly depositing and removing this charge at specific times is the "driver."

[0007] Generally, when no voltage is applied, there is no inversion layer connecting the source and drain. Therefore, charge carriers face a significant barrier when attempting to cross the channel. This means there is no significant conduction between the source and drain. When this occurs, the transistor is turned on. In this state, the switch is referred to as "off" or "turn-off".

[0008] To allow conduction, a voltage must be applied to the gate terminal. This voltage generates an electric field that displaces majority carriers, thus stripping the layer near the gate terminal. Charge carriers from the source can then enter this stripped layer and travel from the source to the drain. Because this layer is now filled with carriers that are minority carriers from the perspective of the gate—a carrier inversion—it is referred to herein as an "inversion layer." When this occurs, the transistor conducts. In this state, the switch is referred to as "closed" or "on."

[0009] In the transistor described above, the switch is open by default. Such a transistor is called a "normally open" transistor. In this case, a voltage needs to be applied to close the switch.

[0010] However, there are also transistors with the opposite characteristics. In these transistors, the switch is closed by default. Such transistors are called "normally on". To open the switch, a voltage needs to be applied. Such transistors require different types of drive circuits. Summary of the Invention

[0011] This invention is characterized by a charge pump for power conversion. The charge pump includes switches interconnecting capacitors, wherein at least one of the switches is implemented by a transistor that is closed or on by default and must be turned off or turned off by applying a suitable gate voltage.

[0012] In one aspect, the invention features a power converter in which the charge pump includes a switching network for interconnecting pump capacitors. A controller causes transistors implementing the switching network to switch between an on state and a non-conducting state, thereby causing the pump capacitors to be interconnected in different arrangements at different times. The first transistor of these transistors switches to the on state when its source and gate are at equal potentials.

[0013] In some implementations, the switching network includes a transistor configured to selectively ground the cathode of the pump capacitor and a transistor configured to interconnect the anodes of the pump capacitor. The former transistor defines a grounded switch, and the latter transistor defines a floating switch.

[0014] Some implementations include a gate driver whose output is connected to the gate of a first transistor, wherein the source of the first transistor is connected to a power supply for the gate driver.

[0015] Similarly, among these embodiments, there is one in which the source potential of the first transistor is floated relative to ground during charge pump operation. This means that the source potential relative to ground changes over time during charge pump operation.

[0016] In some implementations, a gate driver connected to the gate of the first transistor de-conducts the first transistor. This is achieved by applying a voltage to the gate of the first transistor. The value of this voltage varies over time as the power converter switches between different arrangements of interconnected pump capacitors during its operation.

[0017] Similarly, in these embodiments, the power converter has two dies made of different semiconductors. The first die includes a first transistor, and the second die includes a drive circuit for driving the first transistor. A communication link exists between the first die and the second die.

[0018] Among these multi-die implementations, there are implementations in which the first die is silicon-free and the second die includes silicon. Similarly, among these implementations, there are implementations in which the first die is formed from a substrate other than silicon, and implementations in which the second die is formed from a silicon substrate.

[0019] Similarly, among these multi-die implementations, there are embodiments where the transistors of the switching network are on the first die, and the controller, gate driver, and level shifter for operating the transistors are all on the second die. Such implementations can be characterized by dies made of different semiconductors. In some of these cases, one die is a silicon die, while the other is a silicon-free die. In other cases, one die is made of a silicon substrate, while the other die is made of a substrate other than silicon.

[0020] Similarly, among these multi-die implementations, there is an implementation in which the first die includes a transistor having the characteristic of being able to conduct between its source and drain even when no voltage is applied to its gate, and the characteristic of suppressing conduction between its source and drain when a suitable voltage is applied to its gate.

[0021] Of course, not all implementations require two dies. The subject matter described and claimed herein can also be implemented on a single die. In a particular single-die implementation, the die includes both a first transistor and a first driving circuit for driving the first transistor.

[0022] Alternatively, the subject matter described and claimed herein can be implemented on three dies. Some embodiments can be implemented on four, five, or even six dies. In fact, the subject matter described herein can be implemented on any number of dies.

[0023] In other embodiments, the driver includes a voltage regulator that causes the driver's output voltage to vary in response to a change in the source voltage of the first transistor measured relative to ground. Among these drivers, there are those where the voltage across a bias capacitor controls the offset between the gate and source voltages of the first transistor when the first transistor is de-conducted. Among these embodiments, there are those where the regulator includes a stable DC voltage source with low series impedance connected in parallel across the bias capacitor. In some embodiments, a Zener diode implements such a source, wherein the breakdown voltage of the Zener diode is used as the desired stable DC voltage.

[0024] Similarly, among these embodiments, there are implementations in which the regulator includes a shunt device connected to a bias capacitor. An operational amplifier connected to the gate of the shunt device controls how much current flows through the gate, and controls this in a way that maintains a sufficient voltage across the bias capacitor. These embodiments include things for controlling the shunt device, such as shunt regulators. Among various shunt regulators, there are shunt modulators in which a differential amplifier provides a control signal for adjusting the current through the shunt device. The differential amplifier includes a first input and a second input, which define a voltage difference that varies in response to a change in the voltage across the bias capacitor.

[0025] Alternatively, the shunt device and differential amplifier can be replaced with source followers. An example is a bias circuit system that controls a shunt device connected to a bias capacitor based on changes in the source voltage of a first transistor.

[0026] In other embodiments, the driver for driving the first transistor includes a switched capacitor circuit in which the voltage across the first capacitor controls the voltage difference between the source and gate of the first transistor, and a second capacitor replenishes the charge on the first capacitor as needed to maintain the desired voltage. The switched capacitor circuit also includes a switch for connecting and disconnecting the first and second capacitors from each other.

[0027] In other embodiments, the driver for driving the first transistor includes a switched capacitor circuit in which the voltage across the first capacitor controls the voltage difference between the source and gate of the first transistor, and a second capacitor replenishes the charge on the first capacitor as needed to maintain the desired voltage. In this embodiment, a switch is configured to connect and disconnect the first and second capacitors from each other, and to connect and disconnect the second capacitor from an external voltage source.

[0028] In other embodiments, the charge pump includes an internal node maintained at an intermediate voltage. These embodiments include a driver for driving a first transistor using a switched capacitor circuit comprising a first capacitor and a second capacitor. The voltage across the first capacitor controls the voltage difference between the source and gate of the first transistor, and the second capacitor is connected to the node to obtain charge for replenishing the first capacitor as needed to maintain a desired voltage across the first capacitor.

[0029] In other embodiments, the charge pump includes an internal node at an intermediate voltage. These embodiments include a driver for using a switched capacitor circuit to drive a first transistor. The switched capacitor circuit includes a first capacitor, a second capacitor, and a third capacitor. The voltage across the first capacitor controls the voltage difference between the source and gate of the first transistor, the second capacitor is connected to the node to obtain charge for replenishing the first capacitor as needed to maintain a desired voltage across the third capacitor, and the third capacitor replenishes the charge on the first capacitor.

[0030] The embodiments also include an embodiment in which an inductor is connected to a charge pump such that the amount of charge on at least one of the pump capacitors changes when charge passes through the inductor, and an embodiment in which an LC circuit is connected to the charge pump.

[0031] In other embodiments, different arrangements interconnect the pump capacitors to form at least two charge transfer paths that exist at different times during the operation of the switching network. In such embodiments, the charge transfer paths do not coexist simultaneously. Typically, a charge transfer path will begin to exist for a period of time and then cease to exist. This is followed by a brief dead time during which no charge transfer path exists. After the dead time has passed, the switching network subsequently introduces a new charge transfer path.

[0032] The accompanying description and background describe certain aspects of the physical mechanism of the device, which may help in understanding the subject matter recounted in the claims. However, it is important to remember that the subject matter of the claimed invention exists independently and separately from the description of the basic physical mechanism of the device and is in no way dependent on the veracity of that description. This is a natural consequence of the fundamental epistemological fact that all such descriptions are based solely on experimentally verifiable models of basic physical reality; therefore, all explanations based on physical mechanisms are necessarily subject to error, and the history of scientific progress is essentially a history of correcting such errors.

[0033] These and other features of the invention will become apparent from the following detailed description and accompanying drawings, in which: Attached Figure Description

[0034] Figure 1A 2:1 power converter is shown that uses interconnected capacitors to perform voltage transformation;

[0035] Figure 2 It shows the method for driving from Figure 1 Details of the driver for the switch of the power converter shown;

[0036] Figure 3 It shows dependence on and prevention of transmission from Figure 1 The normally-on transistor is combined with the Zener diode driver;

[0037] Figure 4 This demonstrates the reliance on a shunt regulator to prevent power loss from... Figure 1 A driver that turns on a normally-on transistor;

[0038] Figure 5 This demonstrates the reliance on source followers to prevent interference from sources. Figure 1 A driver that turns on a normally-on transistor;

[0039] Figure 6 This demonstrates the reliance on switched capacitors to prevent transmission from... Figure 1 The selector driver that enables the conduction of the normally-on transistor; and

[0040] Figure 7 This demonstrates the reliance on a pair of switched capacitors to prevent interference from... Figure 1 The alternative driver for the conduction of the normally-on transistor. Detailed Implementation

[0041] Figure 1 A power converter 10 including a charge pump 12 is shown. The charge pump 12 includes a first pump capacitor 14 and a second pump capacitor 16 interconnected via a first ground switch 18 and a second ground switch 20, and a first float switch to a sixth float switch 22, 24, 26, 28, 30, 32.

[0042] Figure 1Further examples of power converters of the type shown are in U.S. Patent Nos. 8,860,396, 8,743,553, 8,723,491, 8,503,203, 8,693,224, 8,724,353, 8,619,445, 9,203,299, 9,742,266, 9,041,459, U.S. Publication No. 2017 / 0085172, and U.S. Patent No. 9, The contents of these U.S. patents and PCT publications are described in detail in U.S. Patent No. 887,622, U.S. Patent No. 9,882,471, PCT Publication No. WO2017161368, PCT Publication No. WO2017 / 091696, PCT Publication No. WO2017 / 143044, PCT Publication No. WO2017 / 160821, PCT Publication No. WO2017 / 156532, PCT Publication No. WO2017 / 196826, and U.S. Publication No. 2017 / 0244318, and are incorporated herein by reference in their entirety.

[0043] The charge pump 12 includes an additional circuit system for pre-charging the capacitor so that the charge pump can begin operation. For clarity, this circuit system has been omitted.

[0044] During operation, the first grounding switch 18 and the second grounding switch 20, as well as the first to sixth floating switches 22, 24, 26, 28, 30, and 32, are arranged to switch between switch arrangements. Each switch arrangement is defined by an open set of switches and a closed set of switches. Each switch arrangement exists for a period of time.

[0045] During its operation, the charge pump 12 transitions from a first switching arrangement to the next switching arrangement and eventually returns to the first switching arrangement. These transitions from the first switching arrangement through one or more next switching arrangements and back to the first switching arrangement will be repeated indefinitely during the operation of the charge pump.

[0046] The illustrated converter 10 has a first port 34 and a second port 36 at a first voltage and a second voltage. In the illustrated power converter 10, the ratio between these voltages is 2:1. However, the illustrated architecture can be easily extended to have a voltage ratio of N:1.

[0047] The two switches in the switch arrangement of charge pump 12 form two distinct charge transfer paths within charge pump 12. However, the methods and systems described herein can be used with charge pumps having arrangements that form more than two separate and distinct charge transfer paths during operation, as well as arrangements that rely solely on a single charge transfer path passing through the charge pump.

[0048] When charged, each pump capacitor 14, 16 stores energy within an electric field generated by the charge stored therein. The operation of the charge pump 12 involves moving the energy associated with this field between the pump capacitors 14, 16. Since this energy is generated by charge, one implementation is, for example, by simply connecting the two capacitors together to move charge from one capacitor to another. This causes one capacitor to discharge while simultaneously charging the other. Thus, the movement of charge causes energy to move from one capacitor to another.

[0049] However, this method of moving energy between capacitors causes losses. To reduce such losses, it is useful to extract energy from one capacitor and temporarily store it in a magnetic field. This stored magnetic energy can then be converted into electrical energy stored in another capacitor. The practical effect of doing so is to move electrical energy from one capacitor to another while avoiding the losses associated with the redistribution of charge between capacitors.

[0050] This form of energy transfer can be performed by strategically placing an inductor such that the charge transferred into and out of at least one capacitor is associated with a current flowing through the inductor. The inductor uses this current to support a magnetic field that stores the associated energy. This energy can then be recovered from the magnetic field and converted into electrical energy stored in the capacitor during a later stage of operation of the charge pump 12. In effect, the inductor creates a form of "magnetic flywheel" that recovers and recycles energy that would otherwise be lost during charge redistribution if not recovered and recycled.

[0051] Therefore, the power converter 10 shown includes an inductor 38 through which the charge can be passed by operation of the third to sixth float switches 26, 28, 30, 32. The charge passing through the inductor 38 is collected at a terminating capacitor 40 that maintains a relatively constant voltage.

[0052] The position of inductor 38 is chosen to ensure that a charge redistribution between pump capacitor 14 and pump capacitor 16 will cause current to flow through inductor 38. This allows inductor 38 to capture the energy associated with this charge redistribution and then release that energy at a later time. Furthermore, inductor 38 must have an inductance selected to avoid inducing resonance conditions that could be triggered by the operation of the third to sixth float switches 26, 28, 30, and 32.

[0053] The specific example of the power converter described herein features a first die 42 and a second die 50. However, this is merely an example. A power converter incorporating the principles described herein can be implemented on a single die. Alternatively, a power converter as described herein can be implemented in three or more dies.

[0054] The first die 42 carries switches 18 to 32. The second die 50 carries other circuitry for operating the charge pump 12. Examples of such circuitry include a drive circuit 44, a level shifter 46, and a controller 48. During operation of the power converter 10, the first die 42 and the second die 50 exchange input signal 52 and output signal 54. The second die 50 also includes an external interface 56 for exchanging digital signals with other devices.

[0055] Switches 18 to 32 can be implemented using various transistors. These include field-effect transistors (FETs) and junction transistors (JFETs). Examples of JFETs include bipolar junction transistors (BJTs). Examples of FETs include heterojunction transistors (HJTs) and homojunction transistors (JFETs). Examples of JFETs include high electron mobility transistors (HJMTs).

[0056] Various materials can be used as semiconductors. In some embodiments, the semiconductor is a single-element semiconductor, such as silicon or germanium. In other embodiments, the semiconductor is a compound semiconductor. Examples include silicon carbide, indium phosphate, gallium arsenide, gallium nitride, aluminum gallium nitride, and silicon germanium.

[0057] A transistor suitable for implementing one or more switches 18 to 32 is a transistor whose source and drain are conducting unless a voltage is applied to its gate to prevent conduction between its source and drain. Examples of suitable normally-on transistors include transistors with a junction between two dissimilar materials, and not just two different doped variants of the same material.

[0058] In some of these embodiments, the die has two regions made of two dissimilar materials adjacent to each other to form a junction. By properly arranging these two regions of dissimilar materials, a very thin layer filled with highly mobile electrons can be formed in the conduction band. These highly mobile electrons flow freely as if they were a gas. Thus, these highly mobile electrons form the basis for conduction between the source and drain of the transistor, provided that no voltage is applied to the gate terminal of the transistor to suppress such conduction.

[0059] In one embodiment, one of the dissimilar materials is a semiconductor crystal whose nodes are filled with gallium and arsenic atoms, and the other dissimilar material is a semiconductor crystal whose nodes are filled with gallium, aluminum, and arsenic atoms. These two regions are adjacent to each other to form a junction.

[0060] The foregoing example is one of many possible implementations of a transistor or electronic valve that allows current to flow unless a step is taken to stop the current flow. Such a device differs from a device through which no current flows—unless a step is taken to allow such current to flow. The circuits described herein are independent of the specific reasons why a device is in a normally-on state and are therefore applicable to all such devices, regardless of the underlying physical mechanisms that cause the device to behave this way.

[0061] In a power converter, it is useful that the switch within the charge pump 12 itself is implemented using transistors that provide high-mobility charge carriers to achieve high power efficiency. However, the additional circuitry used to control the charge pump 12 does not benefit much from this advantage. Therefore, it is difficult to justify the additional cost of such a switch. Therefore, considering the limitations of current manufacturing technology, it is useful to fabricate the second die 50 from a crystal whose nodes are silicon atoms. Compared to the transistors on the first die 42, the transistors on the second die 50 are of the type that do not support a conduction path between their respective sources and drains without a voltage applied to their corresponding gates.

[0062] The controller 48 causes switches 18 to 32 to open and close by displacing the first pump capacitor 14 and the second pump capacitor 16 in different configurations. Typically, the controller 48 does not communicate directly with switches 18 to 32. To open or close switches 18 to 32, the controller 48 sends a control signal to the drive circuit 44. It is this drive circuit 44 that ultimately causes charge to flow into or out of the gate region of the driven transistor to open or close switches 18 to 32.

[0063] Figure 2A gate driver 58 for driving a transistor 64, which will be referred to below as the "driven transistor" 64, is shown. The driving circuit 44 has as many gate drivers 58 as the driven transistor 64.

[0064] Gate driver 58 includes a control input 60 and a gate drive output 62. Control input 60 is connected to and receives control signals from controller 48. Gate drive output 62 is connected to the gate terminal of the driven transistor 64, which implements switches 18 to 32. In response to the control signal at its control input 60, gate driver 58 causes charge to flow toward or away from the gate terminal of the driven transistor 64, thereby switching the driven transistor 64 between an on state and a non-on state.

[0065] The charge must originate from somewhere. To supply this charge, the gate driver 58 is characterized by a first power terminal 66 and a second power terminal 68. The potential difference between the first power terminal 66 and the second power terminal 68 provides an electromotive force that can be used to place excess charge at the gate terminal of the driven transistor and thus place a voltage.

[0066] In order to make such a potential difference exist, it is useful to connect one of the two power terminals 66, 68 to the source of the driven transistor 64, and connect the other of the two power terminals 68, 66 to a voltage fixed at a certain offset relative to the source voltage.

[0067] In cases where the driven transistor 64 is a transistor for which a voltage needs to be applied to its gate to stop conduction between its source and drain, the source terminal of the driven transistor is connected to the first power terminal 66. This is Figure 2 The configuration shown. In all other cases, the source terminal of the driven transistor is connected to the second power terminal 68.

[0068] The constant voltage difference between the first power terminal 66 and the second power terminal 68 is generated by a bias capacitor 70, whose anode is connected to the first power terminal 66 and whose cathode is connected to the second power terminal 68. Therefore, the voltage across the bias capacitor 70 is a shift that maintains the constant potential difference between the first power terminal 66 and the second power terminal 68. This means that adjusting the voltage across the bias capacitor 70 is equivalent to adjusting the potential difference between the first power terminal 66 and the second power terminal 68.

[0069] During normal operation, the source voltage of the driven transistor varies between different values ​​relative to ground. Therefore, the voltage at the first power terminal 66, which is ultimately connected to the source of the driven transistor, also varies between different values ​​relative to ground. Because the bias capacitor 70 maintains the second power terminal 68 with a fixed offset relative to the first power terminal 66, the voltage at the second power terminal 68 also varies relative to ground. However, the voltage difference between the first power terminal 66 and the second power terminal 68 remains clamped to the same value as the voltage across the bias capacitor 70.

[0070] No additional circuitry is required for grounding switches 18 and 20. Ultimately, the source terminals of grounding switches 18 and 20 are grounded. Therefore, grounding switches 18 and 20 must have a constant source voltage. Thus, to de-conduct grounding switches 18 and 20, it is only necessary to connect the cathode of the bias capacitor to a negative power supply voltage. The magnitude of this negative power supply voltage is set to the desired offset between the gate voltage and the source voltage used to stop the driven transistor 64 from conducting. The anode of the bias capacitor 70 is grounded together with the source terminal of the driven transistor.

[0071] For floating switches 22 to 32, the drive circuit 44 relies on the voltage regulator 72 to adapt to changes in the source voltage of the driven transistor. The main difference between the various drive circuits 44 described herein lies in the details of the voltage regulator 72.

[0072] Figure 3 The diagram shows a drive circuit 44 in which the voltage regulator 72 relies on a stable DC voltage source with low series impedance. In the specific injection shown, a Zener diode 74 is used as the desired DC voltage source.

[0073] The cathode of the bias capacitor 70 is connected to a series resistor 76, which is connected in series with a voltage source 78 that maintains a negative voltage across its terminals. Thus, the voltage at the cathode of the bias capacitor is the negative voltage offset by the voltage drop associated with the series resistor 76.

[0074] With only the components identified so far, the voltage across the bias capacitor 70 will tend to vary over time. This is undesirable because a fixed offset between the gate and source voltages at the driven transistor 64 is required when the driven transistor 64 should be turned off.

[0075] To ensure this fixed offset, it is useful to connect the Zener diode 74 across the bias capacitor 70, with the Zener diode 74 operating in breakdown mode. This ensures that the voltage across the bias capacitor 70 remains related to the breakdown voltage of the Zener diode 74. The series resistor 76 and voltage source 78 ensure that a DC path is available for current flow to the Zener diode.

[0076] Therefore, during operation, when the controller 48 provides a control signal to the control input 60 to close the switch, the gate voltage will be equal to the source voltage. This is because the source terminal of the driven transistor 64 is short-circuited to the first power terminal 66 of the gate driver 58. This results in no voltage difference between the gate and source of the driven transistor. In this configuration, the driven transistor 64 is turned on.

[0077] When the controller 48 sends a signal to the control input 60 of the gate driver to turn off the switch, the gate voltage will be at a fixed offset from the source voltage because it has been clamped by the Zener diode 74. The resulting voltage difference between the gate and source of the transistor prevents the driven transistor 64 from turning on.

[0078] Although the specific implementation shown relies on Zener diode 74, Zener diode 74 can be replaced by any stable DC voltage source with low series impedance.

[0079] exist Figure 4 In the alternative drive circuit 44 shown, regulator 72 relies on a shunt regulator. This embodiment includes an RC resistor 82 and an RC capacitor 84 connected in parallel with the RC resistor 82. The RC resistor 82 and the RC capacitor 84 together define an RC circuit 86 connected between the first power terminal 66 and the inverting input 88 of the differential amplifier 90. Therefore, the voltage presented to the inverting input 88 is equal to the voltage at the first power terminal 66, but the voltage drop across the RC resistor 82 caused by the current drawn from the current source 94 is reduced.

[0080] Meanwhile, the non-inverting input 88 of the differential amplifier 90 is connected to the second power terminal 68.

[0081] Therefore, the differential amplifier 90 is subjected to a voltage difference controlled by the RC resistor 82 and a current flowing through the current source 94. This voltage difference provides the basis for the differential amplifier 90 to perform feedback control of the voltage across the bias capacitor 70.

[0082] The differential amplifier 90 has an output connected to the gate of a shunt device 92, which in this embodiment is implemented as an enhancement-mode field-effect transistor. The shunt device 92 is connected to the cathode of a bias capacitor 70 such that when the shunt device 92 is turned on, it discharges the bias capacitor 70.

[0083] When the differential amplifier 90 turns on the shunt device 92, charge flows out of the bias capacitor 70, thereby reducing the voltage across the bias capacitor 70. This provides a way to adjust the voltage across the bias capacitor 70. Therefore, the current source 94 and the shunt device 92 cooperate to form a voltage-controlled current source. The current through this voltage-controlled current source depends on the voltage supplied by the output of the differential amplifier.

[0084] The inverting input 88 of the differential amplifier is also connected to the current source 94. The voltage drop defined by the product of the current supplied by the current source 94 and the resistance of the RC resistor 82 sets the desired voltage difference across the bias capacitor 70. When the driven transistor 64 is not turned on, this voltage difference will ultimately set the voltage difference between the gate and source.

[0085] Meanwhile, the non-inverting input 96 of the differential amplifier 90 is connected to the cathode of the bias capacitor 70.

[0086] During operation, it can be seen that the differential amplifier adjusts the gate voltage of the shunt device 92 in an effort to ensure that the voltage difference between the inverting input and the non-inverting inputs 88, 96 is zero. This is equivalent to ensuring that the voltage across the bias capacitor 70 is equal to the voltage drop across the RC resistor 82 caused by the current drawn from the current source 94.

[0087] As long as the voltage difference between the inverting input and the non-inverting inputs 88, 96 is zero, the shunt device 92 remains open. Therefore, the voltage across the bias capacitor 70, which is already at the correct value, does not change. In all other cases, the differential amplifier 90 closes the shunt device 92 to allow the charge stored at the voltage across the bias capacitor 70 to change in such a way that the voltage difference between the inverting input and the non-inverting inputs 88, 96 is restored to zero. Once this occurs, the balance is restored, and the differential amplifier 90 closes the shunt device 92 again.

[0088] The bias capacitor 70 provides charge to turn off the driven transistor 64. The bias capacitor 70 also provides charge for any supply and bias current required to support the operation of the gate driver 58. In providing this charge, the bias capacitor 70 will naturally discharge itself. Therefore, the charge inevitably lost by the bias capacitor 70 during these operations must be replenished. The differential amplifier 90, shunt device 92, current source 94, RC resistor 82, and RC capacitor 84 all cooperate to define a shunt regulator that replenishes the charge lost by the bias capacitor 70 while performing its function.

[0089] By appropriately selecting the value of the voltage drop across the RC resistor 82, a set point for the voltage difference across the bias capacitor 70 can be established. This ensures that the gate voltage differs from the source voltage by the required amount when the driven transistor 64 is to be turned off.

[0090] Differential amplifier 90 and shunt device 92 define shunt regulator 98.

[0091] With the charge pump 12 having a 50% duty cycle for recharging the bias capacitor 70, the shunt regulator 98 can have a relatively low bandwidth. This is beneficial for the stability of the feedback loop. In some cases, the feedback loop can be completely omitted.

[0092] Components other than the driven transistor 64 and the bias capacitor 70 are integrated into the second die 50. In embodiments using high-density capacitors, it is possible to also integrate the bias capacitor 70. In some embodiments, the additional internal capacitor maintains a stable supply voltage during transient events.

[0093] Figure 5 The driving circuit 44 in which the regulator 72 depends on the source follower is shown.

[0094] The first power terminal 66 of the gate driver 58 is connected to both the anode of the bias capacitor 70 and the source of the driven transistor. The second power terminal 68 is connected to the cathode of the bias capacitor 70 and the shunt device 92, which acts as a source follower.

[0095] The drive circuit 44 also includes a parallel RC circuit 86 connected between the first power terminal 66 of the gate driver 58 and the gate of the shunt device 92. The parallel RC circuit 86 includes an RC resistor 82 connected in parallel with the RC capacitor 84. The gate of the shunt device 92 is also connected to a current source 94. The voltage drop defined by the product of the current from the current source and the resistance of the RC resistor 82 sets the desired voltage difference across the bias capacitor 70.

[0096] Both the RC circuit 86 and the anode of the bias capacitor 70 are connected to the same voltage. In this configuration, the sum of the voltage drop across the RC resistor 82 and the voltage drop between the gate and source of the shunt switch will equal the desired voltage drop across the bias capacitor 70. If the source voltage of the driven transistor 64 changes, the voltage presented to the gate terminal of the shunt device 92 and the voltage presented to the source terminal of the shunt device 92 will deviate. Therefore, the current through the shunt device 92 will change. This will allow the amount of charge on the bias capacitor 70 to change, thereby changing the voltage difference across the bias capacitor 70 until this voltage difference matches the voltage difference across the resistor 82 again. At this point, the gate voltage and source voltage presented to the shunt device 92 will again reach steady-state conditions.

[0097] By appropriately selecting the value of the voltage drop across the RC resistor 82, a set point for the voltage difference across the bias capacitor 70 can be established. This ensures that the gate voltage differs from the source voltage by the required amount when the driven transistor 64 is to be turned off.

[0098] like Figure 5The source follower drive circuit 44 shown is particularly useful for N:1 converters, where the intermediate voltage from charge pump 12 produces a lower bias voltage at shunt device 98, thereby facilitating the generation of a negative bias voltage at the cathode of bias capacitor 70 in response to its anode. This, in turn, generates a negative bias voltage to de-conduct the driven transistor 64. Current source 94 and RC resistor 82 cooperate to generate a bias voltage relative to an appropriate intermediate voltage in charge pump 12.

[0099] exist Figure 5 In the source follower drive circuit 44 shown, components other than the driven transistor 64 and the bias capacitor 70 are integrated into the second die 50. In embodiments using high-density capacitors, it is possible to also integrate the bias capacitor 70. In some embodiments, the additional internal capacitor maintains a stable supply voltage during transient events.

[0100] Figure 6 The alternative drive circuit 44 is shown, in which the first switch 100, the second switch 102, the third switch 104 and the fourth switch 106 cause the first storage capacitor 108 to alternate between collecting more charge and distributing charge to the bias capacitor 70 as needed.

[0101] Closing the first switch 100 connects the first storage capacitor 108 to the source of the driven transistor, to the first power terminal 66, and to the anode of the bias capacitor 70. Closing the second switch 102 connects the first storage capacitor 108 to the second power terminal 68 and to the cathode of the bias capacitor 70. Closing the third switch 104 connects the first storage capacitor 108 to a voltage source. Closing the fourth switch 108 grounds the first storage capacitor 106.

[0102] When the driven transistor 64 is turned on, the controller 48 closes the third switch 104 and the fourth switch 106 to replenish the first storage capacitor 108. This ensures that the storage capacitor 108 is ready with sufficient charge when it is invoked to take the action of ending conduction.

[0103] During the charge replenishment phase, the controller 48 disconnects the third switch 104 and the fourth switch 106, and then closes the first switch 100 and the second switch 102. This allows the first storage capacitor 108 to replenish the charge on the bias capacitor 70, thus ensuring that the voltage across the bias capacitor 70 is sufficient to drive the driven transistor 64 into a non-conducting state and maintain it in that state.

[0104] exist Figure 6 In the embodiment shown, the third switch 104 and the fourth switch 106 may need to be robust enough to maintain a high voltage. Figure 7The alternative capacitor-based drive circuit 44 shown eliminates this difficulty by drawing the power supply voltage from one of the intermediate voltages available within the charge pump 12. This comes at the cost of an additional capacitor.

[0105] exist Figure 7 The alternative drive circuit 44, which also relies on the switched capacitor circuit, includes a gate driver 58 having a control input 60, a gate drive output 62, a first power terminal 66, and a second power terminal 68. The control input 60 is connected to the controller 16 to receive control signals for controlling the driven transistor 64. The gate drive output 62 is connected to the gate of the driven transistor 64.

[0106] The first power terminal 66 of the gate driver 58 is connected to both the anode of the bias capacitor 70 and the source of the driven transistor. The second power terminal 68 is connected to the cathode of the bias capacitor 70.

[0107] The drive circuit 44 also includes a first switch 100 and a second switch 102 that interconnect the bias capacitor 70 with the first storage capacitor 108 and the second storage capacitor 110 to form a switched capacitor network. The first storage capacitor 108 and the second storage capacitor 110 act as a voltage divider, such that the voltage across the bias capacitor 70 ultimately depends on the ratio between the capacitances of the first storage capacitor 108 and the second storage capacitor 110.

[0108] When closed, the first switch 100 creates a parallel connection between the first storage capacitor 108 and the bias capacitor 70. When closed, the second switch 102 connects the first storage capacitor 108 and the second storage capacitor 110 in series. The second storage capacitor 110 is connected to an intermediate voltage originating from another location within the charge pump 112.

[0109] During operation, when the driven transistor 64 is turned on, the first switch 100 is turned off and the second switch 102 is turned on. Therefore, the second storage capacitor 108 is charged using an intermediate voltage source.

[0110] When it is necessary to replenish the charge on the bias capacitor 70, the second switch 102 opens, and then the first switch 100 closes. With the first storage capacitor 106 and the bias capacitor 70 now connected in parallel, the second storage capacitor 108 is able to replenish the charge on the bias capacitor 70, thereby raising the voltage across the bias capacitor 70 to the offset required to stop the driven transistor 64 from conducting.

[0111] In this configuration, the first switch 100 and the second switch 102 can be relatively low-voltage switches because they will be connected to a lower intermediate voltage within the charge pump 12, rather than to an external power supply voltage that may be much higher.

[0112] The present invention and its preferred embodiments have been described, and the scope of protection claimed is defined by the appended claims.

Claims

1. An apparatus comprising: A controller is used to control a switching network to interconnect pump capacitors, wherein: The switch network includes multiple switches, each switch having an on state and a non-conducting state, and The controller controls the plurality of switches to switch between their on and off states, thereby interconnecting the pump capacitors in different arrangements. A driving circuit, comprising a gate driver for receiving a control signal from the controller, the control signal causing one of the different arrangements to be formed, wherein The first switch of the plurality of switches includes a source to be connected to the gate driver and a gate to be connected to the gate driver. The first switch is in its on state when its source is at the source potential and its gate is at the same gate potential. Based on the control signal, the gate driver causes the first switch to switch between its on state and its off state.

2. The apparatus according to claim 1, wherein, At least one of the plurality of switches includes a metal-oxide-semiconductor field-effect transistor (MOSFET), wherein the difference between the gate voltage and the source voltage of the MOSFET is greater than zero in its off-state.

3. The apparatus according to claim 1, wherein, During operation of the switching network, the source potential at the source of the first switch changes over time.

4. The apparatus according to claim 1, wherein: The gate driver is coupled to a switched capacitor circuit, which includes: (i) a bias capacitor, (ii) a first capacitor, (iii) a second capacitor, and (iv) a plurality of switched capacitor switches interconnecting the bias capacitor with the first capacitor and the second capacitor. The voltage across the first capacitor controls the difference between the source potential and the gate potential.

5. The apparatus according to claim 4, wherein: The first capacitor and the second capacitor are connected in parallel and coupled. The second capacitor replenishes the charge on the bias capacitor as needed to maintain the desired voltage across the bias capacitor; as well as The plurality of switched capacitors perform the following operations: (i) connecting and disconnecting the first capacitor and the second capacitor from each other, and (ii) connecting and disconnecting the second capacitor from an external voltage source.

6. The apparatus of claim 1, wherein the plurality of switches comprises a source terminal, a drain terminal, and a gate terminal, wherein, When the voltage applied to the gate terminal is zero, the source terminal and the drain terminal are connected.

7. The apparatus according to claim 1, wherein, The gate driver is connected to a Zener diode.

8. The apparatus according to claim 1, wherein, The gate driver is connected to the shunt device.

9. The apparatus according to claim 1, wherein, The gate driver is connected to the source follower.

10. The apparatus according to claim 1, wherein, The gate driver is connected to a switched capacitor.

11. The apparatus according to claim 1, wherein, The gate driver is connected to multiple switched capacitors.

12. A power converter, comprising: The first port is used to receive the first voltage; The second port is used to increase the second voltage; An inductor coupled to the second port; as well as A switching network coupled to the first port, the switching network comprising: a plurality of grounding switches coupled to the first capacitor, and Multiple floating switches, wherein each of the multiple floating switches has an on state and a non-conducting state. The plurality of floating switches can be controlled to switch between their on and off states to transfer charge along at least one charge transfer path from the first capacitor to the inductor, thereby converting the first voltage into the second voltage. At least one of the plurality of floating switches is in its on state when the source of the at least one floating switch is at the source potential and the gate of the at least one floating switch is at the gate potential equal to the source potential.

13. The power converter according to claim 12, wherein: The switch network also includes a second capacitor coupled to the plurality of grounding switches; as well as The plurality of floating switches can also be controlled to switch between their on and off states to transfer charge along at least one charge transfer path from the second capacitor to the inductor and thereby convert the first voltage into the second voltage.

14. The power converter of claim 12, further comprising a gate driver connected to a Zener diode.

15. The power converter according to claim 12, wherein, It also includes a gate driver connected to a shunt device.

16. The power converter according to claim 12, wherein, It also includes a gate driver connected to the source follower.

17. The power converter according to claim 12, wherein, It also includes a gate driver connected to the switched capacitor.

18. The power converter according to claim 12, wherein, It also includes a gate driver connected to multiple switched capacitors.

19. A power converter, comprising: A switching network, the switching network comprising a plurality of transistors, each transistor having an on state and a non-on state; A controller for controlling the switching network to interconnect the pump capacitors, wherein the controller controls the plurality of transistors to switch between their on and off states, thereby interconnecting the pump capacitors in different arrangements; and A driving circuit, comprising a gate driver for receiving a control signal from the controller, the control signal causing one of the different arrangements to be formed, wherein: The first transistor of the plurality of transistors includes a source to be connected to the gate driver and a gate to be connected to the gate driver. The first transistor is in its on state when its source is at its source potential and its gate is at its gate potential, which is equal to the source potential. Based on the control signal, the gate driver provides an output to the first transistor to cause the first transistor to switch between its on state and its off state.

20. The power converter according to claim 19, wherein, At least one of the plurality of transistors transitions between its on and off states by the enhancement of the inversion layer of the at least one of the plurality of transistors.

21. The power converter according to claim 19, wherein, The plurality of transistors includes field-effect transistors, and at least one of the field-effect transistors transitions between its on and off states by the depletion of the inversion layer of the at least one of the plurality of transistors.

22. The power converter according to claim 19, wherein: The switching network is formed on the first die; and The controller and the drive circuit are formed on the second die.

23. The power converter according to claim 22, wherein, The second die also includes an external interface for exchanging digital signals with other devices.

24. The power converter of claim 22, wherein at least one of the first die or the second die is formed of at least one of the following: silicon carbide, indium phosphate, gallium arsenide, aluminum gallium nitride, and silicon germanium.

25. A method comprising: Control signals for controlling the switching network are generated at the controller, wherein: The switch network includes multiple switches and multiple pump capacitors, each switch having an on state and a non-conducting state, and The control signal is used to control the plurality of switches to switch between their on and off states so that the pump capacitors are interconnected in different arrangements. The control signal is received at the gate driver coupled to the controller; and Based on the control signal, an output is provided to the switching network, wherein: The first switch of the plurality of switches includes a source to be connected to the gate driver and a gate to be connected to the gate driver. The first switch is in its on state when its source is at the source potential and its gate is at the same gate potential. The output causes the first switch to switch between its on state and its off state.

26. A method comprising: A first voltage is received at a switching network, wherein the switching network comprises: Multiple floating switches, Each of the plurality of floating switches has an on state and a non-on state; A control signal is generated at the controller, which controls the plurality of floating switches to switch between their on and off states to transfer charge along at least one charge transfer path from the first pump capacitor to the inductor and thereby convert the first voltage into a second voltage. Based on the control signal, an output is provided to the switching network, wherein: The output causes at least one of the plurality of floating switches to be in its on state when the source of the at least one floating switch is at the source potential and the gate of the at least one floating switch is at the gate potential equal to the source potential; and Provide the second voltage.

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