Method for forming a variable depth device structure

Abstract

This application discloses a method for forming a device structure. The method includes forming a variable-depth structure in a device material layer using a cyclic etching process. Multiple device structures are formed within the variable-depth structure to define a vertical or tilted device structure therein. The variable-depth structure and the vertical or tilted device structure are formed using an etching process.

Description

Technical Field

[0001] Embodiments of the present disclosure generally relate to optical devices for augmented reality, virtual reality, and mixed reality. More particularly, embodiments described herein provide variable depth device structures that form optical devices. Background Art

[0002] Virtual reality is generally considered a computer-generated simulated environment in which the user has a distinct physical presence. Virtual reality experiences can be generated in 3D and viewed using a head-mounted display (HMD), such as glasses or other wearable display devices that have near-eye display panels as lenses to display a virtual reality environment that can replace the actual environment.

[0003] However, augmented reality enables an experience where the user still sees their surroundings through the display lenses of glasses or other head-mounted display devices or handheld devices, but also sees images of virtual objects generated on the display that appear as part of the environment. Augmented reality can include any type of input, such as audio and tactile input, as well as virtual images, graphics, and images of the environment that enhance or enhance the user's experience. As an emerging technology, augmented reality presents many challenges and design constraints.

[0004] One such challenge is displaying a virtual image overlaid on the surrounding environment. Optical devices are used to assist in overlaying the image. Light is generated and propagates through a waveguide until it exits the waveguide and is overlaid on the surrounding environment. Manufacturing optical devices can be challenging because they tend to have non-uniform properties. Therefore, there is a need in the art for improved methods of manufacturing optical devices. Summary of the Invention

[0005] The present disclosure generally relates to a method for forming a device structure for use in a display device or other applications. More particularly, the present disclosure relates to a variable depth structure for use in a device structure produced using an etching process. The method herein can also form a device structure that can be used as a master for nanoimprint lithography.

[0006] In one embodiment, a method for forming a device structure is provided. The method includes forming a gray-tone resist on a device material and performing a cyclic etching process, wherein forming the gray-tone resist includes disposing a resist material on the device material and developing the resist material to form a gray-tone pattern. The cyclic etching process includes etching resist segments of the gray-tone pattern using a resist etching process that is selective to the resist material, and etching device segments of the device material using a device pattern etching process that is selective to the device material. The method also includes repeating the resist etching process on subsequent resist segments of the gray-tone pattern, and etching subsequent device segments to form a device material pattern, wherein the device material pattern has a gradient. The method also includes: disposing a hard mask on the device material; patterning the hard mask to expose multiple segments of the device material; and etching the exposed segments of the device material to form multiple device structures having varying depths corresponding to the gradient.

[0007] In one embodiment, a method for forming a device structure is provided. The method includes: providing a device material layer on a surface of a substrate; providing a hard mask over the device material layer; patterning the hard mask to expose multiple segments of the device material layer; and forming a gray tone resist over the hard mask. The step of forming the gray tone resist includes providing a resist material over the hard mask and developing the resist material to form a gray tone pattern. The method also includes performing a cyclic etching process, the cyclic etching process including etching the resist segments of the gray tone pattern using a resist etching process that is selective to the resist material, and etching the exposed segments of the device material layer using a device etching process that is selective to the device material of the device material layer. The method also includes repeating the resist etching process on subsequent resist segments of the gray tone pattern, and repeating the device etching process on subsequent exposed device segments of the device material layer to form multiple device structures with varying depths.

[0008] In one embodiment, a method for forming a device structure is provided. The method includes disposing a hard mask on a surface of a substrate, and patterning the hard mask to expose multiple segments of the substrate. The method also includes forming a gray tone resist over the hard mask, and performing a cyclic etching process, wherein forming the gray tone resist includes disposing a resist material over the hard mask and developing the resist material to form a gray tone pattern. The cyclic etching process includes etching the resist segments of the gray tone pattern using a resist etching process that is selective to the resist material, and etching the exposed segments of the substrate using a device etching process that is selective to the substrate material. The method also includes repeating the resist etching process on subsequent resist segments of the gray tone pattern, and repeating the device etching process on the exposed segments of the substrate material layer to form multiple device structures having varying depths in the substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order that the manner in which the above-mentioned features of the present disclosure may be understood in detail, a more particular description of the present disclosure, briefly summarized above, may be given by reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the drawings illustrate only exemplary embodiments and are therefore not to be considered limiting of its scope, and other equally effective embodiments may be admitted.

[0010] Figure 1 is a front view of an optical device according to one embodiment.

[0011] Figure 2 is a flow chart of a method for forming a device structure according to one embodiment.

[0012] Figures 3A-3K is a schematic cross-sectional view of a portion of a variable depth structure according to an embodiment.

[0013] Figures 3L-3V is a schematic cross-sectional view of a portion of a variable depth structure according to an embodiment.

[0014] Figure 4 is a flow chart of a cyclic etching sub-method according to one embodiment.

[0015] Figures 5A-5F is a schematic cross-sectional view of a portion of a variable depth structure during a cyclic etching sub-method according to one embodiment.

[0016] Figure 5G-5L is a schematic cross-sectional view of a portion of a variable depth structure during a cyclic etching sub-method according to one embodiment.

[0017] Figure 6 is a flow chart of a method for forming a device structure according to one embodiment.

[0018] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation. DETAILED DESCRIPTION

[0019] Embodiments described herein relate to methods for forming a device structure having a variable-depth device structure. To this end, a method includes forming a plurality of channels in the variable-depth structure to define the device structure therein. The variable-depth structure is formed using an etching process, and the device structure is formed using a selective etching process. The methods described herein can also be used to produce a device structure for use as a master for nanoimprint lithography.

[0020] Figure 1is a front view of the optical device 100. It should be understood that the optical device 100 described below is an exemplary optical device. In one embodiment, the optical device 100 is a waveguide combiner, such as an augmented reality waveguide combiner. In another embodiment, the optical device 100 is a planar optical device, such as a metasurface. The optical device 100 includes a plurality of device structures 104. The device structures 104 can be nanostructures having submicron dimensions (e.g., nanometer dimensions, such as critical dimensions less than 1 μm). In one embodiment, a region of the device structure 104 corresponds to one or more gratings 102, such as a first grating region 102a and a second grating region 102b. In one embodiment, the optical device 100 includes a first grating region 102a and a second grating region 102b, and each of the first grating region 102a and the second grating region 102b includes a plurality of device structures 104.

[0021] In embodiments described herein, the depth of the grating 102 can vary across the first grating region 102a and the second grating region 102b. In some embodiments, the depth of the grating 102 can vary smoothly across the first grating region 102a and across the second grating region 102b. In an example embodiment, the depth across one of the grating regions can range from approximately 10 nm to approximately 400 nm. In an example embodiment, the first grating region 102a can range from approximately 20 mm to approximately 50 mm on a given side. Thus, as an example, the depth of the grating 102 can vary by an angle on the order of 0.0005 degrees.

[0022] In the embodiments described herein, selective etching techniques, such as gray-tone etching and / or laser ablation techniques, can be used to create device structures 104. As used herein, selective etching techniques are used to create three-dimensional microstructures in device materials and substrate materials, or alternatively, to create variable-depth structures in a sacrificial layer covering the device material as part of a variable-depth structure process. Using selective etching techniques to create optical device structures 104 allows for fewer processing operations and achieves higher variable-depth resolution compared to existing methods.

[0023] Figure 2 is used to form Figures 3A-3K Flowchart of method 200 of a portion of an optical device 300 having a variable depth device structure corresponding to a first grating region 102a or a second grating region 102b. Figure 3AAs shown, a device material layer 304 is disposed on the surface of a substrate 301. The substrate 301 can be formed of any suitable material, as long as the substrate 301 can sufficiently transmit light of a desired wavelength or wavelength range and can serve as a suitable support for the optical device 300. In some embodiments that can be combined with other embodiments described herein, the material of the substrate 301 includes, but is not limited to, one or more materials containing silicon (Si), silicon dioxide (SiO2), or sapphire. In other embodiments that can be combined with other embodiments described herein, the material of the substrate 301 includes, but is not limited to, a material having a refractive index between about 1.7 and about 2.0. In other embodiments that can be combined with other embodiments described herein, the material of the substrate 301 also serves as the device material, thereby eliminating the need for a separate device material layer.

[0024] The device material layer 304 may be disposed on the surface of the substrate 301 by one or more processes such as physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma-enhanced CVD (PECVD), flowable CVD (FCVD), atomic layer deposition (ALD), or a spin coating process. In one embodiment that may be combined with other embodiments described herein, the device material of the device material layer 304 is selected based on the modulation depth and tilt angle of each of the plurality of device structures 104 of the optical device 300 and the refractive index of the substrate 301. In some embodiments that may be combined with other embodiments described herein, the device material layer 304 includes, but is not limited to, one or more materials including silicon nitride (SiN), silicon oxycarbide (SiOC), titanium dioxide (TiO2), silicon dioxide (SiO2), vanadium (IV) oxide (VOx), aluminum oxide (Al2O3), indium tin oxide (ITO), zinc oxide (ZnO), tantalum pentoxide (Ta2O5), silicon nitride (Si3N4), zirconium dioxide (ZrO2), or silicon carbonitride (SiCN). In some embodiments, which may be combined with other embodiments described herein, the device material of the device material layer 304 may have a refractive index between about 1.5 and about 2.65. In other embodiments, which may be combined with other embodiments described herein, the device material of the device material layer 304 may have a refractive index between about 3.5 and about 4.0.

[0025] In some embodiments that may be combined with other embodiments described herein, an etch stop layer 302 may optionally be disposed on the surface of the substrate 301 between the substrate 301 and the device material layer 304. The etch stop layer 302 may be disposed by one or more PVD, CVD, PECVD, FCVD, ALD, or spin coating processes. The etch stop layer 302 may be formed of any suitable material, such as titanium nitride (TiN) or tantalum nitride (TaN), as long as the etch stop layer 302 is resistant to the etching process described herein. In one embodiment that may be combined with other embodiments described herein, the etch stop layer 302 is an opaque etch stop layer. In another embodiment, the etch stop layer 302 is a transparent etch stop layer.

[0026] At operation 202, a gray tone resist 306 is formed over the device material layer 304, as shown in FIG. Figure 3B As shown. In one embodiment, forming the gray tone resist 306 includes disposing a resist material over the device material layer 304 and developing the resist material using a photolithography process. In one embodiment that may be combined with other embodiments described herein, the photolithography process is a gray tone photolithography process. The photolithography process forms a gray tone pattern 308 of the gray tone resist 306. The resist material may include, but is not limited to, a material comprising a photosensitive polymer. Developing the resist material may include performing a photolithography process, such as photolithography, digital lithography, or by performing laser ablation. In some embodiments that may be combined with other embodiments described herein, the gray tone pattern 308 of the gray tone resist 306 may include, but is not limited to, any one-dimensional, two-dimensional, or three-dimensional shape produced in the resist material using photolithography or laser ablation. In yet another embodiment that may be combined with other embodiments described herein, as Figure 3B As shown, the surface 309 of the gray tone pattern 308 is gradient. Figures 3H to 3K As shown, the shape of the gray-tone pattern 308 of the gray-tone resist 306 determines the varying depth of the depth D of the device structure 104 across the substrate 301 .

[0027] In this embodiment, at operation 203 , a cyclic etching sub-method 400 is performed. Figure 4 is a flow chart of the cyclic etching sub-method 400 . Figures 5A-5F is the substrate 301 during the cyclic etching sub-method 400 Figure 3B 303 is a schematic cross-sectional view of the portion shown in FIG. In operation 401, as Figures 5A-5BAs shown, the gray-tone resist 306 is etched through a resist etching process that is selective to the device material layer 304 to expose the device material segment 504. In one embodiment that may be combined with other embodiments described herein, the material layer 501 is the device material layer 304. In one embodiment that may be combined with other embodiments described herein, the material layer 501 is the substrate 301, which has material properties suitable for use as a device material, thereby eliminating the need for a separate device material layer. In one embodiment that may be combined with other embodiments described herein, the substrate 301 includes one or more materials including silicon oxycarbon (SiOC), titanium dioxide (TiO2), silicon dioxide (SiO2), vanadium (IV) oxide (VOx), aluminum oxide (Al2O3), indium tin oxide (ITO), zinc oxide (ZnO), tantalum pentoxide (Ta2O5), silicon nitride (Si3N4), zirconium dioxide (ZrO2), or silicon carbonitride (SiCN). In some embodiments that may be combined with other embodiments described herein, substrate 301 may have a refractive index between about 1.5 and about 2.65, such as between 1.7 and 2.0. In other embodiments that may be combined with other embodiments described herein, substrate 301 may have a refractive index between about 3.5 and about 4.0.

[0028] At operation 402, the device material segment 504 is partially etched via a device material etching process. In an embodiment of the method 200, the device material etching process is a device pattern etching process that is selective with respect to the material of the gray tone resist 306 to remove a portion 506 of the device material of the device material segment 504. Figure 5C As shown, the device material segment 504 with portion 506 removed comprises a width W and a height H. At operation 403, operations 401 and 402 are repeated for a subsequent resist segment 503 and a subsequent device material segment 505, as shown in FIG. Figures 5D-5F As shown, it corresponds to Figure 3B 3. In some embodiments, which may be combined with other embodiments described herein, each resist segment 502, 503 to be etched via the resist etch process is exposed by a first proximity mask, and each device material segment 504, 505 to be etched via the device material etch process is exposed by a second proximity mask. At optional operation 404, residual resist material of the gray tone resist 306 disposed on the device material layer 304 is removed.

[0029] The resist etch process is selective relative to the device material, that is, during the resist etch process, the resist material is removed at a higher rate than the device material. The resist etch process may include but is not limited to at least one of ion implantation, ion beam etching (IBE), reactive ion etching (RIE), directional RIE, plasma etching, thermal atomic layer etching or laser ablation. In some embodiments that can be combined with other embodiments described herein, the resist etch process utilizes oxidative etching chemicals. In other embodiments that can be combined with other embodiments described herein, the resist etch process utilizes reducing etching chemicals. In one embodiment that can be combined with other embodiments described herein, the resist etch process utilizes one or more gases comprising oxygen, nitrogen (N2), hydrogen (H2), SiO2 or ammonia (NH3). The etching chemicals of the gases comprising one or more gases comprising oxygen, N2, H2, SiO2 or NH3 provide a selectivity of the resist material to the device material of about 10:1 to about 1000:1. The etching chemistry of one or more gases containing oxygen, N2, H2, SiO2, or NH3 with the addition of fluorine provides a selectivity of greater than 1:1 for the resist material to the device material. In another embodiment that may be combined with other embodiments described herein, a chlorine-containing gas such as HCl is used as the etchant. The chlorine-containing gas is optionally delivered to the processing environment with a hydrogen-containing gas (e.g., H2) or an oxygen-containing gas (e.g., O2). The etching chemistry containing chlorine gas provides a selectivity of about 1:1 to about 10:1 for the resist material to the device material.

[0030] The device pattern etching process is selective with respect to the resist material, i.e., during the device pattern etching process, the device material is removed at a higher rate than the resist material. The device pattern etching process may include, but is not limited to, at least one of ion implantation, IBE, RIE, directional RIE, plasma etching, thermal atomic layer etching, or laser ablation. In some embodiments that may be combined with other embodiments described herein, the device pattern etching process has a selectivity of the resist material to the device material of about 1:1 to about 10:1. In some embodiments that may be combined with other embodiments described herein, a fluorine-containing gas (e.g., fluoromethane (CH3F), sulfur hexafluoride (SF6), tetrafluoromethane (CF4), fluoroform (CHF3), or nitrogen trifluoride (NF3)) is used as an etchant. Optionally, the fluorine-containing gas is delivered to a processing environment having a methane-containing gas (e.g., methane (CH4) and / or dichlorodifluoromethane (CCl2F2)).

[0031] like Figure 3CAs shown, a device layer pattern 310 having a variable depth surface 312 is formed by removing a portion 506 of the device material from the device material segments 504, 505. The variable depth surface 312 of the device layer pattern 310 has a gradient corresponding to the width W and height H of each device material segment 504, 505. In one embodiment that may be combined with other embodiments described herein, the width W and height H of each device material segment 504, 505 are substantially the same. In another embodiment that may be combined with other embodiments described herein, at least one of the width W and height H of at least one device material segment is different from the device material segments 504, 505. The gradient of the variable depth surface 312 may be the same as that of the device structure 104 formed via the method 200 (at Figures 3H-3K Matching the pitch 326 of the variable depth surface 312 to the pitch 326 of the device structure 104 to be formed results in the device structure 104 having a continuous gradient.

[0032] In operation 204, a hard mask 314 is disposed over the device material layer 304. The result of operation 204 is Figure 3D . The hard mask 314 may be disposed over the device material layer 304 by one or more liquid material casting, spin coating, liquid spray coating, dry powder coating, screen printing, doctor blade coating, PVD, CVD, PECVD, FCVD, ALD, evaporation, or sputtering processes. In one embodiment that may be combined with other embodiments described herein, the hard mask 314 is opaque and is removed after forming a portion of the optical device 300. In another embodiment, the hard mask 314 is transparent. In some embodiments that may be combined with other embodiments described herein, the hard mask 314 includes, but is not limited to, a material containing chromium (Cr), silver (Ag), Si3N4, SiO2, TiN, or carbon (C). The hard mask 314 may be deposited such that the thickness of the hard mask 314 is substantially uniform. In other embodiments, the hard mask 314 may be deposited such that the thickness varies from approximately 30 nm to approximately 50 nm at different points on the device material layer 304. The hard mask 314 is deposited in such a manner that the slope of the hard mask 314 is similar to the slope of the varied-depth surface 312 .

[0033] In operation 205, an organic planarization layer (OPL) 316 is placed over the hard mask 314. The result of operation 205 is Figure 3E. The OPL 316 may include a photosensitive organic polymer containing a photosensitive material that undergoes a chemical change when exposed to electromagnetic (EM) radiation and is therefore configured to be removed using a developing solvent. The OPL 316 may include any organic polymer and a photoactive compound having a molecular structure that can be attached to the molecular structure of the organic polymer. In one embodiment that may be combined with other embodiments described herein, the OPL 316 may be provided using a spin coating process. In another embodiment that may be combined with other embodiments described herein, the OPL 316 may include, but is not limited to, one or more of a polyacrylate resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, an unsaturated polyester resin, a polyphenylene ether resin, a polyphenylene sulfide resin, or a benzocyclobutene (BCB).

[0034] like Figure 3E As shown, the thickness of OPL 316 varies, thereby forming a substantially flat top surface. The thickness of OPL 316 varies so that the space between the inclined conformal hard mask 314 and the substantially flat top surface of OPL 316 is completely filled and has a varying thickness across the inclined variable-depth surface 312.

[0035] Reference Figures 3E-3K At operation 206, a patterned photoresist 318 is disposed on the OPL 316. The patterned photoresist 318 is formed by disposing a photoresist material on the OPL 316 and developing the photoresist material. The patterned photoresist 318 defines Figure 3E The hard mask pattern 315 shown corresponds to the exposed segment 321 of the device material layer 304, as shown in FIG. Figure 3G As shown. Figure 3G As shown, the exposed segments 321 of the device material layer 304 to be etched correspond to the gaps 324 between the device structures 104, as shown in FIG. Figures 3H-3K As shown. In one embodiment that may be combined with other embodiments described herein, the photoresist material may be disposed on the OPL 316 using a spin coating process. In another embodiment that may be combined with other embodiments described herein, the patterned photoresist 318 may include, but is not limited to, a material comprising a photosensitive polymer. Developing the photoresist material may include performing a photolithography process, such as photolithography and digital lithography.

[0036] In operation 207, the OPL portion 317 of the OPL 316 exposed by the hard mask pattern 315 is removed. Removal of the OPL portion 317 exposes the negative hard mask portion 319 of the hard mask pattern 315 corresponding to the gap 324 between the device structures 104. The OPL portion 317 may be removed by IBE, RIE, directional RIE, plasma etching, wet etching, and / or photolithography. The result of operation 207 is Figure 3F Shown in.

[0037] In operation 208, the negative hard mask portion 319 of the hard mask pattern 315 is etched. The result of operation 208 is Figure 3F . Etching the negative hard mask portion 319 exposes exposed segments 321 of the device material layer 304 corresponding to the hard mask pattern 315. In one embodiment, which may be combined with other embodiments described herein, etching the negative hard mask portion 319 may include, but is not limited to, at least one of IBE, RIE, directional RIE, or plasma etching.

[0038] In operation 209, the patterned photoresist 318 and OPL 316 are removed. The result of operation 208 is Figure 3G Stripping off the OPL 316 and the patterned photoresist 318 produces a set of hard mask portions 320 .

[0039] In operation 210, an etching process is performed. In one embodiment that may be combined with other embodiments described herein, a tilted etching process is performed. The tilted etching process may include, but is not limited to, at least one of IBE, RIE, directional RIE, or laser ablation. The ion beam generated by IBE may include, but is not limited to, at least one of a ribbon beam, a spot beam, or a full substrate size beam. The tilted etching process is performed to etch the exposed segments 321 of the device material layer 304 to form a plurality of device structures 104. Figure 3H and 3J As shown, the tilted etching process forms a plurality of device structures 104, so that the device structures 104 have a tilt angle relative to the surface of the substrate 301. In one embodiment, which may be combined with other embodiments described herein, the tilt angle of each device structure 104 is In another embodiment, which may be combined with other embodiments described herein, the tilt angle of at least one device structure in the plurality of device structures 104 is substantially the same. are different.

[0040] In another embodiment that may be combined with other embodiments described herein, the etching process comprises an isotropic (i.e., vertical) etching process. The isotropic etching process may include, but is not limited to, at least one of ion implantation, IBE, RIE, plasma etching, thermal atomic layer etching, or laser ablation. Figure 3I and 3K As shown, the isotropic etching process forms a substrate 301 having an inclination angle of about 90 degrees relative to the surface of the substrate 301. The plurality of device structures 104 are arranged such that each device structure 104 is substantially perpendicular to the surface of the substrate 301 .

[0041] The device layer pattern 310 causes the depth D of the device structure 104 to vary across the substrate 301. For example, Figures 3H-3K As shown, the depth D of the device structure 104 decreases across the substrate 301 in the X direction. In one embodiment that can be combined with other embodiments described herein, the gradient of the depth D of the device structure 104 is continuous. In one embodiment that can be combined with other embodiments described herein, the gradient of the depth D of the device structure 104 is stepped. As described above, modulating the depth D of the device structure 104 can control propagating light through the grating 102 of the optical device 100. In optional operation 211, as Figure 3J and 3K As shown, the hard mask 314 is removed.

[0042] Figure 6 is used to form Figures 3L-3V Flowchart of method 600 for optical device 300 with variable depth device structure 104. In optional operation 601, etch stop layer 302 is disposed on the surface of substrate 301. In some embodiments that may be combined with other embodiments described herein, such as Figure 3S and 3U As shown, when the depth D of the device structure 104 is less than the thickness T of the device material layer across at least the first portion 327 and the second portion 329 of the substrate 301, the etch stop layer 302 is not required. In some embodiments, which may be combined with other embodiments described herein, the substrate 301 has the material properties described above and is suitable for use as a device material, thereby eliminating the need for a separate device material layer.

[0043] In operation 602, as Figure 3L As shown, a device material layer 304 is disposed on the surface of the substrate 301. In operation 603, as shown in FIG. Figure 3MAs shown, a hard mask 314 is disposed over the device material layer 304. At operation 604, the hard mask 314 is patterned to expose a plurality of segments 321 of the device material layer 304. In one example (not shown), the hard mask 314 can be patterned by disposing an OPL on a layer of hard mask material on the device material layer 304, disposing a photoresist on the OPL, patterning the photoresist to expose portions of the OPL, removing the exposed portions of the OPL to expose portions of the hard mask material layer, and removing the exposed portions of the hard mask material layer to define hard mask patterns 315 corresponding to the exposed segments 321 of the device material layer 304. The exposed segments 321 of the device material layer 304 to be etched correspond to the gaps 324 between the device structures 104 (e.g., Figures 3O-3V shown).

[0044] At operation 605, a gray tone resist 306 is formed in the gray tone pattern 308 on the hard mask 314, as shown in FIG. Figure 3N In one embodiment that may be combined with other embodiments described herein, as shown in FIG. Figure 3N As shown, the surface 309 of the gray tone pattern 308 is gradient. Figures 3O-3V As shown, the shape of the gray tone pattern 308 of the gray tone resist 306 determines the varying depth of the depth D of the device structure 104 across the substrate 301. At operation 606, the cyclic etching sub-method 400 is performed. Figure 5G-5L is the portion 305 of the substrate 301 (at Figure 3N In operation 401, a resist is etched by a resist etch process that is selective to the resist material. Figure 5G 3. The gray tone resist 306 shown in FIG. 3 is removed from the resist segment 507 to expose the device segment 508, which includes the exposed portion of the hard mask 314 and the exposed portion of the device material layer 304, as shown in FIG. Figure 5H At operation 402, the exposed device segment 508 is etched via a device material etch process. In an embodiment of the cyclic etching sub-method 400, the device material etch process is an etch process that is selective to the device material, which retains the exposed portion of the hard mask 314 and removes the device material from the exposed portion of the device material layer 304 of the device segment 508, as shown. Figure 5I At operation 403, operations 401 and 402 are repeated for a subsequent resist segment 507 and a subsequent exposed device segment 509, as shown. Figures 5J-5L As shown, it corresponds to Figure 3NGray tone pattern 308 is shown. In some embodiments, which can be combined with other embodiments described herein, each resist segment 507 to be etched via the resist etch process is exposed through a first proximity mask, and each device segment 508, 509 to be etched via the device material etch process is exposed through a second proximity mask.

[0045] The cyclic etching process is performed to etch the exposed segments 321 of the device material layer 304 to form a plurality of device structures 104. The gray tone pattern 308 produces a varying depth D of the device structures 104 on the substrate 301. For example, Figures 3O-3R As shown, the depth D of the device structure 104 decreases along the X direction across the substrate 301. In one embodiment, which may be combined with other embodiments described herein, the depth D of the device structure 104 is less than the thickness T of the device material layer 304, as shown in FIG. Figure 3O and 3Q In another embodiment that may be combined with other embodiments described herein, the depth D of the device structure 104 is substantially equal to the thickness T of the grating material layer on the first portion 327 of the substrate 301, and the depth D of the device structure 104 is less than the thickness T of the grating material layer on the second portion 329 of the substrate, as shown. Figure 3P and 3R At optional operation 404 , residual resist material of the gray tone resist 306 disposed on the hard mask 314 is removed.

[0046] In one embodiment that may be combined with other embodiments described herein, the device material etching process comprises an isotropic (i.e., vertical) etching process. The isotropic etching process may include, but is not limited to, at least one of ion implantation, IBE, RIE, plasma etching, thermal atomic layer etching, or laser ablation. Figure 3Q 、 3R 3U and 3V, the isotropic etching process forms a substrate 301 having an inclination angle of about 90 degrees relative to the surface. The device material etching process includes a tilted etching process. The tilted etching process may include, but is not limited to, at least one of IBE, RIE, directional RIE, and laser ablation. The tilted etching process forms a device material having a tilt angle greater than or less than about 90 degrees relative to the surface of the substrate 301. In one embodiment, which may be combined with other embodiments described herein, the tilt angle of each device structure 104 is In another embodiment, which may be combined with other embodiments described herein, the tilt angle of at least one device structure in the plurality of device structures 104 is substantially the same. are different.

[0047] In some embodiments that may be combined with other embodiments described herein, the device material etch process has a selectivity of about 1:1 to about 10:1 of the resist material to the device material, as described in the device material etch process of the cyclic etch sub-method 400. In some embodiments that may be combined with other embodiments described herein, a fluorine-containing gas such as CH3F, SF6, CF4, CHF3, or NF3 is used as an etchant. Optionally, the fluorine-containing gas is delivered to the process environment with a methane-containing gas (e.g., CH4 or CCl2F2). The ion beam generated by the IBE may include, but is not limited to, at least one of a ribbon beam, a spot beam, and a full substrate size beam. In optional operation 607, as Figure 3S-3V As shown, the remaining resist material and hard mask 314 are removed.

[0048] In summary, a method for forming a device structure having a variable depth is described herein. The method includes forming a device structure having a variable depth in a device material layer using an etching process. A cyclic etching sub-method provides independent adjustability of the etch rates of a gray-tone resist and a device material layer to control the pattern of the device material layer to be formed, resulting in a device structure having a variable depth. The etch rates of the gray-tone resist and device material layers can be adjusted by selecting the resist material and the device structure material, as well as the etching process and chemistry of the resist and device material etching processes.

[0049] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, the scope of which is to be determined by the claims that follow.

Claims

1. A method comprising: A gray tone resist is formed on the device material, wherein the steps of forming the gray tone resist include: disposing a resist material over the device material; and developing the resist material to form a gray tone pattern; Performing a cyclic etching process, the cyclic etching process comprising: etching the resist segments of the gray tone pattern using a resist etch process that is selective to the resist material; etching device segments of the device material using a device pattern etch process selective to the device material; and repeating the resist etching process for subsequent resist segments of the gray tone pattern and etching subsequent device segments to form a device material pattern having a top surface having a gradient; disposing a hard mask on the device material; patterning the hard mask to expose segments of the device material; and Exposed sections of the device material are etched to form a plurality of device structures having varying depths corresponding to the gradient. 2 . The method of claim 1 , wherein etching the exposed segments of the device material forms the plurality of device structures having a tilt angle less than or greater than 90 degrees relative to a lower surface of the device material. The method of claim 2 , wherein etching the exposed segments of the device material comprises a bevel etching process. 4 . The method of claim 1 , wherein etching the exposed segments of the device material forms the plurality of device structures substantially perpendicular to a lower surface of the device material. The method of claim 4 , wherein etching the exposed segments of the device material comprises an isotropic etching process. The method of claim 1 , wherein an etch stop layer is disposed at a lower surface of the device material. The method of claim 1 , wherein forming the gray tone pattern comprises laser ablation or photolithography.

8. The method of claim 1, wherein the resist material has an etch selectivity to the device material of about 10:1 to about 1000:

1.

9. The method of claim 1, wherein the resist material has an etch selectivity to the device material of about 1:1 to about 10:

1.

10. The method of claim 1, wherein the device material is a substrate. The method of claim 1 , wherein the device material is a device material layer formed on a substrate.

12. The method of claim 1, further comprising removing residual resist material and disposing the hard mask on the device material after removing the residual resist material.

13. The method of claim 1, further comprising removing the resist material at a higher rate than the device material during the resist etch process, and removing the device material at a higher rate than the resist material during the device pattern etch process.

14. A method comprising: providing a device material layer on a surface of a substrate, the surface of the substrate having an etch stop layer; disposing a hard mask on the device material layer and patterning the hard mask to expose a plurality of segments of the device material layer; forming a gray tone resist on the hard mask, wherein forming the gray tone resist comprises: disposing a resist material on the hard mask; and developing the resist material to form a gray tone pattern; and Performing a cyclic etching process, the cyclic etching process comprising: etching the resist segments of the gray tone pattern using a resist etch process that is selective to the resist material; etching exposed segments of the device material layer using a device etch process selective to the device material of the device material layer; and The resist etch process is repeated for subsequent resist segments of the gray tone pattern, and the device etch process is repeated for subsequent exposed device segments of the device material layer to form a plurality of device structures having varying depths. The method of claim 14 , wherein forming the gray tone pattern comprises laser ablation or photolithography.

16. The method of claim 14, wherein the device etch process comprises an isotropic etch process, and wherein the device etch process forms the plurality of device structures substantially perpendicular to the surface of the substrate. The method of claim 14 , wherein a depth of the plurality of device structures is less than a thickness of the device material. 18 . The method of claim 14 , wherein an etch selectivity of the resist material to the device material of the device material layer is from about 10:1 to about 1000:

1.

19. The method of claim 14, wherein the resist material has an etch selectivity to the device material of about 1:1 to about 10:

1.

20. The method of claim 14, wherein the device material layer comprises one or more materials containing silicon oxycarbon (SiOC), titanium dioxide (TiO2), silicon dioxide (SiO2), vanadium (IV) oxide (VOx), aluminum oxide (Al2O3), indium tin oxide (ITO), zinc oxide (ZnO), tantalum pentoxide (Ta2O5), silicon nitride (Si3N4), zirconium dioxide (ZrO2) or silicon carbonitride (SiCN).

21. A method comprising: disposing a hard mask on a surface of a substrate and patterning the hard mask to expose a plurality of segments of the substrate; A gray tone resist is formed on the hard mask, wherein the step of forming the gray tone resist comprises: disposing a resist material on the hard mask; and developing the resist material using laser ablation to form a gray tone pattern; and Performing a cyclic etching process, the cyclic etching process comprising: etching the resist segments of the gray tone pattern using a resist etch process that is selective to the resist material; etching exposed sections of the substrate using a device etching process selective to the substrate material; and The resist etch process is repeated for subsequent resist segments of the gray tone pattern, and the device etch process is repeated for exposed segments of the substrate material layer to form a plurality of device structures having varying depths in the substrate.

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