Electronic device, flash memory controller and module method for performing garbage collection operation

Abstract

The present invention relates to an electronic device, a flash memory controller and a method for performing garbage collection operation on a flash memory module, wherein the present invention discloses a flash memory controller for accessing a flash memory module, and the flash memory controller includes a read-only memory and a microprocessor. When the flash memory controller is powered on and performs an initialization operation, the microprocessor determines whether the number of spare blocks in the flash memory module is lower than a first critical value within a preset time range of the initialization operation to determine whether a garbage collection operation is to be performed; and when the time after the flash memory controller is powered on exceeds the preset time range, the microprocessor determines whether the number of spare blocks in the flash memory module is lower than a second critical value to determine whether another garbage collection operation is to be performed, wherein the second critical value is lower than the first critical value.

Description

Technical Field

[0001] The present invention relates to a flash memory, and in particular to a garbage collection operation of the flash memory. Background Art

[0002] In the operation of the flash memory module, since the stored data cannot be updated by overwriting, the updated data used to replace the old data will be directly written into the flash memory when the old data still exists in the flash memory module, resulting in the flash memory module containing a lot of old data (invalid data) and updated data (valid data), wasting storage space. Therefore, in order to prevent these invalid data from occupying the storage space of the flash memory module, the flash memory controller will determine whether to perform a garbage collection operation according to the number of spare blocks in the flash memory module. For example, when the number of spare blocks in the flash memory module is lower than a critical value, the flash memory controller will control the flash memory module to move valid data in multiple source blocks (data blocks) to a spare block, and then erase all the data in the multiple source blocks to serve as a new spare block to release the storage space of the flash memory module. However, considering the utilization rate of the flash memory module and because the garbage collection operation will affect the normal access of the flash memory module, the above-mentioned threshold is generally not set too high. For example, the threshold may be one tenth of the total number of blocks in the flash memory module.

[0003] As described above, since the above critical value is not set too high, the flash memory controller will start the garbage collection operation only when there are only a few spare blocks in the flash memory module. However, during the garbage collection operation, if an abnormal power failure occurs during the process of moving valid data in multiple source blocks to a spare block, in order to ensure data accuracy, after powering on again, the spare block will be directly abandoned (that is, stopped from use and marked as invalid), and the garbage collection operation will be restarted to move the valid data in the multiple source blocks to another spare block. As described above, when the flash memory module is powered off during the garbage collection operation, a spare block will be wasted. Therefore, if the flash memory module is frequently powered off when the number of spare blocks is insufficient, so that the garbage collection operation cannot be completed, it is very likely that the spare blocks in the flash memory module will be rapidly reduced, and even the flash memory module will be unable to write data and can only read data.

[0004] Furthermore, in some designs, each block in the flash memory module has many data pages, that is, each block has a larger size (e.g., 16 megabytes (MB)), but the overall number of blocks in the flash memory module is small. In this case, since the larger blocks require a longer time to complete the garbage collection operation, the chance of suffering from abnormal power outage is higher. In addition, the small overall number of blocks also means that the flash memory module will only perform the garbage collection operation when the number of spare blocks is very low. This makes the problem of the rapid reduction of spare blocks caused by frequent power outages in the above-mentioned flash memory module when the number of spare blocks is insufficient more serious. Summary of the invention

[0005] Therefore, one of the objectives of the present invention is to provide a method for controlling a flash memory module, which can specifically set the relevant parameters of the garbage collection operation to solve the problems described in the prior art.

[0006] In one embodiment of the present invention, a flash memory controller is disclosed, which is used to access a flash memory module, and the flash memory controller includes a read-only memory and a microprocessor. When the flash memory controller is powered on and performs an initialization operation, the microprocessor determines whether the number of spare blocks in the flash memory module is lower than a first critical value within a preset time range of the initialization operation to determine whether a garbage collection operation is to be performed; and when the time after the flash memory controller is powered on exceeds the preset time range, the microprocessor determines whether the number of spare blocks in the flash memory module is lower than a second critical value to determine whether another garbage collection operation is to be performed, wherein the second critical value is lower than the first critical value.

[0007] In another embodiment of the present invention, an electronic device is disclosed, which includes a flash memory module and a flash memory controller. When the flash memory controller is powered on and performs an initialization operation, the flash memory controller determines whether the number of spare blocks in the flash memory module is lower than a first critical value within a preset time range of the initialization operation to determine whether to perform a garbage collection operation; and when the time after the flash memory controller is powered on exceeds the preset time range, the flash memory controller determines whether the number of spare blocks in the flash memory module is lower than a second critical value to determine whether to perform another garbage collection operation, wherein the second critical value is lower than the first critical value.

[0008] In another embodiment of the present invention, a method for performing a garbage collection operation on a flash memory module is disclosed, which includes the following steps: when a flash memory controller used to access the flash memory module is powered on and performs an initialization operation, within a preset time range of the initialization operation, determining whether the number of spare blocks in the flash memory module is lower than a first critical value to determine whether to perform a garbage collection operation; and when the time after the flash memory controller is powered on exceeds the preset time range, determining whether the number of spare blocks in the flash memory module is lower than a second critical value to determine whether to perform another garbage collection operation, wherein the second critical value is lower than the first critical value. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 FIG. 4 is a schematic diagram of an electronic device according to an embodiment of the present invention.

[0010] Figure 2 FIG. 4 is a schematic diagram of a block in a flash memory module according to an embodiment of the present invention.

[0011] Figure 3 The flowchart is a flash memory controller controlling a flash memory module to perform a garbage collection operation according to a first embodiment of the present invention.

[0012] Figure 4 Schematic diagram of garbage collection operation.

[0013] Figure 5 The flowchart is a flash memory controller controlling a flash memory module to perform a garbage collection operation according to a second embodiment of the present invention.

[0014] Explanation of symbols

[0015] 100: Electronic devices

[0016] 110: Flash memory controller

[0017] 112: Microprocessor

[0018] 112C: Program code

[0019] 112M: Read-only memory

[0020] 114: Control Logic

[0021] 116: Buffer memory

[0022] 118: Interface Logic

[0023] 120: Flash memory module

[0024] 130: Main device

[0025] 132: Encoder

[0026] 134:Decoder

[0027] 142: Read retry table

[0028] 144: Read the success record table

[0029] 200: Block

[0030] 202: Floating Gate Transistor

[0031] 300~316: Steps

[0032] 410_1,410_2,410_3: data blocks

[0033] 420_1,420_2,420_N: Spare blocks

[0034] 500~516: Steps

[0035] BL1, BL2, BL3: bit lines

[0036] WL0~WL2,WL4~WL6: word line DETAILED DESCRIPTION

[0037] Figure 1 1 is a schematic diagram of an electronic device 100 according to an embodiment of the present invention. The electronic device 100 includes a flash memory module 120 and a flash memory controller 110, and the flash memory controller 110 is used to access the flash memory module 120. According to this embodiment, the flash memory controller 110 includes a microprocessor 112, a read only memory (ROM) 112M, a control logic 114, a buffer memory 116, and an interface logic 118. The ROM 112M is used to store a program code 112C, and the microprocessor 112 is used to execute the program code 112C to control the access to the flash memory module 120. The control logic 114 includes an encoder 132 and a decoder 134, wherein the encoder 132 is used to encode the data written into the flash memory module 120 to generate a corresponding check code (or error correction code (ECC)), and the decoder 134 is used to decode the data read from the flash memory module 120.

[0038] In a typical case, the flash memory module 120 includes a plurality of flash memory chips, each of which includes a plurality of blocks, and the flash memory controller 110 performs an erase operation on the flash memory module 120 in units of blocks. In addition, a block can record a specific number of data pages, wherein the flash memory controller 110 performs a write operation on the flash memory module 120 in units of data pages. In the present embodiment, the flash memory module 120 is a 3D NAND-type flash module.

[0039] In practice, the flash memory controller 110 executing the program code 112C through the microprocessor 112 can use its own internal components to perform a variety of control operations, such as: using the control logic 114 to control the access operation of the flash memory module 120 (especially the access operation to at least one block or at least one data page), using the buffer memory 116 to perform the required buffer processing, and using the interface logic 118 to communicate with a host device 130. The buffer memory 116 is implemented as a random access memory (Random Access Memory, RAM). For example, the buffer memory 116 can be a static random access memory (Static RAM, SRAM), but the present invention is not limited to this.

[0040] In one embodiment, the electronic device 100 may be a portable memory device (e.g., a memory card that complies with SD / MMC, CF, MS, or XD standards), and the host device 130 is another electronic device that can be connected to the electronic device 100, such as a mobile phone, a notebook computer, a desktop computer, etc. In another embodiment, the electronic device 100 may be a solid state drive or an embedded storage device that complies with Universal Flash Storage (UFS) or Embedded Multi Media Card (EMMC) specifications, and may be set in a mobile phone, a notebook computer, or a desktop computer, and in this case, the host device 130 may be a processor of the mobile phone, the notebook computer, or the desktop computer.

[0041] Figure 2 FIG. 2 is a schematic diagram of a block 200 in a flash memory module 120 according to an embodiment of the present invention, wherein the flash memory module 120 is a three-dimensional NAND flash memory. Figure 2As shown, block 200 includes a plurality of memory cells (such as the floating gate transistor 202 shown in the figure or other charge trap elements), which form a three-dimensional NAND flash memory architecture through a plurality of bit lines (only BL1 to BL3 are shown in the figure) and a plurality of word lines (such as WL0 to WL2, WL4 to WL6 shown in the figure). Figure 2 In the example of the top plane, all floating gate transistors on word line WL0 constitute at least one data page, all floating gate transistors on word line WL1 constitute at least another data page, and all floating gate transistors on word line WL2 constitute at least another data page... and so on. In addition, depending on the different writing methods of the flash memory, the definition between the word line WL0 and the data page (logical data page) will also be different. Specifically, when writing using the single-level cell (SLC) method, all floating gate transistors on the word line WL0 only correspond to a single logical data page; when writing using the multi-level cell (MLC) method, all floating gate transistors on the word line WL0 correspond to two logical data pages; when writing using the triple-level cell (TLC) method, all floating gate transistors on the word line WL0 correspond to three logical data pages; and when writing using the quad-level cell (QLC) method, all floating gate transistors on the word line WL0 correspond to four logical data pages. Since those with ordinary knowledge in the art should be able to understand the structure of the three-dimensional NAND flash memory and the relationship between the word line and the data page, the relevant details are not repeated here.

[0042] Figure 3The flowchart of the flash memory controller 110 controlling the flash memory module 120 to perform garbage collection operation according to a first embodiment of the present invention is shown in FIG. 300. In step 302, the flash memory controller 110 and the flash memory module 120 enter the startup phase from power-on, that is, from the shutdown or power-off state. In step 302, the flash memory controller 110 and the flash memory module 120 perform initialization operations, that is, the flash memory controller 110 begins to establish a look-up table required for system operation, for example, relevant data can be read from the flash memory module 120 to establish the required look-up table, and temporarily store it in the buffer memory 116. It should be noted that in order to avoid the initialization time being too long and affecting the user's experience, the initialization operation of the flash memory controller 110 is limited by a preset time range, that is, all initialization operations need to be completed within a preset time range, and this preset time range is usually very short, for example, about 1 second or 2 seconds. In addition, since the initialization operation of the flash memory controller 110 is generally designed to be completed within 1 second, the present embodiment proposes that after the initialization operation is completed and the time after the flash memory controller 110 is powered on has not exceeded the above-mentioned preset time range, the flash memory controller 110 performs a special garbage collection operation on the flash memory module 120 during this period to solve the problem of insufficient spare blocks mentioned in the prior art.

[0043] In step 304, the microprocessor 112 in the flash memory controller 110 determines whether the number of spare blocks in the current flash memory module 120 is lower than a first critical value. If so, the process proceeds to step 306; if not, the process proceeds to step 314. Specifically, the microprocessor 112 can determine the number of spare blocks in the current flash memory module 120 through some comparison tables stored in the buffer memory 116, wherein the spare blocks can also be called blank blocks, i.e., blocks to which data has not yet been written, or blocks that only contain invalid data. In this example, the first critical value can be a higher value, such as 20% or 30% of the total number of blocks in the flash memory module 120. For example, referring to Figure 4 The flash memory module 120 includes a plurality of data blocks 410_1, 410_2, 410_3, ... with data written therein and a plurality of spare blocks 420_1-420_N. Assuming that the capacity of the flash memory module 120 is 8 gigabytes (GB), the capacity of each block is 16MB, and the total number of blocks is 500, when the number of spare blocks 420_1-420_N is less than 100 or 150, the process proceeds to step 306. It should be noted that the above-mentioned example of the first critical value is only for illustration and is not intended to be a limitation of the present invention.

[0044] In step 306, the microprocessor 112 controls the flash memory module 120 to start garbage collection. Specifically, the microprocessor 112 may select blocks for garbage collection based on some internal judgment criteria, such as blocks with the most invalid data pages, blocks with the worst data quality, blocks with the most read times, blocks with the most erase times, etc., and / or any other judgment criteria, and sequentially move the valid data in these selected blocks to a spare block. Figure 4 For example, the microprocessor 112 may first sequentially move the contents of the valid data pages in the data block 410_1 to the spare block 420_1, and wait until all the valid data pages in the data block 410_1 are moved before starting to sequentially move the contents of the valid data pages in the data block 410_2 to the spare block 420_1, and then wait until all the valid data pages in the data block 410_2 are moved before starting to sequentially move the contents of the valid data pages in the data block 410_3 to the spare block 420_1, and so on.

[0045] During the garbage collection operation, in step 308, the microprocessor 112 continuously determines whether the time after the flash memory controller 110 is powered on exceeds a preset time range, such as 1 second or 2 seconds. If it exceeds the preset time range, the process enters step 314; if it has not exceeded the preset time range, the process enters step 310 to continue the unfinished garbage collection operation.

[0046] In step 312, the microprocessor 112 determines whether the currently performed garbage collection operation has been completed. If so, the process returns to step 304; if not, the process returns to step 308. Specifically, the microprocessor 112 can determine whether the garbage collection operation has been completed based on whether all data pages of the spare block 420_1 have been filled. That is, when the last data page of the spare block 420_1 has completed data writing, this garbage collection operation is completed, and the microprocessor 112 starts to update the mapping table of the relevant logical address and physical address, and erases the data in the data blocks 410_1, 410_2, and 410_3 to serve as spare blocks. In an example, if all data pages of the spare block 420_1 are filled when the valid data of the data block 410_3 has not been completely moved, the garbage collection operation is completed at this time, but the content of the data block 410_3 is completely retained and waits for the next garbage collection operation to be processed.

[0047] In the above operations of steps 304 to 312, it is mainly described that the flash memory controller 110 performs garbage collection operations within the preset time range for initialization, using the remaining time after the completion of initialization, and the garbage collection operations performed at this time have a higher first critical value, that is, the garbage collection operations are performed when the number of spare blocks is still sufficient. Furthermore, in step 304, if the microprocessor 112 determines that the number of spare blocks in the flash memory module 120 is currently higher than the first critical value, it means that the number of spare blocks is currently sufficient. Therefore, the microprocessor 112 will not actively perform any garbage collection operation within the preset time range of initialization, and the process directly enters step 314. In addition, in step 308, if the time after the flash memory controller 110 is powered on exceeds the preset time range, the microprocessor 112 will temporarily stop the garbage collection operation and enter step 314, for example, temporarily stop moving the valid data of the data blocks 410_1 to 410_3 to the spare block 420_1, and retain the content of the data blocks 410_1 to 410_3.

[0048] In step 314 , the microprocessor 112 modifies the criterion for determining whether to perform garbage collection from the first threshold to a second threshold, wherein the second threshold may be any value lower than the first threshold, for example, the second threshold may be 10% of the total number of blocks in the flash memory module 120 .

[0049] In step 316, the flash memory controller 110 and the flash memory module 120 generally perform access operations, such as reading, writing, and data management. In addition, the microprocessor 112 starts a background operation, wherein the background operation is used to start a garbage collection operation when the flash memory controller 110 and the flash memory module 120 are in an idle state. For example, after receiving a write / read command from the host device 130, if no other write / read command is received within a period of time (e.g., 10 milliseconds or 100 milliseconds), the garbage collection operation that has not been completed before can be continued to be completed, or a new garbage collection operation can be started. For example, assuming that the garbage collection operation started in step 306 is suspended because it exceeds the preset time range described in step 308, the microprocessor 112 can use the idle state of the flash memory controller 110 to gradually move the valid data of the data blocks 410_1-410_3 to the spare block 420_1 until all the data pages of the spare block 420_1 are filled, thereby ending the garbage collection operation. After the spare block 420_1 completes the garbage collection operation and serves as a data block, the microprocessor 112 will only start the garbage collection operation when the number of spare blocks in the flash memory module 120 is lower than the second critical value, so as to avoid frequent garbage collection operations affecting the normal access of the flash memory controller 110.

[0050] As above Figure 3 As described in the embodiment of the present invention, by using a relatively high first critical value as a criterion for the garbage collection operation within the preset time range of the initialization operation, the remaining time of the preset time range can be fully utilized to generate as many spare blocks as possible, so as to avoid the problem of insufficient number of spare blocks. In addition, in the general operation after the initialization is completed, by using a relatively low second critical value as a criterion for the garbage collection operation, it is possible to avoid frequent garbage collection operations affecting the normal access of the flash memory controller 110.

[0051] Figure 5The flowchart is a second embodiment of the present invention, in which the flash memory controller 110 controls the flash memory module 120 to perform garbage collection operation. In step 500, the process starts, and the flash memory controller 110 and the flash memory module 120 enter the startup phase from the power-on state, that is, from the shutdown or power-off state. In step 502, the flash memory controller 110 and the flash memory module 120 perform initialization operation. In step 504, the microprocessor 112 in the flash memory controller 110 determines whether the number of spare blocks in the flash memory module 120 is lower than a first critical value. If so, the process enters step 506; if not, the process enters step 514. For example, the first critical value can be a higher value, such as 20% or 30% of the total number of blocks in the flash memory module 120. In step 506, the microprocessor 112 controls the flash memory module 120 to start the garbage collection operation. Specifically, the microprocessor 112 may select blocks that can be garbage collected based on some internal judgment criteria, and sequentially move the valid data in the selected blocks to a spare block. Figure 4 For example, the microprocessor 112 can sequentially move the contents of valid data pages in the data blocks 410_1, 420_2, and 420_3 to the spare block 420_1. During the garbage collection operation, in step 508, the microprocessor 112 continuously determines whether the time after the flash memory controller 110 is powered on exceeds a preset time range, such as 1 second or 2 seconds. If it exceeds the preset time range, the process enters step 514; if it does not exceed the preset time range, the process enters step 510 to continue the unfinished garbage collection operation.

[0052] It should be noted that the operations of steps 500 to 510 above are the same as those of steps 500 to 510. Figure 3 The operations of steps 300 to 310 are similar, so the details are omitted here.

[0053] In step 512, the microprocessor 112 determines whether the number of data blocks that have all valid data copied to the spare blocks has reached a specific number. If so, the process proceeds to step 514; if not, the process returns to step 508. Specifically, the specific number may be "2", that is, as long as all valid data of the data blocks 410_1 and 420_2 are copied to the spare block 420_1, the microprocessor 112 ends this garbage collection operation, and the microprocessor 112 may write the remaining data pages of the spare block 420_1 into redundant data (dummy data) and start to update the mapping table of the related logical address and physical address, and erase the data in the data blocks 410_1 and 410_2 and use them as spare blocks. Therefore, since the spare block 420_1 is converted into a data block in this garbage collection operation, but two data blocks 410_1 and 410_2 are converted into spare blocks, the number of spare blocks in the flash memory module 120 increases overall.

[0054] In step 514 , the microprocessor 112 modifies the criterion for determining whether to perform a garbage collection operation from the first critical value to a second critical value, wherein the second critical value may be any value lower than the first critical value, for example, the second critical value may be 10% of the total number of blocks in the flash memory module 120 .

[0055] In step 516, the microprocessor 112 starts a background operation, wherein the background operation is used to perform a garbage collection operation when the flash memory controller 110 and the flash memory module 120 are in an idle state. For example, after receiving a write / read command from the host device 130, if no other write / read command is received within a period of time (e.g., 10 milliseconds or 100 milliseconds), the microprocessor 112 can start to complete the previously unfinished garbage collection operation or start a new garbage collection operation. For example, assuming that the garbage collection operation started in step 506 is suspended because it exceeds the preset time range described in step 508, the microprocessor 112 can use the flash memory controller 110 to be in an idle state to gradually move the valid data of the data blocks 410_1 to 410_3 to the spare block 420_1 until all the data pages of the spare block 420_1 are filled, thereby ending this garbage collection operation. In another example, the microprocessor 112 can use the flash memory controller 110 to be in an idle state to gradually move valid data of the data blocks 410_1 and 410_2 to the spare block 420_1 until all valid data of the data block 410_2 is copied to the spare block 420_1, and then end the garbage collection operation, write the remaining data pages of the spare block 420_1 into redundant data (dummy data), start updating the mapping table of the related logical address and physical address, and erase the data in the data blocks 410_1 and 410_2 to be used as spare blocks. In addition, after the spare block 420_1 completes the garbage collection operation and is used as a data block, the microprocessor 112 will only start the garbage collection operation when the number of spare blocks in the flash memory module 120 is lower than the second critical value, so as to avoid frequent garbage collection operations affecting the normal access of the flash memory controller 110.

[0056] As above Figure 5 As described in the embodiment, by using a relatively high first critical value as a judgment basis for the garbage collection operation within the preset time range of the initialization operation, the remaining time of the preset time range can be fully utilized to generate as many spare blocks as possible, so as to avoid the problem of insufficient number of spare blocks. In one embodiment, since the garbage collection operation performed within the remaining time of the preset time range stops when one spare block is generated (that is, the two data blocks 410_1 and 410_2 complete the transfer of all valid data and are converted into spare blocks), it is possible to avoid excessively affecting the normal access of the subsequent flash memory controller 110 by the garbage collection operation, and also reduce the probability that the garbage collection operation cannot be completed due to an abnormal power failure.

[0057] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made according to the scope of the patent application of the present invention should fall within the scope of the present invention.

Claims

1. A flash memory controller, wherein the flash memory controller is used to access a flash memory module, and the flash memory controller comprises: A read-only memory for storing a program code; a microprocessor, used to execute the program code to control access to the flash memory module; When the flash memory controller is powered on and performs an initialization operation, the microprocessor determines whether the number of spare blocks in the flash memory module is lower than a first critical value within a preset time range of the initialization operation to determine whether a garbage collection operation is to be performed; and when the time after the flash memory controller is powered on exceeds the preset time range, the microprocessor determines whether the number of spare blocks in the flash memory module is lower than a second critical value to determine whether another garbage collection operation is to be performed, wherein the second critical value is lower than the first critical value.

2. The flash memory controller according to claim 1, wherein: When the flash memory controller is powered on and performs the initialization operation, if the number of spare blocks in the flash memory module is not less than the first critical value, the microprocessor will not perform any garbage collection operation on the flash memory module within the preset time range; And if the number of spare blocks in the flash memory module is lower than the first critical value, the microprocessor performs the garbage collection operation on the flash memory module.

3. The flash memory controller according to claim 1 or 2, wherein: When the time after the flash memory controller is powered on exceeds the preset time range, but the garbage collection operation has not been completed, the microprocessor executes a background operation to continue the garbage collection operation when it is determined that the flash memory controller is in an idle state until the garbage collection operation is completed; And after the garbage collection operation is completed, if the number of spare blocks in the flash memory module is not less than the second critical value, the microprocessor does not perform the other garbage collection operation on the flash memory module; and if the number of spare blocks in the flash memory module is less than the second critical value, the microprocessor performs the other garbage collection operation on the flash memory module.

4. The flash memory controller according to claim 3, wherein: When the time after the flash memory controller is powered on exceeds the preset time range, but the garbage collection operation has not been completed, the microprocessor executes the background operation to continue the garbage collection operation when it is determined that the flash memory controller is in an idle state, until all data pages of a spare block used to store valid data of the data block are full, thereby terminating the garbage collection operation.

5. The flash memory controller according to claim 3, wherein: When the time after the flash memory controller is powered on exceeds the preset time range, but the garbage collection operation has not been completed, the microprocessor executes the background operation to continue the garbage collection operation when it is determined that the flash memory controller is in an idle state, until the number of multiple data blocks in which valid data is copied to a spare block reaches a specific number, thereby terminating the garbage collection operation.

6. The flash memory controller according to claim 5, wherein: That particular number is two.

7. The flash memory controller according to claim 5, wherein: After all valid data of the plurality of data blocks having a specific number are copied to the spare block, if there are remaining data pages in the spare block, the microprocessor writes the remaining data pages into redundant data.

8. An electronic device comprising: a flash memory module; and a flash memory controller for accessing the flash memory module; When the flash memory controller is powered on and performs an initialization operation, the flash memory controller determines whether the number of spare blocks in the flash memory module is lower than a first critical value within a preset time range of the initialization operation to determine whether a garbage collection operation is to be performed; and when the time after the flash memory controller is powered on exceeds the preset time range, the flash memory controller determines whether the number of spare blocks in the flash memory module is lower than a second critical value to determine whether another garbage collection operation is to be performed, wherein the second critical value is lower than the first critical value.

9. The electronic device as claimed in claim 8, characterized in that: When the flash memory controller is powered on and performs the initialization operation, if the number of spare blocks in the flash memory module is not less than the first critical value, the flash memory controller will not perform any garbage collection operation on the flash memory module within the preset time range; And if the number of spare blocks in the flash memory module is lower than the first critical value, the flash memory controller performs the garbage collection operation on the flash memory module.

10. The electronic device according to claim 8 or 9, characterized in that: When the time after the flash memory controller is powered on exceeds the preset time range, but the garbage collection operation has not been completed, the flash memory controller executes a background operation to continue the garbage collection operation when it is determined that the flash memory controller is in an idle state until the garbage collection operation is completed; And after the garbage collection operation is completed, if the number of spare blocks in the flash memory module is not less than the second critical value, the flash memory controller does not perform the other garbage collection operation on the flash memory module; and if the number of spare blocks in the flash memory module is less than the second critical value, the flash memory controller performs the other garbage collection operation on the flash memory module.

11. The electronic device according to claim 10, wherein: When the time after the flash memory controller is powered on exceeds the preset time range, but the garbage collection operation has not been completed, the flash memory controller executes the background operation to continue the garbage collection operation when it is determined that the flash memory controller is in an idle state until all data pages of a spare block used to store valid data of the data block are full, thereby terminating the garbage collection operation.

12. The electronic device according to claim 10, wherein: When the time after the flash memory controller is powered on exceeds the preset time range, but the garbage collection operation has not been completed, the flash memory controller executes the background operation to continue the garbage collection operation when it is determined that the flash memory controller is in an idle state, until the number of multiple data blocks in which valid data is copied to a spare block reaches a specific number, thereby terminating the garbage collection operation.

13. The electronic device according to claim 12, wherein: That particular number is two.

14. The electronic device according to claim 12, wherein: After all valid data of the plurality of data blocks having a specific number are copied to the spare block, if there are remaining data pages in the spare block, the flash memory controller writes the remaining data pages into redundant data.

15. A method for performing garbage collection operation on a flash memory module, comprising: When a flash memory controller for accessing the flash memory module is powered on and performs an initialization operation, within a preset time range of the initialization operation, determining whether the number of spare blocks in the flash memory module is lower than a first critical value to determine whether to perform a garbage collection operation; and When the time after the flash memory controller is powered on exceeds the preset time range, it is determined whether the number of spare blocks in the flash memory module is lower than a second critical value to determine whether another garbage collection operation is to be performed, wherein the second critical value is lower than the first critical value.

16. The method according to claim 15, characterized in that The step of determining whether the number of spare blocks in the flash memory module is lower than the first critical value to determine whether to perform the garbage collection operation comprises: When the flash memory controller is powered on and performs the initialization operation, if the number of spare blocks in the flash memory module is not less than the first critical value, no garbage collection operation is performed on the flash memory module within the preset time range; as well as If the number of spare blocks in the flash memory module is lower than the first critical value, the garbage collection operation is performed on the flash memory module.

17. The method according to claim 15 or 16, characterized in that Also included: When the time after the flash memory controller is powered on exceeds the preset time range, but the garbage collection operation has not been completed, a background operation is executed to continue the garbage collection operation when it is determined that the flash memory controller is in an idle state until the garbage collection operation is completed; as well as After the garbage collection operation is completed, if the number of spare blocks in the flash memory module is not less than the second critical value, the other garbage collection operation is not performed on the flash memory module; if the number of spare blocks in the flash memory module is less than the second critical value, the other garbage collection operation is performed on the flash memory module.

18. The method according to claim 17, characterized in that When the time after the flash memory controller is powered on exceeds the preset time range, but the garbage collection operation has not been completed, the steps of executing the background operation to continue the garbage collection operation when it is determined that the flash memory controller is in an idle state until the garbage collection operation is completed include: When the time after the flash memory controller is powered on exceeds the preset time range, but the garbage collection operation has not been completed, the background operation is executed to continue the garbage collection operation when the flash memory controller is in an idle state until all data pages of a spare block used to store valid data of the data block are full, thereby terminating the garbage collection operation.

19. The method according to claim 17, characterized in that When the time after the flash memory controller is powered on exceeds the preset time range, but the garbage collection operation has not been completed, the steps of executing the background operation to continue the garbage collection operation when the flash memory controller is in an idle state until the garbage collection operation is completed include: When the time after the flash memory controller is powered on exceeds the preset time range, but the garbage collection operation has not been completed, the background operation is executed to continue the garbage collection operation when it is determined that the flash memory controller is in an idle state, until the number of multiple data blocks in which valid data is copied to a spare block reaches a specific number, thereby terminating the garbage collection operation.

20. The method of claim 19, wherein: That particular number is two.

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