Event stream processing method, electronic device, and computer readable medium

Abstract

The present disclosure provides an event stream processing method, comprising: obtaining at least one to-be-processed event; determining a to-be-processed event as a current target event and performing a write operation; determining a corresponding write memory slice of the current target event from a plurality of preset memory slices according to a time interval to which a timestamp of the current target event belongs, and determining a corresponding target address of the current target event according to an event object of the current target event; and updating data stored in the target address of the write memory slice according to a change value of the current target event. The present disclosure also provides an electronic device and a computer readable medium.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of data stream processing, in particular to an event stream processing method, an electronic device and a computer readable medium. BACKGROUND

[0002] An event stream is a stream of events, and an event as a constituent element thereof is a record of an action or a state transition that has occurred in an information system in terms of semantics. The event stream can be applied to various scenarios involving rapid changes in information, such as stock futures trading, shooting of high-speed moving objects, and the like. However, the corresponding information system produces a large amount of information events in a short time, and the processing speed of the event stream of the system is limited, so that the processing output of the events does not match the collection speed of the events, resulting in that the data of the event stream cannot be intuitively fed back in time. SUMMARY

[0003] The present disclosure provides an event stream processing method, an electronic device and a computer readable medium.

[0004] In a first aspect, the present disclosure provides an event stream processing method, comprising:

[0005] obtaining at least one to-be-processed event; the to-be-processed event comprises a corresponding timestamp, an event object and a change value, and is used to represent that the change value of the event object has changed at the time of the timestamp;

[0006] determining one of the to-be-processed events as a current target event, and performing a write operation: determining a corresponding write memory slice of the current target event from a plurality of preset memory slices according to a time interval to which the timestamp of the current target event belongs, determining a corresponding target address of the current target event according to the event object of the current target event, and accumulating and updating the data stored in the target address of the write memory slice according to the change value of the current target event.

[0007] In a second aspect, the present disclosure provides an electronic device, comprising:

[0008] a processor comprising a plurality of memory slices;

[0009] a memory configured to store one or more programs;

[0010] When the one or more programs are executed by the processor, the processor implements the event stream processing method as described in the above embodiments.

[0011] In a third aspect, the present disclosure provides a computer readable medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the event stream processing method as described in the above embodiments.

[0012] The event stream processing method, the electronic device and the computer readable medium provided by the present disclosure can realize fast and orderly processing of the event stream by setting multiple memory chips, and performing write operation on the to-be-processed event based on the correspondence between the time stamp and the memory chip and the correspondence between the time description and the target address; and in some implementations, while the write operation is performed, the to-be-processed event whose time stamp meets the preset first reading condition is read in the corresponding memory chip, and an event frame is output, so that the write operation and the read operation can be performed simultaneously.

[0013] It should be understood that the content described in this part is not intended to identify key or important features of the embodiments of the present disclosure, nor to limit the scope of the present disclosure. Other features of the present disclosure will become apparent to those skilled in the art through the following description. BRIEF DESCRIPTION OF DRAWINGS

[0014] The accompanying drawings are intended to provide further understanding of the present disclosure, and constitute a part of the specification, together with the embodiments of the present disclosure, for explaining the present disclosure, and do not constitute a limitation of the present disclosure. The above and other features and advantages will become more apparent to those skilled in the art through the description of the detailed example embodiments by referring to the accompanying drawings, in which:

[0015] Figure 1 A flowchart of an event stream processing method provided for an embodiment of the present disclosure;

[0016] Figure 2 A flowchart of a specific implementation method for step S2 in an embodiment of the present disclosure;

[0017] Figure 3 A flowchart of a specific implementation method for step S3 in an embodiment of the present disclosure;

[0018] Figure 4 A flowchart of a specific implementation method for step S3 in an embodiment of the present disclosure;

[0019] Figure 5 A flowchart of another specific implementation method for step S3 in an embodiment of the present disclosure;

[0020] Figure 6 A flowchart of a specific implementation method for step S201 in an embodiment of the present disclosure;

[0021] Figure 7 A structural block diagram of an event stream processing system provided for an embodiment of the present disclosure;

[0022] Figure 8 A composition block diagram of an electronic device provided for an embodiment of the present disclosure;

[0023] Figure 9A constituent block diagram of a computer readable medium provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0024] In order for those skilled in the art to better understand the technical solutions of the present disclosure, the following describes exemplary embodiments of the present disclosure with reference to the accompanying drawings, including various details of the embodiments of the present disclosure to help understanding, which should be considered only as exemplary. Therefore, those skilled in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Also, for the sake of clarity and conciseness, the description below omits the description of well-known functions and structures.

[0025] The embodiments of the present disclosure and the features in the embodiments can be combined with each other without conflict.

[0026] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0027] The terms used herein are only used to describe specific embodiments and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the terms "comprise" and / or "consist of," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. The terms "connected" or "coupled" and / or similar terms are not limited to a physical or mechanical connection or linkage to either another part or device and can also include an electrical connection, whether direct or indirect.

[0028] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an overly literal or overly formal sense unless expressly so defined herein.

[0029] Figure 1 A flowchart of an event stream processing method provided by an embodiment of the present disclosure. As shown in the figure, the method comprises: Figure 1

[0030] Step S1, acquiring at least one event to be processed.

[0031] ​The to-be-processed event includes a corresponding timestamp, an event object, and a change value, the event object is also referred to as an event description, and the event is used to represent that the event object has changed by the change value at the time of the timestamp; specifically, the event stream is an asynchronous data stream, each event transmitted embodies the change of a specific object at each time node collected, and the timestamp, the event object, and the change value are event elements of each event formatted; in some embodiments, the timestamp, the event object, and the change value are embodied in the form of a relation tuple, for example, when the event stream is a transaction event stream, the event elements of each event transmitted can include a three-tuple composed of a timestamp, a transaction object, and a transaction amount, and for example, when the plurality of to-be-processed events are collected by a dynamic vision sensor (DVS) based collection device, the event elements of each event can include a four-tuple composed of a timestamp, a pixel coordinate (a plane coordinate system), and a brightness change value.

[0032] In some embodiments, at least one to-be-processed event is acquired at a certain time interval; the time interval is related to a collection period of the event or related to a system frame conversion processing speed.

[0033] In some embodiments, the step S1 of acquiring at least one to-be-processed event includes: storing the acquired to-be-processed event in a buffer; in some embodiments, the buffer is a first input first output (FIFO) buffer.

[0034] The step S2 includes: determining a to-be-processed event as a current target event, and performing a write operation.

[0035] Figure 2 A specific implementation method flowchart of the step S2 in the embodiment of the present disclosure is shown in FIG. 2. Figure 2 As shown in FIG. 2, the step S2 includes a step S201 and a step S202.

[0036] The step S201 includes: determining a corresponding write-in memory slice of the current target event from a plurality of preset memory slices according to a time interval to which a timestamp of the current target event belongs, and determining a corresponding target address of the current target event according to an event object of the current target event.

[0037] In the step S201, a corresponding write-in memory slice of the current write operation is determined according to the timestamp of the current target event, and a corresponding target address of the write operation is determined according to the event object as event identification information.

[0038] In some embodiments, the to-be-processed events are acquired by a dynamic visual sensor-based acquisition device, and in particular, the acquisition device does not output events in a time stamp order, and the time stamps of events output within a certain time interval differ by a value that is not too large. Thus, in some embodiments, the number of memory slices is determined according to a preset maximum time stamp difference value, so that the maximum time stamp difference value is less than or equal to the number of memory slices plus 1.

[0039] In step S202, data stored in the target address of the write memory slice is updated according to the change value of the current target event.

[0040] In the above method, each memory slice corresponds to an event frame, and reading data in each memory slice can generate a corresponding event frame. Each event frame reflects the change of the corresponding event within a certain time period. Thus, the pixel value in each event frame corresponds to the accumulation result of the change value written in a reading period, and corresponds to the accumulation process of the change value. The accumulation process corresponds to the above data updating based on the change value. For example, when the plurality of to-be-processed events are acquired by a dynamic visual sensor-based acquisition device, the luminance change value is accumulated, the luminance of each pixel is represented by accumulated events, the relative luminance change in a short time is embodied, and the real-time luminance of the corresponding pixel is simulated.

[0041] In some embodiments, in step S202, the step of updating the data stored in the target address of the write memory slice according to the change value of the current target event includes: reading a current value stored in the target address of the write memory slice, inputting the current value and the change value of the current target event to an adder, and writing the output result of the adder to the target address of the write memory slice.

[0042] In some embodiments, corresponding to the case of storing the acquired to-be-processed events in the buffer in step S1, in step S2, the step of determining that a to-be-processed event is a current target event includes: determining that the earliest stored to-be-processed event in the buffer is the current target event.

[0043] In some embodiments, the method further includes step S3.

[0044] In step S3, a reading operation is performed when a reading condition is met.

[0045] Figure 3 A specific implementation method flowchart of step S3 in the embodiments of the present disclosure is shown in FIG. 3. Figure 3 As shown in FIG. 3, step S3 includes steps S301 to S303.

[0046] In step S301, a read memory slice is determined from a plurality of memory slices.

[0047] The read memory slice is determined from the plurality of memory slices based on a corresponding read condition.

[0048] In step S302, data stored in each address of the read memory slice is read, and an event frame is generated according to a preset mapping relationship between the address and an object in the frame.

[0049] The event frame represents a change value of each object in a corresponding time interval thereof; while the read operation is performed on the read memory slice, the write operation is still performed on the write memory slice, thereby realizing simultaneous framing of a plurality of event frames.

[0050] In some embodiments, the objects in the frame are allocated in order from a low address to a high address, so as to establish the mapping relationship thereof.

[0051] In some embodiments, the arrangement of each address of the memory slice can be embodied in the form of rows and columns, so that the row and column information corresponding to each address can be mapped to the object in the frame.

[0052] In step S303, the read memory slice is emptied.

[0053] After the data stored in each address of the read memory slice is read, zero is written to each address of the read memory slice, so as to empty the second memory slice, so that the read memory slice can be used for accumulation of change values of events in the next read period.

[0054] Figure 4 A specific implementation method flowchart for step S3 in the embodiments of the present disclosure. Specifically, a specific optional implementation manner corresponding to steps S301 to S303 is as shown in FIG. 3, in step S3, the step of determining the corresponding target address according to the event object of the current target event comprises: Figure 4

[0055] In step S3a, when the timestamp of the current target event satisfies a preset first read condition, a read operation is performed: a corresponding read memory slice is determined from the plurality of memory slices according to a time interval to which the timestamp of the current target event belongs, data stored in each address of the read memory slice is read, and an event frame is generated according to a preset mapping relationship between the address and an object in the frame.

[0056] Although the read memory slice and the write memory slice are both determined based on the time interval to which the timestamp of the current target event belongs, they are not the same, the read time corresponding to the read memory slice is later than the write time corresponding to the write memory slice, and the read time and the write time are not in the same time interval; that is, for the same memory slice, the time of reading the memory slice is later than the time of writing data into the memory slice.

[0057] ​In some embodiments, it is determined whether the timestamp of the current target event satisfies the preset first reading condition according to a size relationship between the timestamp and a preset comparison threshold; and in some embodiments, the number identifier of the memory slice is determined based on the size relationship to determine the memory slice to be read.

[0058] In some embodiments, when the time interval to which the timestamp of the current target event belongs is any one of the preset reading trigger intervals, it is determined that the timestamp of the current target event satisfies the preset first reading condition; and the memory slice corresponding to the reading trigger interval is determined as the memory slice to be read. In some embodiments, all time intervals after the nth time interval from the starting time are reading trigger intervals, and n is greater than or equal to 1.

[0059] Figure 5 Another specific implementation method flowchart for step S3 in the embodiments of the present disclosure. Specifically, a specific optional implementation corresponding to steps S301 to S303 is as shown in FIG. 3B, in which step S3, the step of determining the target address corresponding to the current target event according to the event object of the current target event, includes: Figure 5

[0060] Step S3b, when the system time satisfies the preset second reading condition, performing a reading operation: determining the corresponding reading memory slice from the plurality of memory slices according to the system time, reading the data stored in each address of the reading memory slice, and generating an event frame according to the preset mapping relationship between the address and the object in the frame.

[0061] The system time is used to realize time synchronization and clock cycle calibration of each module and hardware in the system; in some embodiments, the system time is generated by a corresponding timer, and whether the system time satisfies the second reading condition is determined based on a timer trigger event.

[0062] In some embodiments, when the system time is equal to any one of the preset reading period values, it is determined that the system time satisfies the second reading condition; and the reading memory slice corresponding to the current reading period is determined according to the reading period value corresponding to the system time.

[0063] In some embodiments, for the writing operation and the reading operation described in the embodiments of the present disclosure, the target address is input to the arbiter, and the memory slice corresponding to the writing operation and the reading operation is indicated to the arbiter; the arbiter determines to write or read the corresponding address in each memory slice.

[0064] ​The embodiment of the present disclosure provides an event stream processing method, which can realize fast and orderly processing of the event stream by setting a plurality of memory slices, and performing a write operation on the to-be-processed event based on the correspondence between the timestamp and the memory slice, and the correspondence between the time description and the target address; and in some implementations, while the write operation is performed, the to-be-processed event whose timestamp meets a preset first reading condition is read in the corresponding memory slice, and an event frame is output, so that the write operation and the read operation can be performed at the same time.

[0065] Figure 6 A specific implementation method flowchart of step S201 in the embodiment of the present disclosure. Specifically, the to-be-processed event is obtained by a collection device based on a dynamic visual sensor, the event object includes a pixel coordinate, and the change value includes a luminance change value; as shown in the figure, Figure 6 In step S201, the step of determining the target address corresponding to the current target event according to the event object of the current target event includes:

[0066] Step S2011, input the pixel coordinate corresponding to the current target event into the spatial down-sampling mapper.

[0067] In the spatial down-sampling mapper, the input pixel coordinate corresponding to the current target event is down-sampled, so that the input pixel coordinate meets the requirements of the size and coordinate system of the output event frame image, and the event frame is generated.

[0068] Step S2012, determine the target address according to the output result of the spatial down-sampling mapper and a preset address mapping coefficient.

[0069] The pixel coordinate corresponding to the current target event after down-sampling is mapped to the address of the memory slice based on the corresponding address mapping coefficient, so as to generate the event frame according to the mapping relationship between the address of the memory slice and the object in the frame.

[0070] The event stream processing method provided by the present disclosure is described in detail in combination with actual application.

[0071] Figure 7 A structural block diagram of an event stream processing system provided by the embodiment of the present disclosure. As shown in the figure, Figure 7 The event stream processing system includes a buffer, a controller, a spatial down-sampling mapper, an address mapping module, a write control module, a read switching and enabling control module, a read address generation module, a memory array and an adder ADD, wherein the memory array includes an arbiter and a plurality of memory slices (each rectangle filled with black in the figure), and the number of memory slices shown in the figure is five as an example; the arrow in the figure shows the data transmission direction.

[0072] Specifically, a plurality of to-be-processed events collected by the collection device and stored in the buffer are obtained every preset time interval, the buffer is a first-in first-out buffer, the controller is configured to control the address generation and write enable of the buffer and the memory array, each to-be-processed event includes a respective time stamp, an event object and a change value, for example, the collection device based on the dynamic visual sensor continuously collects and outputs a to-be-processed event stream during the working time, and the event object of each to-be-processed event transmitted corresponds to a pixel coordinate (a planar coordinate system), and the change value corresponding to each to-be-processed event is a luminance change value, so that the event elements of each to-be-processed event include a four-tuple (x, y, Δpt, t) composed of a pixel coordinate (x, y), a luminance change value (Δpt) and a time stamp (t).

[0073] Thereafter, a parameter determination process for the write operation is performed: a to-be-processed event is determined as a current target event, the four-tuple (x, y, Δpt, t) corresponding to the current target event is obtained, the time stamp t of the current target event is input to the write control module, the write control module determines the number identifier r1 of the corresponding memory slice based on the formula r1 = (t / Δt) mod N to determine the corresponding write memory slice, that is, the first memory slice r1, wherein Δt is a preset time interval, and N is the number of memory slices; and the pixel coordinates (x, y) are input to the spatial down-sampling mapper, and the output result (x d ,y d ) of the spatial down-sampling mapper is input to the address mapping module, and the address mapping module determines the target address addrA based on the formula addrA = yd*W + xd according to the preset address mapping coefficient W.

[0074] At the same time, a parameter determination process for the read operation is performed: for the four-tuple (x, y, Δpt, t) corresponding to the current target event, the read operation is performed when the time stamp t of the current target event satisfies a preset first read condition, wherein the time stamp t of the current target event is input to the read switching and enable control module, and when the module detects that the time stamp t of the current target event is in a preset read trigger interval, it is determined that the time stamp t of the to-be-processed event satisfies the first read condition, specifically, the time stamp t increases in value as the system time elapses, and in some embodiments, the time stamp t is set in a loop; the read switching and enable control module determines the second memory slice r2 corresponding to the current read period according to the read trigger interval corresponding to the time stamp t of the current target event, takes it as the read memory slice, and performs read enable, and controls the read address generation module to continuously generate the read address addrB.

[0075] Afterwards, the memory array judges the write operation and the read operation: the number identifier r1 of the first memory chip, the number identifier r2 of the second memory chip, the target address addrA and the read address addrB are input to the arbitrator, and the arbitrator decides to write or read the corresponding address in each memory chip, thereby writing the target address addrA of the first memory chip r1, reading the current value p stored in the target address addrA of the first memory chip r1, inputting the current value p and the brightness change value Δpt of the current target event to the adder ADD, and writing the output result Δpt+p of the adder ADD to the target address addrA of the first memory chip r1; and reading the data in the second memory chip r2 according to the continuously generated read address addrB, and generating and outputting the event frame data according to the preset address and the mapping relationship of the objects in the frame, and then emptying the second memory chip r2, and the output event frame data is affected by the validity indication valid output by the read switch and the enable control module, and when the validity indication valid is 1, the output event frame data is valid.

[0076] Figure 8 A composition block diagram of an electronic device is provided for the embodiments of the present disclosure. As shown in the figure, the electronic device includes: Figure 8

[0077] a processor 101, the processor 101 including a plurality of memory chips;

[0078] a memory 102, one or more programs being stored on the memory 102, when the one or more programs are executed by the processor, the processor 101 implements the event stream processing method of any of the above embodiments;

[0079] one or more I / O interfaces 103 connected between the processor and the memory, configured to realize the information interaction of the processor and the memory.

[0080] The processor 101 is a device with data processing capability, including but not limited to a central processing unit (CPU) and the like; the memory 102 is a device with data storage capability, including but not limited to a random access memory (RAM, more specifically SDRAM, DDR, etc.), a read-only memory (ROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory (FLASH); the I / O interface (read-write interface) 203 is connected between the processor 101 and the memory 102, and can realize the information interaction of the processor 101 and the memory 102, including but not limited to a data bus (Bus) and the like.

[0081] In some embodiments, the processor 101, the memory 102 and the I / O interface 103 are connected to each other through the bus 104, and further connected to other components of the computing device. ​

[0082] In some embodiments, the plurality of processors 101 comprises a plurality of graphics processors (GPUs) that, in combination, form a graphics processor array.

[0083] Figure 9 A constituent block diagram of a computer readable medium provided by embodiments of the present disclosure is shown. The computer readable medium has stored thereon a computer program, wherein the computer program, when executed by a processor, implements the steps in the event stream processing method of any of the above embodiments.

[0084] Those of ordinary skill in the art will appreciate that all or certain steps in the methods disclosed above, and the functions of the modules / units in the systems and apparatuses, can be implemented as software, firmware, hardware, or any suitable combination thereof. In a hardware implementation, the division of the functions between the modules / units referred to in the above description does not necessarily correspond to the division of physical components; for example, one physical component can have multiple functions, or one function or step can be performed by several physical components working together. Certain physical components or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on computer readable media, which can include computer storage media (or non-transitory media) and communication media (or transitory media). As is well known to those of ordinary skill in the art, the term computer storage media includes both volatile and non-volatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Further, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media. The above description is illustrative and not restrictive. Many variations of the systems and apparatuses implementing the processes described herein will become apparent to those of ordinary skill in the art upon reviewing the above description, and the general principles described above can be applied to other variations as

[0085] Example embodiments have been disclosed herein and, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation. In some instances, it will be apparent to those skilled in the art that features, characteristics or / and elements described in connection with a particular embodiment can be used in conjunction with other embodiments unless otherwise explicitly stated. Accordingly, it will be understood that various changes in form and details can be made without departing from the scope of the disclosure as set forth in the appended claims.

Claims

1. An event stream processing method, comprising: Get at least one pending event; The event to be processed includes its corresponding timestamp, event object, and change value, which are used to characterize that the change value of the event object has changed at the timestamp. Identify one of the events to be processed as the current target event and perform a write operation: determine the corresponding write memory segment from multiple preset memory segments according to the time interval to which the timestamp of the current target event belongs, and determine the corresponding target address according to the event object of the current target event; The data stored at the target address of the memory slice is updated by cumulatively updating the change value of the current target event; During the write operation, a read operation is performed when the read condition is met: the read memory slice is determined from multiple memory slices, the data stored in each address of the read memory slice is read, and an event frame is generated according to the preset address-object mapping relationship in the frame, and the read memory slice is cleared; the event frame represents the change value of each object in its corresponding time interval.

2. The event stream processing method according to claim 1, wherein, The step of performing a read operation when the read conditions are met includes: When the timestamp of the current target event meets the preset first reading condition, a reading operation is performed: based on the time interval to which the timestamp of the current target event belongs, the corresponding reading memory slice is determined from the plurality of memory slices, the data stored in each address of the reading memory slice is read, and the event frame is generated according to the preset mapping relationship between the address and the object in the frame.

3. The event stream processing method according to claim 2, wherein, The step of performing a read operation when the timestamp of the current target event meets a preset first read condition includes: When the time interval to which the timestamp of the current target event belongs is any preset read trigger interval, it is determined that the timestamp of the current target event satisfies the preset first read condition; and the memory chip corresponding to the read trigger interval is determined as the read memory chip.

4. The event stream processing method according to claim 1, wherein, The step of performing a read operation when the read conditions are met includes: When the system time meets the preset second reading condition, a reading operation is performed: based on the system time, the corresponding reading memory chip is determined from the plurality of memory chips, the data stored in each address of the reading memory chip is read, and the event frame is generated according to the preset address-to-frame object mapping relationship.

5. The event stream processing method according to claim 4, wherein, When the system time meets the preset second reading condition, a reading operation is performed, including: When the system time is equal to any preset read cycle value, it is determined that the system time satisfies the second read condition; and the read memory chip corresponding to the current read cycle is determined according to the read cycle value corresponding to the system time.

6. The event stream processing method according to claim 1, wherein, Write and read operations include: Indicate the memory slices corresponding to the write and read operations to the arbitrator, and input the addresses corresponding to the write and read operations to the arbitrator; The arbitrator determines whether to write or read from the corresponding address in each memory chip.

7. The event stream processing method according to claim 1, wherein, The multiple events to be processed are acquired by a data acquisition device based on a dynamic vision sensor; The event object includes pixel coordinates, and the change values ​​include brightness changes.

8. The event stream processing method according to claim 7, wherein, Determining the corresponding target address based on the event object of the current target event includes: Input the pixel coordinates corresponding to the current target event into the spatial downsampling mapper; The target address is determined based on the output of the spatial downsampling mapper and the preset address mapping coefficients.

9. The event stream processing method according to claim 1, wherein, The acquisition of at least one event to be processed includes: Store the acquired events to be processed into a buffer; Determining one of the events to be processed as the current target event includes: The earliest pending event stored in the buffer is taken as the current target event.

10. The event stream processing method according to claim 1, wherein, The step of accumulating and updating the data stored in the target address of the memory slice based on the change value of the current target event includes: Read the current value stored in the target address of the memory slice to be written, input the current value and the change value of the current target event into the adder, and write the output of the adder into the target address of the memory slice.

11. An electronic device, comprising: The processor includes multiple memory chips; Memory, used to store one or more programs; When the processor executes the one or more programs, the processor implements the event stream processing method as described in any one of claims 1-10.

12. A computer-readable medium having a computer program stored thereon, wherein, When the computer program is executed by the processor, it implements the steps in the event stream processing method as described in any one of claims 1-10.

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