Semiconductor structure and method for preparing semiconductor structure
By forming a diffusion barrier layer containing adsorbent elements on the buffer layer of the semiconductor device, the memory effect problem caused by the diffusion elements is solved, and higher device performance and structural quality are achieved.
Patent Information
- Application Number
- CN201980096751.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-06-10
- Publication Date
- 2025-05-30
- Estimated Expiration
- 2039-06-10
AI Technical Summary
The diffusion elements such as Mg, Fe, etc. used in semiconductor devices in the prior art will cause memory effects and affect device performance.
By forming a diffusion barrier layer on the buffer layer, the layer including adsorbent elements, such as Group III elements in the III-V compound, to block diffusion of the diffusion element and avoid stress release through component changes of the adsorbent elements.
Effectively prevent diffusion elements from diffusion from the buffer layer to the channel layer, avoid memory effects, improve the performance of semiconductor devices, and reduce stress release through component changes, thereby improving structural quality.
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Figure CN113906574B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of microelectronic technology, and particularly to a semiconductor structure and a method for manufacturing the semiconductor structure. Background of the Invention
[0003] Currently, epitaxy is commonly used in the semiconductor industry. For example, chemical vapor deposition (CVD) methods are often used as epitaxy methods to form an epitaxial layer on a substrate. During growth, impurity doping of the epitaxial layer can be employed to control the electrical properties of the layer. For example, common acceptor dopants in nitride semiconductor layers include Be, Mg, C, Fe, etc. However, among these elements, the use of Mg, Fe, etc. can cause problems of "memory effect", which can have an adverse effect on the performance of semiconductor devices. Summary of the Invention
[0004] In view of this, the present application provides a semiconductor structure and a method for manufacturing the semiconductor structure to avoid the memory effect of diffusion elements in the prior art.
[0005] On the one hand, the present application provides a semiconductor structure, including: a buffer layer, the buffer layer including a diffusion element; a diffusion barrier layer formed on the buffer layer, the diffusion barrier layer including an adsorptive element; and a channel layer formed on the diffusion barrier layer.
[0006] In an embodiment of the present application, the diffusion element in the buffer layer includes a metal element.
[0007] In an embodiment of the present application, the material used for the diffusion barrier layer includes a III-V compound, and the group III element in the III-V compound can be the adsorptive element.
[0008] In an embodiment of the present application, the III-V compound includes a compound of In.
[0009] In an embodiment of the present application, the compound of In includes InGaN.
[0010] In an embodiment of the present application, the compound of In includes AlInGaN, where the component of Al is less than the component of In.
[0011] In an embodiment of the present application, along the epitaxial direction of the diffusion barrier layer, the component of the adsorptive element in the diffusion barrier layer decreases.
[0012] On the other hand, the present application provides a method for manufacturing a semiconductor structure, including: forming a buffer layer, the buffer layer including a diffusion element; forming a diffusion barrier layer on the buffer layer, the diffusion barrier layer including an adsorptive element; and forming a channel layer on the diffusion barrier layer.
[0013] In one embodiment of the present application, the diffusion barrier layer comprises a III-V compound, and the group III element in the III-V compound is the adsorbing element.
[0014] In one embodiment of the present application, the III-V compound comprises a compound of In.
[0015] In one embodiment of the present application, the compound of In comprises InGaN.
[0016] In one embodiment of the present application, the compound of In comprises AlInGaN, wherein the component of Al is less than the component of In.
[0017] In one embodiment of the present application, along the epitaxial direction of the diffusion barrier layer, the component of the adsorbing element in the diffusion barrier layer decreases.
[0018] In one embodiment of the present application, the diffusing element comprises a metal element.
[0019] In one embodiment of the present application, the formation temperature of the diffusion barrier layer does not exceed 900 °C.
[0020] In this embodiment, the diffusion barrier layer is provided with an adsorbing element for adsorbing the diffusing element, so as to effectively block the diffusion of the diffusing element from the buffer layer to the channel layer. In addition, by setting the component change of the adsorbing element in the diffusion barrier layer, the stress release of the diffusion barrier layer is avoided.
[0021] Brief Description of the Drawings
[0022] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for use in the embodiments. It should be understood that the following drawings only show some embodiments of the present invention, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.
[0023] Figure 1 is a schematic structural diagram of a semiconductor structure according to an embodiment of the present application.
[0024] Figures 2 to 5 are respectively schematic diagrams of the component change of the adsorbing element in the diffusion barrier layer according to an embodiment of the present application.
[0025] Figure 6 is a schematic flow chart of a method for manufacturing a semiconductor structure according to an embodiment of the present application.
[0026] Figure 7It is a HEMT semiconductor device formed by a semiconductor structure.
[0027] Figures 8 to 9 The energy band structure diagram corresponding to the semiconductor device.
[0028] Modes for Carrying Out the Application
[0029] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without making creative efforts belong to the scope of protection of the present application.
[0030] Where possible, the same or similar parts in the drawings will be denoted by the same reference numerals.
[0031] Figure 1 It is a schematic structural diagram of a semiconductor structure according to an embodiment of the present application. The arrow direction in the figure is the epitaxial direction of the semiconductor structure.
[0032] As Figure 1 shown, the semiconductor structure includes a buffer layer 1, a diffusion barrier layer 2, and a channel layer 3. The buffer layer 1 includes a diffusion element; a diffusion barrier layer 2 formed on the buffer layer 1, the diffusion barrier layer includes an adsorptive element for preventing the diffusion of the diffusion element; and a channel layer 3 formed on the diffusion barrier layer 2.
[0033] In this embodiment, the semiconductor structure further includes a substrate 0, and the buffer layer 1 can be formed on the substrate 0.
[0034] Specifically, the diffusion element in the buffer layer 1 can be achieved by intentional doping or is inevitable in the epitaxial growth environment of the semiconductor structure. The diffusion element may include metal elements, for example, Fe, Mg, etc. It can be understood that intentionally doping the diffusion element in the buffer layer 1 can increase the resistivity of the buffer layer 1 and effectively improve the breakdown voltage of the semiconductor structure. However, the diffusion element generally has a memory effect problem, that is, even if the doping of the diffusion element has been stopped during the growth of the buffer layer 1, the diffusion element can still diffuse into the channel layer 3, affecting the performance of the entire semiconductor device. Therefore, the setting of the diffusion barrier layer 2 can effectively block the diffusion of the diffusion element from the buffer layer 1 to the channel layer 3.
[0035] Furthermore, the diffusion barrier layer 2 includes an adsorptive element, and the composition of the adsorptive element in the diffusion barrier layer 2 is variable. Specifically, in the direction from the buffer layer 1 to the channel layer 3, that is, the semiconductor epitaxial growth direction, the composition of the adsorptive element in the diffusion barrier layer 2 decreases.
[0036] Furthermore, the diffusion barrier layer 2 may include a III-V compound, where the Group III element can be an adsorptive element. For example, the III-V compound may include a compound of In, and the compound of In may preferably include In x Ga y N, where x + y = 1. In the diffusion barrier layer 2 composed of In x Ga y N, In in In x Ga y N can be an adsorptive element, and the In component in In x Ga y N decreases along the epitaxial growth direction, and the change range of the In component is 0 < x ≤ 1.
[0037] Specifically, during the epitaxial growth process of the diffusion barrier layer 2 composed of In x Ga y N, the above-mentioned gradual change of the In component can be formed by adjusting the growth temperature or the ratio of the indium source to the gallium source. For example, for the method of adjusting the growth temperature, the growth temperature may not exceed 900 °C. Further, it may not exceed 850 °C.
[0038] In other embodiments, the diffusion barrier layer 2 may also be Al z In x Ga y N, where x + y + z = 1, and the Al component is less than the In component, that is, z < x, to ensure better matching of the lattice constant of AlInGaN with GaN and make the epitaxial growth quality better.
[0039] Furthermore, the buffer layer 1 and the channel layer 3 include a nitride semiconductor layer. For example, a GaN-based material, and the so-called GaN-based material is a semiconductor material including at least Ga atoms and N atoms, such as GaN, AlGaN, InGaN, AlInGaN, etc.
[0040] Specifically, when the buffer layer 1 is GaN and the diffusion barrier layer 2 is InGaN, due to the large thermal mismatch and lattice mismatch between GaN and InGaN, stress release will occur in the diffusion barrier layer 2, resulting in a decrease in the quality of the semiconductor structure. By adjusting the In component of InGaN in the diffusion barrier layer 2, which is equivalent to a multi-layer diffusion barrier layer 2 of different components of InGaN, stress release of the diffusion barrier layer 2 can be effectively avoided.
[0041] In this embodiment, the diffusion barrier layer 2 is provided with adsorbing elements for adsorbing diffusion elements, thereby effectively preventing the diffusion elements from diffusing from the buffer layer 1 to the channel layer 3. In addition, by setting the compositional change of the adsorbing elements in the diffusion barrier layer 2, the stress release of the diffusion barrier layer 2 is avoided.
[0042] Figures 2 to 5 They are respectively schematic diagrams of the compositional change of the adsorbing elements in the diffusion barrier layer 2 according to an embodiment of the present application. The ordinate represents the compositional content of the adsorbing elements in the diffusion barrier layer 2, and the abscissa represents the epitaxial direction. From Figures 2 to 5 it can be seen that the compositional content of the adsorbing elements in the diffusion barrier layer 2 decreases along the epitaxial direction.
[0043] Specifically, in an embodiment of the present application, as Figure 2 and Figure 5 shown, along the epitaxial direction of the diffusion barrier layer 2, the composition of the adsorbing elements in the diffusion barrier layer 2 decreases. Under such a change in the adsorbing elements, a relatively flat quantum well structure can be achieved.
[0044] Or, as Figure 3 and Figure 4 shown, along the epitaxial direction of the diffusion barrier layer 2, the adsorbing elements can decrease step by step. Under such a change in the adsorbing elements, a multi-channel effect can be obtained, thereby reducing the spatial concentration of the two-dimensional electron gas (2DEG), and further improving the carrier mobility.
[0045] Here, the epitaxial direction of the diffusion barrier layer 2 may refer to the epitaxial growth direction during the preparation of the diffusion barrier layer 2. When the diffusion barrier layer 2 is In x Ga y N, the In component can be the adsorbing element. Along the epitaxial direction of the diffusion barrier layer 2, the In component can decrease or decrease step by step, that is, the X value decreases or decreases step by step.
[0046] Specifically, as Figures 2 to 5 shown, along the epitaxial direction of the diffusion barrier layer 2, the compositional content of the adsorbing elements in the diffusion barrier layer 2 decreases with the epitaxial growth direction. For example, the In component content, and the In component content can decrease linearly, as Figure 2 shown; it can also decrease non-linearly, as Figure 5 shown. The In component content can decrease periodically step by step, as Figures 3 - 4 shown; it can also decrease non-periodically. In this case, the manner in which the compositional content of the adsorbing elements decreases with the epitaxial growth direction is not limited, as long as the compositional content of the adsorbing elements in the diffusion barrier layer 2 shows a decreasing trend with the epitaxial growth direction.
[0047] The semiconductor structure according to the embodiments of the present application is described above. Next, a method for preparing the semiconductor structure according to the embodiments of the present application will be described in conjunction with Figure 6 Describe a method for preparing a semiconductor structure according to an embodiment of the present application.
[0048] Figure 6 FIG. is a schematic flowchart of a method for preparing a semiconductor structure according to an embodiment of the present application.
[0049] As Figure 6 shown, the method for preparing the semiconductor structure may include the following steps.
[0050] 510. Prepare buffer layer 1, and the buffer layer 1 includes diffusion elements.
[0051] Specifically, the diffusion elements in the buffer layer 1 can be achieved by intentional doping or are inevitable in the epitaxial growth environment of the semiconductor structure. The diffusion elements may include metal elements, such as Fe, Mg, etc. It can be understood that intentionally doping diffusion elements in the buffer layer 1 can increase the resistivity of the buffer layer 1 and effectively improve the breakdown voltage of the semiconductor structure. However, the diffusion elements generally have the problem of memory effect. That is to say, even if the doping of the diffusion elements has been stopped during the growth of the buffer layer 1, the diffusion elements can still diffuse into the channel layer 3, affecting the performance of the entire semiconductor device. Therefore, the setting of the diffusion barrier layer 2 can effectively block the diffusion of the diffusion elements from the buffer layer 1 to the channel layer 3.
[0052] 520. Prepare a diffusion barrier layer 2 on the buffer layer 1, and the diffusion barrier layer 2 includes adsorbing elements.
[0053] Furthermore, the diffusion barrier layer 2 includes adsorbing elements, and the composition of the adsorbing elements in the diffusion barrier layer 2 is variable. Specifically, in the direction from the buffer layer 1 to the channel layer 3, that is, the semiconductor epitaxial growth direction, the composition of the adsorbing elements in the diffusion barrier layer 2 decreases.
[0054] In this embodiment, the epitaxial direction of the diffusion barrier layer 2 may refer to the epitaxial growth direction of the diffusion barrier layer 2 during preparation. When the diffusion barrier layer 2 is In x Ga y N, the In component can be an adsorbing element. Along the epitaxial direction of the diffusion barrier layer 2, the In component can decrease or decrease in a stepped manner. That is to say, the X value decreases or decreases in a stepped manner, which can achieve a relatively flat quantum well structure and can also obtain a multi-channel effect, thereby reducing the spatial concentration of the two-dimensional electron gas (2DEG) and further improving the carrier mobility.
[0055] Further, the diffusion barrier layer 2 may include a III-V compound, where the group III element can be an adsorptive element. For example, the III-V compound may include a compound of In, and the compound of In may preferably include In x Ga y N, where x + y = 1. In the diffusion barrier layer 2 composed of In x Ga y N, In in In x Ga y N can be an adsorptive element, and the In component in In x Ga y N decreases along the epitaxial growth direction, and the change range of the In component is 0 < x ≤ 1.
[0056] Specifically, during the epitaxial growth process of the diffusion barrier layer 2 composed of In x Ga y N, the above-mentioned gradient of the In component can be formed by adjusting the growth temperature or the ratio of the indium source to the gallium source. For example, for the method of adjusting the growth temperature, the growth temperature can be limited to not exceed 900 °C. Further, it can be not more than 850 °C.
[0057] 530, a channel layer 3 is fabricated on the diffusion barrier layer 2.
[0058] Further, the buffer layer 1 and the channel layer 3 include a nitride semiconductor layer. For example, a GaN-based material, and the so-called GaN-based material is a semiconductor material including at least Ga atoms and N atoms, such as GaN, AlGaN, InGaN, AlInGaN, etc.
[0059] Specifically, when the buffer layer 1 is GaN and the diffusion barrier layer 2 is InGaN, due to the large thermal mismatch and lattice mismatch between GaN and InGaN, the diffusion barrier layer 2 will release stress, resulting in a decrease in the quality of the semiconductor structure. By adjusting the In component of InGaN in the diffusion barrier layer 2, it is equivalent to a multi-layer diffusion barrier layer 2 of different components of InGaN, which can effectively avoid the stress release of the diffusion barrier layer 2.
[0060] In this embodiment, the diffusion barrier layer 2 is provided with an adsorptive element for adsorbing diffusion elements, so as to effectively block the diffusion of diffusion elements from the buffer layer 1 to the channel layer 3. In addition, by setting the component change of the adsorptive element in the diffusion barrier layer 2, the stress release of the diffusion barrier layer 2 is avoided.
[0061] Further, when the semiconductor structure forms a semiconductor device such as a HEMT, such as Figure 7As shown, it includes a substrate 0, a buffer layer 1 formed on the substrate 0, a diffusion barrier layer 2 formed on the buffer layer 1, a channel layer formed on the diffusion barrier layer 2, a barrier layer 4 formed on the channel layer 3, and a gate 5, a source 6, and a drain 7 formed on the barrier layer 4.
[0062] In this embodiment, the substrate 0 may include Si, SiC, sapphire, etc.; the buffer layer 1 may include metal elements, for example, Fe, Mg, etc.; the diffusion barrier layer 2 may be InGaN, where In is an adsorbing element used to prevent the metal elements in the buffer layer 1 from diffusing into the channel layer 3 and affecting the device performance; the channel layer 3 may be GaN, the barrier layer 4 may be AlGaN, and it is only necessary for the channel layer 3 and the barrier layer 4 to form a heterojunction, forming a quantum well at their interface to confine carriers in the quantum well and form a two-dimensional electron gas channel.
[0063] Figures 8 - 9 It is the energy band structure diagram of the semiconductor corresponding to the semiconductor device, Figure 8 Corresponding to the component of the adsorbing element In in the diffusion barrier layer 2 becoming smaller along the epitaxial layer direction; Figure 9 Corresponding to the component of the adsorbing element In in the diffusion barrier layer 2 remaining unchanged.
[0064] The diffusion barrier layer 2 is provided with an adsorbing element for adsorbing diffusion elements, thereby effectively preventing the diffusion elements from diffusing from the buffer layer 1 to the channel layer 3. In addition, by setting the component change of the adsorbing element in the diffusion barrier layer 2, the stress release of the diffusion barrier layer 2 is avoided.
[0065] The above are only the preferred embodiments of the present application and are not used to limit the protection scope of the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A semiconductor structure, characterized in that, comprising: a buffer layer, the buffer layer comprising a diffusing element; a diffusion barrier layer formed on the buffer layer, the diffusion barrier layer comprising an adsorbing element; and a channel layer formed on the diffusion barrier layer, wherein along the epitaxial direction of the diffusion barrier layer, the component of the adsorbing element in the diffusion barrier layer decreases; the diffusion barrier layer comprises a III-V compound, the III-V compound comprises a compound of In, the adsorbing element is In, the compound of In comprises AlInGaN, and the Al component is less than the In component.
2. The semiconductor structure according to claim 1, characterized in that, the diffusing element comprises a metal element.
3. A method for manufacturing a semiconductor structure, characterized in that, comprising: forming a buffer layer, the buffer layer comprising a diffusing element; forming a diffusion barrier layer on the buffer layer, the diffusion barrier layer comprising an adsorbing element; forming a channel layer on the diffusion barrier layer, wherein along the epitaxial direction of the diffusion barrier layer, the component of the adsorbing element in the diffusion barrier layer decreases; the diffusion barrier layer comprises a III-V compound, the III-V compound comprises a compound of In, the adsorbing element is In, the compound of In comprises AlInGaN, and the Al component is less than the In component.
4. The method for manufacturing a semiconductor structure according to claim 3, characterized in that, the diffusing element comprises a metal element.
5. The method for manufacturing a semiconductor structure according to claim 3 or 4, characterized in that, the formation temperature of the diffusion barrier layer does not exceed 900 °C.
Citation Information
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