A matrix converter filter parameter optimization method
By optimizing the filter parameters of the matrix converter and selecting appropriate damping resistors, the problems of low efficiency and high cost in suppressing input resonance in existing technologies have been solved, achieving efficient harmonic suppression and improved economy.
Patent Information
- Application Number
- CN202111490503.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-08-05
- Filing Date
- 2021-12-08
- Publication Date
- 2025-12-23
- Estimated Expiration
- 2041-12-08
AI Technical Summary
Existing matrix converter filters suffer from low efficiency, high cost, and high computational complexity in suppressing input resonance. Furthermore, existing damping resistor designs are prone to causing resonance or increasing system losses.
By optimizing filter parameters, selecting appropriate filter inductors and capacitors, and using FFT simulation analysis to determine the harmonic current content, the actual value of the damping resistor is calculated to suppress the harmonic current. The optimal damping resistor is selected in accordance with international standards, thereby reducing computational complexity and system losses.
It effectively suppresses the harmonic current content near the input resonance point, improves the input-side resonance suppression effect, reduces system losses and computational complexity, and improves the overall economic efficiency of the system.
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Figure CN113937990B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of matrix converter control technology, and more specifically to a method for optimizing filter parameters in a matrix converter. Background Technology
[0002] A matrix converter is a direct AC-AC converter. Besides its advantages of small size, high power density, ease of sinusoidal input current control, and convenient power factor adjustment, it also offers lower power transistor node temperatures and lower input-side filter inductor losses at the same output frequency, resulting in higher overall efficiency than conventional AC-DC-AC converters. Matrix converters are primarily used in three-phase AC motor drives, including three-phase induction motors, sinusoidal permanent magnet synchronous motors, and brushless permanent magnet synchronous motors.
[0003] An LC filter is installed on the input side of the matrix converter to filter out high-frequency harmonics near the switching frequency in order to improve input and output performance. Therefore, it is of great significance to study the optimization design of the parameters in the input filter.
[0004] Existing literature on input filters mainly focuses on their parameter design. For example, Reference 1 (Xia Yihui, Zhang Xiaofeng, Qiao Mingzhong, et al. Design and research of input filters for matrix converters [J]. Journal of Naval University of Engineering, 2014, 26(4):18-22.) proposes a design method for LC filters based on input filter parameters with fundamental voltage drop, input power factor and damping resistor loss as constraints, and details the design steps.
[0005] Reference 2 (Wang Honghong, Hu Yankui, Xiong Jian, et al. Optimization design of damped input filter for matrix converter [J]. Electrical Drive, 2014, 44(4):38-41.) proposes an optimization design method for input filter. This method determines the optimal value of input filter damping through static optimization. However, this method connects a damping resistor in parallel with the filter capacitor, which is equivalent to adding an extra load to the system. This will inevitably greatly increase the system loss and reduce the utilization rate.
[0006] Reference 3 (Tong Cheng. Research and Implementation of Three-Phase-Three-Phase Two-Level Matrix Converter [D]. Hefei University of Technology, 2010: 46-48.) proposes a method for selecting inductor and capacitor parameters in the input filter and performs simulation analysis on the designed damped input filter.
[0007] The aforementioned literature mainly focuses on the selection methods for filter inductor and capacitor parameters. Since an LC filter is a second-order system, even considering the equivalent resistance of the inductor, it remains an approximately undamped second-order system. Previous research has shown that this system is susceptible to the influence of converter input current or grid-side voltage, as well as harmonics generated during dynamic switching, which can easily cause resonance on the input side and thus affect input performance.
[0008] Existing resonance suppression methods mainly fall into two categories: virtual damping and passive damping. The former requires multiple voltage and current sensors to acquire instantaneous voltage and current values on the LC filter, suppressing resonance by extracting high-frequency harmonics into the control loop. However, this method is computationally complex and demands high processing speeds from microcontrollers, leading to higher system costs. The latter uses inexpensive resistors to dampen input current resonance, offering advantages such as lower hardware performance requirements. In passive damping, the damping resistor is crucial to system performance. An excessively large damping resistor value may still cause input resonance, while an excessively small value increases losses and reduces high-frequency suppression, potentially even causing the main harmonic content to exceed the national standard limits, thus restricting its application. Summary of the Invention
[0009] Therefore, in order to overcome the above-mentioned defects, this invention provides a method for optimizing the filter parameters of a matrix converter.
[0010] Therefore, an embodiment of the present invention provides a method for optimizing the filter parameters of a matrix converter, comprising the following steps:
[0011] S1. Based on the constraints of the LC filter on the input side of the matrix converter, select the appropriate filter inductor L. f and filter capacitor C f The value of the constraint includes: cutoff frequency f c The value is the switching frequency f. s 1 / 10 to 1 / 5 of the input frequency f, and greater than the input frequency f i 10 times more readily available are capacitors and inductors;
[0012] S2. Using FFT simulation analysis, obtain the actual content λ of the i-th harmonic current near the resonant point in the input current under the condition of no damping resistor. i and the fundamental current amplitude i0;
[0013] S3. Obtain the upper limit of the current content of the main harmonics near the resonance point, and based on the filter inductance L f and filter capacitor C f The value of the actual content of different harmonic currents λ iThe damping resistance values for suppressing different harmonic currents are calculated based on the fundamental current amplitude i0 and the upper limit of the current content of different harmonics obtained from standard IEC6100-3-2.
[0014] S4. Compare the calculated value of the damping resistor with the common resistance value series table to obtain several selectable actual values of the damping resistor.
[0015] S5. Analyze the input performance of the matrix converter under different actual values of damping resistor, and select the actual value of damping resistor with the best input performance.
[0016] Preferably, the constraint further includes: the damping coefficient ξ of the filter is taken as...
[0017] Preferably, the constraint further includes: the fundamental voltage drop across the filter inductor does not exceed 3% of the input voltage.
[0018] Preferably, the constraint further includes: damping resistor R d The power loss is less than 0.5% of the maximum power.
[0019] Preferably, the constraint further includes: the power consumption of the filter capacitor does not exceed 5% of the maximum power.
[0020] Preferably, the formula for calculating the damping resistance value for suppressing different harmonic currents is as follows:
[0021]
[0022] In the formula, i i The upper limit of the i-th harmonic content as specified in standard IEC6100-3-2; λ i ω represents the actual content of the i-th harmonic current after FFT analysis; i0 represents the amplitude of the fundamental current; ω i This is the input angular frequency.
[0023] The technical solution of the embodiments of the present invention has the following advantages:
[0024] The matrix converter filter parameter optimization method provided in this embodiment of the invention optimizes the cutoff frequency f by reasonably setting the cutoff frequency f. cThis effectively suppresses the content of harmonic current near the input resonant point, resulting in a 94.03% reduction in the content of harmonics (13th, 17th, 19th, 23rd, and 25th harmonics) near the resonant point in the input current, and a 98.4% reduction in the content of harmonics (13th, 17th, 19th, 23rd, and 25th harmonics), respectively. The input-side resonance suppression effect is significantly improved. This design avoids the previous approach of solely using loss as an evaluation method for damping resistor design, while also considering the suppression effect of high-frequency harmonics at the switching frequency. Furthermore, it eliminates the need for a sensor to collect the voltage of the filter capacitor, reducing computational complexity and the real-time requirements of the microcontroller, thus improving the overall economic efficiency of the device. Attached Figure Description
[0025] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0026] Figure 1 This is a topology diagram of the matrix transformer in an embodiment of the present invention;
[0027] Figure 2 This is an equivalent circuit diagram of the matrix converter in an embodiment of the present invention;
[0028] Figure 3 This is a flowchart illustrating a specific example of a matrix converter filter parameter optimization method in an embodiment of the present invention.
[0029] Figure 4(a) shows I o =6.5A, f o FFT analysis results of harmonics near the resonant point of the 70Hz input current;
[0030] Figure 4(b) shows I o =3.5A, f o FFT analysis results of harmonics near the resonant point of the 70Hz input current;
[0031] Figure 5(a) shows I o =3.5A, f o =70Hz, R d =10Ω input three-phase current i abc Simulation waveform diagram;
[0032] Figure 5(b) shows I o =3.5A, f o =70Hz, R d =10Ω input current i a FFT analysis results of harmonics near the switching frequency;
[0033] Figure 5(c) shows I o =3.5A, f o =70Hz, R d =15Ω input three-phase current i abc Simulation waveform diagram;
[0034] Figure 5(d) shows I o =3.5A, f o =70Hz, R d =15Ω input current i a The FFT analysis results of harmonics near the switching frequency are shown in the figure.
[0035] Figure 5(e) shows I o =3.5A, f o =70Hz, R d =33Ω input three-phase current i abc Simulation waveform diagram;
[0036] Figure 5(f) shows I o =3.5A, f o =70Hz, R d =33Ω input current i a The FFT analysis results of harmonics near the switching frequency are shown in the figure.
[0037] Figure 6(a) shows I o =3.5A, f o =30Hz, R d =33Ω input three-phase current i abc Simulation waveform diagram;
[0038] Figure 6(b) shows I o =3.5A, f o =30Hz, R d =33Ω output three-phase current i uvw Simulation waveform diagram;
[0039] Figure 6(c) shows I o =3.5A, f o =30Hz, R d =33Ω input current i a The FFT analysis results are shown in the figure. Detailed Implementation
[0040] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0041] In the description of this invention, it should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” as used herein are intended to include the plural forms as well. The use of terms such as “comprising” and / or “including” is intended to indicate the presence of that feature, integer, step, operation, element, and / or component, without excluding the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or other combinations. The term “and / or” includes any and all combinations of one or more of the associated listed items. The terms “first” and “second” are used for descriptive purposes only and should not be construed as indicating or implying relative importance. The terms “installed,” “connected,” and “linked” should be interpreted broadly; for example, they can refer to a direct connection, an indirect connection via an intermediate medium, or a connection within two elements; they can refer to a wireless connection or a wired connection. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances.
[0042] Furthermore, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.
[0043] Example
[0044] This embodiment provides a method for optimizing filter parameters in a matrix converter. The matrix converter is a direct cross-cross converter, and its topology is as follows: Figure 1 As shown in the figure, u abc For three-phase input phase voltage; i abc For three-phase input phase current; S ij (i = a, b, c; j = u, v, w) are bidirectional switching transistors, typically constructed by connecting two power transistors in reverse series; Z L This is the load impedance.
[0045] To suppress input current resonance caused by the input LC filter, a resistor is typically connected in parallel or series with the filter inductor or capacitor. Considering both resonance suppression and system loss reduction, a damping resistor R is often installed on the inductor. d The method to suppress resonance is as follows, and its equivalent circuit is: Figure 2 As shown in the figure, L f R and R' are the filter inductance and equivalent resistance, respectively; C f For filtering capacitors; R d R is the damping resistor; R and L are the load resistance and inductance, respectively.
[0046] right Figure 2Time-domain analysis of the input-side LC filter and Laplace transform of the results yield the following relationship in the s-domain: (Equation omitted for brevity)
[0047]
[0048] In the formula, I s (s), I s '(s) and U s (s) represent the input current i s (t), Input current i s '(s) and input voltage u s Laplace transform of (t).
[0049] From equation (1), the expressions for the damping coefficient under different conditions can be obtained as follows:
[0050]
[0051] In the formula, ξ' represents the value of R without damping resistance. d = +∞) is the damping coefficient; ξ is the parallel damping resistor R on the inductor. d Damping coefficient after; ω c This is the system's natural frequency.
[0052] Analysis of equation (2) shows that, in the case of no damping resistor, C in the LC filter f < <L f Furthermore, since the equivalent resistance of the filter inductor R' << 1Ω, the input LC filter of the matrix converter is an approximately second-order undamped system. This system is prone to input current resonance due to the influence of harmonics generated during input current, input voltage, or dynamic switching of the system. A passive damping method is used to introduce a damping resistor R. d Afterwards, the system damping ratio ξ and damping resistance R d Inversely proportional, that is, by designing a suitable resistor R d This allows ξ to reach a reasonable level, which can avoid introducing a high level of resonant current without significantly affecting the high-frequency harmonic suppression effect.
[0053] Existing literature on the design of LC filter parameters mainly includes the selection of filter inductor and filter capacitor, and also considers the limitation of damping resistor R. d Regarding power loss, this embodiment provides a method for optimizing the parameters of a matrix converter filter, such as... Figure 3 As shown, it includes the following steps:
[0054] S1. Based on the constraints of the LC filter on the input side of the matrix converter, select the appropriate filter inductor L. f and filter capacitor C fThe value of the constraint includes: cutoff frequency f c The value is the switching frequency f. s 1 / 10 to 1 / 5 of the input frequency f, and greater than the input frequency f i The availability of capacitors and inductors is 10 times greater. Preferably, the constraint also includes: the damping coefficient ξ of the filter is... Preferably, the constraint further includes: the fundamental voltage drop across the filter inductor does not exceed 3% of the input voltage; preferably, the constraint further includes: the damping resistor R d The power loss is less than 0.5% of the maximum power; preferably, the constraint also includes: the power consumption of the filter capacitor does not exceed 5% of the maximum power.
[0055] S2. Using FFT simulation analysis, obtain the actual content λ of the i-th harmonic current near the resonant point in the input current under the condition of no damping resistor. i And the fundamental current amplitude i0.
[0056] S3. Obtain the upper limit of the current content of the main harmonics near the resonance point, and based on the filter inductance L f and filter capacitor C f The value of the actual content of different harmonic currents λ i The damping resistance values for suppressing different harmonic currents are calculated by combining the fundamental current amplitude i0 with the upper limit of the current content of different harmonics obtained from standard IEC6100-3-2.
[0057] S4. Compare the calculated value of the damping resistor with a table of common resistance values to obtain several selectable actual values of the damping resistor.
[0058] S5. Analyze the input performance of the matrix converter under different actual values of damping resistor, and select the actual value of damping resistor with the best input performance. Preferably, the optimal input performance can be selected with the requirements of standard GB / T14549-93 and IEC6100-3-2.
[0059] The matrix converter filter parameter optimization method in this embodiment optimizes the cutoff frequency f by appropriately setting the cutoff frequency f. c This effectively suppresses the content of harmonic current near the input resonant point, resulting in a 94.03% reduction in the content of harmonics (13th, 17th, 19th, 23rd, and 25th harmonics) near the resonant point in the input current, and a 98.4% reduction in the content of harmonics (13th, 17th, 19th, 23rd, and 25th harmonics), respectively. The input-side resonance suppression effect is significantly improved. This design avoids the previous approach of solely using loss as an evaluation method for damping resistor design, while also considering the suppression effect of high-frequency harmonics at the switching frequency. Furthermore, it eliminates the need for a sensor to collect the voltage of the filter capacitor, reducing computational complexity and the real-time requirements of the microcontroller, thus improving the overall economic efficiency of the device.
[0060] The following sections will describe this embodiment in detail, focusing on two parts: the optimization method for LC filter parameters and the selection method for damping resistors.
[0061] 1. Optimization methods for LC filter parameters
[0062] Existing literature on the design of LC filter parameters mainly includes the selection of filter inductor and filter capacitor, and also considers the limitation of damping resistor R. d Based on the power loss, the constraints for the LC filter on the input side of the matrix converter can be obtained as follows:
[0063] 1) Cutoff frequency f c The value is the switching frequency f. s 1 / 10 to 1 / 5 of the input frequency f, and greater than the input frequency f i 10 times;
[0064] 2) The damping coefficient ξ of the filter is taken as...
[0065] 3) The fundamental voltage drop across the filter inductor shall not exceed 3% of the input voltage;
[0066] 4) Damping resistor R d The power loss is less than 0.5% of the maximum power;
[0067] 5) The power consumption of the filter capacitor shall not exceed 5% of its maximum power.
[0068] To improve the high-frequency harmonic suppression capability of a filter at the switching frequency, the filter cutoff frequency f is generally defined. c For the switching frequency f s 1 / 5 to 1 / 2, to reduce the introduction of damping resistance R d Insufficient high-frequency harmonic suppression due to inadequate attenuation in the later high-frequency band is addressed in this embodiment by setting the cutoff frequency f. c The value is the switching frequency f. s 1 / 10 to 1 / 5 of the cutoff frequency f c Greater than the input frequency f i If it is 10 times that of the previous value, then the cutoff frequency in constraint 1) is set to f. c =500Hz~2kHz.
[0069] Input voltage amplitude is A capacitor with a withstand voltage greater than three times the input voltage amplitude is used. Therefore, a 630V CBB capacitor is used as the filter capacitor. Since the maximum capacitance of a single 630V CBB capacitor is 4.7μF, four CBB capacitors are connected in parallel to form the filter capacitor, i.e., the actual filter capacitor C. f =18.8μF.
[0070] The relationship between the filter capacitor, filter inductor, and cutoff frequency is shown below:
[0071]
[0072] From the above equation and constraint 1), the theoretical value of the filter inductor can be obtained as L. f = 1.8mH. Since readily available inductors range from 0.5mH to 3mH, typically in 0.5mH increments, the actual filter inductor value is L. f =1.5mH, then the cutoff frequency of the system at this time is f. c =948Hz, which meets the requirements of constraint 1).
[0073] Based on the relationship between the current and voltage across the inductor, the expression for the voltage across the inductor, u, is input into the LC filter. L (t) is:
[0074]
[0075] In the formula, the maximum input power P of the matrix converter max =2000W; Input voltage amplitude Filter inductor L f =1.5mH; Input angular frequency ω i = 314 rad / s; Δ is the phase difference between the inductor voltage and current; I m The input current amplitude is given; the maximum voltage u of the filter inductor can be obtained from the above parameters. L =4.04V.
[0076] From equation (4), we can obtain the expression for the ratio of the voltage drop caused by the inductance to the amplitude of the input voltage, λ. u for:
[0077]
[0078] From the above equation, the voltage drop ratio caused by the inductance can be obtained as λ. u =2.6% < 3%, which meets the requirements of constraint 3).
[0079] From equation (4), the loss expression P of the damping resistor can be obtained. Rd for:
[0080]
[0081] The damping coefficient can be obtained from equation (6). The loss P at that time Rd =2.45W < 0.5%P i That is, it meets the requirements of constraint 4).
[0082] The loss expression P on the input filter capacitor c for:
[0083]
[0084] From equation (7), the capacitor power consumption P can be obtained. c With maximum input power P max The ratio expression λ c for:
[0085]
[0086] From equation (8), the ratio of capacitor power consumption to maximum input power is λ. c =3.6% < 5%, which meets the requirements of constraint 5).
[0087] 2. Method for selecting damping resistors
[0088] Existing standards for input performance include the national standard GB / T14549-93 and the standard IEC6100-3-2 issued by the IEC Technical Subcommittee. The former specifies that the total harmonic distortion (THD) of the input current and the filter capacitor voltage should be less than 5%, and the content of each odd-order harmonic should be less than 3%. The latter specifies the content of odd-order harmonics in the equipment. Since the resonant frequency is 948Hz, which is the 19th order of the fundamental frequency, the damping resistor needs to limit the current near the 19th harmonic in the input. Therefore, it is necessary to study and analyze the suppression effect of the designed damping resistor on the 13th, 17th, 19th, 23rd, and 25th harmonics in the input current, and use this as one of the criteria for evaluating the effectiveness of the damping resistor.
[0089] The expression for calculating the ideal damping resistance for different sub-resonant currents is as follows:
[0090]
[0091] In the formula, i i The upper limit of the i-th harmonic content as specified in standard IEC6100-3-2; λ i i represents the actual content of the i-th harmonic current after FFT analysis; i0 represents the amplitude of the fundamental current. Preferably, i = 13, 17, 19, 23, 25.
[0092] The standard IEC 6100-3-2 specifies the harmonic content of the grid-side current of equipment, with the 13th to 25th harmonics specified as follows: 13th harmonic content i 13 =0.21A; 17th harmonic content i 17 =0.132A; 19th harmonic content i 19 =0.118A; 23rd harmonic content i 23=0.098A; 25th harmonic content i 25 =0.09A. Under undamped conditions (R) d =+∞), the 13th to 25th harmonic content in the input current is: λ 13 =5.86%, λ 17 =13.98%, λ 19 =119.7%, λ 23 =18.98%, λ 25 =10.76%, the fundamental current is i0 = 1.661A. From equation (9), the damping resistance R corresponding to the 13th to 25th harmonics on the input side can be obtained. d The theoretical calculation value is: R d_13 =17.405Ω; R d_17 =37.872Ω; R d_19 =150.104Ω; R d_23 = 9.987Ω; R d_25 = 12.381Ω. According to constraint 2), the damping resistance should be R. d When the resistance is 150.104Ω, the damping coefficient ξ of the filter is less than 0.1. The value of this resistor is not considered here; that is, the effect of the actual damping resistance near the calculated values of the four resistors on suppressing system resonance needs to be considered. The table below shows a series of common resistors between 9.987Ω and 37.872Ω.
[0093]
[0094] The damping resistance R can be obtained from the table above. d You can choose 10Ω, 15Ω and 33Ω, and use the above three different damping resistors for simulation, and compare and analyze the input performance.
[0095] Based on the above analysis, the optimization steps for the LC filter are as follows:
[0096] Step 1: Obtain the filter inductor and filter capacitor according to the constraints, and select appropriate filter capacitor and filter inductor values based on the availability of the components.
[0097] Step 2: Use the FFT analysis module in the simulation software to obtain the actual content λ of different harmonic currents near the resonance point in the input current under the condition of no damping resistor. i The amplitude of the fundamental current is i0.
[0098] Step 3: Obtain the upper limit of the current content of the main harmonics near the above-mentioned resonant point using the international standard IEC6100-3-2, and calculate the damping resistance value for suppressing different harmonic currents according to equation (9), ignoring the fact that the calculation result is an imaginary number and the filter damping ξ < 0.1. Calculated value of damping resistance under the given conditions.
[0099] Step 4: Compare the calculated values of the damping resistors with a table of common resistor series to obtain several selectable actual values of the damping resistors.
[0100] Step 5: Analyze the input performance of the matrix converter under different actual values of damping resistor, and select the actual value of damping resistor with the best input performance according to the requirements of standard GB / T14549-93 and IEC6100-3-2.
[0101] The following section presents an experimental verification of the matrix converter filter parameter optimization method described in this embodiment.
[0102] A system model was built using Matlab / Simulink. Simulations were performed on the input and output performance of the matrix converter under the proposed filter optimization design method. The system performance under different damping resistors was compared and analyzed to verify the effectiveness of the proposed optimization design method. The system simulation parameters are shown in the table below.
[0103]
[0104]
[0105] Figures 4(a)-(b) show the output set currents of 6.5A and 3.5A, respectively, and the output frequency f. o The FFT analysis results of harmonics near the resonant point in the input current at 70Hz show that the selected three damping resistors ensure that the harmonic content at the resonant point is below the upper limit of less than 3% for each odd-order harmonic as specified in the national standard GB / T14549-93, and also meets the requirements of IEC6100-3-2 for the aforementioned harmonic content. Furthermore, the smaller the damping resistor, the better the harmonic suppression effect near the resonant point.
[0106] Figures 5(a)-(f) show the simulated waveforms of the input current and the analysis results of the main harmonic content near the switching frequency point under three different damping resistor conditions with the output set current of 3.5A / 70Hz. As can be seen from Figures 5(b) and 5(d), under the condition of damping resistor R... d =10Ω and R d Under the condition of 15Ω, the content of high-frequency harmonic currents near 10kHz in the input current is as follows: λ 201 =7.6% and λ 201=5.12%, all of which are higher than the upper limit of 3% specified in the national standard GB / T14549-93. Moreover, the harmonic current content near 10kHz (201st harmonic) in the input current decreases with the increase of the damping resistance value. At the same time, as can be seen from the total harmonic distortion (THD) values in Figures 5(b), 5(d) and 5(f), the harmonic content near the switching frequency point determines the THD value of the input current.
[0107] Figures 6(a)-(c) show the output set current of 3.5A / 30Hz and the damping resistor R. d Under the condition of Ω = 33Ω, the simulation results of input and output, as shown in Figures 6(a) and 6(b), indicate that there are no significant harmonic currents in the input and output currents. The harmonic content of the input current, whether near the resonant point or the switching frequency point, is less than 3%, meeting the national standard requirement and also satisfying the harmonic current content requirements of IEC6100-3-2. Meanwhile, R... d System damping coefficient at Ω = 33Ω It meets the requirements of constraint 2), that is, under this specific condition, the damping resistance R d =33Ω is the optimal damping resistance value for the matrix converter system.
[0108] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.
Claims
1. A method for optimizing filter parameters in a matrix converter, characterized in that, Includes the following steps: S1. Based on the constraints of the LC filter on the input side of the matrix converter, select the appropriate filter inductor. L f and filter capacitor C f The value of the constraint includes: cutoff frequency. f c The value is the switching frequency. f s 1 / 10 to 1 / 5 of the input frequency, and greater than the input frequency. f i 10 times more readily available are capacitors and inductors; S2. Using FFT simulation analysis, obtain the first resonant point near the input current in the case of no damping resistor. i The actual content of subharmonic current λ i and fundamental current amplitude i 0; S3. Obtain the upper limit of the current content of the main harmonics near the resonant point, and based on the filter inductance... L f and filter capacitor C f The value of the actual content of different harmonic currents λ i and fundamental current amplitude i The calculated values of damping resistors for suppressing different harmonic currents are obtained by calculating the upper limit of current content for different harmonics obtained from standard IEC6100-3-2. S4. Compare the calculated value of the damping resistor with the common resistance value series table to obtain several selectable actual values of the damping resistor. S5. Analyze the input performance of the matrix converter under different actual values of damping resistor, and select the actual value of damping resistor with the best input performance. The formula for calculating the damping resistance value for suppressing different harmonic currents is as follows: In the formula, i i The first standard specified in IEC 6100-3-2 i The upper limit of subharmonic content; λ i The first after FFT analysis i The actual content of subharmonic currents; i 0 represents the amplitude of the fundamental current; ω i This is the input angular frequency.
2. The method according to claim 1, characterized in that, The constraints also include: the damping coefficient of the filter. ξ The value ranges from 0.1 to / 2.
3. The method according to claim 1 or 2, characterized in that, The constraints also include: the fundamental voltage drop across the filter inductor does not exceed 3% of the input voltage.
4. The method according to claim 3, characterized in that, The constraints also include: damping resistance. R d The power loss is less than 0.5% of the maximum power.
5. The method according to claim 4, characterized in that, The constraints also include: the power consumption of the filter capacitor shall not exceed 5% of its maximum power.