Semiconductor package device and method of manufacturing the same
By using intermediate layer interconnects and insulating materials in semiconductor packaging devices, the electrical connection problem caused by uneven conductive pad thickness was solved, achieving stable electrical connections and improving product yield.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ADVANCED SEMICON ENG INC
- Filing Date
- 2021-08-30
- Publication Date
- 2026-05-26
AI Technical Summary
In the FOSUB structure, the uneven thickness of the conductive pads between the fan-out layer and the substrate leads to inconsistent spacing between the conductive pads, which may cause bridging between adjacent conductive pads or disconnection of electrical connections.
Multiple connecting lines are arranged in an intermediate layer, and the connecting lines are surrounded by insulating material. The first and second circuit layers are electrically connected through the connecting lines, and insulating parts are provided at both ends of the connecting lines to ensure the stability of the electrical connection and avoid bridging.
This effectively avoids electrical connection disconnection and bridging issues, improves product yield, and reduces the risk of electrical connection failure between circuit layers.
Smart Images
Figure CN113948409B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor packaging technology, and more specifically to semiconductor packaging apparatus and manufacturing methods thereof. Background Technology
[0002] A fan-out substrate (FOSUB) is a structure in which a fan-out layer is formed on a substrate, and the chip is connected through the fan-out layer.
[0003] In the FOSUB structure, there is an uneven thickness of the conductive pads on the fan-out layer and the conductive pads on the substrate. When connecting the fan-out layer and the substrate, the distance between the opposing conductive pads varies considerably. In areas where the opposing conductive pads are close together, bridging between adjacent conductive pads may occur, while in areas where the opposing conductive pads are far apart, electrical connection may be broken, leading to circuit failure.
[0004] Therefore, it is necessary to propose a new technical solution to solve at least one of the above-mentioned technical problems. Summary of the Invention
[0005] This disclosure provides a semiconductor packaging apparatus and a method for manufacturing the same.
[0006] In a first aspect, this disclosure provides a semiconductor packaging apparatus, comprising:
[0007] The first circuit layer has a first conductive element disposed on its surface;
[0008] The second circuit layer has a second conductive element on its surface;
[0009] The first conductive element and the second conductive element are electrically connected by at least two connecting lines.
[0010] In some alternative implementations, an intermediate layer is provided between the first line layer and the second line layer, and the at least two connecting lines are located within the intermediate layer.
[0011] In some alternative embodiments, the surface of the first circuit layer has a first insulating portion, the surface of the second circuit layer has a second insulating portion, and a connecting wire is provided between the first insulating portion and the second insulating portion.
[0012] In some alternative implementations, the connecting wire is surrounded by an insulating material.
[0013] In some alternative implementations, at least two layers of insulation are provided around the connecting wire.
[0014] In some alternative implementations, different portions of the connecting wire come into contact with different insulating materials.
[0015] In some alternative embodiments, the distance between the two ends of the connecting line between the first conductive element and the second conductive element is less than the distance between the two ends of the connecting line between the first insulating portion and the second insulating portion.
[0016] In some alternative implementations, the first circuit layer is a substrate, and the second circuit layer is a redistribution layer.
[0017] In some alternative implementations, the intermediate layer is adhesive, and the first circuit layer and the second circuit layer are bonded together through the intermediate layer.
[0018] In some alternative embodiments, the first conductive element is connected to the connecting wire via solder; and / or
[0019] The second conductive element is connected to the connecting line by solder.
[0020] Secondly, this disclosure provides a method for manufacturing a semiconductor packaging device, including:
[0021] An intermediate layer is placed on a first circuit layer, wherein at least two connecting lines are provided in the intermediate layer, and a first conductive element is provided on the surface of the first circuit layer.
[0022] The second circuit layer is placed on the intermediate layer, wherein the surface of the second circuit layer is provided with a second conductive element;
[0023] The first conductive element and the second conductive element are electrically connected through the connecting line to obtain a semiconductor packaging device.
[0024] In some alternative implementations, the intermediate layer is formed in the following manner:
[0025] A seed layer is formed on the carrier;
[0026] At least two connecting lines are formed on the seed layer by electroplating.
[0027] A first insulating layer is formed around the connecting wire;
[0028] A second insulating layer is formed around the first insulating layer;
[0029] Remove the seed layer to obtain the intermediate layer.
[0030] In some alternative embodiments, forming a first insulating layer around the connecting wire includes:
[0031] An insulating material is provided on the surface of the connecting wire;
[0032] Remove the insulation material from the ends of the connecting wires to obtain the first insulation layer; and
[0033] The formation of a second insulating layer around the first insulating layer includes:
[0034] An insulating material is disposed on the surfaces of the first insulating layer and the connecting wire;
[0035] Remove the insulation material from the ends of the connecting wires to obtain the second insulation layer.
[0036] In the semiconductor packaging apparatus and manufacturing method disclosed herein, a first conductive element of a first circuit layer and a second conductive element of a second circuit layer are electrically connected by at least two connecting lines. Even if some connecting lines fail, they can be connected by other connecting lines, thus effectively avoiding the problem of electrical connection disconnection. Furthermore, since an insulating material is provided around the connecting lines, bridging between adjacent conductive elements is effectively avoided. Therefore, the semiconductor packaging apparatus and manufacturing method disclosed herein can effectively reduce the risk of electrical connection failure between circuit layers, which is beneficial to improving product yield. Attached Figure Description
[0037] Other features, objects, and advantages of this disclosure will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:
[0038] Figure 1 This is a schematic diagram of a semiconductor packaging device in the prior art;
[0039] Figures 2-4 These are first to third schematic diagrams of a semiconductor packaging apparatus according to embodiments of the present invention;
[0040] Figure 5 and Figure 6 This is a schematic diagram of a method for manufacturing a semiconductor packaging device according to an embodiment of the present invention.
[0041] Symbol explanation:
[0042] 11. Upper layer circuit; 12. Lower layer circuit; 13. Upper conductive pad; 14. Lower conductive pad; 15. Solder; 100. First circuit layer; 110. First conductive element; 120. First insulating portion; 200. Second circuit layer; 210. Second conductive element; 220. Second insulating portion; 300. Intermediate layer; 310. Connecting line; 311. First insulating layer; 312. Second insulating layer; 400. Solder; 910. Carrier; 920. Seed layer; 930. Photoresist; 940. Container; 950. Etching solution. Detailed Implementation
[0043] The specific embodiments of the present invention will be described below with reference to the accompanying drawings and examples. Those skilled in the art can easily understand the technical problems solved by the present invention and the resulting technical effects from the content described herein. It is understood that the specific embodiments described herein are merely illustrative of the relevant invention and not intended to limit the invention. Furthermore, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings.
[0044] It should be noted that the structures, proportions, sizes, etc., depicted in the accompanying drawings are only for illustrative purposes to aid those skilled in the art and to facilitate understanding and reading of the invention. They are not intended to limit the scope of the invention and therefore have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and objectives of the invention, should still fall within the scope of the technical content disclosed herein. Furthermore, terms such as "above," "first," "second," and "a" used in this specification are merely for clarity and not intended to limit the scope of the invention. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of the invention's implementation.
[0045] It should also be noted that the longitudinal section corresponding to the embodiments of this disclosure can be the section corresponding to the front view direction, the transverse section can be the section corresponding to the right view direction, and the horizontal section can be the section corresponding to the top view direction.
[0046] Furthermore, the embodiments and features described herein can be combined with each other, unless otherwise specified. This disclosure will now be described in detail with reference to the accompanying drawings and embodiments.
[0047] Figure 1 This is a schematic diagram of a semiconductor packaging device in the prior art. For example... Figure 1 As shown above, the semiconductor packaging device includes an upper layer circuit 11 and a lower layer circuit 12. The upper layer circuit 11 has an upper conductive pad 13, and the lower layer circuit 12 has a lower conductive pad 14. The upper conductive pad 13 and the opposite lower conductive pad 14 are connected by solder 15. Due to the uneven height of the lower conductive pad 14, the distance between the upper conductive pad 13 and the lower conductive pad 14 varies at different locations. Bridging problems may occur between adjacent conductive pads where the distance between them is small (e.g., ...). Figure 1 As shown in the lower part, electrical connection breakage may occur at locations where the relatively large distance between the conductive pads is significant. Figure 1 (Not shown in the image).
[0048] This disclosure provides a semiconductor packaging apparatus. Figures 2-4These are first to third schematic diagrams of a semiconductor packaging apparatus according to embodiments of the present invention.
[0049] Figure 2 A longitudinal cross-section of a semiconductor packaging device according to an embodiment of the present invention is shown. Figure 2 As shown, the semiconductor packaging device in this embodiment includes a first circuit layer 100, a second circuit layer 200, and an intermediate layer 300. The intermediate layer 300 is located between the first circuit layer 100 and the second circuit layer 200. A first conductive element 110 is disposed on the surface of the first circuit layer 100. A second conductive element 210 is disposed on the surface of the second circuit layer 200. An array of connecting lines 310 is disposed within the intermediate layer 300. Each first conductive element 110 and its counterpart second conductive element 210 are electrically connected by at least two connecting lines 310. In this semiconductor packaging device, even if some connecting lines 310 fail to connect, the first conductive element 110 and its counterpart second conductive element 210 can still be connected by other connecting lines 310, thus effectively avoiding the problem of electrical connection disconnection.
[0050] like Figure 2 As shown, the surface of the first circuit layer 100 has a first insulating portion 120, and the surface of the second circuit layer 200 has a second insulating portion 220. A connecting line 310 is also provided between the first insulating portion 120 and the second insulating portion 220. When the structural strength of the intermediate layer 300 is low, the connecting line 310 between the first insulating portion 120 and the second insulating portion 220 can play a supporting role, thereby improving the structural strength.
[0051] In this embodiment, the first circuit layer 100 is, for example, a substrate, and the second circuit layer 200 is, for example, a redistribution layer. The first conductive element 110 and the second conductive element 210 can be conductive pads or conductive pillars, etc.
[0052] Figure 3 yes Figure 2 A partially enlarged view of a semiconductor packaging device. (See attached image.) Figure 2 and Figure 3 As shown, an insulating material is disposed around the connecting wire 310, which further includes a first insulating layer 311 and a second insulating layer 312. The middle portion of the connecting wire 310 is in direct contact with the first insulating layer 311, and both ends of the connecting wire 310 are in direct contact with the second insulating layer 312. The aforementioned insulating material can prevent adjacent connecting wires 310 from directly contacting each other, thereby effectively avoiding bridging problems between adjacent conductive components. In other embodiments, the number of insulating layers may be one, three, or five, etc., and this disclosure does not limit this.
[0053] like Figure 2 and Figure 3As shown, the first conductive element 110 is connected to the connecting line 310 by solder 400, and the second conductive element 210 is connected to the connecting line 310 by solder 400.
[0054] like Figure 2 and Figure 3 As shown, the connecting line 310 between the first conductive element 110 and the second conductive element 210 is curved, while the connecting line 310 between the first insulating portion 120 and the second insulating portion 220 is straight. The distance between the two ends of the connecting line 310 between the first conductive element 110 and the second conductive element 210 is less than the distance between the two ends of the connecting line 310 between the first insulating portion 120 and the second insulating portion 220. Please refer to [link / reference here]. Figure 6 In the upper part, during the manufacturing process, the connecting lines 310 in the intermediate layer 300 are initially straight. When the first circuit layer 100, the second circuit layer 200, and the intermediate layer 300 are laminated together, since the first conductive element 110 and the second conductive element 210 protrude from the first insulating portion 120 and the second insulating portion 220 respectively, the connecting lines 310 between the first conductive element 110 and the second conductive element 210 are bent due to compression. The connecting lines 310 between the first insulating portion 120 and the second insulating portion 220 are not compressed (or are only slightly compressed) and remain straight (or slightly bent). This bending shape allows both ends of the connecting lines 310 to contact the first conductive element 110 and the second conductive element 210 respectively, ensuring the effectiveness of the electrical connection.
[0055] In this embodiment, the diameter of the connecting line 310 and the distance between the connecting lines 310 can be smaller than the corresponding preset values to ensure that the connecting line array is sufficiently fine and that each first conductive element 110 and the corresponding second conductive element 210 can be electrically connected through at least two connecting lines 310.
[0056] In this embodiment, the intermediate layer 300 is adhesive, and the first circuit layer 100 and the second circuit layer 200 are bonded together through the intermediate layer 300.
[0057] Figure 4 Different implementations of the intermediate layer 300 are shown. For example... Figure 4 As shown above, the intermediate layer 300 can be formed using a pillar process, wherein only a second insulating layer 312 is disposed around the connecting line 310. For example... Figure 4 As shown in the lower part, the intermediate layer 300 can be formed using a wired process, wherein a first insulating layer 311 and a second insulating layer 312 are disposed around the connecting line 310.
[0058] In the semiconductor packaging apparatus provided in this embodiment, the first conductive element 110 of the first circuit layer 100 and the second conductive element 210 of the second circuit layer 200 are electrically connected by at least two connecting lines 310. Even if some connecting lines 310 fail, they can be connected by other connecting lines 310, thus effectively avoiding the problem of electrical connection failure. Furthermore, since an insulating material is provided around the connecting lines 310, bridging between adjacent conductive elements can be effectively avoided. Therefore, the semiconductor packaging apparatus and manufacturing method provided in this disclosure can effectively reduce the risk of electrical connection failure between circuit layers, which is beneficial to improving product yield.
[0059] This embodiment also provides a method for manufacturing a semiconductor packaging device. For example... Figure 5 and Figure 6 As shown, the method includes the following steps:
[0060] First step, such as Figure 6 As shown in the middle, an intermediate layer 300 is placed on the first circuit layer 100, wherein at least two connecting lines 310 are provided in the intermediate layer 300, and a first conductive element 110 is provided on the surface of the first circuit layer 100.
[0061] The second step, as Figure 6 As shown in the lower part, the second circuit layer 200 is placed on the intermediate layer 300, wherein the surface of the second circuit layer 200 is provided with a second conductive element 210.
[0062] The third step is to electrically connect the first conductive element 110 and the second conductive element 210 through the connecting wire 310 to obtain the following result: Figure 2 The semiconductor packaging device shown.
[0063] The intermediate layer 300 in this embodiment can be formed in the following way:
[0064] First, such as Figure 5 As shown in the first step, a seed layer 920 is formed on the carrier 910.
[0065] Secondly, such as Figure 5 As shown in the second step, photoresist 930 is applied on the carrier 910, and at least two connecting lines 310 are formed on the seed layer 920 by electroplating.
[0066] After that, as Figure 5 As shown in the third step, the photoresist 930 is removed and an insulating material is placed on the surface of the connecting line 310.
[0067] After that, as Figure 5 As shown in the fourth step, the top of the connecting wire 310 is placed in a container 940 containing etching solution 950 to remove the insulating material at the end of the connecting wire 310, thereby obtaining the first insulating layer 311.
[0068] After that, as Figure 5 As shown in step 5, an insulating material is disposed around the first insulating layer 311.
[0069] After that, as Figure 6 As shown in the upper middle part, the insulation material at the end of the connecting wire 310 is removed using a similar method to obtain the second insulation layer 312.
[0070] Finally, as Figure 6 As shown in the middle section, the seed layer 920 is removed to obtain the intermediate layer 300.
[0071] The manufacturing method of the semiconductor packaging device in this embodiment can achieve the technical effects of the semiconductor packaging device described above, and will not be repeated here.
[0072] Although this disclosure has been described and illustrated with reference to specific embodiments thereof, such descriptions and illustrations are not limiting of this disclosure. It will be readily understood by those skilled in the art that various changes can be made and equivalent elements can be substituted within embodiments without departing from the true spirit and scope of this disclosure as defined by the appended claims. Illustrations may not be drawn to scale. Differences may exist between the technical representation in this disclosure and actual equipment due to variables in the manufacturing process, etc. Other embodiments of this disclosure may exist that are not specifically described. The description and drawings should be considered illustrative rather than restrictive. Modifications may be made to adapt particular circumstances, materials, composition, methods, or processes to the objectives, spirit, and scope of this disclosure. All such modifications fall within the scope of the appended claims. While the methods disclosed herein have been described with reference to specific operations performed in a particular order, it should be understood that these operations may be combined, subdivided, or reordered to form equivalent methods without departing from the teachings of this disclosure. Therefore, unless specifically indicated herein, the order and grouping of operations do not limit this disclosure.
Claims
1. A semiconductor packaging device, comprising: The first circuit layer has a first conductive element disposed on its surface; The second circuit layer has a second conductive element on its surface; The first conductive element and the second conductive element are electrically connected by at least two connecting lines, and the connecting lines between the first conductive element and the second conductive element are in a curved shape; The surface of the first circuit layer has a first insulating portion, the surface of the second circuit layer has a second insulating portion, and a connecting line is provided between the first insulating portion and the second insulating portion. The connecting line between the first insulating portion and the second insulating portion is in a straight shape. At least two layers of insulating material are provided around the connecting wire, and different parts of the connecting wire are in contact with different insulating materials. The first conductive element is connected to the connecting wire via solder; and / or The second conductive element is connected to the connecting line by solder; An intermediate layer is provided between the first line layer and the second line layer, and the at least two connecting lines are located within the intermediate layer; The distance between the two ends of the connecting line between the first conductive element and the second conductive element is less than the distance between the two ends of the connecting line between the first insulating portion and the second insulating portion; The first circuit layer is a substrate, and the second circuit layer is a redistribution layer; The intermediate layer is adhesive, and the first circuit layer and the second circuit layer are bonded together through the intermediate layer.
2. A method for manufacturing a semiconductor packaging device as described in claim 1, comprising: Manufacturing intermediate layers; The intermediate layer is placed on the first circuit layer, wherein at least two connecting lines are provided in the intermediate layer, and a first conductive element is provided on the surface of the first circuit layer. The second circuit layer is placed on the intermediate layer, wherein a second conductive element is provided on the surface of the second circuit layer; The first conductive element and the second conductive element are electrically connected through the connecting line to obtain the semiconductor packaging device as described in claim 1; The intermediate layer is formed in the following manner: A seed layer is formed on the carrier; Photoresist is applied to the carrier, and at least two connecting lines are formed on the seed layer by electroplating. Remove the photoresist and apply an insulating material to the surface of the interconnect; The top of the connecting wire is placed in a container containing etching solution to remove the insulation material at the end of the connecting wire, thereby obtaining a first insulation layer; An insulating material is disposed around the first insulating layer; Remove the insulating material from the ends of the connecting wires to obtain a second insulating layer; Remove the seed layer to obtain the intermediate layer.