Techniques for accurately determining temperature at various locations of a working integrated circuit

Abstract

Techniques for accurately determining temperatures at various locations of a working integrated circuit are disclosed. Depending on the current workload, an integrated circuit (IC) can exceed a thermal cooling budget. As a result, the IC often employs a thermal sensor to measure the temperature of a junction or hot spot on the IC. Due to the distance between the thermal sensor and the various junctions, a thermal offset can be added to the temperature reading from the thermal sensor to more accurately assess the temperature at the junction. To account for different workload distributions (e.g., asymmetric or symmetric), the systems and methods described herein can dynamically adjust the thermal offset. As a result, the efficiency of the IC can be improved because the thermal settings of the IC can account for the ability of the thermal cooling budget to effectively cool the IC under current working conditions, thereby reducing premature power down or shutdown of the IC.

Description

Background Technology

[0001] The density of integrated circuits (ICs) or chips, along with transistors and other components, is constantly increasing to increase power density (e.g., power per unit volume) while reducing the footprint of ICs in larger systems. However, as ICs become increasingly dense, power demands also increase, and the area of ​​concern for ICs is becoming smaller compared to previous generations. Increased power on smaller portions of the IC generates more heat more quickly, requiring greater cooling capacity for the IC to operate effectively over time. To manage heat generation and dissipation within the IC, thermal sensors can be distributed across the IC to measure the temperature at various locations or sections. Due to IC layout, wiring, and / or congestion, these thermal sensors can be located at a distance from the actual hot spots of the IC, necessitating the addition of a thermal offset (e.g., an increased temperature value) to the sensor readings to more accurately reflect the temperature at the hot spots. The final temperature value (e.g., thermal sensor reading plus thermal offset) can be used to determine when to throttle back the IC's power and / or shut it down to prevent damage, failure, or misoperation.

[0002] However, because the offset value is set during safe boot, and the software security is reduced after safe boot, the thermal offset provides a margin for worst-case workload or temperature distribution on the IC. As a result, even when the temperature distribution is more symmetrically distributed across the IC and within the IC's cooling budget, the IC's power may be prematurely reduced or shut down due to the offset adjustment for the worst case. For example, when the final temperature value of a single thermal sensor exceeds a threshold, the IC may be throttled or shut down even if the temperature, power, voltage, and / or frequency associated with that IC are within the IC's cooling budget. Prematurely reducing or shutting down the IC's power when it can function effectively can lead to a degraded overall IC performance, reducing the available computing resources for the system. Furthermore, insufficient conservative offset and / or failure to reduce power when necessary can cause localized overheating of the IC, resulting in reduced IC reliability. Summary of the Invention

[0003] Embodiments of this disclosure relate to monitoring temperature distribution in computer hardware to adjust thermal settings (e.g., thermal offset values) for increasing the efficiency of the computer hardware. Systems and methods are disclosed that can adjust thermal offsets based on a temperature or workload distribution (e.g., symmetrical or asymmetrical) determined on an integrated circuit (IC). For example, a thermal solution for an IC (e.g., a heatsink, fan, fin, liquid cooling, air cooling, etc.) may be able to adequately cool the IC when operating at maximum power with a substantially symmetrical temperature distribution. However, in the case of providing maximum power under an asymmetrical temperature distribution or workload, the thermal solution may not be able to adequately cool the IC.

[0004] The technology disclosed herein enables the system to identify asymmetric and symmetric temperature distributions in order to adjust the thermal offset of the IC, thereby allowing for temperature offsets corresponding to variations in power adjustments (e.g., power reduction, power shutdown, etc.) of the IC under different operating conditions. Thus, when a symmetric distribution is detected, the thermal offset can be reduced to account for the ability of a better thermal solution to cool the IC, while for asymmetric distributions, the thermal offset can be increased to account for potential deficiencies in the thermal solution for cooling the IC, or at least a portion of the IC corresponding to the asymmetric temperature distribution or workload. In this way, the IC can operate more efficiently during symmetric distributions (e.g., by not prematurely reducing power), while still allowing the system to adjust the power as needed (e.g., when a portion of the IC's power reduction might push the temperature beyond the cooling limits of the thermal solution). Attached Figure Description

[0005] The present system and method for monitoring temperature distribution in computer hardware to adjust thermal settings (e.g., thermal offset values) to improve its efficiency are described in detail below with reference to the accompanying drawings, wherein:

[0006] Figure 1 A block diagram of a thermal management system according to some embodiments of the present disclosure is depicted;

[0007] Figure 2A Example illustrations depicting some embodiments of the present disclosure of a system-on-a-chip (SoC);

[0008] Figures 2B to 2C Example illustrations depict cooling components associated with a hardware package including an integrated circuit, according to some embodiments of the present disclosure;

[0009] Figures 3-4 A flowchart is depicted illustrating a method for thermal offset management of an integrated circuit according to some embodiments of the present disclosure; and

[0010] Figure 5 This is a block diagram of an example computing device applicable to implementing some embodiments of the present disclosure. Detailed Implementation

[0011] Systems and methods relating to monitoring temperature distribution in an integrated circuit (IC) or chip to adjust thermal settings (e.g., thermal offset values) for improving IC efficiency are disclosed. While examples are described herein with reference to a system-on-a-chip (SoC), this is not intended to be limiting. The systems and methods described herein can be implemented for any type of IC that can implement sensors, such as, but not limited to, graphics processing units (GPUs), central processing units (CPUs), sound chips, network interface chips, memory ICs (e.g., random access memory (RAM), static RAM (SRAM), read-only memory (ROM), etc.), SoCs, monolithic ICs, hybrid ICs, multi-chip ICs, digital ICs, analog ICs, mixed-signal ICs, thin ICs, thick ICs, logic ICs, audio amplifiers, operational amplifiers, timer ICs, power management ICs, interface ICs, and / or other IC types. Although described with reference to an IC or chip, the thermal management techniques described herein can be implemented on hardware components other than ICs or chips without departing from the scope of this disclosure.

[0012] Furthermore, the thermal management for ICs described herein can be implemented in any type of system, such as, but not limited to, autonomous, semi-autonomous, and / or non-autonomous vehicle systems (e.g., improving the efficiency of one or more underlying SoCs), cloud and data center systems (e.g., for CPUs, GPUs, etc.), robotic systems, gaming systems (e.g., virtual reality, platform gaming, cloud gaming, etc.), entertainment systems, general-purpose computing systems, high-performance computing (HPC) systems, graphics rendering systems (e.g., for ray tracing, stereoscopic 3D rendering, etc.), medical imaging and analysis systems (e.g., for healthcare, life sciences, etc.), machine learning and / or artificial intelligence systems, industrial automation systems, parallel computing platforms, mobile computing systems, Internet of Things (IoT) systems, edge computing applications, and / or other system or application types. Thus, the systems and methods described herein can be implemented for any IC or combination thereof to improve the thermal management of ICs to enhance their efficiency and effectiveness.

[0013] refer to Figure 1 , Figure 1This is an example block diagram of a thermal management system 100 (which may alternatively be referred to herein as "System 100") according to some embodiments of this disclosure. It should be understood that such and other arrangements described herein are merely illustrative examples. Other arrangements and elements (e.g., machines, interfaces, functions, commands, groupings of functions, etc.) may be used in addition to or instead of those shown, and some elements may be omitted entirely. Furthermore, many of the elements described herein are functional entities that can be implemented as discrete or distributed components or in combination with other components and implemented in any suitable combination and location. The various functions described herein as being performed by entities can be performed by hardware, firmware, and / or software. For example, various functions can be performed by a processor executing instructions stored in memory. In some embodiments, the components, features, and / or functions of System 100 may be similar to... Figure 5 The components, features, and / or functions of the example computing device 500, and / or system 100 may include those related to... Figure 5 The example computing device 500 has additional or alternative components, features and / or functions compared to the example computing device 500.

[0014] System 100 may at least partially include a thermal sensor 104, a distribution evaluator 106, an offset manager 108, one or more units 110, one or more cooling components 112, and a power manager 114. System 100 may include any number of thermal sensors 104, which may be configured to generate an output indicating the detected temperature of one or more units 110 of the IC at the location of the thermal sensor 104. The thermal sensor 104 may include, but is not limited to, diodes, bipolar junction transistors (BJTs), voltage output IC sensors, current output IC sensors, digital output IC sensors, immersion IC sensors, transducer-type IC sensors, thermocouple sensors, thermistor sensors, resistance temperature detector (RTD) sensors, and / or another type of temperature sensor suitable for implementation on the IC or one or more units 110 thereof. Thus, the thermal sensor 104 may generate one or more output signals (e.g., corresponding to voltage, current, resistance, etc.) that indicate the corresponding temperature of one or more units 110 or the IC at the location of the thermal sensor 104. The thermal sensor 104 can be positioned anywhere on the IC, such as on the front and / or back of the IC (e.g., Figure 2A (Front and / or back of the SoC 110A).

[0015] refer to Figure 2AThe IC can correspond to SoC 110A. For example, SoC 110A may include any number of electronic components, circuits, logic and / or other hardware corresponding to its unit 110, such as transistors, diodes, capacitors, resistors, etc., such as one or more GPUs 242 (e.g., having any number of CUDA cores), one or more CPUs. 220 (e.g., one or more advanced RISC machine (ARM) processors), image signal processor (ISP) 252, camera serial interface (CSI), deep learning accelerator (DLA), programmable vision accelerator (PVA), other accelerator types, video processor, memory 232A and 232B (e.g., low-power double data rate (LPDDR) memory, such as synchronous dynamic random access memory (SDRAM)), network interface module (e.g., for Wi-Fi, Ethernet, USB, HDMI, etc.), coprocessor, encoder 244, decoder 248, one or more display components 246, one or more security components 254 (e.g., security engine, hardware security module (HSM), etc., for example for executing secure boot software, firmware, etc.) and / or other components, unit 110 or hardware type supporting various functions of SoC 110A. The illustration of SoC 110A is for illustrative and clarity purposes only. For example, each labeled component can consist of any number of sub-components, circuits, logic, etc.

[0016] SoC 110A may include any number of thermal sensors 104, including thermal sensors 104A-104D. For example, although only four thermal sensors are shown, according to embodiments, there may be five, ten, twenty, fifty or more thermal sensors 104 on the IC and / or on one or more of its cells 110. Thermal sensors 104 may measure the temperature of the SoC 110A in general, and / or may be associated with measuring the temperature of a single component or group of components of the SoC 110A. For example, thermal sensor 104D may measure the temperature corresponding to memory 232 (e.g., memory 232A-232B) and may be referred to as memory thermal sensor 104D. Thermal sensors 104A and 104B may measure the temperature corresponding to GPU 242 and may be referred to as GPU thermal sensors 104A-104B. Thermal sensor 104C may measure the temperature corresponding to CPU 220 and may be referred to as CPU thermal sensor 104C. As described herein, when determining the average temperature of SoC 110A, the average temperature can therefore correspond to the entire SoC 110A or a subset thereof. For example, thermal offsets can be managed separately for memory thermal sensors 104D (which may include any number of sensors), separately for GPU thermal sensors 104A-104B (which may include any number of sensors), and / or separately for CPU thermal sensors 104C (which may include any number of sensors). In other embodiments, thermal offsets can be managed separately for groups of thermal sensors that are not related based on their relationship to a specific component or function of the IC (e.g., thermal sensors 104C and 104D can be analyzed together due to their proximity). Similarly, one or more cooling components 112 can be controlled individually based on different temperature sensor types, or they can generally be controlled using any temperature sensor or combination thereof. For a non-limiting example, where two or more fans 260A and 260B ( Figure 2B For cooling the entire package including the SoC 110A, the fan 260A can be controlled based on temperature readings from the GPU thermal sensor 104, and the fan 260A can be controlled based on temperature readings from the CPU thermal sensor 104, and so on.

[0017] Distribution evaluator 106 can determine the type of temperature or workload distribution currently being performed by one or more cells 110 of the IC. For example, distribution evaluator 106 can determine whether the temperature distribution is asymmetric or symmetric (e.g., relative to the temperature distribution) based on temperature readings from thermal sensor 104. Figure 2A Temperature readings from GPU thermal sensors 104A-104B, temperature readings from memory thermal sensor 104D, temperature readings from GPU thermal sensor 104C, or combinations thereof.

[0018] In addition to using thermal sensor 104 to determine temperature or workload distribution, or as an alternative, various other inputs can be generated and analyzed to determine the distribution. For example, cell activity of one or more ICs' cells 110 can be calculated or determined, for instance, by monitoring the current workload of one or more cells 110 (or a portion thereof) or the tasks being performed by one or more cells 110. As another example, the utilization of one or more cells 110 can be monitored and used to determine the workload distribution of one or more ICs' cells 110. For example, one or more cells 110 or a portion thereof may be capable of performing a certain amount of work or processing, and the current amount of work or processing can be compared to the capacity of one or more cells 110 to determine its utilization. As another example, track power consumption of one or more ICs' cells 110 can be monitored to determine the workload and / or temperature distribution across one or more cells 110 and / or one or more ICs. In some examples, memory traffic can be monitored to determine the distribution across one or more cells 110 and / or one or more ICs. In this way, one or more of a variety of different factors or criteria can be monitored to determine the temperature and / or workload distribution of one or more units 110 and / or one or more ICs.

[0019] To determine whether a temperature distribution or workload is asymmetric or symmetric, for example, the temperature difference D can be calculated. temp D temp This can correspond to the temperature difference between the thermal sensor 104 with the highest temperature reading and the average temperature reading of the thermal sensors 104 in one or more units 110 of the IC. This calculated value D can be... temp With threshold D threshold Compare, and in D temp Greater than D threshold In this case, the distribution estimator 106 can determine that the current temperature or workload distribution is asymmetric. Similarly, in D... temp The value is less than D threshold In such cases, the distribution evaluator 106 can determine that the current temperature or workload distribution is symmetrical.

[0020] In some embodiments, the temperature readings from the thermal sensor 104 used to calculate the temperature distribution may correspond to the actual temperature readings from the thermal sensor 104 and / or may correspond to the actual temperature readings plus a thermal offset value. For example, for calculating D... temp The temperature reading used can be an actual temperature reading, which can then be used to determine the offset value, as described in more detail in this article. As another example, to calculate D... tempThe temperature reading used can be the actual temperature plus an offset value (e.g., the current offset value, the offset value corresponding to a symmetrical workload, the offset value corresponding to an asymmetrical workload, etc.).

[0021] As an example, and relative to Figure 2A The distribution evaluator 106 can analyze temperature readings from each thermal sensor 104A-104D of the SoC 110A to determine the average temperature. The distribution evaluator 106 can then examine each individual temperature reading from each thermal sensor 104A-104D to calculate D. temp And then D can be temp With D threshold The comparison is used to determine whether the temperature distribution across SoC 110A is symmetric or asymmetric. As another example, such as in a scenario where temperature or workload distribution is calculated for sub-components of the SoC, the distribution evaluator 106 can analyze temperature readings from each GPU thermal sensor 104A-104B of GPU 242 to determine the average temperature. The distribution evaluator 106 can then examine each individual temperature reading from each GPU thermal sensor 104A-104B to calculate D. temp And then D can be temp With D threshold A comparison is made to determine whether the temperature distribution on the GPU 242 is symmetrical or asymmetrical. As a non-limiting example, the average temperature of the GPU 242 is 50 degrees Celsius, the value from the thermal sensor 104A is 70 degrees Celsius, and D... threshold At 15 degrees Celsius, the temperature distribution of the GPU 242 can be considered asymmetrical (e.g., because D...). temp (20 degrees Celsius). As another example, with an average GPU temperature of 80 degrees Celsius, thermal sensor 104A recorded a value of 70 degrees Celsius, thermal sensor 104B recorded a value of 90 degrees Celsius, and D... threshold At 15 degrees Celsius, the temperature distribution of the GPU 242 can be considered symmetrical (e.g., because for both thermal sensors 104A and 104B, D...). temp (All are 10 degrees Celsius).

[0022] While the above example primarily uses temperature readings from thermal sensor 104 to determine the distribution, this is not intended to be limiting. For example, as described herein, various factors or criteria other than or caused by temperature can be used to determine the distribution on one or more cells 110 of one or more ICs. Thus, one or more of temperature, cell activity, utilization, rail power consumption, memory flow, and / or other criteria can be used to calculate D. temp (or D) weightedAs a weighted calculation. To determine asymmetric or symmetric distributions or workloads, for example, D can be calculated. weighted The difference in, where D weighted This can correspond to the weighted difference of various standards between one or more units 110 or a portion thereof with the highest weighted value and the average weighted value or a portion thereof of various standards of one or more units 110 of one or more ICs. This calculated value D can be... weighted With threshold D threshold_weighted Compare, and in D weighted Greater than D threshold_weighted In this case, the distribution estimator 106 can determine that the current temperature or workload distribution is asymmetric. Similarly, in D... weighted The value is less than D threshold_weighted In such cases, the distribution evaluator 106 can determine that the current temperature or workload distribution is symmetrical.

[0023] In some embodiments, in order to calculate D temp Or D weighted The distribution estimator 106 can be trained by utilizing infrared imaging (e.g., actual temperature profiles of one or more cells 110 of one or more ICs and / or the entire IC) and / or by mapping various criteria (e.g., temperature, unit activity, orbital power consumption, and / or other criteria) using simulated thermal maps from a thermal simulator. In this way, certain combinations of values ​​can be learned to correspond to certain D values. temp and / or D weighted The values ​​learned can be used to calculate these values ​​during the use of one or more ICs.

[0024] In some other examples, such as when using any single criterion, the value of a single criterion (e.g., D) can be... temp (where temperature is a single standard) is compared to a threshold value of that standard. Thus, in some embodiments, unit activity, utilization, rail power consumption, etc., can be used individually instead of temperature.

[0025] Offset manager 108 can utilize information from distribution evaluator 106 to adjust the thermal offset of one or more thermal sensors 104 in one or more cells 110 of the IC. The thermal offset value may correspond to a number of temperature degrees (e.g., Fahrenheit, Celsius, and / or another type of temperature measurement) that can be added to the actual temperature reading of the thermal sensor 104 to address the physical (e.g., distance) offset between the thermal sensor 104 and the desired temperature reading (e.g., junction temperature Tj) on one or more cells 110 of the IC, or between the location (or node) of the node. As described herein, the thermal sensor 104 may not be directly positioned at or near the desired location due to the IC's planar layout, congestion of components at the desired location on the IC (e.g., insufficient space for the thermal sensor 104), and / or routing issues (e.g., a communication or power path for the thermal sensor 104 may be unavailable, or a communication or power path (if created) may interfere with the communication or power of another component).

[0026] In some embodiments, this location may correspond to an identified hotspot corresponding to one or more cells 110 of the IC. For example, regarding Figure 2A Hot spots 250A-250D can be identified on SoC 110A. Hot spots 250 may correspond to known locations on SoC 110A (or individually to sub-components or cells of SoC 110A, such as GPU 242), where known temperatures reach high levels under certain operating conditions. For example, to determine hot spots 250, thermal simulation of a virtual representation of the IC (e.g., prior to manufacturing) or thermal observation of the IC (e.g., after manufacturing) can be performed. In addition to using these testing techniques to determine hot spots 250, thermal simulation and / or thermal observation (e.g., using an infrared camera to observe hot spots compared to the location of thermal sensor 104) can be used to determine offset values. As a non-limiting example, the multiply-accumulate (MAC) of GPU 242 may consume a large amount of energy and thus generate a large amount of heat, resulting in hot spots 250 corresponding to GPU 242. In this way, thermal offset values ​​can be determined to estimate the final temperature value of a location on one or more cells 110 of the IC, which may be at a certain physical distance from thermal sensor 104.

[0027] In some embodiments, thermal offsets and / or hotspot locations can be determined for specific use cases. For example, when the IC is used in one or more specific tasks and / or within a specific system, the IC can be tested (e.g., using thermal observation) while operating under possible conditions. As a result, hotspot locations and / or thermal offsets (e.g., for symmetrical and / or asymmetrical offsets) can be tailored to (e.g., for a specific customer) a specific workload.

[0028] Offset manager 108 can determine, based on the temperature, power, and / or load distribution determined by distribution evaluator 106, which thermal offset values ​​should be added to the actual temperature readings of thermal sensor 104. In some embodiments, thermal offsets can be applied globally based on the determination of asymmetric or symmetric distributions. For example, regarding Figure 2A In the case where hotspots 250A and 250B of GPU 242 are expected to be found in substantially the same cells / partitions replicated on the chip, two distinct offsets may suffice, such as an asymmetric offset when one or more readings from one or more GPU thermal sensors 104 correspond to an asymmetric temperature distribution, and a symmetric offset when one or more readings from one or more GPU thermal sensors 104 correspond to a symmetric temperature distribution. Thus, when an asymmetric temperature distribution is determined on GPU 242, an asymmetric offset (which may be greater than a symmetric offset) can be used for each GPU thermal sensor 104, and vice versa for a symmetric temperature distribution. The power manager 114 can then be used to compare the final temperature value calculated using the currently implemented offset values ​​with various temperature thresholds to reduce the power of one or more cells 110 of the IC (e.g., SoC 110A) and / or shut down the power of one or more cells 110 of the IC to prevent damage, crashes, and / or malfunctions of one or more cells 110 of the IC. As a result, only when the asymmetry is greater than D... threshold Only when this is achieved can a conservative (e.g., worst-case) thermal offset be realized, while a lower thermal offset can be achieved for a more symmetrical distribution. For example, compared to a conventional system, a symmetrical offset may correspond to a conservative or "worst-case" scenario for a symmetrical distribution, while a conventional system achieves a conservative or worst-case thermal offset value corresponding to an asymmetrical distribution, even if the IC or one or more of its cells 110 may currently be affected by symmetrical temperature, workload, or power distribution.

[0029] In some embodiments, a single thermal sensor 104 or a group of thermal sensors 104 may have an offset different from the other sensors. For example, even when a symmetrical or asymmetrical offset is applied globally, the value of the symmetrical and / or asymmetrical offset of the first thermal sensor 104 may differ from the value of the symmetrical and / or asymmetrical offset of the second thermal sensor 104. Thus, and referring to... Figure 2A GPU thermal sensor 104A may have a different symmetrical and / or asymmetrical offset than GPU thermal sensor 104B. Similarly, GPU thermal sensors 104A-104B may have a different symmetrical and / or asymmetrical offset than memory thermal sensor 104D and / or one or more CPU thermal sensors 104C.

[0030] In some examples, the switching between symmetric and asymmetric offset values ​​may not be universal. For example, different thermal sensors 104 may switch their associated offset values ​​to asymmetric offset values, while other thermal sensors 104 may maintain symmetric offsets. As a non-limiting example, this applies only to cases where D is satisfied. threshold The thermal sensor 104 is conditional (e.g., only for its calculated D). temp Value greater than D threshold The thermal sensor 104 can switch the offset from symmetric to asymmetric. In some examples, each thermal sensor 104 within a threshold distance or difference from the local average temperature or chip average temperature can change its associated thermal offset to asymmetric, while other thermal sensors 104 can remain unchanged. In some embodiments, the average temperature of a cell / partition of the IC can be compared with the average temperature of the entire IC to determine the D corresponding to the average value. temp Value. In this way, the average value of multiple thermal sensors 104 of the cell / partition (e.g., GPU thermal sensor 104 of GPU 242) can be compared with the average value of each thermal sensor 104 of the IC (e.g., each thermal sensor of SoC 110A) to determine D. temp The value of D, and can be used to... temp The value of one or more D threshold The values ​​are compared to determine whether to adjust the thermal offset for one or more thermal sensors 104 of the unit / partition 110.

[0031] As another example, for one or more thermal sensors 104, there can be multiple D threshold Furthermore, different asymmetric offset values ​​can be related to D. threshold Different values ​​are associated with each other. For example, when the first D is reached... threshold At that time, a first asymmetric offset can be set, and when a second (e.g., higher) offset is reached...

[0032] D threshold At that time, a second (e.g., higher) asymmetric offset can be set.

[0033] In some examples, in addition to analyzing temperature, voltage, power, frequency, and / or combinations thereof can be analyzed to determine whether thermal offset should be adjusted. For example, in some thermal sensor 104, the temperature can meet D thresholdIn certain situations, the voltage can be monitored to determine whether the thermal offset value should be adjusted to an asymmetric offset. A low voltage at a higher temperature may not be a problem because even at a low voltage at a higher temperature, the cooling component 112 can still adequately cool the IC or one or more of its cells 110. In some cases, the offset value may not be adjusted to an asymmetric offset. However, in other cases, the offset value can be adjusted to an asymmetric offset; however, due to over-configuration of cooling at low voltage, a (higher) asymmetric offset value may still not cause the final temperature to reach the throttling temperature threshold. Conversely, as the voltage increases, one or more cooling components 112 may fail to cool the IC, so an asymmetric offset can be set to avoid damage, overheating, or performance problems with the IC and / or its components or one or more cells 110. For example, with power concentrated at half the IC, the thermal offset value may be less than with voltage concentrated at one-quarter of the IC. For example, with the IC operating at a maximum of 1.0V, if the current voltage is 0.8V, then satisfying D... threshold The offset can be adjusted to address the possibility of temperatures rising beyond the IC's cooling budget. In some embodiments, the ratio between the current voltage value to the IC and the maximum voltage value corresponding to the IC (or vice versa) can be determined, and this ratio can be compared to a ratio threshold to determine whether a voltage standard is met and whether the thermal offset value should be adjusted.

[0034] In some embodiments, the corresponding asymmetric and symmetric offset values ​​for portions or cells 110 of the IC (or their associated thermal sensor 104) can be programmed based on power density (power per unit volume) and / or voltage-frequency ratio. For example, the voltage-frequency ratio can help identify the location of maximum power density, and a voltage threshold can be used to determine whether the thermal offset should be adjusted from a symmetric to an asymmetric offset. Some cells / partitions of the IC may require higher voltages to operate at high frequencies, while other cells / partitions of the IC may require lower voltages, for example, using dynamic frequency voltage scaling (DFVS) for control. In addition to using the thermal sensor 104 to determine symmetric or asymmetric temperature distributions, this information can be used to determine whether the offset value should be switched for a particular state of the IC.

[0035] To adjust thermal offset values ​​from one thermal offset value (e.g., corresponding to an asymmetric distribution) to another thermal offset value (e.g., corresponding to a symmetric distribution), this can happen incrementally to avoid rapid adjustments and to resolve noise in the temperature readings. For example, the current offset value can be incrementally updated to the desired offset value at each time step that satisfies the relationship. In such an example, where the relationship is D... threshold In the case of a relationship, for D temp Greater than Dthreshold At each time step, the current offset value can be updated by an increment (e.g., one degree, two degrees, etc.) until the desired offset is reached. Thus, it is possible to increase the offset over a series of time steps leading to the asymmetric offset value, and then decrease the offset over a series of time steps before reaching the asymmetric offset value, and vice versa. In some embodiments, the rate at which the offset values ​​of some thermal sensors 104 increase may differ from those of other sensors. For example, based on thermal modeling or thermal observation and / or current voltage, frequency, and / or power measurements, under certain workloads, it can be determined that some thermal sensors 104 may correspond to hotspots where the temperature rises faster than other sensors. In such examples, the increments of those thermal sensors 104 may be larger (e.g., two degree increments opposite to a one-degree increment) and / or the evaluation or update frequency may be greater than that of thermal sensors 104 corresponding to hotspots unlikely to have rapid temperature changes.

[0036] In some embodiments, to prevent tampering and misuse of IC 110, D can be securely controlled. threshold The values ​​of asymmetric and / or symmetric offsets are programmed and locked via the boot software. This allows the boot software to set these values ​​during boot, startup, and / or initialization, and during operation, the IC's safety hardware can manage subsequent switching between symmetric and asymmetric offsets of the various thermal sensors 104.

[0037] refer to Figure 2B and Figure 2C As shown, the SoC 110 can be implemented on a card or board, and the package including the SoC 110 can implement various cooling components 112, such as fans 260A and 260B and / or one or more heatsinks 262. For example, see Reference... Figure 2CHeatsink 262 can be disposed on SoC 110A to aid in cooling SoC 110A. In some embodiments, more than one cooling component 112 can be used for a given IC. For example, combinations of heatsinks, fans, fins, liquid, air, and / or other cooling component types can be implemented based on the cooling requirements and / or implementation location of the IC or one or more of its cells 110. To determine the cooling component 112 that defines the thermal cooling budget of the IC, the thermal budget or thermal design power (TDP) can be estimated to represent the sustainable power that one or more cells 110 of the IC are expected to dissipate without overheating. This determination can be based on the symmetrical and asymmetrical temperature, power, voltage, and / or workload distribution of the IC. Thus, at different times, different cells 110 and / or sections of the IC may consume more power than other parts, but the IC may still not overheat as long as the total power remains below the TDP (and the thermal cooling solution provides sufficient heat dissipation). However, even taking this into account, on some platforms, the IC may still exceed the cooling budget, for example, because even if the chip power is below the TDP, the heat dissipation is not perfect and may not be sufficient to cool the chip with power concentrated in a smaller portion of the chip. As a result, dynamic adjustments between thermal offsets can help take into account and manage the thermal cooling budget, allowing the IC to operate as efficiently as possible given the current temperature distribution.

[0038] Now for reference Figure 3 and Figure 4 Each block of methods 300 and 400 described herein includes a computational process that can be executed using any combination of hardware, firmware, and / or software. For example, various functions can be executed by a processor executing instructions stored in memory. Methods 300 and 400 can also be embodied as computer-usable instructions stored on a computer storage medium. The method can be provided by a standalone application, service, or managed service (standalone or in combination with other managed services) or a plug-in to another product, to name a few. Additionally, by way of example, relative to... Figure 1 System 100 and Figure 2A SOC110A describes methods 300 and 400. However, the methods may be performed additionally or alternatively by any system or any combination of systems, including but not limited to those described herein.

[0039] refer to Figure 3 , Figure 3 This is a flowchart illustrating a method 300 for thermal offset management of an IC according to some embodiments of the present disclosure. At block B302, method 300 includes calculating an average temperature from the outputs of multiple thermal sensors of the integrated circuit. For example, the average temperature of multiple thermal sensors 104 of one or more cells 110 of the IC may be calculated.

[0040] At box B304, method 300 includes determining that the temperature output from one of the multiple thermal sensors is greater than a threshold difference from the average temperature. For example, the temperature reading from thermal sensor 104 can be compared with the average temperature to calculate D. temp And D can be temp The value of D threshold Compare to determine D temp Greater than D threshold .

[0041] At box B306, method 300 includes adjusting a first thermal offset value, at least corresponding to a thermal sensor, to a second thermal offset value, based at least in part on a temperature difference greater than a threshold. For example, this can be based at least in part on D. temp Greater than D threshold The current (e.g., symmetrical) offset value is adjusted (e.g., incrementally) to a newer (e.g., asymmetrical) offset value. In some embodiments, other factors, such as voltage, power, voltage-frequency ratio, etc., may be weighed before adjusting the offset value. Furthermore, the offset value may be changed generally for one or more thermal sensors 104, for a single thermal sensor 104 but not for other thermal sensors, and / or in another manner.

[0042] Now for reference Figure 4 , Figure 4 This is a flowchart illustrating a method 400 for thermal offset management of an IC according to some embodiments of the present disclosure. At block B402, method 400 includes determining the average temperature of a set of thermal sensors. For example, with respect to the SoC 110A of FIG. 2, the average temperature of thermal sensors 104A-104D can be calculated.

[0043] At box B404, method 400 includes determining the temperature of a subset of the set of thermal sensors. For example, the temperature of thermal sensor 104A can be determined.

[0044] At box B406, method 400 includes calculating D between the temperature and the average temperature. temp For example, the difference D between the average temperature of thermal sensors 104A-104D and the temperature of thermal sensor 104A can be calculated. temp .

[0045] At box B408, method 400 includes determining D. temp Is it greater than D? threshold If not, method 400 can proceed to box B410 to increment the hot offset from the current value to the symmetrical offset value. For example, if the current value does not correspond to the symmetrical offset value (or other desired offset value), the offset value can be incremented toward the desired offset value. If the current value does correspond to the symmetrical offset value, no adjustment needs to be made.

[0046] At box B408, if D temp Greater than D threshold Then method 400 can proceed to block B412 to determine whether voltage, frequency, and / or power criteria are met. For example, if the current voltage, frequency, voltage-to-frequency ratio, and / or power information of the cell and / or partition of the SoC 110A corresponding to at least the thermal sensor 104A does not meet certain criteria (e.g., voltage threshold, power threshold, voltage-to-frequency ratio threshold, etc.), method 400 can continue to block B410 as described above.

[0047] At block B412, if the voltage, frequency, and / or power criteria are met, method 400 can proceed to block B414 to increment the thermal offset from the current value to the asymmetric offset value. For example, if the current value does not correspond to the asymmetric offset value (or other desired offset value), the offset value can be increased toward the desired offset value. If the current value does correspond to the asymmetric offset value, no adjustment needs to be made.

[0048] The method 400 can be repeated at each time step or at a certain frequency, so that the desired offset value can be dynamically set and / or the offset value can be adjusted incrementally toward the desired offset value.

[0049] Example computing device

[0050] Figure 5 This is a block diagram of one or more example computing devices 500 suitable for implementing some embodiments of the present disclosure. The computing device 500 may include an interconnect system 502 that is directly or indirectly coupled to the following devices: a memory 504, one or more central processing units (CPUs) 506, one or more graphics processing units (GPUs) 508, a communication interface 510, input / output (I / O) ports 512, input / output components 514, a power supply 516, one or more presentation components 518 (e.g., one or more displays), and one or more logic units 520.

[0051] although Figure 5 Each box Figure 5 The lines in the diagram are shown as being connected to the lines via interconnect system 502; this is not intended to be limiting and is merely for clarity. For example, in some embodiments, a presentation component 518, such as a display device, may be considered an I / O component 514 (e.g., if the display is a touchscreen). As another example, CPU 506 and / or GPU 508 may include memory (e.g., memory 504 may represent a storage device in addition to the memory of GPU 508, CPU 506, and / or other components). In other words, Figure 5The computing devices described are for illustrative purposes only. No distinction is made between categories such as "workstation," "server," "laptop," "desktop," "tablet," "client device," "mobile device," "handheld device," "game console," "electronic control unit (ECU)," "virtual reality system," and / or other device or system types; all are referred to as such. Figure 5 Within the scope of computing devices.

[0052] Interconnect system 502 may represent one or more links or buses, such as address buses, data buses, control buses, or combinations thereof. Interconnect system 502 may include one or more bus or link types, such as Industry Standard Architecture (ISA) bus, Extended Industry Standard Architecture (EISA) bus, Video Electronics Standards Association (VESA) bus, Peripheral Component Interconnect (PCI) bus, Peripheral Component Interconnect Fast (PCIe) bus, and / or another type of bus or link. In some embodiments, there is a direct connection between components. As an example, CPU 506 may be directly connected to memory 504. Furthermore, CPU 506 may be directly connected to GPU 508. In cases where there is a direct or point-to-point connection between components, interconnect system 502 may include a PCIe link to perform the connection. In these examples, a PCI bus is not required to be included in computing device 500.

[0053] The memory 504 may include any of a variety of computer-readable media. Computer-readable media can be any available medium accessible to the computing device 500. Computer-readable media may include volatile and non-volatile media, as well as removable and non-removable media. By way of example and not limitation, computer-readable media may include computer storage media and communication media.

[0054] Computer storage media may include volatile and non-volatile media and / or removable and non-removable media implemented in any method or technology for storing information, such as computer-readable instructions, data structures, program modules, and / or other data types. For example, memory 504 may store computer-readable instructions (e.g., representing one or more programs and / or one or more program elements such as an operating system). Computer storage media may include, but is not limited to, RAM, ROM, EEPROM, flash memory or other storage technologies, CD-ROM, digital versatile disk (DVD) or other optical disc storage devices, magnetic tape cassettes, magnetic tape, disk storage devices or other magnetic storage devices, or any other term "computer storage media" that may be used to store desired information and is accessible by computing device 500. As used herein, computer storage media itself does not include signals.

[0055] Computer storage media can embody computer-readable instructions, data structures, program modules, and / or other data types in modulated data signals such as carrier waves or other transmission mechanisms, and include any information transmission medium. The term "modulated data signal" can refer to a signal having one or more characteristics set or altered in such a way as to encode information in the signal. By way of example and not limitation, computer storage media can include wired media such as wired networks or direct wired connections, and wireless media such as acoustic, RF, infrared, and other wireless media. Any combination of the above should also be included within the scope of computer-readable media.

[0056] One or more CPUs 506 may be configured to execute at least some of computer-readable instructions to control one or more components of computing device 500 to perform one or more of the methods and / or processes described herein. Each CPU 506 may include one or more cores capable of processing multiple software threads simultaneously (e.g., one, two, four, eight, twenty-eight, seventy-two, etc.). One or more CPUs 506 may include any type of processor and may include different types of processors depending on the type of computing device 500 implemented (e.g., processors with fewer cores for mobile devices and processors with more cores for servers). For example, depending on the type of computing device 500, the processor may be a processor using a reduced instruction set computing (RISC) architecture.

[0057] The computing device 500 may include one or more CPUs 506, in addition to one or more microprocessors or auxiliary coprocessors (e.g., math coprocessors).

[0058] In addition to or as an alternative to one or more CPUs 506, one or more GPUs 508 may be configured to execute at least some computer-readable instructions to control one or more components of computing device 500 to perform one or more of the methods and / or processes described herein. One or more GPUs 508 may be integrated GPUs (e.g., having one or more CPUs 506 and / or one or more GPUs 508 may be discrete GPUs). In embodiments, one or more GPUs 508 may be coprocessors of one or more CPUs 506. Computing device 500 may use one or more GPUs 508 to perform general-purpose computing, such as rendering graphics (e.g., 3D graphics). For example, one or more GPUs 508 may be used for general-purpose computing on a GPU (GPGPU). One or more GPUs 508 may include hundreds or thousands of cores capable of processing hundreds or thousands of software threads simultaneously. One or more GPUs 508 may generate pixel data for outputting an image in response to rendering commands (e.g., rendering commands received via a host interface from one or more CPUs 506). One or more GPUs 508 may include: graphics memory (e.g., display memory) for storing pixel data or any other suitable data (e.g., GPGPU data), which may be included as part of memory 504. One or more GPUs 508 may include two or more GPUs operating in parallel (e.g., via a link). The link may directly connect the GPUs (e.g., using NVLINK) or may connect the GPUs via a switch (e.g., using NVSwitch). When combined, each GPU 508 may generate pixel data or GPGPU data for different portions of the output or for different outputs (e.g., a first GPU for a first image and a second GPU for a second image). Each GPU may include its own memory or may share memory with other GPUs.

[0059] In addition to or as an alternative to one or more CPUs 506 and / or one or more GPUs 508, one or more logic units 520 may be configured to execute at least some of computer-readable instructions to control one or more components of computing device 500 to perform one or more of the methods and / or processes described herein. In embodiments, one or more CPUs 506, one or more GPUs 508, and / or one or more logic units 520 may execute any combination of methods, processes, and / or portions thereof discretely or jointly. One or more logic units 520 may be part of and / or integrated within one or more CPUs 506 and / or one or more GPUs 508, and / or one or more logic units 520 may be discrete components or other components external to one or more CPUs 506 and / or one or more GPUs 508. In embodiments, one or more logic units 520 may be coprocessors of one or more CPUs 506 and / or one or more GPUs 508.

[0060] Examples of one or more logic units 520 include one or more processing cores and / or components thereof, such as a tensor core (TC), a tensor processing unit (TPU), or a pixel vision core.

[0061] (PVC), Visual Processing Unit (VPU), Graphics Processing Cluster (GPC), Texture Processing Cluster

[0062] (TPC), Streaming Multiprocessor (SM), Tree Traversal Unit (TTU), Artificial Intelligence Accelerator (AIA), Deep Learning Accelerator (DLA), Arithmetic Logic Unit (ALU), Application-Specific Integrated Circuit (ASIC), Floating Point Unit (FPU), Input / Output (I / O) Elements, Peripheral Component Interconnect (PCI) or Peripheral Component Interconnect Fast (PCIe) Elements, etc.

[0063] The communication interface 510 may include one or more receivers, transmitters, and / or transceivers that enable the computing device 500 to communicate with other computing devices via an electronic communication network, including wired and / or wireless communications. The communication interface 510 may include components and functions to enable communication over any of several different networks, such as wireless networks (e.g., Wi-Fi, Z-Wave, Bluetooth, Bluetooth LE, ZigBee, etc.), wired networks (e.g., communication via Ethernet or InfiniBand), low-power wide-area networks (e.g., LoRaWAN, SigFox, etc.), and / or the Internet.

[0064] I / O port 512 enables computing device 500 to be logically coupled to other devices, including I / O component 514, one or more presentation components 518, and / or other components, some of which may be built into (e.g., integrated into) computing device 500. Example I / O component 514 includes a microphone, mouse, keyboard, joystick, gamepad, game controller, satellite antenna, scanner, printer, wireless device, etc. I / O component 514 can provide a natural user interface (NUI) that processes user-generated air gestures, voice, or other physiological input. In some cases, the input can be transmitted to appropriate network elements for further processing. The NUI can implement any combination of speech recognition, stylus recognition, facial recognition, biometric recognition, on-screen and adjacent gesture recognition, air gestures, head and eye tracking, and touch recognition (described in more detail below) associated with the display of computing device 500. Computing device 500 may include depth cameras for gesture detection and recognition, such as stereo camera systems, infrared camera systems, RGB camera systems, touchscreen technology, and combinations thereof. Additionally, computing device 500 may include an accelerometer or gyroscope capable of detecting motion (e.g., as part of an inertial measurement unit (IMU)). In some examples, computing device 500 may use the output of the accelerometer or gyroscope to render immersive augmented reality or virtual reality.

[0065] Power supply 516 may include a wired power supply, a battery power supply, or a combination thereof. Power supply 516 may provide power to computing device 500 so that the components of computing device 500 can operate.

[0066] One or more presentation components 518 may include displays (e.g., monitors, touchscreens, television screens, head-up displays (HUDs), other display types, or combinations thereof), speakers, and / or other presentation components. One or more presentation components 518 may receive data from other components (e.g., one or more GPUs 508, one or more CPUs 506, etc.) and output data (e.g., as images, videos, sounds, etc.).

[0067] This disclosure can be described in the general context of computer code or machine-usable instructions, including computer-executable instructions (e.g., program modules) that are executed by a computer or other machine (e.g., a personal data assistant or other handheld device). Typically, a program module, including routines, programs, objects, components, data structures, etc., refers to code that performs a specific task or implements a specific abstract data type. This disclosure can be practiced in various system configurations, including handheld devices, consumer electronics, general-purpose computers, and more specialized computing devices. This disclosure can also be practiced in distributed computing environments where tasks are performed by remote processing devices linked via a communication network.

[0068] As used herein, the phrase “and / or” relative to two or more elements should be interpreted as meaning only one element or a combination of elements. For example, “element A, element B, and / or element C” can include only element A, only element B, only element C, element A and element B, element A and element C, element B and element C, or element A, B, and C. Additionally, “at least one of element A or element B” can include at least one of element A, at least one of element B, or at least one of element A and at least one of element B. Furthermore, “at least one of element A and element B” can include at least one of element A, at least one of element B, or at least one of element A and at least one of element B.

[0069] The subject matter of this disclosure is specifically described herein to satisfy legal requirements. However, the description itself is not intended to limit the scope of this disclosure. Rather, the inventors have anticipated that the claimed subject matter may also be embodied in other ways in combination with other current or future techniques to include different steps or combinations of steps similar to those described in this document. Furthermore, although the terms “step” and / or “box” may be used herein to refer to different elements of the method employed, these terms should not be construed as implying any particular order among or between the steps disclosed herein unless the order of the individual steps is explicitly described.

Claims

1. A method comprising: The average temperature is calculated based on the outputs of multiple thermal sensors on the integrated circuit. Determine the temperature difference between the average temperature and the temperature output from the thermal sensor among the plurality of thermal sensors; It is determined that the temperature difference is greater than a threshold. as well as At least in part based on the temperature difference being greater than the threshold, a first thermal offset value corresponding to at least the thermal sensor is adjusted to a second thermal offset value.

2. The method of claim 1, wherein adjusting the first thermal offset value to the second thermal offset value is performed incrementally over a plurality of time steps, wherein the temperature difference corresponding to at least one of the plurality of thermal sensors or the other thermal sensor is greater than the threshold.

3. The method according to claim 1, further comprising: The updated average temperature is calculated based on the additional outputs of the plurality of thermal sensors; Determine that, when compared with the average temperature of the plurality of thermal sensors, the temperature difference from the additional output is less than the threshold; and The second thermal offset value is adjusted to the first thermal offset value, at least in part, based on the fact that the temperature difference is less than the threshold.

4. The method according to claim 1, wherein the second thermal offset value is greater than the first thermal offset value.

5. The method of claim 1, wherein the first thermal offset value and the second thermal offset value are used at least in part to determine a final temperature value corresponding to one or more regions of the integrated circuit, and the final temperature value is compared with one or more temperature thresholds, the one or more temperature thresholds corresponding to at least one of: reducing the power supplied to the integrated circuit, turning off the power supplied to the integrated circuit, or increasing the cooling for the integrated circuit.

6. The method according to claim 1, further comprising: Determine the ratio between the current voltage supply and the maximum voltage supply of the integrated circuit; as well as Determine that the ratio is higher than another threshold. The first thermal offset value is adjusted to the second thermal offset value, at least in part, based on the ratio being higher than the other threshold.

7. The method according to claim 1, further comprising: Determine the voltage-to-frequency ratio of at least a portion of the integrated circuit monitored by the thermal sensor; as well as Determine that the voltage-frequency ratio is higher than another threshold. The first thermal offset value is adjusted to the second thermal offset value based at least in part on the voltage-frequency ratio being higher than the other threshold.

8. The method of claim 1, wherein the first thermal offset value is adjusted to the second thermal offset value for each of the plurality of thermal sensors.

9. The method of claim 1, wherein adjusting the first thermal offset value to the second thermal offset value is only applied to the thermal sensor, and the thermal sensor among the plurality of thermal sensors other than the thermal sensor has at least one of the following actions: no adjustment of its respective thermal offset value, separate from adjusting the first thermal offset value to the second thermal offset value, or a single adjustment of the thermal offset value.

10. The method of claim 1, wherein during startup or initialization, the values ​​corresponding to the first thermal offset and the second thermal offset are set at least in part based on secure boot software.

11. The method of claim 1, wherein the integrated circuit corresponds to at least one of a graphics processing unit (GPU), a central processing unit (CPU), a system-on-a-chip (SOC), a sound chip, a network interface chip, a memory integrated circuit, a monolithic integrated circuit, a hybrid integrated circuit, a multi-chip integrated circuit, a digital integrated circuit, an analog integrated circuit, a mixed signal integrated circuit, a logic integrated circuit, an audio amplifier, an operational amplifier, a timer integrated circuit, a power management integrated circuit, an interface integrated circuit, or a combination thereof.

12. The method of claim 1, wherein at least one of thermal simulation of a virtual representation of the integrated circuit or thermal observation of the integrated circuit is used to determine the value corresponding to the first thermal offset value and the second thermal offset value.

13. A method comprising: The average temperature is calculated based on the outputs of multiple thermal sensors of the integrated circuit at each time step; At each time step, the difference between the average temperature and the temperature corresponding to the thermal sensor among the plurality of thermal sensors is calculated; Determine whether the difference is greater than a threshold at each time step; as well as The thermal offset values ​​of one or more of the plurality of thermal sensors are dynamically adjusted to a first thermal offset value at a first subset of time steps where the difference is greater than the threshold and a second thermal offset value at a second subset of time steps where the difference is less than the threshold.

14. The method of claim 13, wherein the first thermal offset value is greater than the second thermal offset value.

15. The method of claim 13, wherein the thermal offset value is dynamically adjusted by increasing from the thermal offset value toward one of the first thermal offset value or the second thermal offset value until one of the first thermal offset value or the second thermal offset value is reached.

16. The method of claim 13, wherein the thermal offset value is different for each of the first thermal sensor and the second thermal sensor among the plurality of thermal sensors.

17. The method of claim 13, wherein dynamically adjusting the thermal offset value is universally applied to each of the plurality of thermal sensors.

18. The method of claim 13, wherein dynamically adjusting the thermal offset in each time step is further based on at least one of a first ratio between the current voltage supply and the maximum voltage supply or a second ratio between voltage and frequency.

19. A system comprising: An integrated circuit, comprising a first thermal sensor and a second thermal sensor; One or more processors; as well as One or more memory devices that store instructions, when executed by the one or more processors, cause the one or more processors to perform the following operations: Calculate the average temperature between the first output of the first thermal sensor and the second output of the second thermal sensor; Calculate the difference between the average temperature and the temperature from the first output; Determine that the difference is greater than the threshold; as well as At least in part, based on the difference being greater than the threshold, the first thermal offset value corresponding to the first thermal sensor is adjusted to a second thermal offset value.

20. The system of claim 19, wherein in each consecutive time step in which the difference is greater than the threshold, the adjustment of the first thermal offset value to the second thermal offset value is performed incrementally.

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