Semiconductor structure preparation method and semiconductor structure

Abstract

The present invention proposes a method for preparing a semiconductor structure and a semiconductor structure, the method for preparing the semiconductor structure comprises the following steps: providing a semiconductor substrate, forming a conductive layer on the semiconductor substrate; forming a first protective layer on the surface of the conductive layer; passivating the first protective layer so that the first protective layer forms a passivation layer, the passivation layer comprises a multi-layer thin film structure, and the ion concentration of the multi-layer thin film structure is not completely the same; forming an insulating layer on the passivation layer; forming a barrier layer and a second protective layer on the insulating layer in sequence. Through the above design, the present invention can use the first protective layer to provide protection for the conductive layer. The present invention forms a passivation layer with a multi-layer structure by passivating the first protective layer, and the ion concentration of at least a part of the passivation layer is greater than that of the first protective layer, which significantly optimizes the water vapor barrier effect. Accordingly, the semiconductor structure proposed by the present invention can provide effective protection for its conductive layer, especially has a good water vapor barrier effect.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for preparing a semiconductor structure and a semiconductor structure. Background Art

[0002] Figure 1 A layer diagram of a conventional semiconductor structure is representatively shown. Figure 1 As shown, in the conventional semiconductor structure, a semiconductor substrate 110, a silicon dioxide 121 (SiO 2 ), silicon nitride 122 (SIN) and polyimide 123 (Polyimide), a metal connection layer 111 is formed on the semiconductor substrate 110, and silicon dioxide 121, silicon nitride 122 and polyimide 123 are sequentially formed on the metal connection layer 111 of the semiconductor substrate 110. Due to the integrity of the crystal structure of the silicon dioxide crystal layer, water vapor will penetrate into the metal connection layer 111 through the silicon dioxide 121 through a certain path, thereby affecting the performance of the semiconductor device. Therefore, the semiconductor preparation process has high requirements for the process of forming the water vapor barrier film thickness and film quality.

[0003] In the existing preparation process, a layer of silicon nitride 122 is usually grown before coating the polyimide 123, and the high density of the silicon nitride 122 is used to block the penetration of water vapor.

[0004] In addition, high-density plasma (HDP) technology, as a process for high-density plasma dielectric layers, is often used in the back-end preparation process of the passivation layer. However, high-density plasma chemical vapor deposition (HDP-CVD) is a high-power deposition process, which can easily damage the metal conductive layer on the top layer of the metal connection layer 111, reducing the reliability of the metal connection layer 111. At the same time, in the existing process, the intermittent free area of ​​the metal conductive layer is not protected by a high-density material, and water vapor will still penetrate into the metal connection layer 111 through silicon dioxide, corroding the metal and reducing the service life of the semiconductor device. Summary of the invention

[0005] A main purpose of the present invention is to overcome at least one of the defects of the prior art mentioned above and to provide a method for preparing a semiconductor structure that can fully block water vapor penetration and reduce parasitic capacitance.

[0006] Another main object of the present invention is to overcome at least one of the above-mentioned defects of the prior art and provide a semiconductor structure.

[0007] To achieve the above object, the present invention adopts the following technical solution:

[0008] According to one aspect of the present invention, a method for preparing a semiconductor structure is provided; wherein the method comprises the following steps:

[0009] providing a semiconductor substrate, and forming a conductive layer on the semiconductor substrate;

[0010] forming a first protective layer on the surface of the conductive layer;

[0011] Performing a passivation treatment on the first protective layer so that the first protective layer forms a passivation layer, wherein the passivation layer comprises a multi-layer thin film structure, and the ion concentrations of the multi-layer thin film structure are not completely the same;

[0012] forming an insulating layer on the passivation layer; and

[0013] A barrier layer and a second protection layer are sequentially formed on the insulating layer.

[0014] According to one embodiment of the present invention, the passivation treatment includes plasma treatment, ion implantation or thermal oxidation treatment.

[0015] According to one embodiment of the present invention, the passivation layer includes a two-layer thin film structure, the two-layer thin film structure is a first layer and a second layer, the first layer is adjacent to the conductive layer, the second layer is located on the surface of the first layer, and the ion concentration of the second layer is greater than the ion concentration of the first layer.

[0016] According to one embodiment of the present invention, the process for forming the insulating layer includes a high density plasma chemical vapor deposition process.

[0017] According to one embodiment of the present invention, when forming the insulating layer, air holes are formed in the intermittent vacant areas of the conductive layer.

[0018] According to one embodiment of the present invention, the method further comprises the following steps:

[0019] Before forming the first protection layer, a dielectric layer is formed on the surface of the conductive layer.

[0020] According to one embodiment of the present invention, the thickness of the dielectric layer is 10 nm to 100 nm.

[0021] According to another aspect of the present invention, a semiconductor structure is provided; wherein the semiconductor structure comprises a semiconductor substrate, a conductive layer, a passivation layer, an insulating layer, a barrier layer and a second protective layer; the conductive layer is disposed on the semiconductor substrate; the passivation layer is formed by a first protective layer disposed on the surface of the conductive layer through a passivation treatment, the passivation layer comprises a multilayer thin film structure, and the ion concentration of the multilayer thin film structure is not completely the same; the insulating layer, the barrier layer and the second protective layer are sequentially disposed on the passivation layer.

[0022] According to one embodiment of the present invention, the conductive layer has a discontinuous vacant area; wherein air holes are arranged in the discontinuous vacant area.

[0023] According to one embodiment of the present invention, the semiconductor structure further includes a dielectric layer; the dielectric layer is disposed between the conductive layer and the passivation layer.

[0024] It can be seen from the above technical solutions that the advantages and positive effects of the semiconductor structure preparation method and the semiconductor structure proposed in the present invention are:

[0025] The method for preparing the semiconductor structure proposed in the present invention can provide protection to the conductive layer by forming a first protective layer on the surface of the conductive layer. At the same time, the present invention forms a passivation layer with a multi-layer structure by passivating the first protective layer, and the ion concentration of at least a part of the passivation layer is greater than that of the first protective layer, which significantly optimizes the water vapor barrier effect. Accordingly, the semiconductor structure proposed in the present invention can provide effective protection to its conductive layer, especially has a good water vapor barrier effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Various objects, features and advantages of the present invention will become more apparent by considering the following detailed description of preferred embodiments of the present invention in conjunction with the accompanying drawings. The accompanying drawings are merely exemplary illustrations of the present invention and are not necessarily drawn to scale. In the accompanying drawings, the same reference numerals always refer to the same or similar parts. Among them:

[0027] Figure 1 It is a layer diagram of an existing semiconductor structure;

[0028] Figure 2 is a layer diagram of a semiconductor structure according to an exemplary embodiment;

[0029] Figure 3 is a layer diagram of a semiconductor structure in one step of a method for preparing a semiconductor structure according to an exemplary embodiment;

[0030] Figure 4is a layer diagram of a semiconductor structure in one step of a method for preparing a semiconductor structure according to an exemplary embodiment;

[0031] Figure 5 is a layer diagram of a semiconductor structure in one step of a method for preparing a semiconductor structure according to an exemplary embodiment;

[0032] Figure 6 is a layer diagram of a semiconductor structure in one step of a method for preparing a semiconductor structure according to an exemplary embodiment;

[0033] Figure 7 yes Figure 6 A magnified view of part A;

[0034] Figure 8 is a layer diagram of a semiconductor structure in one step of a method for preparing a semiconductor structure according to an exemplary embodiment;

[0035] Fig. 9 is a layer diagram of a semiconductor structure in one step of a method for preparing a semiconductor structure according to an exemplary embodiment;

[0036] Fig.10 is a layer diagram of a semiconductor structure in one step of a method for preparing a semiconductor structure according to an exemplary embodiment;

[0037] Fig.11 is a layer diagram of a semiconductor structure in one step of a method for manufacturing a semiconductor structure according to an exemplary embodiment.

[0038] The following are the descriptions of the reference numerals:

[0039] 110. Semiconductor substrate;

[0040] 111.Metal connection layer;

[0041] 121. Silicon dioxide;

[0042] 122. Silicon nitride;

[0043] 123. Polyimide;

[0044] 210. Semiconductor substrate;

[0045] 211. Conductive layer;

[0046] 2111. Upper metal;

[0047] 2112. Titanium nitride;

[0048] 2113. Intermittent free area;

[0049] 221. First protective layer;

[0050] 2211. Passivation layer;

[0051] 222. Insulation layer;

[0052] 223. Barrier layer;

[0053] 224. Second protection layer;

[0054] 225. Air hole;

[0055] 226. Dielectric layer. DETAILED DESCRIPTION

[0056] Typical embodiments that embody the features and advantages of the present invention will be described in detail in the following description. It should be understood that the present invention can have various changes in different embodiments without departing from the scope of the present invention, and the descriptions and drawings therein are essentially for illustrative purposes rather than for limiting the present invention.

[0057] In the following description of different exemplary embodiments of the present invention, reference is made to the accompanying drawings, which form a part of the present invention and in which different exemplary structures, systems and steps that can implement multiple aspects of the present invention are shown by way of example. It should be understood that other specific schemes of components, structures, exemplary devices, systems and steps can be used, and structural and functional modifications can be made without departing from the scope of the present invention. Moreover, although the terms "above", "between", "within", etc. may be used in this specification to describe different exemplary features and elements of the present invention, these terms are used herein only for convenience, such as according to the direction of the examples described in the accompanying drawings. Nothing in this specification should be construed as requiring a specific three-dimensional orientation of the structure to fall within the scope of the present invention.

[0058] See also Figure 2 , which representatively shows a layered diagram of the semiconductor structure proposed in the present invention, and the semiconductor structure is prepared by the method for preparing the semiconductor structure proposed in the present invention. In this exemplary embodiment, the method for preparing the semiconductor structure proposed in the present invention is described by taking the application in preparing a transistor semiconductor structure as an example. It is easy for those skilled in the art to understand that in order to apply the relevant preparation method of the present invention to other types of semiconductor structure preparation processes, various modifications, additions, substitutions, deletions or other changes are made to the specific embodiments described below, and these changes are still within the scope of the principle of the method for preparing the semiconductor structure proposed in the present invention.

[0059] Related References Figures 3 to 11 , Figures 3 to 6 , Figures 8 to 11, respectively, representatively show a layer diagram of a semiconductor structure in one step of a method for preparing a semiconductor structure that can embody the principles of the present invention; Figure 7 A representative example is shown in Figure 6 The enlarged view of the A part in FIG. 1 is a diagram of the enlarged view of the A part in FIG. 1 and the enlarged view of the A part in FIG. 1 are a diagram of the enlarged view of the A part in FIG.

[0060] like Figures 3 to 11 As shown, in this embodiment, the method for preparing a semiconductor structure provided by the present invention comprises the following steps:

[0061] Providing a semiconductor substrate 210, and forming a conductive layer 211 on the semiconductor substrate 210;

[0062] forming a first protective layer 221 (eg, silicon nitride, SiN) on the conductive layer 211;

[0063] Passivation treatment is performed on the first protective layer 221 to form a passivation layer 2211 from the first protective layer 221. The passivation layer 2211 includes a multi-layer thin film structure, and the ion concentrations of the multi-layer thin film structure are not completely the same.

[0064] An insulating layer 222 (eg, silicon dioxide, SiO 2 );as well as

[0065] A blocking layer 223 and a second protective layer 224 are sequentially formed on the insulating layer 222 .

[0066] At this point, the semiconductor structure is basically completed.

[0067] Through the above design, the method for preparing the semiconductor structure proposed by the present invention can provide protection for the conductive layer 211 by forming the first protective layer 221 on the surface of the conductive layer 211. At the same time, the present invention forms a passivation layer 2211 from the first protective layer 221 by passivating the first protective layer 221. The passivation layer 2211 includes a multi-layer thin film structure. The ion concentration of the multi-layer thin film structure is not completely the same, and the ion concentration of at least one layer of the thin film structure of the passivation layer 2211 is greater than that of the first protective layer 221, thereby increasing the compactness and significantly optimizing the water vapor barrier effect.

[0068] It should be noted that in the above-mentioned step of "passivating the first protective layer 221", the multi-layer thin film structure contained in the passivation layer 2211 formed by the first protective layer 221 refers to the first protective layer 221 undergoing a passivation treatment, in which the ion concentration of some regions changes, so that the formed passivation layer 2211 has multiple regions with different ion concentrations. The so-called multi-layer thin film structure can be understood as the multiple regions with different ion concentrations. From a structural perspective, the multi-layer thin film structure of the passivation layer 2211 can be, for example, multiple layers stacked in sequence on the surface of the conductive layer 211, that is, multiple layered regions with different ion concentrations stacked in sequence, but it is not limited thereto.

[0069] Specifically, Figure 3 , which specifically shows a layered structure of a semiconductor substrate 210, which can be used as a representative example of the semiconductor substrate 210 in the step of "providing a semiconductor substrate 210" in this embodiment. The semiconductor substrate 210 is formed with a conductive layer 211, and the conductive layer 211 has a discontinuous vacant area 2113 in the extension direction. In other embodiments, the semiconductor substrate 210 provided in this step can also be selected in other forms, and is not limited to this embodiment.

[0070] Preferably, if Figure 4 As shown, the method for preparing the semiconductor structure proposed in the present invention may preferably include the step of "forming a dielectric layer 226 on the conductive layer 211 before forming the first protective layer 221 on the conductive layer 211". The dielectric layer 226 may be a material with a low dielectric constant such as silicon carbon oxide (SiCO), which can reduce the parasitic capacitance of the semiconductor device. Figure 4 Specifically shown is a layered structure after a dielectric layer 226 is formed on the conductive layer 211 of the semiconductor substrate 210. Among them, the dielectric layer 226 can preferably be a thin layer structure, and the so-called thin layer structure can be understood as being thinner than other layers (such as the insulating layer 222, the barrier layer 223 or the second protective layer 224) in the back-end process. Through the above design, the present invention can utilize the dielectric layer 226 with high density to release the stress of the first protective layer 221 to be deposited on it in the subsequent process, and at the same time, the dielectric layer 226 can be used to protect the conductive layer 211. Through the above design, since the dielectric layer 226 not only has a lower dielectric constant, but also has better density, the dielectric layer can also reduce the structural stress while reducing the parasitic capacitance of the semiconductor device. In other embodiments, the step of forming the dielectric layer 226 can also be omitted, or materials and process steps with similar effects can be used, which are not limited to this embodiment.

[0071] Furthermore, the method for preparing the semiconductor structure according to the present invention includes the step of forming a dielectric layer 226. In the present embodiment, the thickness of the dielectric layer 226 may preferably be 10 nm to 100 nm, such as 10 nm, 35 nm, 80 nm, 100 nm, etc. In other embodiments, the deposition thickness of the dielectric layer 226 may also be less than 10 nm, or may be greater than 100 nm, such as 8 nm, 110 nm, etc., and is not limited to the present embodiment.

[0072] Specifically, Figure 5 As shown, it specifically shows the layered structure after the first protective layer 221 is formed on the dielectric layer 226, which can be used as a representative example of the semiconductor structure in the step of "forming the first protective layer 221" in this embodiment. In this embodiment, based on the above-mentioned step of forming the dielectric layer 226, the first protective layer 221 is formed on the dielectric layer 226. Among them, the first protective layer 221 can preferably be a thin layer structure, and the so-called thin layer structure can be understood as being thinner than other layers in the back-end process (such as the insulating layer 222, the barrier layer 223 or the second protective layer 224). Through the above design, the present invention can use the first protective layer 221 to provide protection for the sidewalls of the conductive layer 211 located in the discontinuous free area 2113, and at the same time can optimize the water vapor barrier effect on the conductive layer 211, especially the sidewall area. In other embodiments, when the dielectric layer 226 is not formed on the conductive layer 211 , the first protective layer 221 may be formed on the conductive layer 211 , or may be formed on other protective structures formed on the conductive layer 211 , which are not limited to this embodiment.

[0073] Further, based on the step of forming the first protective layer 221, in this embodiment, the thickness of the first protective layer 221 may preferably be 10 nm to 100 nm, such as 10 nm, 35 nm, 80 nm, 100 nm, etc. In other embodiments, the thickness of the first protective layer 221 may also be less than 10 nm, or may be greater than 100 nm, such as 8 nm, 110 nm, etc., and is not limited to this embodiment.

[0074] Specifically, Figure 6 , which specifically shows the layered structure after the first protective layer 221 is passivated, which can be used as a representative example of the semiconductor structure in the step of "passivating the first protective layer 221" in this embodiment. Specifically, Figure 6 and Figure 7As shown, this step is to treat the first protective layer 221 after depositing the first protective layer 221 by a passivation treatment process such as plasma treatment technology, so that the first protective layer 221 forms a passivation layer 2211. Among them, the passivation layer 2211 has a two-layer thin film structure, namely a first layer adjacent to the conductive layer 211 and a second layer arranged on the surface of the first layer. The density of the second layer increases, that is, the ion concentration of the second layer increases (for example, the nitrogen ion content increases), and the ion concentration of the second layer is higher than the ion concentration of the first layer. Through the above design, the present invention can form a passivation layer 2211 from the first protective layer 221 by plasma treatment of the first protective layer 221, so that the ion concentrations of the thin film structures of the passivation layer 2211 having a multi-layer thin film structure are not completely the same, and the ion concentration of at least one thin film structure of the passivation layer 2211 is greater than the ion concentration of the first protective layer 221, further optimizing the water vapor barrier effect. In other embodiments, the passivation layer 2211 formed after the first protective layer 221 is passivated may also include a thin film structure of three or more layers, and the ion concentrations of the multi-layer thin film structure are not completely the same.

[0075] In other embodiments, for the step of "passivating the first protective layer 221 to form the passivation layer 2211", the passivation treatment may also be performed by other treatment processes, such as ion implantation or thermal oxidation treatment. Moreover, according to different process requirements, when a suitable passivation treatment process is used, the passivation layer 2211 may include a three-layer or more thin film structure, and is not limited to the design in which the passivation layer 221 formed after the passivation treatment is roughly divided into two layers in this embodiment. Moreover, the ion concentrations of the various layers of the multi-layer thin film structure of the passivation layer 2211 are not completely the same.

[0076] For example, in another embodiment, when the first protective layer 221 is passivated by an ion implantation process, ions may be implanted into the middle region of the first protective layer 221, so that the ion (e.g., nitrogen ion) density in the middle region of the first protective layer 221 is greater than the ion concentration in the remaining regions, thereby making the formed passivation layer 2211 substantially comprise three or more thin film structures, that is, the ion concentration of at least one thin film structure in the middle region is different from (e.g., greater than) the ion concentration of the thin film structures in the remaining regions. Furthermore, ions may also be implanted into the region of the first protective layer 221 adjacent to the conductive layer 211 or the region away from the conductive layer 211, so that the ion concentration of the multi-layer thin film structure of the formed passivation layer 2211 presents a different relationship, which is not limited to this embodiment.

[0077] It should be noted that if Figure 7As shown, the conductive layer 211 in this embodiment is described by taking a conductive structure including an upper metal layer 2111 and, for example, titanium nitride 2112 as an example, and the titanium nitride 2112 is formed on the surface of the upper metal layer 2111. On this basis, the bottommost film structure of the multi-layer film structure of the passivation layer 2211 is actually adjacent to the titanium nitride 2112.

[0078] Further, based on the step of performing plasma treatment on the first protective layer 221, in the present embodiment, the plasma treatment may preferably include ammonia plasma treatment, that is, based on ammonia (NH 3 In other embodiments, plasma treatment processes based on other plasmas may also be used, such as plasma treatment based on argon (Ar), plasma treatment based on nitrogen (N 2 ) or other types of plasma treatment processes may be used, which are not limited to this embodiment.

[0079] Specifically, Figure 8 , which specifically shows the layered structure after the insulating layer 222 is formed on the passivation layer 2211, which can be used as a representative example of the semiconductor structure in the step of "forming the insulating layer 222 on the passivation layer 2211" in this embodiment. Specifically, in this step, after the first protective layer 221 is subjected to plasma treatment to form the passivation layer 2211, the insulating layer 222 is formed on the passivation layer 2211. In addition to the portion formed on the passivation layer 2211, the insulating layer 222 is also filled in the intermittent vacant area 2113 of the conductive layer 211.

[0080] Further, based on the step of forming the insulating layer 222, in this embodiment, the process for forming the insulating layer 222 may preferably include a high-density plasma chemical vapor deposition process. In other embodiments, the insulating layer 222 may also be formed on the passivation layer 2211 using other types of deposition processes or other processes, and is not limited to this embodiment.

[0081] Furthermore, if Figure 8As shown, based on the step of forming the insulating layer 222, in this embodiment, when forming the insulating layer 222, an air hole 225 (Air Gap) can be preferably formed in the intermittent free area 2113 of the conductive layer 211. Through the above design, the parasitic capacitance of the conductive layer 211 can be reduced, thereby alleviating the defects such as RC delay. Among them, since the present invention adopts the process step of forming the dielectric layer 226 on the surface of the conductive layer 211, the side and bottom surfaces of the intermittent free area 2113 of the conductive layer 211 are also covered with the dielectric layer 226. Therefore, compared with the intermittent free area in the existing process, the intermittent free area 2113 in the preparation method proposed by the present invention has a narrower width, that is, the intermittent free area 2113 has a larger height-to-width ratio than the corresponding structure in the existing process. Accordingly, compared with the design of the existing preparation method that requires multiple processes to form air holes, in the above step of forming the air hole 225 of the present invention, the air hole 225 can be formed once, further simplifying the process steps and improving the preparation efficiency.

[0082] Specifically, Fig. 9 , which specifically shows a layered structure after a barrier layer 223 is formed on the insulating layer 222, which can be used as a representative example of a semiconductor structure in the step of "forming a barrier layer 223 on the insulating layer 222" in this embodiment. Specifically, in this step, after forming the insulating layer 222, a barrier layer 223 is formed on the insulating layer 222, and the barrier layer 223 can protect the metal connection layer (conductive layer 211) and block water vapor.

[0083] Further, based on the step of forming the barrier layer 223, in this embodiment, the material of the barrier layer 223 may preferably include silicon nitride. In other embodiments, the material of the barrier layer 223 may also include other materials such as silicon oxynitride (SiON), and is not limited to this embodiment.

[0084] Further, based on the step of forming the barrier layer 223, in this embodiment, the barrier layer 223 can be preferably formed on the insulating layer 222 via a deposition process. In other embodiments, the barrier layer 223 can also be formed on the insulating layer 222 using other processes, which is not limited to this embodiment.

[0085] Specifically, Fig.10, which specifically shows the layered structure after the second protective layer 224 is formed on the barrier layer 223, which can be used as a representative example of the semiconductor structure in the step of "forming the barrier layer 223 and the second protective layer 224 on the insulating layer 222 in sequence" in this embodiment. Specifically, this step is to form a second protective layer 224 on the barrier layer 223 after forming the barrier layer 223, and the second protective layer 224 can protect the semiconductor structure and facilitate the implementation of subsequent processes such as etching of each film layer.

[0086] Further, based on the step of forming the second protection layer 224, in this embodiment, the material of the second protection layer 224 may preferably include polyimide. In other embodiments, the material of the second protection layer 224 may also include other materials, and is not limited to this embodiment.

[0087] Further, based on the step of forming the second protective layer 224, in this embodiment, the second protective layer 224 can preferably be covered on the surface of the barrier layer 223 via a spin coating process. In other embodiments, the second protective layer 224 can also be formed on the barrier layer 223 using other processes, and is not limited to this embodiment.

[0088] As mentioned above, Fig.10 As shown, when the step of “forming a blocking layer 223 and a second protective layer 224 in sequence on the insulating layer 222” is completed, the main process of the semiconductor structure is substantially completed, thereby allowing the semiconductor substrate 210 to form various film layers and related structures on its conductive layer 211, such as a thin dielectric layer 226, a thin passivation layer 2211, an insulating layer 222, an air hole 225, a blocking layer 223 and a second protective layer 224.

[0089] Preferably, if Fig.11 As shown, the method for preparing the semiconductor structure provided by the present invention may preferably include the step of "etching each film layer". Fig.11 Specifically shows the layered structure of each film layer of the semiconductor structure after etching, and Fig.11 The layered structure of the semiconductor structure shown is Figure 2 The layered structure of the semiconductor structures shown is substantially the same.

[0090] It should be noted that the methods for preparing semiconductor structures shown in the drawings and described in this specification are only a few examples of the many methods that can employ the principles of the present invention. It should be clearly understood that the principles of the present invention are by no means limited to any details or any steps of the methods for preparing semiconductor structures shown in the drawings or described in this specification.

[0091] See also Figure 2, which representatively shows a layer diagram of the semiconductor structure proposed by the present invention. In this exemplary embodiment, the semiconductor structure proposed by the present invention is described by taking a transistor semiconductor as an example. It is easy for those skilled in the art to understand that in order to apply the semiconductor structure of the present invention to other types of semiconductors, various modifications, additions, substitutions, deletions or other changes are made to the specific embodiments described below, and these changes are still within the scope of the principle of the semiconductor structure proposed by the present invention.

[0092] like Figure 2 As shown, in this embodiment, the semiconductor structure proposed by the present invention includes a semiconductor substrate 210, a conductive layer 211, a passivation layer 2211, an insulating layer 222, a barrier layer 223 and a second protective layer 224. Specifically, the conductive layer 211 is disposed on the semiconductor substrate 210. The passivation layer 2211 can be formed by passivating the first protective layer 221 disposed on the conductive layer 211. The insulating layer 222, the barrier layer 223 and the second protective layer 224 are sequentially disposed on the passivation layer 2211. Among them, the semiconductor structure proposed by the present invention can preferably be made by the preparation method of the semiconductor structure proposed by the present invention and described in detail in the above embodiments. In other embodiments, the semiconductor structure proposed by the present invention can also be made by other preparation methods, which is not limited to this embodiment. Through the above design, the semiconductor structure proposed by the present invention can use the passivation layer 2211 to provide effective protection for its conductive layer 211, especially having a good water vapor barrier effect.

[0093] Preferably, if Figure 2 As shown, in this embodiment, the conductive layer has a discontinuous vacant area 2113 , and on this basis, an air hole 225 may preferably be provided in the discontinuous vacant area 2113 .

[0094] Preferably, if Figure 2 As shown, in this embodiment, the semiconductor structure provided by the present invention may also preferably include a dielectric layer 226. The dielectric layer 226 is disposed between the conductive layer 211 and the passivation layer 2211.

[0095] It should be noted that the semiconductor structures shown in the drawings and described in this specification are only a few examples of the many types of semiconductor structures that can employ the principles of the present invention. It should be clearly understood that the principles of the present invention are by no means limited to any details or any components of the semiconductor structures shown in the drawings or described in this specification.

[0096] In summary, the method for preparing the semiconductor structure proposed in the present invention can provide protection to the conductive layer by forming a first protective layer on the surface of the conductive layer. At the same time, the present invention forms a passivation layer with a multi-layer structure by passivating the first protective layer, and the ion concentration of at least part of the passivation layer is greater than that of the first protective layer, which significantly optimizes the water vapor barrier effect. Accordingly, the semiconductor structure proposed in the present invention can provide effective protection to its conductive layer, especially has a good water vapor barrier effect.

[0097] The above describes and / or illustrates in detail the method for preparing the semiconductor structure proposed by the present invention and the exemplary embodiment of the semiconductor structure. However, the embodiments of the present invention are not limited to the specific embodiments described herein. On the contrary, the components and / or steps of each embodiment can be used independently and separately from other components and / or steps described herein. Each component and / or each step of an embodiment can also be used in combination with other components and / or steps of other embodiments. When introducing the elements / components / etc. described and / or illustrated herein, the terms "one", "one" and "above" are used to indicate the presence of one or more elements / components / etc. The terms "comprising", "including" and "having" are used to indicate the meaning of open inclusion and mean that in addition to the listed elements / components / etc., there may be other elements / components / etc. In addition, the terms "first" and "second" in the claims and the specification are used only as marks and are not numerical restrictions on their objects.

[0098] Although the method for preparing the semiconductor structure and the semiconductor structure proposed by the present invention have been described according to different specific embodiments, those skilled in the art will recognize that the implementation of the present invention can be modified within the spirit and scope of the claims.

Claims

1. A method for preparing a semiconductor structure, It is characterized in that The method comprises the following steps: Providing a semiconductor substrate, forming a conductive layer on the semiconductor substrate, wherein the conductive layer has discontinuous vacant areas in an extension direction; forming a first protective layer on the sidewall surfaces of the conductive layer and the discontinuous free area; Performing a passivation treatment on the first protective layer so that the first protective layer forms a passivation layer, wherein the passivation layer comprises a multi-layer thin film structure, and the nitrogen ion concentration of the multi-layer thin film structure is not completely the same; the passivation treatment comprises plasma treatment, ion implantation or thermal oxidation treatment; forming an insulating layer on the passivation layer; as well as A barrier layer and a second protection layer are sequentially formed on the insulating layer.

2. The method for preparing a semiconductor structure according to claim 1, It is characterized in that The passivation layer comprises a two-layer thin film structure, which are a first layer and a second layer. The first layer is adjacent to the conductive layer, and the second layer is located on the surface of the first layer. The ion concentration of the second layer is greater than that of the first layer.

3. The method for preparing a semiconductor structure according to claim 1, It is characterized in that The process for forming the insulating layer includes a high-density plasma chemical vapor deposition process.

4. The method for preparing a semiconductor structure according to claim 1, It is characterized in that When the insulating layer is formed, air holes are formed in the intermittent vacant areas of the conductive layer.

5. The method for preparing a semiconductor structure according to any one of claims 1 to 4, It is characterized in that The method further comprises the following steps: Before forming the first protection layer, a dielectric layer is formed on the surface of the conductive layer.

6. The method for preparing a semiconductor structure according to claim 5, It is characterized in that The thickness of the dielectric layer is 10nm-100nm.

7. A semiconductor structure, It is characterized in that The semiconductor structure comprises: Semiconductor substrates; A conductive layer is disposed on the semiconductor substrate; the conductive layer has discontinuous free areas in the extension direction; A passivation layer is formed by a first protective layer disposed on the conductive layer and the sidewall surface of the intermittent free area through a passivation treatment, wherein the passivation treatment includes plasma treatment, ion implantation or thermal oxidation treatment; the passivation layer includes a multi-layer thin film structure, and the nitrogen ion concentration of the multi-layer thin film structure is not completely the same; and The insulating layer, the barrier layer and the second protective layer are sequentially arranged on the passivation layer.

8. The semiconductor structure according to claim 7, It is characterized in that Air holes are arranged in the intermittent vacant areas.

9. The semiconductor structure according to claim 7, It is characterized in that The semiconductor structure further includes a dielectric layer disposed between the conductive layer and the passivation layer.

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