A two-terminal ferroelectric memory with a programmable vertical Schottky junction and a preparation method thereof

Abstract

The present invention discloses a two-terminal ferroelectric memory with a programmable vertical Schottky junction and a preparation method thereof. The characteristics are as follows: electrodes with different work functions are prepared on the upper and lower sides of the ferroelectric layer, then the redundant ferroelectric thin film is etched away with argon or oxygen, and finally a semiconductor channel is fabricated between the upper and lower electrodes. The electrodes are a group of conductors with a large difference in work function, such as gold, silver, copper, aluminum, indium tin oxide, etc.; the ferroelectric layer is an organic ferroelectric, a ceramic ferroelectric, etc.; the semiconductor is an N-type or P-type semiconductor. Compared with the prior art, the present invention has good rectifying and resistive switching characteristics, and has the advantages of fatigue resistance, good retention, high density, etc. The preparation method and operation steps are simple, the cost is low, it is easy to implement, and it is safe and environmentally friendly. It preferably solves the serious problems such as poor fatigue of ferroelectric tunnel junctions, destructive reading of ferroelectric random access memories, and complex processes and low integration density of three-terminal devices, and can be widely used in programmable applications for in-memory computing.

Description

Technical Field

[0001] The present invention relates to the technical field of ferroelectric memory device preparation, in particular to a two-terminal ferroelectric memory with a programmable vertical Schottky junction for in-memory computing and a preparation method thereof. Background Art

[0002] Since the first discovery of ferroelectricity in 1920, the development of ferroelectric materials has experienced a history of 100 years. Before the extensive research and development of ferroelectric thin films in 1989, the research and application of ferroelectrics were limited to bulk ceramics, such as in the fields of actuators and pyroelectric detectors. The research on thin-film ferroelectrics has attracted a great deal of research enthusiasm. Researchers have applied military and commercial ferroelectric thin films to non-volatile memories, resulting in a huge revolution in the memory field. The high switching speed below sub-nanoseconds and the excellent endurance of more than 10 12 cycles make ferroelectric memories a highly competitive candidate to replace current flash memory products. Currently, the speed of industrialized flash memories on the market is only ~10 -3 seconds, and the endurance time is only ~10 4 cycles. In addition, the programmability of polarization makes ferroelectric memories feasible for in-memory computing. By directly performing parallel dot product calculations using Ohm's law and Kirchhoff's law, in-memory computing exhibits great advantages in computing power, latency, and energy efficiency to meet the explosive growth of artificial intelligence, big data, the Internet of Things era, and imaging information. Therefore, developing new two-terminal ferroelectric memory devices to avoid the poor fatigue of ferroelectric tunnel junctions, the destructive reading of ferroelectric random access memories, and the complex three-terminal structures of ferroelectric transistors is the key focus for current researchers. Summary of the Invention

[0003] The purpose of the present invention is to design a two-terminal ferroelectric memory with a programmable vertical Schottky junction and a preparation method thereof in view of the deficiencies of the prior art. By using a method based on the Schottky emission mechanism regulated by ferroelectricity, a ferroelectric thin film is fabricated as a functional layer between the upper and lower electrodes, and an N-type or P-type semiconductor channel is fabricated between the two electrodes to form a vertical-structured ferroelectric field-effect diode regulated by the ferroelectric local field. The upper and lower electrodes are a pair of conductors with a large difference in work function. In the device structure, the gate and drain are fabricated together, which preferably solves the poor fatigue of ferroelectric tunnel junctions and the destructive reading of ferroelectric random access memories, and also bypasses serious problems such as the complex processes and low integration density of three-terminal devices. The structure is simple, the operation is convenient, the cost is low, it is easy to implement, and it is safe and environmentally friendly, and can be widely used in programmable applications for in-memory computing.

[0004] The specific technical solution of the present invention is: a two-terminal ferroelectric memory with a programmable vertical Schottky junction, characterized in that a set of upper and lower electrodes with a large difference in work function are prepared on the ferroelectric layer, and an N-type or P-type semiconductor channel is fabricated between the two electrodes, and the fabricated vertical Schottky junction diode is a programmable two-terminal ferroelectric memory. The electrodes are made of platinum, aluminum, gold, silver, copper, aluminum metal materials or indium tin oxide materials, and the upper and lower electrodes are a set of conductors with a large difference in work function; the ferroelectric layer is an organic ferroelectric layer or a ceramic ferroelectric layer.

[0005] A preparation method of a two-terminal ferroelectric memory with a programmable vertical Schottky junction is characterized in that the preparation of the programmable two-terminal ferroelectric memory specifically includes the following steps:

[0006] a. Substrate cleaning

[0007] The Si / SiO 2 Substrate is ultrasonically cleaned in acetone, alcohol solution and deionized water for 3 minutes in sequence, and then the substrate is dried with a nitrogen gun.

[0008] b. Preparation of the lower electrode

[0009] By using magnetron sputtering or thermal evaporation technology, a lower electrode with a thickness of 120 - 200 nm is sputtered on the surface of the cleaned SiO 2 / Si substrate.

[0010] c. Preparation of the ferroelectric insulating layer

[0011] By using homogeneous evaporation, a ferroelectric thin film with a thickness of 15 - 200 nm is spin-coated on the lower electrode, and then annealed at 120 - 200 °C for 3 - 5 h to obtain the ferroelectric insulating layer.

[0012] d. Preparation of the upper electrode

[0013] By using thermal evaporation technology, an upper electrode with a thickness of 10 - 30 nm is deposited on the ferroelectric insulating layer, and the deposition rate is 1 Å / s.

[0014] e. Etching of the ferroelectric thin film

[0015] The excess ferroelectric thin film is etched away by using oxygen ions or argon ions, and the ferroelectric thin film covered by the lower electrode is retained.

[0016] f. Preparation of the semiconductor channel

[0017] By using radio frequency magnetron sputtering technology, an N-type or P-type semiconductor is sputtered to the junction at both ends of the upper and lower electrodes to form a semiconductor channel with a thickness of 10 - 30 nm, and the fabricated device is a programmable vertical Schottky junction diode.

[0018] The ferroelectric material is polyvinylidene fluoride (PVDF) and its copolymers, HZO, PZT, BFO, PMNPT, or BTO.

[0019] The semiconductor is ZnO, IGZO, CuI, and organic semiconductor materials.

[0020] Compared with the prior art, the present invention has the advantages of good rectifying and resistive switching characteristics, fatigue resistance, good retention, high density, etc. The edge fabrication technology of the semiconductor is adopted to avoid the damage of the top electrode to the semiconductor layer, enabling the device to achieve highly ideal regulation of the Schottky barrier. In the device structure, the gate and drain are fabricated together, solving the poor fatigue of ferroelectric tunnel junctions and the destructive readout of ferroelectric random access memories, and also bypassing serious problems such as the complex process and low integration density of three-terminal devices. The structure is simple, easy to operate, low in cost, easy to implement, and safe and environmentally friendly, and can be widely used in programmable applications for in-memory computing. Description of the Drawings

[0021] Figure 1 Schematic diagram of the device structure prepared in Example 1;

[0022] Figure 2 Device prepared in Example 1 I-V Characteristic curve;

[0023] Figure 3 Retention characteristic diagram of the device prepared in Example 1;

[0024] Figure 4 Fatigue characteristic diagram of the device prepared in Example 1;

[0025] Figure 5 I-V characteristic curve of the device prepared in Example 2;

[0026] Figure 6 Retention characteristic diagram of the device prepared in Example 2;

[0027] Figure 7 Fatigue characteristic diagram of the device prepared in Example 2. Detailed Description of the Invention

[0028] Taking the preparation of a programmable vertical Schottky junction diode device based on the ferroelectric category as an example, the present invention will be further described and explained in detail as follows:

[0029] Example 1

[0030] Refer to the attached Figure 1 , the specific steps for preparing the device are as follows:

[0031] a. Substrate cleaning

[0032] The substrate 1 (Si / SiO2 Put it into acetone and ultrasonicate for 3 minutes, then put it into an alcohol solution and ultrasonicate for 3 minutes, then put it into deionized water and ultrasonicate for 3 minutes. Finally, dry the substrate 1 with a nitrogen gun.

[0033] b. Preparation of the bottom electrode

[0034] A Pt layer with a thickness of 150 nm is sputtered on the surface of the cleaned substrate 1 by DC magnetron sputtering as the bottom electrode layer 2 (serving as the gate-drain electrode). The working power of magnetron sputtering is 250 W, the chamber pressure is 0.3 Pa, and the Ar flow rate is 50 sccm.

[0035] c. Preparation of the ferroelectric insulating layer

[0036] Dissolve P(VDF-TrFE) (70:30 mol%) ferroelectric polymer in 2.5 wt% of diethyl carbonate to prepare a spin-coating solution. P(VDF-TrFE) is formed by spin-coating the polymer in the initial homogeneous evaporation solution, and then thermally annealed at 135 °C for 4 h to promote the growth of the ferroelectric β-phase, obtaining a 100 nm thick ferroelectric insulating layer 3 (P(VDF-TrFE)).

[0037] d. Preparation of the top electrode

[0038] Deposit a 20 nm thick aluminum (Al) metal on the ferroelectric insulating layer 3 (P(VDF-TrFE)) by thermal evaporation technology as the top electrode layer 4. The deposition rate of the Al layer is 1 Å / s.

[0039] e. Etching of the ferroelectric thin film

[0040] Use oxygen ion etching to remove the excess organic polymer (P(VDF-TrFE)), and retain the P(VDF-TrFE) covered by the Al layer to adjust the semiconductor channel material.

[0041] f. Preparation of the semiconductor channel

[0042] Adopt radio frequency magnetron sputtering technology. At a chamber pressure of 0.8 Pa, an Ar flow rate of 50 sccm, and a working power of 80 W, sputter ZnO to the junction at both ends of the top and bottom electrode layers 2 and 4, obtaining a 15 nm thick semiconductor channel 5. The device based on the organic ferroelectric polymer (P(VDF-TrFE)) is a programmable vertical Schottky junction diode.

[0043] The corresponding electrical performance tests were carried out on the above-prepared device, and its performance is as follows:

[0044] Refer to the appendix Figure 2, the voltage was swept from -20 V to +20 V (corresponding to the complete downward state of the ferroelectric polarization being adjusted to the complete upward state), and then swept back again. It can be clearly seen from the figure that the device can exhibit a high rectification ratio (~10 4 ), and an obvious counterclockwise hysteresis.

[0045] Refer to Appendix Figure 3 . During the electrical programming process of the device, I LRS and I HRS the current ratio reached more than 50 times and was maintained for more than 500 s.

[0046] Refer to Appendix Figure 4 . After the device was tested for 10 7 cycles of fatigue, the device still exhibited relatively stable electrical performance and relatively stable fatigue characteristics.

[0047] Through the above electrical performance tests on the above-prepared device, it was found that the rectification ratio of the device was about four orders of magnitude, and the resistance change was between two orders of magnitude.

[0048] Example 2

[0049] Refer to Appendix Figure 1 . The specific steps for preparing the device are as follows:

[0050] a. Substrate cleaning

[0051] The substrate 1 (Si / SiO 2 ) was placed in acetone and ultrasonically treated for 3 minutes, then placed in an alcohol solution and ultrasonically treated for 3 minutes, then placed in deionized water and ultrasonically treated for 3 minutes, and finally the substrate 1 was dried with a nitrogen gun.

[0052] b. Preparation of the bottom electrode

[0053] A Pt layer with a thickness of 150 nm was sputtered on the surface of the cleaned substrate 1 by DC magnetron sputtering as the bottom electrode layer 2 (serving as the gate-drain electrode). The working power of the magnetron sputtering was 250 W, the chamber pressure was 0.3 Pa, and the Ar flow rate was 50 sccm.

[0054] c. Preparation of the ferroelectric insulating layer

[0055] A PZT thin film with a thickness of 200 nm was fabricated on the bottom electrode layer 2 by the solution method as the ferroelectric insulating layer 3.

[0056] d. Preparation of the top electrode

[0057] On the ferroelectric insulating layer 3 (PZT), a metal aluminum (Al) layer with a thickness of 300 nm was deposited by thermal evaporation, and the deposition rate of the Al layer was 1 Å / s.

[0058] e. Etching of ferroelectric thin film

[0059] Oxygen ion etching is used to remove the excess organic polymer (PZT), and the PZT covered by the Al layer is retained to adjust the semiconductor channel material.

[0060] f. Preparation of semiconductor channel

[0061] Using radio frequency magnetron sputtering technology, at a chamber pressure of 0.8 pa, an Ar flow rate of 50 sccm, and a working power of 80 W, CuI is sputtered onto the junction at both ends of the upper and lower electrode layers 2 and 4, and a semiconductor channel 5 with a thickness of 15 nm is formed, obtaining a programmable vertical Schottky junction diode based on the organic ferroelectric polymer (PZT) device.

[0062] The corresponding electrical performance tests were carried out on the devices prepared in Example 2, and their performance is as follows:

[0063] Refer to the appendix Figure 5 , the voltage is swept from -6 to +6 V (corresponding to adjusting the ferroelectric polarization from the completely downward state to the completely upward state), and then swept back again. It can be clearly seen from the figure that the device can exhibit a high rectification ratio (~ 10 3 ) and an obvious counterclockwise hysteresis.

[0064] Refer to the appendix Figure 6 , during the electrical programming process of the device, the current ratio of I LRS and I HRS reaches more than 100 times and remains for more than 1000 s.

[0065] Refer to the appendix Figure 7 , after the device is tested for 10 10 cycles of fatigue, the device still exhibits relatively stable electrical performance and shows relatively stable fatigue characteristics.

[0066] Through the above electrical performance tests on the devices prepared above, it is found that the rectification ratio of the device is about 3 orders of magnitude, and the resistive switching is between two orders of magnitude.

[0067] The above is only a further description of the present invention, and is not intended to limit the patent of the present invention. All equivalent implementations of the present invention should be included within the scope of the claims of the present invention.

Claims

1. A two-terminal ferroelectric memory with a programmable vertical Schottky junction, characterized in that, the ferroelectric layer is located between the upper and lower electrodes, and an N-type or P-type semiconductor channel is fabricated between the two electrodes to form a ferroelectric field effect diode with a vertical structure regulated by the ferroelectric local field as the two-terminal programmable ferroelectric memory. The electrodes are made of platinum, aluminum, gold, silver, copper, aluminum metal materials or indium tin oxide materials, and the upper and lower electrodes are a pair of conductors; the ferroelectric layer is an organic ferroelectric layer or a ceramic ferroelectric layer; the semiconductor is ZnO, IGZO, CuI and organic semiconductor materials.

2. A preparation method of the two-terminal ferroelectric memory with a programmable vertical Schottky junction according to claim 1, characterized in that, the preparation of the two-terminal programmable ferroelectric memory specifically includes the following steps: a. Substrate cleaning Si / SiO 2 The substrate was ultrasonically cleaned in acetone, alcohol solution and deionized water for 3 minutes, and then the Si / SiO 2 Blow dry with a nitrogen gun; b. Preparation of the lower electrode Using magnetron sputtering or thermal evaporation techniques, the electrode material is sputtered onto the cleaned Si / SiO 2 surface to obtain a lower electrode with a thickness of 120 - 200 nm; c. Preparation of the ferroelectric insulating layer Using the homogeneous evaporation technique, spin-coat a 15 - 200 nm ferroelectric thin film on the lower electrode, and then anneal it at 120 - 200 °C for 3 - 5 h to obtain the ferroelectric insulating layer; d. Preparation of the upper electrode Using the thermal evaporation technique, deposit an upper electrode with a thickness of 10 - 30 nm on the ferroelectric insulating layer, and the deposition rate is 1 Å / s; e. Etching of the ferroelectric thin film Use oxygen ions or argon ions to etch away the excess ferroelectric thin film, and retain the ferroelectric thin film covered by the lower electrode layer; f. Preparation of the semiconductor channel Using the radio frequency magnetron sputtering technique, sputter the N-type or P-type semiconductor to the junction at both ends of the upper and lower electrodes to form a semiconductor channel with a thickness of 10 - 30 nm, and the fabricated device is a programmable vertical Schottky junction diode.

3. The preparation method of the two-terminal ferroelectric memory with a programmable vertical Schottky junction according to claim 2, characterized in that, the electrodes are made of platinum, aluminum, gold, silver, copper, aluminum metal materials or indium tin oxide materials, and the upper and lower electrodes are a pair of conductors.

4. The preparation method of the two-terminal ferroelectric memory with a programmable vertical Schottky junction according to claim 2, characterized in that, the ferroelectric thin film is polyvinylidene fluoride (PVDF) and its copolymers, HZO, PZT, BFO, PMNPT or BTO thin films.

5. The preparation method of the two-terminal ferroelectric memory with a programmable vertical Schottky junction according to claim 2, characterized in that, the semiconductor is ZnO, IGZO, CuI and organic semiconductor materials.

Images