Generate waveforms based on digital pulses

Abstract

The present invention provides an exemplary automatic test equipment (ATE) comprising: a first test instrument for receiving a waveform from a device under test, wherein the waveform is based on a test signal sent from the ATE to the DUT; circuitry for generating digital pulses based on the waveform; and a second test instrument for receiving the digital pulses through at least two digital pins and processing the digital pulses to test the DUT.

Description

Technical Field

[0001] This specification describes an example implementation of a test system configured to generate waveforms based on digital pulses and configured to perform device testing based on the waveforms. Background Art

[0002] Testing systems are configured to test the operation of electronic devices such as microprocessors and memory chips. Testing can involve sending signals to a device and determining how the device reacts to those signals based on its response. The device's reaction determines whether the device passes or fails the test. Summary of the Invention

[0003] An exemplary test equipment (ATE) includes: a first test instrument including digital pins, wherein the first test instrument is configured to output pulses on at least two of the digital pins; circuitry for combining the pulses to generate a signal and generating a waveform based on the signal; and a second test instrument for performing one or more tests on a device under test (DUT) based on the waveform. The exemplary ATE may include one or more of the following features, either individually or in combination.

[0004] The first test instrument may include a pattern generator to control pulses. The first test instrument may include a digital instrument programmable to generate pulses and change parameters of the pulses on at least two digital pins. The first test instrument may include a digital instrument programmable to control the timing of the pulses on at least two digital pins. The first test instrument may include a digital instrument programmable to control the width of the pulses on at least two digital pins. The first test instrument may include a digital instrument programmable to control the polarity of the pulses on at least two digital pins. The first test instrument may include a digital instrument programmable to control the position of the pulses on at least two digital pins. The first test instrument may include a digital instrument programmable to control the delay of the pulses on at least two digital pins.

[0005] The ATE may include circuitry for modulating a radio frequency (RF) carrier signal using a waveform to generate a test signal. The second test instrument may be configured to perform one or more tests by outputting the test signal to the DUT. The second test instrument may be configured to perform one or more tests by outputting the waveform to the DUT. The first test instrument may be a digital test instrument, and the second test instrument may be a radio frequency (RF) test instrument. The circuitry may include a bandpass filter.

[0006] The at least two digital pins may include two or more digital pin pairs. The two or more digital pin pairs may include a first digital pin pair and a second digital pin pair. A first pulse on the first digital pin pair may be wider than a second pulse on the second digital pin pair. The circuit may include an adder to add the first pulse and the second pulse.

[0007] The at least two digital pins may include two or more digital pin pairs. The two or more digital pin pairs may include a first digital pin pair and a second digital pin pair. A first pulse on the first digital pin pair may have a different amplitude than a second pulse on the second digital pin pair. The circuit may include an adder to add the first pulse and the second pulse.

[0008] The signal may be an intermediate signal, and generating the waveform may include filtering the intermediate signal to produce the waveform.Adding the first pulse and the second pulse may generate the intermediate signal having a plurality of step sizes.

[0009] The waveform can be broken down into multiple time slots. Each time slot can encode multiple bits of data based on the polarity of the waveform within the time slot and the timing of a local minimum or local maximum within the time slot. The waveform can encode two bits per time slot. The first of the two bits can be based on polarity, and the second of the two bits can be based on whether the local minimum or local maximum is closer to the beginning or end of the time slot.

[0010] The first test instrument can be configured to introduce a delay into pulses on at least two digital pins to simulate a time-of-flight delay of the waveform as it travels through air. The waveform can be generated independently of a dedicated waveform generator. At least one of the digital pins can be controllable to drive three levels, where the three levels include a logic high, a logic low, and a high impedance.

[0011] An exemplary ATE includes: a first test instrument for receiving a waveform from a device under test (DUT), wherein the waveform is based on a test signal sent from the ATE to the DUT; circuitry for generating digital pulses based on the waveform; and a second test instrument for receiving the digital pulses via at least two digital pins and processing the digital pulses to test the DUT. The exemplary ATE may include one or more of the following features, either individually or in combination.

[0012] The first test instrument may be a radio frequency (RF) test instrument. The second test instrument may be a digital test instrument. The waveform may include a plurality of time slots. Each time slot may contain a portion of the signal consisting of a local minimum or a local maximum. Generating the digital pulses may include identifying the local minimum or the local maximum, thereby decomposing the local minimum or the local maximum into one or more digital pulses for output via at least two digital pins.

[0013] An exemplary method includes generating a waveform. The exemplary method includes: outputting pulses on at least two digital pins of ATE; combining the pulses to generate a signal; generating a waveform based on the signal; and performing one or more tests on a device under test by the ATE based on the waveform. The exemplary method may include one or more of the following features, either individually or in combination.

[0014] An exemplary method may include using a pattern generator to control pulses. An exemplary method may include programming a digital instrument to generate pulses on at least two digital pins. An exemplary method may include programming the digital instrument to control the timing of pulses on at least two digital pins. An exemplary method may include programming the digital instrument to control the polarity of pulses on at least two digital pins. An exemplary method may include programming the digital instrument to control the position of pulses on at least two digital pins. An exemplary method may include programming the digital instrument to control the delay of pulses on at least two digital pins.

[0015] An exemplary method may include modulating a radio frequency (RF) carrier signal using a waveform to generate a test signal. Performing one or more tests may include outputting the test signal to the DUT. An exemplary method may include performing one or more tests using a waveform.

[0016] The ATE may include: a digital test instrument including at least two digital pins; a radio frequency (RF) test instrument for performing one or more tests on a device under test (DUT); and circuitry for modulating a radio frequency (RF) carrier signal using a waveform to generate a test signal, the RF test instrument outputting the test signal to the DUT for the one or more tests. The waveform may be filtered using a bandpass filter. The at least two digital pins may include two or more digital pin pairs. The two or more digital pin pairs may include a first digital pin pair and a second digital pin pair. A first pulse on the first digital pin pair may be wider than a second pulse on the second digital pin pair. Combining the pulses may include adding the first pulse and the second pulse. Generating the waveform may include filtering the signal. An exemplary method may include adding the first pulse and the second pulse to generate a signal having multiple step sizes.

[0017] The waveform can be broken down into multiple time slots, where each time slot encodes multiple bits of data based on the polarity of the waveform within the time slot and the timing of a local minimum or local maximum within the time slot. The waveform can encode two bits per time slot. The first of the two bits can be based on polarity, and the second of the two bits can be based on whether the local minimum or local maximum is closer to the beginning or end of the time slot.

[0018] An exemplary method may include introducing a time delay into pulses on at least two digital pins to simulate a time-of-flight delay of the waveform as it passes through air.An exemplary method may include programming a digital instrument to control the width of the pulses on the at least two digital pins.

[0019] Any two or more of the features described in this specification (including this summary) can be combined to form implementations not specifically described in this specification.

[0020] At least a portion of the example test systems and processes described herein may be configured or controlled by executing instructions stored on one or more non-transitory machine-readable storage media on one or more processing devices. Examples of non-transitory machine-readable storage media include read-only memory, optical drives, memory disk drives, and random access memory. At least a portion of the example test systems and processes described herein may be configured or controlled using a computing system comprised of one or more processing devices and a memory storing instructions that may be executed by the one or more processing devices to perform various control operations.

[0021] The details of one or more implementations are set forth in the accompanying drawings and the detailed description which follows. Other features and advantages will be apparent from the detailed description and drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a block diagram of an exemplary test system.

[0023] Figure 2 is a block diagram of exemplary circuits included in the test system.

[0024] Figure 3 is a graph of an exemplary waveform that can be generated by the test system based on a digital pulse.

[0025] Figure 4 Included is a diagram showing the digital pulses used to generate the waveform.

[0026] Figure 5 is an example of an intermediate signal generated based on digital pulses.

[0027] Figure 6 Diagram showing the digital pulses output by two pairs of digital pins of a digital test instrument.

[0028] Figure 7 is a diagram of the intermediate signal generated by combining digital pulses from two pairs of digital pins of a digital test instrument.

[0029] Figure 8 Shown is a portion of an intermediate signal generated by combining pulses from three digital pins of a digital test instrument.

[0030] Figure 9 Shown is a portion of an intermediate signal generated by combining pulses from four digital pins of a digital test instrument.

[0031] Figure 10 is a flow chart illustrating an exemplary process for generating a test signal based on a pulse output on a digital pin of a digital test instrument.

[0032] Figure 11 is a flow chart illustrating an exemplary process for generating digital pulses in response to a signal received by a device under test.

[0033] Like reference numbers in different drawings identify similar elements. DETAILED DESCRIPTION

[0034] Automatic test equipment (ATE) is an example of a test system for testing electronic devices. ATE can be modular in that the ATE can include multiple test instruments that can be connected and disconnected from the ATE. In one example, a test instrument is an electronic device configured to send signals to a device under test (DUT) and determine how the DUT reacts to those signals based on its response. Exemplary test instruments that can be part of the ATE include digital test instruments and radio frequency (RF) test instruments. Digital test instruments include digital pins for outputting and receiving digital data, also known as pulses. RF test instruments may include coaxial cables or other transmission media for outputting and receiving radio frequency signals. Other types of test instruments for outputting and receiving other types of signals may also be included in the ATE.

[0035] In one example, an ATE includes a first test instrument having digital pins. The first test instrument may include a digital instrument configured to output pulses on at least two of the digital pins. For example, the first test instrument may be configured to output a first pulse sequence on a first digital pin and a different second pulse sequence on a second digital pin. A pattern generator in the first test instrument may be configured to control the pulses on the pins. A circuit, such as a digital adder, may be configured to combine the pulses from the first and second digital pins to generate an intermediate signal. The intermediate signal may be a digital signal containing pulses having positive and negative polarity. A filter, such as a bandpass filter (BPF), is configured to filter the intermediate signal to generate an analog waveform. A second test instrument, such as an RF test instrument, may perform one or more tests on a device under test (DUT) based on the waveforms. Thus, the ATE can use the digital pins on one test instrument (such as a digital test instrument) to generate a signal, while another test instrument (such as an RF test instrument) uses the signal for testing. This can be accomplished independently of (e.g., without requiring) a dedicated arbitrary waveform generator (AWG) instrument. This can be advantageous, particularly when processing waveforms with bandwidths of approximately 500 megahertz (MHz) or higher. In this regard, using an AWG to generate a signal with a bandwidth of approximately 500 MHz or greater may be costly and may be difficult to measure using standard ATE baseband instrumentation. In some implementations, to generate one or more pulse trains on a digital pin, a standard digital instrument may be used or an application specific integrated circuit (ASIC) or field programmable gate array (FPGA) may be used.

[0036] Figure 1 An example of an ATE 10 is shown that is modular and configurable to generate waveforms for testing based on pulse outputs on digital pins. Figure 1 In the figures, the dashed lines indicate potential signal paths between devices and instruments in the ATE and do not necessarily represent actual transmission media.

[0037] ATE 10 includes a test head 11 and a test computer 12. Test head 11 interfaces with a device under test (DUT) (not shown) on which tests are performed. Test computer 12 communicates with test head 11 to control the tests. For example, test computer 12 may download a test program set to a test instrument on the test head and then execute the test program set to test the DUT in communication with the test head.

[0038] The ATE 10 includes test instruments 13A to 13N. In this example, one or more of the test instruments include: one or more digital test instruments configured to output digital test signals for testing the DUT; and one or more RF test instruments configured to output RF signals for testing the DUT. However, in addition to digital test instruments and RF test instruments, other types of test instruments can be used. For example, a test instrument configured to force analog voltages and currents to test channels to test the DUT can be used. Each test instrument can be configured to output test signals to test the DUT and receive signals from the DUT. The received signals may include response signals based on the test signals and / or signals indicating that the DUT has not been tested (e.g., has not responded to the test signals).

[0039] Signals are sent to and received from the DUT via multiple test channels. In some examples, the test channels may include one or more physical transmission media through which signals are sent from the test instrument to the DUT and received from the DUT. The physical transmission media may include, but are not limited to, electrical conductors alone or in combination with optical conductors, wireless transmission media, or both optical conductors and wireless transmission media. The electrical conductors may include coaxial cables for transmitting RF signals. In some examples, the test channels may include a frequency range within which signals are transmitted via the one or more physical transmission media.

[0040] ATE 10 includes a connection interface 14 that connects test instrument test channels 15 to DIB 16. Connection interface 14 may include connectors 20 or other devices for routing signals between the test instrument and DIB 16. For example, the connection interface may include one or more circuit boards or other substrates on which such connectors are mounted. Conductors defining the instrument test channels may be routed through the connection interface and the DIB.

[0041] exist Figure 1In the example shown, DIB 16 is electrically and mechanically connected to test head 11. The DIB includes sites 21, which may include pins, conductive traces, or other electrical and mechanical connection points to which the DUT can be connected. Test signals, response signals, and other signals are transferred between the DUT and the test instrument through the sites via test channels. DIB 16 also includes connectors, conductive traces, and circuitry for routing signals between the test instrument, the DUT connected to sites 21, and other circuitry.

[0042] exist Figure 1 In the example of FIG, the test instrument 13A is a digital test instrument, referred to as digital instrument 13A. Figure 1 In the example shown, test instrument 13B is an RF test instrument, referred to as RF instrument 13B. Digital instrument 13A includes multiple digital pins for outputting test signals to and receiving test signals from the DUT. Each digital pin can be a separate channel between the digital instrument and the DIB. RF instrument 13B includes one or more coaxial connections for outputting test signals to and receiving test signals from the DUT. Each coaxial connection can be a separate channel between the digital instrument and the DIB. In one example, the coaxial connection includes a transmission line having a conductive outer material surrounding an insulating material, which in turn surrounds a center conductor. The outer material serves as a return medium for the center conductor. In some implementations, the test channel between the RF instrument and the DIB can be implemented using a transmission medium other than a coaxial connection.

[0043] The ATE 10 also includes circuitry for converting the pulse output on the digital pin into a waveform that is modulated by an RF carrier signal to generate a test signal. The test signal can be output to the DUT from, for example, an RF instrument. The circuitry can also be configured to convert the waveform into digital pulses for use by the digital instrument. In some implementations, this circuitry (CKT) 22 can be located on the DIB 16, such as Figure 1 In these embodiments, the communication between the digital instrument 13A and the RF instrument 13B is transmitted through the DIB 16. In some embodiments, this circuit 22 can be located on the RF instrument 13B, such as Figure 1 In these implementations, communication between the digital instrument 13A and the RF instrument 13B is direct, as conceptually illustrated by arrow 23, rather than being passed through the DIB.

[0044] Figure 2An exemplary implementation of components of a circuit 22 for generating a test signal is shown. Circuit 22 includes a digital adder circuit 24 that receives pulses at input terminals 25, 25 and combines the pulses to generate an intermediate signal 27, where the intermediate signal is a digital signal. For example, the pulses can be summed to generate the intermediate signal. Circuit 22 includes a filter 29, in this example a bandpass filter, for generating a waveform based on the intermediate signal. Typically, the filter smoothes the intermediate signal, which is a digital signal, to generate a waveform that is an analog waveform. In some implementations, the intermediate signal and the waveform can be the same signal. That is, the intermediate signal can be the waveform being used, and the waveform can be generated simply by passing the intermediate signal.

[0045] Modulator circuit 31 modulates an RF carrier signal with a waveform to generate a test signal, such as an RF test signal, which is an analog signal. In one example, the RF test instrument outputs the test signal to the DUT and receives a response signal from the DUT. The response signal can also be an RF signal. In some implementations, circuit 22 also includes demodulator circuit 33 for demodulating the response signal to generate a waveform and an analog-to-digital converter (ADC) 34 for generating a digital signal based on the waveform. The digital signal can then be sent to digital instrument 13A for processing. In some implementations, this response signal can be processed by RF instrument 13B. In either case, processing can include determining whether the DUT passes or fails the test given a known stimulus and its response.

[0046] Figure 3 An exemplary waveform 35 that can be modeled and generated using the systems described herein is shown. Waveform 35 can encode data using biorthogonal keying. Waveform 35 can be decomposed into multiple time slots, such as time slots 36 and 40. Each time slot can include a local maximum 37, such as the local maximum in time slot 36, or a local minimum, such as local minimum 39 in time slot 40. Waveform 35 can be generated from pulses that constitute digital data. Figure 4 An example of a set of pulses 48 that can be used to generate waveform 35 is shown. A pulse having a positive polarity, waveform portion 41, can be output from a digital instrument to a test channel on a first digital pin. This series of pulses is represented on channel 50. A pulse having a negative polarity, waveform portion 42, can be output from a digital instrument to a test channel on a second digital pin different from the first digital pin. This series of pulses is represented on channel 51. In some implementations, the polarity indicates whether the signal is positive or negative.

[0047] To generate Figure 5 The intermediate signal shown has a first pulse having a waveform portion 41 of positive polarity added at the input 25 of the adder circuit 24 and a second pulse representing a waveform portion 42 of negative polarity subtracted at the input 26 of the adder. Figure 5In the example of , the resulting intermediate signal 43 includes a portion 44 having a positive polarity and a portion 45 having a negative polarity. Figure 5 The example of is depicted as a square wave, but need not be so. Filter 29 and modulator circuit 31 generate a test signal based on intermediate signal 43 in the manner previously described.

[0048] In some implementations, the test instrument is programmable to control the timing of pulses on a digital pin, to control the width of pulses on a digital pin, to control the polarity (positive or negative) of pulses on a digital pin, to control the position of pulses within a sequence or series, and to control (e.g., introduce) a delay in pulses on a digital pin. For example, the test instrument can be configured to delay pulses on a digital pin to simulate the time-of-flight delay of a waveform traveling through air. This can be used to simulate a positioning function on the device being tested. In one example, positioning includes outputting a signal and detecting reflections of that signal. Positioning is performed multiple times and at multiple different locations. By correlating the reflections with the output, the device can determine the distance traveled by the signal. Knowing the distance the signal has traveled relative to multiple (e.g., three) reference locations enables the device to determine its position relative to the reference locations. In some implementations, timing, delay, and position are related. For example, timing can refer to the timing of a pattern relative to another waveform, the position within a pattern, or the position of a pulse.

[0049] As described above, the test instrument is programmable to control the timing of pulses on one or more of the digital pins and to control the width of the pulses on the digital pins. By controlling the pulse width and pulse timing on the digital pins, an intermediate signal with multiple step sizes can be generated. Increasing the number of steps increases the resolution of the final waveform. For example, referring to Figure 6 , a first digital pin pair 55 on the digital instrument can output pulses having a first narrow width. A second digital pin pair 56 on the digital instrument can output pulses having a second wider width. In this context, the terms narrow and wide do not have any specific numerical meaning, but rather indicate relative widths. The centers of the narrow pulses and the wide pulses on the corresponding pins are aligned. In the manner previously described, pulses from waveform portions of different digital pins having positive polarity are added together, and pulses from waveform portions of different digital pins having negative polarity are subtracted. For Figure 6 The pulse, Figure 7 The resulting intermediate signal 58 includes a stepped portion 59 having a positive polarity and a stepped portion 60 having a negative polarity. These stepped portions are formed due to the addition or subtraction of different pulses having different widths. In one example, Figure 6Pulses 61 and 62 of intermediate signal 58 are combined, resulting in a portion 63 of intermediate signal 58 having a magnitude equal to the magnitude of pulse 62 and a portion 64 having a magnitude equal to the sum of the magnitudes of pulses 61 and 62. For example, if the magnitude of pulse 61 is one and the magnitude of pulse 62 is one, then the magnitude of portion 63 is one and the magnitude of portion 64 is two (i.e., one plus one).

[0050] By increasing the number of pulses combined and the number of pulses with different widths, the shape and / or resolution of the intermediate signal can be changed. For example, Figure 8 FIG. 1 shows a portion of an exemplary intermediate signal generated using three pairs of digital pins, each pair having a different pulse width. For example, Figure 9 A portion of an exemplary intermediate signal generated using four pairs of digital pins, each pair having a different pulse width, is shown. As described above, a filter smoothes the intermediate waveform, and a modulator circuit uses the waveform to modulate an RF carrier signal to generate a test signal. The test signal can then be used to test, for example, a device under test (DUT), as described herein.

[0051] In some implementations, the pulses can be time-shifted relative to each other but have the same width and / or different amplitudes. Pulses with these characteristics can be used to synthesize a quantized analog waveform, ie, an intermediate signal.

[0052] The 802.15.4g standard supports different frequency bands. The lowest frequency band can be accessed directly using digital pulses without modulating an RF carrier. Therefore, in some implementations, the test signal can be a waveform (baseband signal), or the waveform can be modulated onto an RF carrier as described.

[0053] As mentioned earlier, waveforms such as Figure 3Waveform 35 may encode data using bi-orthogonal keying. As previously described, waveform 35 may be broken down into multiple time slots, such as time slots 36 and 40. Each time slot may include: a local maximum 37, as in time slot 36; or a local minimum 39, as in time slot 40. Each time slot encodes multiple bits of data based on the polarity of the waveform within the time slot and the timing of the local minimum or local maximum within the time slot. For example, waveform 35 may encode two bits per time slot. The first of the two bits may be based on the polarity of the signal within the time slot, and the second of the two bits may be based on whether the local minimum or local maximum is closer to the beginning or end of the time slot. In one example, a single time slot may transmit two bits with the following values: 00, 01, 10, 11. In this example, 00 is indicated by positive polarity and a local maximum before the time slot midpoint; 01 is indicated by positive polarity and a local maximum after the time slot midpoint; 10 is indicated by negative polarity and a local minimum before the time slot midpoint; and 11 is indicated by negative polarity and a local minimum after the time slot midpoint.

[0054] In some implementations, waveforms such as waveform 35 can encode data other than that described above. For example, three bits can be encoded per time slot. The first of the three bits can be based on polarity, the second of the three bits can be based on whether the local minimum or local maximum is in the first or second half of the time slot, and the third of the three bits can be based on whether the local minimum or local maximum is closer to the middle of the time slot or closer to the beginning or end of the time slot. Other encoding schemes that generate more than three bits per time slot can also be used.

[0055] Figure 10 An example of a process 70 is shown that can be performed by an ATE for generating a test signal using the exemplary system described herein. The process 70 includes generating (71) a pulse for generating a waveform for testing. Generating the pulse can include a digital instrument outputting a series of ones and zeros, such as high and low logic or voltage levels, on one or more digital pin pairs. For example, a pattern generator controlling a first digital pin can output a logic level representing a waveform portion having a positive polarity. For example, a pattern generator controlling a second digital pin can output a logic level representing a waveform portion having a negative polarity. The pulse is output on two or more of the digital pins and via a corresponding transmission medium to a circuit 22 for generating a waveform and a test signal based on the pulse. As described, in some examples, the circuit is located on the DIB, and in some examples, the circuit is located in another test instrument, such as an RF instrument.

[0056] The circuit combines the pulses (72) to produce an intermediate signal. As described, the pulses can be summed to produce the intermediate signal. The summing can include combining pulses from two, four, six, eight, ten, etc. digital pins to produce the intermediate signal. Generally, the more digital pins used, the greater the resolution of the intermediate signal. In some embodiments, an even number of digital pins is used, where one digital pin of each pair of digital pins represents the positive polarity portion of the signal and the other digital pin of each pair of digital pins represents the negative polarity portion of the signal. In some embodiments, this is not necessarily the case. For example, if the waveform has a single polarity, pulses do not need to be subtracted to form two polarities. In such cases, one, two, three, four, five, six, etc. digital pins can carry pulses that will be combined to produce the intermediate signal with the appropriate resolution.

[0057] The circuit filters the intermediate signal (73) to generate a waveform. As previously mentioned, in some embodiments, the filter used is a bandpass filter (BPF). The bandpass filter can smooth the intermediate signal to generate a waveform. In some embodiments, the bandpass filter is configured to generate a specific type of waveform. For example, Figure 3 The waveform is a root-raised cosine time-domain pulse that can be generated using an intermediate signal using two digital pins (one for positive polarity and one for negative polarity) and an appropriately configured bandpass filter. In some implementations, a filter other than a bandpass filter can be used to generate the waveform from the intermediate signal.

[0058] The modulator circuit modulates (74) the RF carrier signal with the waveform to generate the test signal. If necessary, the test signal can be sent from a circuit external to the RF instrument to an instrument, such as the RF instrument. The RF instrument uses the test signal to perform (75) one or more tests on the DUT being tested by the ATE.

[0059] Figure 11 An example of a process 80 is shown that can be performed by an ATE for generating digital pulses based on, for example, an analog (e.g., RF) response signal received at the ATE from a DUT. According to process 80, a response signal is received (81) at circuit 22. The response signal is demodulated (82) to produce an intermediate signal. The intermediate signal is then digitized (83) to produce a digital pulse representing the intermediate signal. The digital pulse is output to a digital pin on a digital instrument via one or more communication channels. There, the digital signal can be analyzed to determine the response of the DUT to the stimulus signal that generated the response signal. The response of the DUT indicates whether the DUT passed or failed the test.

[0060] In some implementations, at least one of the digital pins is controllable to drive three levels including logic high, logic low, and high impedance. In some implementations, at least two of the digital pins (such as the digital pins corresponding to input terminals 25 and 25) are controllable to drive three levels including logic high, logic low, and high impedance. In some implementations, all digital pins in a test instrument or test system are controllable to drive three levels including logic high, logic low, and high impedance.

[0061] In some implementations, the example test systems described herein are synchronized, and the timing / latency references described herein are relative to a reference timing clock used throughout the test system.

[0062] All or part of the test systems and processes described in this specification, and various modifications thereof, may be configured or controlled, at least in part, by one or more computers using one or more computer programs tangibly embodied in one or more information carriers, such as in one or more non-transitory machine-readable storage media. Computer programs may be written in any form of programming language, including compiled or interpreted languages, and may be deployed in any form, including as stand-alone programs or as modules, components, subroutines, or other units suitable for use in a computing environment. Computer programs may be deployed to execute on a single computer or on multiple computers at a single site or distributed across multiple sites and interconnected by a network.

[0063] The actions associated with configuring or controlling the test system and process may be performed by one or more programmable processors executing one or more computer programs to control all or some of the well formation operations described herein. All or part of the test system and process may be configured or controlled by dedicated logic circuitry, such as an FPGA (field programmable gate array) and / or an ASIC (application-specific integrated circuit).

[0064] Processors suitable for computer program execution include, by way of example, both general-purpose and special-purpose microprocessors, and any one or more processors of any type of digital computer. Typically, a processor will receive instructions and data from a read-only memory area or a random access memory area, or both. Elements of a computer include one or more processors for executing instructions and one or more memory devices for storing instructions and data. Typically, a computer will also include (or be operatively coupled to receive data from it or transfer data to it, or both) one or more machine-readable storage media, such as a mass storage device for storing data, such as a magnetic disk, magneto-optical disk, or optical disk. Non-transitory machine-readable storage media suitable for embodying computer program instructions and data include all forms of non-volatile storage, including, by way of example, semiconductor memory devices such as EPROM (Erasable Programmable Read-Only Memory), EEPROM (Electrically Erasable Programmable Read-Only Memory), and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; and CD-ROMs (Compact Disc Read-Only Memory) and DVD-ROMs (Digital Versatile Disc Read-Only Memory).

[0065] Elements of the different described implementations may be combined to form other implementations not specifically described above. Elements may be omitted from a previously described system without generally adversely affecting its operation or the operation of the system. Furthermore, individual elements may be combined into one or more single elements to perform the functions described herein.

[0066] Other implementations not specifically described in this specification are also within the scope of the following claims.

Claims

1. An automatic test equipment (ATE), comprising: a first test instrument comprising digital pins, the first test instrument being configured to output pulses on at least two of the digital pins, wherein a first digital pin is for pulses having a positive polarity and a second digital pin is for pulses having a negative polarity; circuitry comprising an adder for receiving the pulses from the at least two digital pins and for combining the pulses to produce a signal and generating a waveform based on the signal; and A second test instrument is configured to perform one or more tests on a device under test (DUT) based on the waveform, the second test instrument including a connection to a transmission line to output a test signal based on the waveform to the DUT to test the DUT, wherein the waveform is based on the output pulse of the first test instrument. 2 . The ATE of claim 1 , wherein the first test instrument comprises a pattern generator for controlling the pulses. 3 . The ATE of claim 1 , wherein the first test instrument comprises a digital instrument programmable to generate the pulses and to vary parameters of the pulses on the at least two digital pins. 4 . The ATE of claim 1 , wherein the first test instrument comprises a digital instrument programmable to control the timing of the pulses on the at least two digital pins. 5 . The ATE of claim 1 , wherein the first test instrument comprises a digital instrument programmable to control the width of the pulses on the at least two digital pins.

6. The ATE of claim 1, wherein the first test instrument comprises a digital instrument programmable to control the polarity of the pulses on the at least two digital pins.

7. The ATE of claim 1, wherein the first test instrument comprises a digital instrument programmable to control the positions of the pulses on the at least two digital pins.

8. The ATE of claim 1, wherein the first test instrument comprises a digital instrument programmable to control a delay of the pulses on the at least two digital pins.

9. The ATE of claim 1 , further comprising: circuitry for modulating a radio frequency (RF) carrier signal using the waveform to generate a test signal; The second test instrument is configured to perform the one or more tests by outputting the test signal to the DUT.

10. The ATE of claim 1, wherein the second test instrument is configured to perform the one or more tests by outputting the waveform to the DUT.

11. The ATE of claim 1 , wherein the first test instrument is a digital test instrument; and The second test instrument is a radio frequency (RF) test instrument.

12. The ATE of claim 1, wherein the circuit comprises a bandpass filter.

13. The ATE of claim 1 , wherein the at least two digital pins comprise two or more digital pin pairs, the two or more digital pin pairs comprising a first digital pin pair and a second digital pin pair, the first digital pin pair comprising the first digital pin, the second digital pin pair comprising the second digital pin; wherein a first pulse on the first digital pin pair is wider than a second pulse on the second digital pin pair; and wherein the adder is configured to add the first pulse and the second pulse.

14. The ATE of claim 1 , wherein the at least two digital pins comprise two or more digital pin pairs, the two or more digital pin pairs comprising a first digital pin pair and a second digital pin pair; wherein a first pulse on the first digital pin pair has a different amplitude than a second pulse on the second digital pin pair; and wherein the adder adds the first pulse and the second pulse.

15. The ATE of claim 13 , wherein the signal is an intermediate signal, and generating the waveform comprises filtering the intermediate signal to produce the waveform; and Adding the first pulse and the second pulse generates the intermediate signal having a plurality of step sizes.

16. The ATE of claim 1, wherein the waveform is decomposed into a plurality of time slots, each time slot encoding a plurality of bits of data based on the polarity of the waveform within the time slot and the timing of a local minimum or local maximum within the time slot.

17. The ATE of claim 16, wherein the waveform encodes two bits per time slot, a first of the two bits being based on the polarity and a second of the two bits being based on whether the local minimum or the local maximum is closer to the beginning or end of the time slot.

18. The ATE of claim 1, wherein the first test instrument is configured to introduce a delay into the pulses on the at least two digital pins to simulate a time-of-flight delay of the waveform as it travels through air.

19. The ATE of claim 1, wherein the waveform is generated independently of a dedicated waveform generator.

20. The ATE of claim 1, wherein at least one of the digital pins is controllable to drive three levels, the three levels comprising logic high, logic low, and high impedance.

21. A method for generating a waveform, comprising: Outputting pulses on at least two digital pins of a first test instrument of automatic test equipment ATE, wherein a first digital pin is for pulses having a positive polarity and a second digital pin is for pulses having a negative polarity; combining the pulses to produce a signal and generating the waveform based on the signal with an adder; as well as Based on the waveform, a second test instrument performs one or more tests on a device under test (DUT) being tested by the ATE, the second test instrument including a connection to a transmission line to output a test signal based on the waveform to the DUT to test the DUT, wherein the waveform is based on the output pulse of the first test instrument.

22. The method according to claim 21, further comprising: The pulses are controlled using a pattern generator.

23. The method according to claim 22, further comprising: A digital instrument is programmed to generate the pulses on the at least two digital pins.

24. The method according to claim 23, further comprising: The digital instrument is programmed to control the timing of the pulses on the at least two digital pins.

25. The method of claim 23, further comprising: The digital instrument is programmed to control the polarity of the pulses on the at least two digital pins.

26. The method of claim 23, further comprising: The digital instrument is programmed to control the positions of the pulses on the at least two digital pins.

27. The method of claim 23, further comprising: The digital instrument is programmed to control a delay of the pulses on the at least two digital pins.

28. The method of claim 21, further comprising: modulating a radio frequency (RF) carrier signal using the waveform to generate a test signal; Wherein performing the one or more tests includes outputting the test signal to the DUT.

29. The method of claim 21, further comprising: The one or more tests are performed using the waveform.

30. The method of claim 21, wherein the ATE comprises: a digital test instrument, the digital test instrument comprising the at least two digital pins; A radio frequency (RF) test instrument, configured to perform the one or more tests on the DUT; and A circuit uses the waveform to modulate a radio frequency (RF) carrier signal to generate a test signal, and the RF test instrument outputs the test signal to the DUT to perform the one or more tests.

31. The method of claim 21 , wherein the waveform is filtered using a bandpass filter.

32. The method of claim 21 , wherein the at least two digital pins comprise two or more digital pin pairs, the two or more digital pin pairs comprising a first digital pin pair and a second digital pin pair; wherein a first pulse on the first digital pin pair is wider than a second pulse on the second digital pin pair; and Wherein combining the pulses comprises adding the first pulse and the second pulse.

33. The method of claim 32, wherein generating the waveform comprises filtering the signal; and The method further comprises adding the first pulse and the second pulse to generate the signal having a plurality of step sizes.

34. The method of claim 21, wherein the waveform is decomposed into a plurality of time slots, each time slot encoding a plurality of bits of data based on the polarity of the waveform within the time slot and the timing of a local minimum or local maximum within the time slot.

35. The method of claim 34, wherein the waveform encodes two bits per time slot, a first of the two bits being based on the polarity and a second of the two bits being based on whether the local minimum or the local maximum is closer to the beginning or end of the time slot.

36. The method of claim 21, further comprising: A time delay is introduced into the pulses on the at least two digital pins to simulate a time-of-flight delay of the waveform as it travels through air.

37. The method of claim 21, further comprising: A digital instrument is programmed to control the width of the pulses on the at least two digital pins.

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