Codec and Headphones
By setting up the audio signal transmission interface and frequency multiplication module in the headphone codec, the digital-to-analog converter and power amplifier are separated, which solves the problem of large chip area and power consumption of the headphones, and improves the audio signal transmission speed and efficiency.
Patent Information
- Application Number
- CN202010724828.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-07-24
- Publication Date
- 2025-07-01
- Estimated Expiration
- 2040-07-24
AI Technical Summary
Currently, headphones such as TWS headphones are difficult to effectively reduce chip area and power consumption in chip-level system architecture, affecting the performance and battery life of the headphones.
Design a codec to separate the digital-to-analog converter and power amplifier in the codec by setting up an audio signal transmission interface, and use the frequency multiplication module to increase the transmission speed of the downlink audio signal.
It reduces the chip area and power consumption on the headset, improves the transmission speed and efficiency of downlink audio signals, and shortens the audio signal transmission time.
Smart Images

Figure CN113971957B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of intelligent terminals, and particularly to a codec and a headset. Background Art
[0002] Current headsets, such as true wireless stereo (TWS) headsets, basically adopt the basic architecture of system on chip (SOC) + codec (coder - decoder). Among them, the SOC is a fully digital unit, and the codec includes two major parts: digital and analog. How to reduce the chip area and power consumption on the headset is an important issue in the development of headsets. Summary of the Invention
[0003] Embodiments of this application provide a codec and a headset, which can reduce the chip area and power consumption on the headset.
[0004] In a first aspect, an embodiment of this application provides a codec, including: a frequency doubling module and an audio signal transmission interface; wherein,
[0005] The output end of the frequency doubling module is connected to the first pin of the audio signal transmission interface;
[0006] The input end of the frequency doubling module receives a first downlink digital audio signal, performs frequency doubling processing on the first downlink digital audio signal, and outputs a second downlink digital audio signal obtained after frequency doubling processing; the first downlink digital audio signal is a signal obtained by superimposing a downlink digital audio signal and an environment - related audio signal;
[0007] The first pin of the audio signal transmission interface is used to transmit the second downlink digital audio signal.
[0008] An audio signal transmission interface is provided in this codec. Through this audio signal transmission interface, a digital power amplifier can be connected, so that the digital - to - analog converter and the power amplifier in the codec are separated from the codec, reducing the chip area and power consumption of the codec, and further reducing the chip area and power consumption on the headset; moreover, the second downlink digital audio signal transmitted by the audio signal transmission interface is a high - frequency signal output by the frequency doubling module, thus improving the transmission speed of the downlink audio signal and shortening the transmission time of the downlink audio signal.
[0009] In a possible implementation manner, the audio signal transmission interface is an integrated circuit built - in audio I2S interface or a time - division multiplexing (TDM) interface.
[0010] In a possible implementation, the output terminal of the frequency doubling module is connected to the first pin of the audio signal transmission interface, including: the output terminal of the frequency doubling module is connected to the first input terminal of the path selection module, and the first output terminal of the path selection module is connected to the first pin of the audio signal transmission interface; the path selection module is configured to: when selecting a path formed by the first input terminal and the first output terminal, transmit the second downlink digital audio signal received by the first input terminal to the first output terminal.
[0011] In a possible implementation, it further includes:
[0012] The second input terminal of the path selection module receives the first downlink digital audio signal;
[0013] The path selection module is further configured to: when selecting a path formed by the second input terminal and the first output terminal, transmit the first downlink digital audio signal received by the second input terminal to the first output terminal.
[0014] Under this structure, the path selection module provides two transmission paths for the downlink digital audio signal, namely the path between the first input terminal and the first output terminal, and the path between the second input terminal and the first output terminal.
[0015] In a possible implementation, it further includes:
[0016] The frequency doubling module includes n frequency doubling sub-modules, where n is a natural number greater than or equal to 2. The n frequency doubling sub-modules are connected in series in sequence. The output terminal of the nth frequency doubling sub-module is connected to the output terminal of the frequency doubling module, and the output terminals of the first to the (n - 1)th frequency doubling sub-modules are respectively connected to the third input terminal to the (n + 1)th input terminal of the path selection module;
[0017] The path selection module is further configured to: when selecting a path formed by one of the third input terminal to the (n + 1)th input terminal and the first output terminal, transmit the digital audio signal received by the selected one input terminal to the first output terminal.
[0018] Under this structure, the path selection module provides more transmission paths for the downlink digital audio signal.
[0019] In a possible implementation, it further includes:
[0020] The second output terminal of the path selection module is connected to the power amplifier PA through a digital-to-analog converter;
[0021] The path selection module is further configured to: when selecting a path formed by one input terminal and the second output terminal, transmit the digital audio signal received by the selected one input terminal to the digital-to-analog converter.
[0022] In this structure, the codec retains the digital-to-analog converter and the power amplifier, enabling the codec to connect to the speaker either through the digital PA or directly, thus expanding the applicable range of the codec.
[0023] In one possible implementation, the environment-related audio signal is a digital audio signal obtained after analog-to-digital conversion, downsampling, and specified audio processing of the analog audio signal collected by an analog microphone, and the analog microphone is disposed outside the codec; alternatively, the environment-related audio signal is a digital audio signal obtained after downsampling and specified audio processing of the digital audio signal collected by a digital microphone, and the digital microphone is disposed outside the codec.
[0024] In one possible implementation, the specified audio processing includes: active noise cancellation control, or voice passthrough, or voice enhancement.
[0025] In one possible implementation, the audio signal transmission interface is used to connect to a digital power amplifier PA, and the digital PA has an audio signal transmission interface matching the audio signal transmission interface of the codec.
[0026] In a second aspect, an embodiment of the present application provides a codec, including: a path selection module, a frequency doubling module, and an audio signal transmission interface; wherein,
[0027] The input end of the frequency doubling module receives a first downlink digital audio signal, performs frequency doubling processing on the first downlink digital audio signal, and outputs a second downlink digital audio signal obtained after frequency doubling processing; the first downlink digital audio signal is a signal obtained by superimposing a downlink digital audio signal and an environment-related audio signal;
[0028] The output end of the frequency doubling module is connected to the first input end of the path selection module, the first output end of the path selection module is connected to the first pin of the audio signal transmission interface, the audio signal transmission interface is used to connect to a digital power amplifier PA, the digital PA has an audio signal transmission interface matching the audio signal transmission interface of the codec, the audio signal transmission interface is an integrated circuit built-in audio I2S interface or a time division multiplexing TDM interface, and the first pin of the audio signal transmission interface is used to transmit the second downlink digital audio signal;
[0029] The second input end of the path selection module receives the first downlink digital audio signal;
[0030] The frequency doubling module includes n frequency doubling sub-modules, where n is a natural number greater than or equal to 2, the n frequency doubling sub-modules are connected in series in sequence, the output end of the nth frequency doubling sub-module is connected to the output end of the frequency doubling module, and the output ends of the first to the n-1th frequency doubling sub-modules are respectively connected to the third input end to the n+1th input end of the path selection module;
[0031] The second output terminal of the path selection module is connected to the power amplifier PA through a digital-to-analog converter;
[0032] The path selection module is configured to: select one input terminal from the first input terminal to the (n + 1)-th input terminal, select one output terminal between the first output terminal and the second output terminal, form a path between the selected input terminal and the output terminal, and transmit the digital audio signal received by the selected input terminal to the selected output terminal;
[0033] The environment-related audio signal is a digital audio signal obtained by performing analog-to-digital conversion, downsampling, and specified audio processing on the analog audio signal collected by an analog microphone, and the analog microphone is disposed outside the codec; alternatively, the environment-related audio signal is a digital audio signal obtained by performing downsampling and specified audio processing on the digital audio signal collected by a digital microphone, and the digital microphone is disposed outside the codec; the specified audio processing includes: active noise cancellation control, or voice passthrough, or voice enhancement.
[0034] In a third aspect, an embodiment of the present application provides a headset, including: a codec, a digital power amplifier PA, and a speaker; wherein,
[0035] The codec includes: an upsampling module and an audio signal transmission interface; wherein, the output terminal of the upsampling module is connected to the first pin of the audio signal transmission interface; the input terminal of the upsampling module receives a first downlink digital audio signal, performs upsampling processing on the first downlink digital audio signal, and outputs a second downlink digital audio signal obtained after the upsampling processing; the first downlink digital audio signal is a signal obtained by superimposing a downlink digital audio signal and an environment-related audio signal; the first pin of the audio signal transmission interface is used to transmit the second downlink digital audio signal;
[0036] The digital PA has an audio signal transmission interface matching the audio signal transmission interface of the codec, and the audio signal transmission interface of the codec is connected to the audio signal transmission interface of the digital PA; the output terminal of the digital PA is connected to the speaker.
[0037] In a possible implementation manner, both the audio signal transmission interface of the codec and the audio signal transmission interface of the digital PA are integrated circuit built-in audio I2S interfaces; alternatively, both the audio signal transmission interface of the codec and the audio signal transmission interface of the digital PA are time-division multiplexing TDM interfaces.
[0038] In a possible implementation, the output end of the frequency doubling module is connected to the first pin of the audio signal transmission interface, including: the output end of the frequency doubling module is connected to the first input end of the path selection module, and the first output end of the path selection module is connected to the first pin of the audio signal transmission interface; the path selection module is configured to: when selecting to form a path between the first input end and the first output end, transmit the second downlink digital audio signal received at the first input end to the first output end.
[0039] An audio signal transmission interface is provided in the codec of the earphone, and a digital PA is connected through the audio signal transmission interface, so as to separate the digital-to-analog converter and the power amplifier in the codec from the codec, reduce the chip area and power consumption of the codec, and further reduce the chip area and power consumption of the earphone; moreover, the second downlink digital audio signal transmitted by the audio signal transmission interface is a high-frequency signal output by the frequency doubling module, thereby improving the transmission speed of the downlink audio signal and shortening the time for the downlink audio signal to be transmitted to the speaker.
[0040] In a possible implementation, the codec further includes:
[0041] The second input end of the path selection module receives the first downlink digital audio signal;
[0042] The path selection module is further configured to: when selecting to form a path between the second input end and the first output end, transmit the first downlink digital audio signal received at the second input end to the first output end.
[0043] In a possible implementation, the codec further includes:
[0044] The frequency doubling module includes n frequency doubling sub-modules, where n is a natural number greater than or equal to 2. The n frequency doubling sub-modules are connected in series in sequence. The output end of the nth frequency doubling sub-module is connected to the output end of the frequency doubling module, and the output ends of the first to the n-1th frequency doubling sub-modules are respectively connected to the third input end to the n+1th input end of the path selection module;
[0045] The path selection module is further configured to: when selecting to form a path between one of the third input end to the n+1th input end and the first output end, transmit the digital audio signal received at the selected one input end to the first output end.
[0046] In a possible implementation, the codec further includes:
[0047] The second output end of the path selection module is connected to the power amplifier PA through a digital-to-analog converter;
[0048] The path selection module is further configured to: when selecting to form a path between one input end and the second output end, transmit the digital audio signal received at the selected one input end to the digital-to-analog converter.
[0049] In a possible implementation, the environment-related audio signal is a digital audio signal obtained after analog-to-digital conversion, downsampling, and specified audio processing of the analog audio signal collected by the microphone; the microphone is disposed outside the codec.
[0050] In a possible implementation, the specified audio processing includes: active noise cancellation control, or voice passthrough, or voice enhancement.
[0051] In a possible implementation, the audio signal transmission interface is used to connect to a digital power amplifier PA, and the digital PA has an audio signal transmission interface that matches the audio signal transmission interface of the codec. Description of the Drawings
[0052] Figure 1 It is a schematic diagram of an example of the structure of the TWS earphone of the present application;
[0053] Figure 2 It is a schematic diagram of another example of the structure of the TWS earphone of the present application;
[0054] Figure 3 It is a schematic diagram of an embodiment of the earphone structure of the present application with 2 speakers;
[0055] Figure 4 It is a schematic diagram of another embodiment of the earphone structure of the present application with 2 speakers;
[0056] Figure 5 It is a structural diagram of an embodiment of the codec of the present application;
[0057] Figure 6 It is a structural diagram of another embodiment of the codec of the present application;
[0058] Figure 7 It is a structural diagram of still another embodiment of the codec of the present application;
[0059] Figure 8 It is a structural diagram of yet another embodiment of the codec of the present application;
[0060] Figure 9 It is a structural diagram of yet another embodiment of the codec of the present application. Detailed Embodiments
[0061] The terms used in the embodiments part of the present application are only used to explain the specific embodiments of the present application, rather than intended to limit the present application.
[0062] In the embodiments of the present application, the earphone may include TWS earphones, over-ear earphones, neckband earphones, etc. The codec in the embodiments of the present application can be applied to any of the above earphones.
[0063] In an example of the present application, taking a TWS headset with one speaker as an example, the structure of the TWS headset is as Figure 1 shown, including: an SOC and a codec. Digital signal processing (DSP, digital signal processing) is provided in both the SOC and the codec. An audio signal transmission interface for transmitting audio signals and a control signal transmission interface for transmitting control signals are provided between the SOC and the codec. For example, in Figure 1 , taking the audio signal transmission interface as an inter-IC sound (I2S) interface and the control signal transmission interface as an SPI interface as an example.
[0064] Figure 1 The working principle of the architecture shown is described as follows: The signal transmission in the TWS headset is divided into upstream signal transmission and downstream signal transmission. Among them,
[0065] In the upstream signal transmission, the analog audio signal collected by the microphone (mic) in the TWS headset is amplified in analog gain by the programmable gain amplifier (PGA) in the codec, converted into a digital audio signal by the analog-to-digital converter (ADC), and then the digital audio signal is frequency-reduced by the first frequency reduction module and the second frequency reduction module in sequence, and is transmitted to the DSP in the SOC through the I2S interface and the direct memory access (DMA) in the SOC in sequence. The DSP in the SOC processes the digital audio signal, and the specific processing is not limited in the embodiments of the present application. Among them, Figure 1 The fact that the TWS headset has 4 microphones in is only an example. The number of microphones in the TWS headset can be any natural number greater than or equal to 1, which is not limited in the embodiments of the present application.
[0066] In the downstream signal transmission, the digital audio signal sent by the DSP in the SOC is transmitted to the codec through the DMA and the I2S interface in the SOC in sequence, the digital audio signal is frequency-doubled by the first frequency doubling module and the second frequency doubling module in sequence in the codec, and then is converted into an analog audio signal by the digital-to-analog converter (DAC), power-amplified by the power amplifier (PA, power amplifier), and then transmitted to the speaker for playback.
[0067] If the TWS earphone has an active noise reduction function, the codec may further include: an active noise control (ANC) module; at this time, the number of microphones in the TWS earphone is at least 2, one of which is the main microphone, and in addition, a single feedforward (FF) microphone and / or a single feedback (FB) microphone may be included. The implementation process of the active noise reduction of the TWS earphone is described as follows: As Figure 1 shown, on the one hand, the downsampled digital audio signal output by the first downsampling module is transmitted upward to the DSP in the SOC for processing. The DSP generates a control signal for the ANC module and transmits it to the ANC module through the SPI interface. The control signal generated by the DSP for the ANC module is used to control the components in the ANC module, so that the ANC module can generate an audio signal for noise reduction based on the input digital audio signal; on the other hand, the audio signal for noise reduction generated after the downsampled digital audio signal output by the first downsampling module is processed by the ANC module is superimposed with the downlink digital audio signal through a superimposer. The superimposed digital audio signal is converted into an analog audio signal through a DAC, power amplified through a PA, and then transmitted to the speaker for playback. Through the above processing, the active noise reduction function of the TWS earphone is realized.
[0068] In Figure 1 the circuit structure shown, when implementing certain functions of the TWS earphone, such as the active noise reduction function, it is necessary to transmit the audio signal collected by the microphone to the DSP in the SOC for processing, and then the DSP transmits the processing result back to the codec. This process will cause a delay in the audio signal processing of the TWS earphone. In this circuit structure, the end-to-end delay of the audio signal processing can reach dozens of milliseconds, and most of the delay is caused by the audio signal being transmitted upward to the DSP in the SOC and then being transmitted back to the codec by the DSP in the SOC.
[0069] In some embodiments, the TWS earphone has a voice wake-up function, and the codec may further include: a third downsampling module, a voice activity detection (VAD), and an audio storage module; the implementation process is described as follows: As Figure 1As shown, the analog audio signal collected by the main microphone is input to the third downsampling module for downsampling after being amplified by the PGA and converted into a digital audio signal by the ADC. The downsampled digital audio signal is respectively transmitted to the audio storage module and the VAD; the audio storage module stores the digital audio signal; the VAD performs energy detection on the digital audio signal. When the energy of the digital audio signal meets the human voice condition, it can notify the DSP in the SOC through the SPI interface in an interrupt manner; in response to this notification, the DSP reads the corresponding digital audio signal from the audio storage module, performs a primary wake-up process, and then transmits the digital audio signal to an electronic device wirelessly or wiredly connected to the TWS earphone for a secondary wake-up process.
[0070] In Figure 1 Under the shown circuit structure, to implement the voice wake-up function of the TWS earphone, it is necessary to perform energy detection through the VAD in the codec, perform a primary wake-up by the DSP in the SOC, and perform a secondary wake-up by the electronic device. The entire wake-up process requires multiple processes, involves many modules, has a long delay, and sometimes may even cause audio frame loss, resulting in the failure of the voice wake-up of the TWS earphone.
[0071] To solve the above problems, based on the TWS earphone structure shown in Figure 1 this application provides another implementation structure example of the TWS earphone, as shown in Figure 2 shown:
[0072] Add DSP resources and static random access memory (SARM) in the codec, and move the audio signal processing of the DSP in the SOC to the DSP in the codec to reduce the delay problem caused by transmitting the audio signal collected by the microphone to the DSP in the SOC and then back to the codec;
[0073] Add an edge computing module. Under the voice wake-up function, move the primary wake-up executed by the DSP in the SOC in Figure 1 to the DSP in the codec to implement, and the secondary wake-up executed by the electronic device in Figure 1 is implemented by the edge computing module.
[0074] The DSP, SRAM, and edge computing module in the codec can perform signal transmission through the Advanced High Performance Bus (AHB). To enable the connection between the DSP and the original modules in the codec through the AHB bus, an audio interface is added.
[0075] Optionally, refer to Figure 2As shown, the audio interface can not only connect the original modules in the DSP and codec through the AHB bus, but also connect the original modules in the codec and the SOC through the Advanced Peripheral Bus (APB). The embodiments of the present application do not make any limitations in this regard.
[0076] In Figure 2 the TWS earphone structure shown below:
[0077] In the uplink signal transmission, the analog audio signal collected by the microphone (mic) in the TWS earphone is transmitted to the first downsampling module after the analog gain is increased by the PGA in the codec and converted into a digital audio signal by the ADC. After the first downsampling module downsamples the digital audio signal, it is transmitted to the DSP in the codec through the audio interface. The DSP in the codec processes the digital audio signal. The specific processing is not limited in the embodiments of the present application.
[0078] In the downlink signal transmission, the digital audio signal sent by the DSP in the codec is transmitted to the DAC through the audio interface, converted into an analog audio signal by the DAC, power-amplified by the PA, and then transmitted to the speaker for playback.
[0079] In this TWS earphone structure, the implementation process of active noise cancellation is described as follows: As Figure 2 shown, on the one hand, the downsampled digital audio signal output by the first downsampling module is downsampled again by the second downsampling module and then transmitted to the DSP in the codec through the audio interface for processing. The DSP generates the control signal of the ANC module and transmits it to the ANC module through the audio interface. The control signal of the ANC module generated by the DSP is used to control the components in the ANC module, so that the ANC module can generate the audio signal for noise cancellation based on the input digital audio signal; on the other hand, the audio signal for noise cancellation obtained after the downsampled digital audio signal output by the first downsampling module is processed by the ANC module is superimposed with the downlink digital audio signal through the superimposer. The superimposed digital audio signal is converted into an analog audio signal by the DAC, power-amplified by the PA, and then transmitted to the speaker for playback. Through the above processing, the active noise cancellation function of the TWS earphone is completed.
[0080] Compared with Figure 1 it can be seen that Figure 2 in the TWS earphone structure shown, when implementing active noise cancellation, there is no need to interact with the SOC, and high-speed audio signal transmission is achieved through the AHB bus, thereby reducing the latency of audio signal processing such as active noise cancellation in the TWS earphone.
[0081] Under the structure of this TWS headset, the implementation process of voice wake-up is described as follows: Different from Figure 1 the process shown, Figure 2 in Figure 2 , VAD performs energy detection on the digital audio signal. After detecting that the energy of the digital audio signal meets the human voice condition, it notifies the DSP in the codec through the audio interface; in response to this notification, the DSP reads the corresponding digital audio signal from the audio storage module, performs primary wake-up processing, and then transmits the digital audio signal to the edge computing module for secondary wake-up processing.
[0082] In Figure 2 the TWS headset structure shown, there is no need to transmit the digital audio signal to the SOC and the electronic device, and the voice wake-up process of the TWS headset can be completed in the codec, realizing the voice wake-up of the TWS headset and reducing the latency of the voice wake-up of the TWS headset.
[0083] Among them, the edge computing module can be implemented by a neural network (NN) chip, an embedded neural network processor (NPU) chip, a memory and computing integrated unit, etc.
[0084] It should be noted that the DSP in the above Figure 1 、 Figure 2 can also be replaced by an Advanced RISC Machine (ARM), a microcontroller unit (MCU), or a field-programmable gate array (FPGA), etc., which is not limited in this application.
[0085] The above Figure 1 and Figure 2 show a TWS headset with 1 speaker. Figure 1 (Or Figure 2 ) The microphones 1 to 4 in Figure 1 (Or Figure 2 ) can form a group of microphones and serve as Figure 1 (Or Figure 2 ) the corresponding group of microphones for the speaker. If the TWS headset shown in the above Figure 1 and Figure 2 is extended to a headset with 2 speakers such as a head-mounted headset or a neck-worn headset, the headset structure will include 2 speakers, and each speaker corresponds to a group of microphones. At this time, the headset structures are respectively as shown in Figure 3 and Figure 4 shown. In Figure 3 and Figure 4 , still taking one speaker corresponding to 4 microphones as an example, Figure 3 and Figure 1 、 Figure 4 and Figure 2The main differences are as follows:
[0086] The earphone includes 2 speakers, namely speaker 1 and speaker 2. Speaker 1 corresponds to a group of microphones 11 to 14, and speaker 2 corresponds to a group of microphones 21 to 24; a group of microphones corresponds to one first down-conversion module.
[0087] The analog audio signal collected by each microphone is successively amplified by PGA to increase the analog gain, converted into a digital audio signal by ADC, and then transmitted to the corresponding first down-conversion module; correspondingly, the uplink signal transmission includes 2 uplink audio signals, namely 1 digital audio signal output by the first down-conversion module 1 and 1 digital audio signal output by the first down-conversion module 2; a routing module is added to the uplink signal transmission path to route the 2 uplink audio signals to the ANC module and / or the second down-conversion module.
[0088] The downlink signal transmission also includes 2 audio signals, namely 1 downlink audio signal corresponding to speaker 1 and 1 downlink audio signal corresponding to speaker 2; in Figure 3 Among them, the 1 downlink audio signal corresponding to speaker 1 is frequency-doubled by the first frequency-doubling module, and then successively passes through the second frequency-doubling processing module 1, DAC1, and PA1 and is transmitted to speaker 1. The 1 downlink audio signal corresponding to speaker 2 is frequency-doubled by the first frequency-doubling module, and then successively passes through the second frequency-doubling processing module 2, DAC2, and PA2 and is transmitted to speaker 2;
[0089] In an implementation process of the active noise cancellation of the earphone, one down-converted digital audio signal output by the first down-conversion module 1 and one down-converted digital audio signal output by the first down-conversion module 2 are respectively routed by the routing module to the ANC module; the ANC module can generate an audio signal for noise cancellation according to the digital audio signal output by the first down-conversion module 1 and input it to the adder 1 to be superimposed with the 1 downlink audio signal corresponding to speaker 1; the ANC module can generate an audio signal for noise cancellation according to the digital audio signal output by the first down-conversion module 2 and input it to the adder 2 to be superimposed with the 1 downlink audio signal corresponding to speaker 2. That is to say, the ANC module can perform noise cancellation on the speaker 1 side based on the audio signals collected by the group of microphones 11 to 14 corresponding to speaker 1, and perform noise cancellation on the speaker 2 side based on the audio signals collected by the group of microphones 21 to 23 corresponding to speaker 2. The specific data transmission process can refer to the corresponding description in Figures 1 - 2 and will not be elaborated here.
[0090] For Figures 1 - 4 the earphone structure shown, reducing the chip area and power consumption on the earphone is still an important issue in the development of earphones. Especially Figure 2 and Figure 4In the codec shown, multiple modules are added, which have a great impact on the chip area and power consumption of the codec chip and thus the headphone chip. Reducing the chip area and power consumption of the codec chip has become a very urgent and important issue. Since the main means of improving the chip area and power consumption on current headphones lies in the process improvement of the digital part, the analog part of the codec cannot effectively synchronize the process improvement and still maintains an older process, which to a certain extent limits the improvement of the chip area and power consumption on the headphone. Therefore, the embodiments of this application provide a codec that, for example, in the headphone Figures 1 - 4 separates the analog part of the codec in the shown headphone from the codec to solve the problem of large chip area and high power consumption of the codec chip caused by the inability of the analog part in the codec to effectively synchronize the process improvement, reduce the chip area and power consumption of the codec, and thus reduce the chip area and power consumption of the headphone.
[0091] It should be noted that the codec provided by the embodiments of this application can be applied not only to Figures 1 - 4 the shown headphone, but also to other headphones with a codec. The embodiments of this application will not elaborate one by one. The following Figures 5 - 7 embodiment still takes the codec connected to a speaker as an example.
[0092] Figure 5 This is a structural schematic diagram of a codec provided by the embodiments of this application. In Figure 5 it, the DAC part is separated from the codec. Specifically, as Figure 5 shown:
[0093] The input end of the audio processing module 51 receives a first digital audio signal, which is a digital audio signal obtained by analog-to-digital conversion and downsampling of the analog audio signal collected by the microphone; the output end of the audio processing module 51 is connected to the first input end of the adder 52; the audio processing module 51 is used to perform the processing indicated by the control signal on the first digital audio signal and output the processed second digital audio signal to the adder 52 through the output end of the audio processing module 51. Among them, the processing indicated by the control signal includes but is not limited to: ANC, hear through, and HT. Since the audio processing module 51 processes the first digital audio signal, and the first digital audio signal is a digital audio signal obtained by performing a series of processes on the analog audio signal collected by the microphone, and the microphone generally collects the sound in the environment around the speaker, the second digital audio signal output by the audio processing module 51 can also be called: environment-related audio signal.
[0094] The second input terminal of the superimposer 52 receives the downlink digital audio signal, and the output terminal of the superimposer 52 is connected to the input terminal of the frequency doubling module 54; the superimposer 52 is used for superimposing the second digital audio signal and the downlink digital audio signal, and outputs the third digital audio signal obtained after the superimposing process to the frequency doubling module 54 through the output terminal of the superimposer 52.
[0095] The output terminal of the frequency doubling module 54 is connected to the audio signal transmission interface 55. The frequency doubling module 54 is used for performing frequency doubling processing on the third digital audio signal by a preset multiple, and transmitting the processed fourth digital audio signal to the audio signal transmission interface 55. By using the frequency doubling module to perform frequency doubling processing on the third digital audio signal, the frequency of the third digital audio signal can be increased to 192 Khz, or 384 Khz or even higher, so that the transmission speed of the digital audio signal is higher.
[0096] Optionally, the audio signal transmission interface 55 can be implemented through an I2S interface or a time-division multiplexing (TDM) interface, etc. The I2S or TDM interface can support the transmission of digital audio signals with a frequency of 192 Khz, or 384 Khz or even higher.
[0097] Among them, the output terminal of the frequency doubling module 54 can be connected to the pin for transmitting the output signal in the I2S interface. The I2S interface has implementation forms such as 3-wire and 4-wire, and the signals transmitted by each pin can have different definitions under different implementation forms. For example, if the I2S interface is implemented as a 3-wire I2S interface, the 3-wire I2S interface can have a pin for transmitting the serial clock SCK, a pin for transmitting the frame clock WS, and a pin for transmitting the serial data signal SD, and the output terminal of the frequency doubling module 54 can be connected to the pin for transmitting the serial data signal SD in the 3-wire I2S interface; or, if the I2S interface is implemented as a 4-wire I2S interface, the 4-wire I2S interface can have a pin for transmitting the serial clock SCK, a pin for transmitting the frame clock WS, a pin for outputting the audio signal, and a pin for receiving the feedback signal, and the output terminal of the frequency doubling module 54 can be connected to the pin for outputting the audio signal in the 4-wire I2S interface.
[0098] In Figure 5 In the shown codec structure, it is necessary to set a digital PA with an audio signal transmission interface that matches the audio signal transmission interface of the codec for the earphone. The output terminal of the digital PA with the audio signal transmission interface is connected to the speaker of the earphone to ensure the normal operation of the earphone. For example, assuming Figure 5 In the shown codec structure, if the audio signal transmission interface is implemented through the I2S interface, it is necessary to configure a digital PA with an I2S interface for the codec; assumingFigure 5 In the codec structure shown, if the audio signal transmission interface is implemented through the TDM interface, a digital PA with a TDM interface needs to be configured for the codec.
[0099] Different from Figure 5 the codec structure shown, in Figure 6 the codec structure shown also includes: a path selection module 53; specifically,
[0100] The frequency doubling module 54 includes n frequency doubling sub-modules, where n is a natural number. The n frequency doubling sub-modules are connected in series in sequence. The output end of the nth frequency doubling sub-module is connected to the output end of the frequency doubling module 54, and the output end of the frequency doubling module 54 is connected to the first input end of the path selection module 53. The frequency doubling sub-module is used to perform frequency doubling processing on the input audio signal.
[0101] Optionally, as Figure 6 shown, the output end of the superimposer 52 can be connected to the second input end of the path selection module 53.
[0102] Optionally, when n is greater than or equal to 2, the path selection module 53 can also include m input ends, where m is greater than or equal to 1 and less than or equal to n - 1. The m input ends are respectively connected to the output ends of one of the frequency doubling sub-modules from the 1st frequency doubling sub-module to the (n - 1)th frequency doubling sub-module, and the output ends of the frequency doubling sub-modules connected to different input ends are different. For example, in Figure 6 , taking m = n - 1 as an example, that is, each input end of the path selection module 53 except the second input end is respectively connected to the output end of a frequency doubling sub-module.
[0103] The path selection module 53 is used to select one input end from the input ends of the path selection module 53 to form a path with the output end of the path selection module 53, and transmit the digital audio signal received by the selected one input end to the output end of the path selection module 53; the output end of the path selection module 53 is connected to the audio signal transmission interface 55.
[0104] Among them, the output end of the path selection module 53 can be connected to the pin for transmitting the output signal in the I2S interface.
[0105] Different from Figure 6 the codec structure shown that separates the DAC from the codec, in Figure 7In the codec structure shown, the original DAC structure in the codec is retained. Specifically, the path selection module 53 has two output terminals. The first output terminal is connected to the audio signal transmission interface 55, the second output terminal is connected to the input terminal of the DAC, the output terminal of the DAC is connected to the input terminal of the PA, and the output terminal of the PA is used to connect to the speaker; the path selection module 53 is used to select one input terminal from the input terminals of the path selection module 53 and one output terminal from the output terminals of the path selection module 53, form a path between the selected input terminal and the output terminal, and transmit the digital audio signal received by the selected input terminal to the selected output terminal through this path. Figure 7 The codec structure shown has more possibilities for path selection without considering the codec chip area and power consumption. It can be applied to both headphones using digital PAs and headphones using analog speakers, and has a wider range of usage scenarios.
[0106] Above Figures 5 - 7 The codec structure shown can also be extended to a codec structure connected to two speakers. For example Figure 3 and Figure 4 In the codec shown, the DACs corresponding to the two speakers are separated from the codec respectively. The codec structure after the DAC corresponding to each speaker is separated from the codec can refer to Figures 5 - 7 The codec structure shown is implemented. Taking Figure 4 In the codec structure shown as an example, after separating the DAC from the codec with reference to Figure 5 the structure shown, the codec structure is as Figure 8 shown. At this time, the two output terminals of the audio processing module 51 are respectively connected to the first input terminal of the adder 1 and the first input terminal of the adder 2; the second input terminal of the adder 1 receives the downstream digital audio signal 1 corresponding to the speaker 1, and the second input terminal of the adder 2 receives the downstream digital audio signal 2 corresponding to the speaker 2. Other connection relationships can refer to Figure 5 the corresponding description in
[0107] Different from Figures 5 - 8 using an analog microphone in the codec structure shown, in another codec structure of the embodiment of the present application, the ADC in the codec can be separated from the codec, and a pulse density modulation (PDM) interface is set. Correspondingly, the microphone is changed from Figures 5 - 8 the analog microphone shown to a digital microphone with a PDM interface, thereby further reducing the codec chip area and power consumption. One PDM interface can be connected to one digital microphone or two digital microphones. For example Figure 9The codec structure shown, taking Figure 5 the case where the ADC is separated from the codec by the codec structure shown, and taking the setting of 2 PDMs as an example. At this time, the input ends of the first downsampling module are respectively connected to the corresponding PDM interfaces 1-2, and the PDM interfaces 1-2 are respectively connected to the digital microphones 1-4 with PDM interfaces. It should be noted that Figure 4 taking the example of setting 2 PDM interfaces in the codec and correspondingly connecting 4 digital microphones in Figure 4 is only an example and is not intended to limit the number of PDM interfaces and digital microphones set in the codec. The number of PDM interfaces and the corresponding digital microphones set in the codec can be any value greater than or equal to 1, which is not limited in the embodiments of the present application. Figure 6 and Figure 7 For the specific implementation structure after the ADC is separated from the codec by the codec structure shown, reference can be made to Figure 8 , which will not be listed one by one here.
[0108] In the embodiments of the present application, "at least one" means one or more, and "a plurality" means two or more. "And / or" describes the association relationship of associated objects and indicates that three relationships can exist. For example, A and / or B can represent the situation where A exists alone, A and B exist simultaneously, and B exists alone. Where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the front and rear associated objects. "At least one of the following" and its similar expressions refer to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, and c can represent: a, b, c, a and b, a and c, b and c, or a and b and c, where a, b, and c can be single or multiple.
[0109] Those of ordinary skill in the art can realize that the units and algorithm steps described in the embodiments disclosed herein can be implemented by a combination of electronic hardware, computer software, and electronic hardware. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present application.
[0110] In several embodiments provided by the present application, if any function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present application. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks, or optical discs.
[0111] As described above, the foregoing is only the specific implementation manner of the present application. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present application, and all such changes or substitutions should be covered by the protection scope of the present application. The protection scope of the present application shall be subject to the protection scope of the claims.
Claims
1. A codec for use in a headset, characterized in that, The earphone includes a codec, a digital-to-analog converter, a digital power amplifier PA, and a digital microphone. The codec includes: a frequency doubling module, an audio signal transmission interface, and a pulse density modulation interface; wherein, The output end of the frequency doubling module is connected to the first pin of the audio signal transmission interface; The input end of the frequency doubling module receives a first downlink digital audio signal, performs frequency doubling processing on the first downlink digital audio signal, and outputs a second downlink digital audio signal obtained after the frequency doubling processing; the first downlink digital audio signal is a signal obtained by superimposing a downlink digital audio signal and an environment-related audio signal; The first pin of the audio signal transmission interface is used to transmit the second downlink digital audio signal; The pulse density modulation interface is used to connect to the digital microphone.
2. The codec according to claim 1, characterized in that, The audio signal transmission interface is an integrated circuit built-in audio I2S interface or a time division multiplexing TDM interface.
3. The codec according to claim 1, wherein The output end of the frequency doubling module is connected to the first pin of the audio signal transmission interface, including: the output end of the frequency doubling module is connected to the first input end of a path selection module, and the first output end of the path selection module is connected to the first pin of the audio signal transmission interface; the path selection module is used to: when selecting a path formed by the first input end and the first output end, transmit the second downlink digital audio signal received by the first input end to the first output end.
4. The codec according to claim 3, characterized in that, It further includes: The second input end of the path selection module receives the first downlink digital audio signal; The path selection module is further used to: when selecting a path formed by the second input end and the first output end, transmit the first downlink digital audio signal received by the second input end to the first output end.
5. The codec according to claim 3, characterized in that, It further includes: The frequency doubling module includes n frequency doubling sub-modules, where n is a natural number greater than or equal to 2. The n frequency doubling sub-modules are connected in series in sequence. The output end of the nth frequency doubling sub-module is connected to the output end of the frequency doubling module. The output ends of the first to the n-1th frequency doubling sub-modules are respectively connected to the third input end to the n+1th input end of the path selection module; The path selection module is further used to: when selecting a path formed by one of the third input end to the n+1th input end and the first output end, transmit the digital audio signal received by the selected one input end to the first output end.
6. The codec according to claim 3, characterized in that, It further includes: The second output end of the path selection module is connected to the digital power amplifier PA through the digital-to-analog converter; The path selection module is further used to: when selecting a path formed by one input end and the second output end, transmit the digital audio signal received by the selected one input end to the digital-to-analog converter.
7. The codec according to claim 1, wherein The environment-related audio signal is a digital audio signal obtained after the digital audio signal collected by the digital microphone is subjected to frequency reduction processing and specified audio processing.
8. The codec according to claim 7, characterized in that, The specified audio processing includes: active noise cancellation control, or voice passthrough, or voice enhancement.
9. The codec according to any one of claims 1 to 8, characterized in that The audio signal transmission interface is used to connect to a digital power amplifier PA, and the digital power amplifier PA has an audio signal transmission interface that matches the audio signal transmission interface of the codec.
10. An earphone, characterized in that, It includes: a codec, a digital power amplifier PA, and a speaker and a digital microphone; wherein, the codec includes: a frequency doubling module, an audio signal transmission interface, and a pulse density modulation interface; wherein, the output end of the frequency doubling module is connected to the first pin of the audio signal transmission interface; the input end of the frequency doubling module receives a first downlink digital audio signal, performs frequency doubling processing on the first downlink digital audio signal, and outputs a second downlink digital audio signal obtained after the frequency doubling processing; the first downlink digital audio signal is a signal obtained by superimposing a downlink digital audio signal and an environment-related audio signal; the first pin of the audio signal transmission interface is used to transmit the second downlink digital audio signal; the pulse density modulation interface is used to connect to the digital microphone; The digital power amplifier PA has an audio signal transmission interface that matches the audio signal transmission interface of the codec, and the audio signal transmission interface of the codec is connected to the audio signal transmission interface of the digital power amplifier PA; the output end of the digital power amplifier PA is connected to the speaker.
11. The earphone according to claim 10, wherein Both the audio signal transmission interface of the codec and the audio signal transmission interface of the digital power amplifier PA are integrated circuit built-in audio I2S interfaces; or, both the audio signal transmission interface of the codec and the audio signal transmission interface of the digital power amplifier PA are time division multiplexing TDM interfaces.
12. The earphone according to claim 10, wherein The output end of the frequency doubling module is connected to the first pin of the audio signal transmission interface, including: the output end of the frequency doubling module is connected to the first input end of a path selection module, and the first output end of the path selection module is connected to the first pin of the audio signal transmission interface; the path selection module is used to: when selecting a path formed by the first input end and the first output end, transmit the second downlink digital audio signal received by the first input end to the first output end.
13. The earphone according to claim 12, characterized in that, The codec further includes: the second input end of the path selection module receives the first downlink digital audio signal; The path selection module is further used to: when selecting a path formed by the second input end and the first output end, transmit the first downlink digital audio signal received by the second input end to the first output end.
14. The earphone according to claim 12, wherein The codec further includes: The frequency doubling module includes n frequency doubling sub-modules, where n is a natural number greater than or equal to 2, the n frequency doubling sub-modules are connected in series in sequence, the output end of the nth frequency doubling sub-module is connected to the output end of the frequency doubling module, and the output ends of the first to the n-1th frequency doubling sub-modules are respectively connected to the third input end to the n+1th input end of the path selection module; When the path selection module is further configured to: when forming a path between one input terminal among the third input terminal to the (n + 1)-th input terminal and the first output terminal, transmit the digital audio signal received by the selected one input terminal to the first output terminal.
15. The earphone according to claim 12, characterized in that, The codec further includes: The second output terminal of the path selection module is connected to the digital power amplifier PA through a digital-to-analog converter; When the path selection module is further configured to: when forming a path between one input terminal and the second output terminal, transmit the digital audio signal received by the selected one input terminal to the digital-to-analog converter.
16. The earphone according to any one of claims 10 to 15, characterized in that The environment-related audio signal is a digital audio signal obtained by subjecting the digital audio signal collected by the digital microphone to downsampling processing and specified audio processing, and the digital microphone is disposed outside the codec.
17. The earphone according to claim 16, characterized in that, The specified audio processing includes: active noise cancellation control, or voice passthrough, or voice enhancement.
Citation Information
Patent Citations
Mobile terminal and method of reducing audio frequency noise
CN105959874A