Integrated circuit and signal transmission method thereof

Abstract

The present invention provides an integrated circuit and a signal transmission method thereof, wherein the integrated circuit includes a first power domain, a second power domain, and a weak pull circuit. The first power domain is powered by a first power supply, the second power domain is powered by a second power supply, and the second power domain transmits a signal to the first power domain through a transmission path. The weak pull circuit signal is connected to the transmission path, and when the second power domain is in a power-off mode, the weak pull circuit stably maintains the transmission path at a logic level to prevent unknown signals from entering the first power domain from the second power domain and interfering with the normal operation of the first power domain.

Description

Technical Field

[0001] This case relates to a signal transmission technology between different power domains of an integrated circuit (IC), and more particularly to an integrated circuit and a signal transmission method thereof. Background Art

[0002] In the operation of integrated circuits, in order to reduce energy consumption, the integrated circuits are usually divided into several power domains, and some unused power domains in the system are turned off. Therefore, at the same time point, there will be a first power domain in power mode, and another second power domain will be in non-power (power-off) mode. However, when the second power domain is powered off, in order to prevent unknown signals (noise) from entering the first power domain from the second power domain and interfering with the logical operation in the first power domain, the prior art provides an isolation cell between the first power domain and the second power domain to prevent different power domains from interfering with each other. However, when the integrated circuit itself cannot grasp the power-off time and cannot enable the isolation cell at the correct time, enabling it too early will cause the signals between the first power domain and the second power domain to be unable to communicate, and enabling it too late will cause unknown signals to interfere with the first power domain, causing the isolation cell to lose its function. Summary of the invention

[0003] In view of this, the present invention proposes an integrated circuit, including a first power domain, a second power domain and a weak pull circuit. The first power domain is powered by a first power supply, the second power domain is powered by a second power supply, and the second power domain transmits a signal to the first power domain through a transmission path. The weak pull circuit signal is connected to the transmission path, and when the second power domain is in a power-off mode, the weak pull circuit stably maintains the transmission path at a logic level.

[0004] The present invention also proposes a signal transmission method, which is applicable to an integrated circuit, the integrated circuit including a first power domain and a second power domain. The signal transmission method includes: the first power supply supplies power to the first power domain, and the second power supply supplies power to the second power domain; the second power domain transmits a signal to the first power domain through a transmission path; and when the second power domain is in a power-off mode, a weak pull circuit stably maintains the transmission path at a logic level.

[0005] According to some embodiments, the first power domain has a first connection pad, the second power domain has a second connection pad, and the second connection pad is electrically connected to the first connection pad to form a transmission path.

[0006] According to some embodiments, the weak pull circuit is located in the first power domain and is electrically connected to the first connection pad or the transmission path.

[0007] According to some embodiments, the weak pull circuit is a weak pull high circuit or a weak pull low circuit. When the weak pull circuit is a weak pull low circuit, the logic level is a low logic level; and when the weak pull circuit is a weak pull high circuit, the logic level is a high logic level.

[0008] According to some embodiments, the first power domain is in a power mode, and the second power domain is in a power mode or a power-off mode.

[0009] According to some embodiments, the first power source and the second power source are the same power source.

[0010] In summary, the present invention directly designs the circuit inside the integrated circuit, so as to utilize the weak pull circuit to stably maintain the transmission path at a logic level when one power domain is powered off, so as to prevent unknown signals (including noise) from entering the other power domain and interfering with its logic operation, so as to maintain the normal operation of the integrated circuit itself. Therefore, the present invention does not need to use an isolation unit, so there is no need for a cumbersome isolation setting process and there is no need to know the power-off time in advance. Even if one power domain is subject to a sudden power-off event, it will not affect the logic operation of the other power domain. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 FIG. 4 is a block diagram of an integrated circuit according to an embodiment of the present invention.

[0012] Figure 2 FIG. 4 is a flow chart of a signal transmission method according to an embodiment of the present invention.

[0013] Figure 3 FIG. 4 is a block diagram of an integrated circuit according to another embodiment of the present invention.

[0014] Figure 4 It is a practical circuit diagram of a universal input and output circuit used in this case.

[0015] Figure 5 FIG. 4 is a block diagram of an integrated circuit according to another embodiment of the present invention. DETAILED DESCRIPTION

[0016] The integrated circuit and signal transmission method provided in this case are applicable to an integrated circuit having at least two power domains, and by utilizing the technology of this case, the two power domains in the integrated circuit will not interfere with each other when power is cut off, so as to maintain the basic operation of the integrated circuit itself.

[0017] Figure 1 FIG. 1 is a block diagram of an integrated circuit according to an embodiment of the present invention. Figure 1As shown, an integrated circuit 10 includes a first power domain 12, a second power domain 14 and a weakly pull circuit 16. In this embodiment, two power domains 12 and 14 are used as examples, but the present invention is not limited thereto. In one embodiment, the first power domain 12 and the second power domain 14 can be processing units, modules, circuits, parts of circuits, or any combination of different circuits. For example, if the first power domain 12 is a small central processing unit related to wake-up, such as an 8051 processor, then the second power domain 14 can be a large central processing unit that handles the main functions, such as an ARM processor.

[0018] like Figure 1 As shown, in this integrated circuit, the first power domain 12 is powered by a first power supply 18, and the second power domain 14 is powered by a second power supply 20. The first power domain 12 is in a power on mode, so that the circuits or components in the first power domain 12 are powered normally and operate. The second power domain 14 can be in a power mode or a power off mode, so that the second power domain 14 is sometimes powered normally and operates in the power mode, and sometimes is not powered in the power off mode, so as to achieve the purpose of power saving. A signal is transmitted between the first power domain 12 and the second power domain 14 through a transmission path 22, so that the signal can be transmitted from the second power domain 14 to the first power domain 12 through the transmission path 22. The weak pull circuit 16 is located in the first power domain 12, and the signal is connected to the transmission path 22. In a normal working state, the first power domain 12 and the second power domain 14 are both in a power supply mode, so that the circuits or components in the first power domain 12 and the second power domain 14 are powered normally and operate, and at this time, the second power domain 14 can transmit signals to the first power domain 12 through the transmission path 22. In a power saving state (such as a standby state), the first power domain 12 is still maintained in the power supply mode, and the second power supply 20 stops supplying power to the second power domain 14, so that the second power domain 14 is in a power-off mode. At this time, the weak pull circuit 16 can stably maintain the transmission path 22 at a logic level, and because the signals on the transmission path 22 are maintained at a logic level, the unknown signals (including noise) that may be generated by the powered-off second power domain 14 cannot pass through the transmission path 22 and enter the first power domain 12, so as to maintain the normal logic operation of the first power domain 12 itself without being disturbed by the powered-off second power domain 14.

[0019] In one embodiment, the weak pull circuit 16 is a weak pull-high circuit or a weak pull-low circuit. When the weak pull circuit 16 is a weak pull-low circuit, the logic level of the transmission path 22 is maintained at a low logic level, which is 0; when the weak pull circuit 16 is a weak pull-high circuit, the logic level of the transmission path 22 is maintained at a high logic level, which is 1.

[0020] Figure 2 FIG. 1 is a flow chart of a signal transmission method according to an embodiment of the present invention. Please also refer to FIG. Figure 1 and Figure 2 As shown, the steps of the method for signal transmission of the integrated circuit 10 include steps S10 to S14. First, as shown in step S10, the first power supply 18 supplies power to the first power domain 12, and the second power supply 20 also supplies power to the second power domain 14, so that the circuits or components in the first power domain 12 and the second power domain 14 can all operate normally. Since the first power domain 12 and the second power domain 14 are both in the power supply mode, as shown in step S12, the second power domain 14 transmits a signal to the first power domain 12 through the transmission path 22. As shown in step S14, when the second power supply 20 stops supplying power to the second power domain 14, so that the second power domain 14 is in the power-off mode, the transmission path 22 can be stably maintained at a high logic level or a low logic level through the weak pull circuit 16 to prevent unknown signals from entering the first power domain 12.

[0021] In another embodiment, see Figure 3As shown, the integrated circuit 10 has a first power domain 12 and a second power domain 14 adjacent to each other, the first power domain 12 has a first connection pad 24, the second power domain 14 has a second connection pad 26, and the second connection pad 26 is electrically connected to the first connection pad 24 through a connection line to form a transmission path 22. The weak pull circuit 16 is also located in the first power domain 12, and is electrically connected to the first connection pad 24, so as to connect the transmission path 22 through the first connection pad 24 signal. Under normal working conditions, the first power domain 12 and the second power domain 14 are both in the power supply mode, so that the circuits or components in the first power domain 12 and the second power domain 14 operate due to normal power supply, and at this time, the second power domain 14 can transmit signals to the first power domain 12 through the second connection pad 26, the transmission path 22, and the first connection pad 24 in sequence. In the power saving state (such as the standby state), the first power domain 12 remains in the power supply mode, and the second power supply 20 stops supplying power to the second power domain 14, so that the second power domain 14 is in the power-off mode. At this time, the weak pull circuit 16 can stably maintain the transmission path 22 at a logic level through the first connection pad 24, and because the signals on the transmission path 22 are maintained at a logic level, the unknown signals that may be generated by the powered-off second power domain 14 cannot pass through the transmission path 22 and enter the first power domain 12, so as to maintain the normal logical operation of the first power domain 12 itself, so that the first power domain 12 will not be disturbed by the powered-off second power domain 14.

[0022] In the aforementioned embodiment, if Figure 1 and Figure 3 As shown, the first power supply 18 and the second power supply 20 are different power supplies. The different power supplies referred to herein mean that the first power supply 18 and the second power supply 20 can be independently controlled or come from different power supply terminals, and these power supplies (the first power supply 18 and the second power supply 20) can have output voltages of the same voltage level or output voltages of different voltage levels. In another embodiment, the first power supply 18 and the second power supply 20 can be the same power supply. In this case, a switch (not shown) can be provided between the second power supply 20 and the second power domain 14 to cut off the power supply to the second power domain 14.

[0023] In one embodiment, the weak pull circuit 16 can be any electronic circuit that can maintain a high logic level or a low logic level of the transmission path. Figure 4As shown, a general purpose input-output circuit (GPIO circuit) 30 includes an output buffer 31, an input buffer 32, two diodes 33 and 34 connected in series, a resistor 35, a P-type metal oxide semiconductor (PMOS) transistor 36, an N-type metal oxide semiconductor (NMOS) transistor 37, and an input-output pin (IO pad) 38. The input-output pin 38 is electrically connected to the output buffer 31, the input buffer 32, the diode 33, the diode 34, and the resistor 35, and the resistor 35 is electrically connected between the P-type metal oxide semiconductor transistor 36 and the N-type metal oxide semiconductor transistor 37. The output buffer 31 is used to increase the output thrust; the input buffer 32 is used to increase the input thrust; the diode 33 and the diode 34 can solve the electrostatic discharge (ESD) and over-electrical stress (EOS) problems, the diode 33 can prevent the high voltage signal from entering from the input and output pin 38, and the diode 34 can prevent the low voltage signal from entering from the input and output pin 38; the universal input and output circuit 30 actively pulls up or down the level from the input and output pin 38 in the push-pull mode, and in the push-pull mode, the current is allowed to flow through the resistor 35 to the P-type metal oxide semiconductor transistor 36 and the N-type metal oxide semiconductor transistor 37, so as to pull up the level faster through the P-type metal oxide semiconductor transistor 36, or pull down the level faster through the N-type metal oxide semiconductor transistor 37.

[0024] Please also see Figure 1 , Figure 3 and Figure 4 As shown, since the transmission path 22 between the second power domain 14 and the first power domain 12 of the present case is unidirectional, the general-purpose input-output circuit 30 can be set as a general-purpose output (GPO) circuit used in the second power domain 14 or a general-purpose input (GPI) circuit used in the first power domain 12, and the general-purpose input-output circuit 30 in the first power domain 12 is used as a weak pull circuit 16. The general-purpose input-output circuit 30 is an analog circuit, which is controlled by the internal digital logic of the first power domain 12 or the second power domain 14.

[0025] Please also see Figure 4 and Figure 5 As shown, a universal input-output circuit 30 is provided in the first power domain 12 and is set as a universal input circuit 30', and the universal input circuit 30' receives power from the first power supply 18. The universal input circuit 30' can be used as Figure 1 or Figure 3The weak pull circuit 16 is shown. Another universal input-output circuit 30 is provided in the second power domain 14, and is set as a universal output circuit 30", and the universal output circuit 30" receives power from the second power supply 20. In the universal input-output circuit 30, an enable signal out_en is output by digital logic to the universal input-output circuit 30 to determine whether the universal input-output circuit 30 is used as a universal input circuit 30' or a universal output circuit 30". For example, the digital logic inside the first power domain 12 outputs the enable signal out_en as 0 to the universal input-output circuit 30 located in the first power domain 12 to set it as the universal input circuit 30'; the digital logic inside the second power domain 14 outputs the enable signal out_en as 1 to the universal input-output circuit 30 located in the second power domain 14 to set it as the universal output circuit 30". In the normal working state (normal power supply), the output data out_data to be output by the second power domain 14 will be transmitted to the first power domain 12 through the output buffer 31 and the input-output pin 38 in the universal output circuit 30 ″ through the transmission path 22, and the first power domain 12 will receive the aforementioned output data out_data through the input-output pin 38 and the input buffer 32 in the universal input circuit 30 ′ as the input data in_data of the first power domain 12. In the power saving state, the first power domain 12 is still maintained in the power supply mode, and the second power supply 20 stops supplying power to the second power domain 14, so that the second power domain 14 is in the power-off mode. At this time, the universal input circuit 30 ′ can be weakly pulled down (weakly pull The transmission path 22 is stably maintained at a low logic level through the input / output pin 38. Therefore, when the second power domain 14 is in the power-off mode without any driver, the input / output pin 38 located in the first power domain 12 will be pulled up to the power source Vin or pulled down to the ground GND according to the actual circuit to pull up the level to stably maintain the transmission path 22 at a high logic level or pull down the level to stably maintain the transmission path 22 at a low logic level, thereby preventing unknown signals from entering the first power domain 12 from the second power domain 14 and interfering with the normal operation of the first power domain 12.

[0026] Therefore, the present invention directly designs the circuit inside the integrated circuit to utilize the weak pull circuit to stably maintain the transmission path at a logic level when one power domain is powered off, so as to prevent the power domain from having unknown signals (including noise) entering the other power domain and interfering with its logic operation, so as to maintain the normal operation of the integrated circuit itself. Therefore, the present invention does not need to use an isolation unit, so there is no need for a cumbersome isolation setting process and there is no need to know the power-off time in advance. Even if one power domain is subject to a sudden power-off event, it will not affect the logic operation of the other power domain.

[0027] The embodiments described above are only for illustrating the technical ideas and features of the present invention. Their purpose is to enable those familiar with the technology to understand the content of the present invention and implement it accordingly. They cannot be used to limit the patent scope of the present invention. In other words, any equivalent changes or modifications made according to the spirit disclosed in the present invention should still be included in the patent scope of the present invention.

[0028]

Explanation of symbols

[0029] 10: Integrated Circuits

[0030] 12: First power domain

[0031] 14: Second power domain

[0032] 16: Weak pull circuit

[0033] 18: First Power Source

[0034] 20: Second power supply

[0035] 22: Transmission path

[0036] 24: First connection pad

[0037] 26: Second connection pad

[0038] 30: General input and output circuit

[0039] 30': Universal input circuit

[0040] 30”: General purpose output circuit

[0041] 31: Output buffer

[0042] 32: Input buffer

[0043] 33: Diode

[0044] 34: Diode

[0045] 35: Resistance

[0046] 36: P-type metal oxide semiconductor transistor

[0047] 37: N-type metal oxide semiconductor transistor

[0048] 38: Input and output pins

[0049] S10~S14: Steps

[0050] in_data: input data

[0051] out_en: enable signal

[0052] out_data: output data

[0053] Vin: power supply

[0054] GND: Ground

Claims

1. An integrated circuit, comprising: A first power domain, which is powered by a first power supply; A second power domain, which is powered by a second power supply, and the second power domain transmits a signal to the first power domain through a transmission path; as well as A weak pull circuit, whose signal is connected to the transmission path, is used to stably maintain the transmission path at a logic level when the first power domain is in a power supply mode and the second power domain is in a power-off mode. 2 . The integrated circuit as claimed in claim 1 , wherein the first power domain has a first connection pad, the second power domain has a second connection pad, and the second connection pad is electrically connected to the first connection pad to form the transmission path. 3 . The integrated circuit as claimed in claim 2 , wherein the weak pull-up circuit is located in the first power domain and is electrically connected to the first connection pad. 4 . The integrated circuit as claimed in claim 1 , wherein the weak pull circuit is a weak pull-high circuit or a weak pull-low circuit. 5 . The integrated circuit as claimed in claim 4 , wherein when the weak pull circuit is the weak pull-low circuit, the logic level is a low logic level. 6 . The integrated circuit as claimed in claim 4 , wherein when the weak pull circuit is the weak pull-high circuit, the logic level is a high logic level. 7 . The integrated circuit of claim 1 , wherein the first power domain is in a power mode, and the second power domain is in the power mode or the power-off mode.

8. The integrated circuit as claimed in claim 1, wherein the first power source and the second power source are the same power source.

9. A signal transmission method, which is applicable to an integrated circuit, wherein the integrated circuit includes a first power domain and a second power domain, and the signal transmission method comprises: A first power source supplies power to the first power domain, and a second power source supplies power to the second power domain; The second power domain transmits a signal to the first power domain through a transmission path; as well as When the first power domain is in a power supply mode and the second power domain is in a power-off mode, the weak pull circuit stably maintains the transmission path at a logic level. 10 . The signal transmission method as claimed in claim 9 , wherein the weak pull circuit is located in the first power domain and is signal-connected to the transmission path.

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