System and method for compensating for radio frequency power loss

Abstract

Systems and methods for compensating for radio frequency (RF) power loss are described. One of the methods includes performing a plasma-free test to determine a resistance associated with an output of an impedance matching circuit. After performing the plasma-free test, a substrate is processed in a plasma chamber. During substrate processing, a power loss associated with the output of the impedance matching circuit is determined. The power loss is used to determine an amount of power to be delivered by an RF generator. The amount of power delivered is adjusted until the power loss stabilizes. Stabilization of the power loss facilitates uniform processing of the substrate and additional substrates in the plasma chamber.

Description

Technical Field

[0001] Embodiments provided relate to systems and methods for compensating for radio frequency (RF) power losses. Background Art

[0002] The background description provided here is for the purpose of generally presenting the context of the present disclosure. The work of the presently designated inventors is neither explicitly nor implicitly admitted to be prior art against the present disclosure to the extent that it is described in this background section and in aspects of the specification that were not determined to be prior art at the time the application was filed.

[0003] The wafer is etched using a plasma tool. The plasma tool includes a radio frequency (RF) generator, a matching network or matcher, and a plasma chamber. The RF generator is connected to the matcher via a coaxial cable, and the coaxial cable is connected to the plasma chamber via a transmission line. The wafer is placed in the plasma chamber.

[0004] Once the wafer is placed, the RF generator is turned on to provide RF power to the plasma chamber through the matcher and the transmission line. In addition, the process gas is supplied to the plasma chamber. When the process gas is ignited by the RF power, plasma is excited in the plasma chamber. The plasma is used to etch the wafer.

[0005] It is against this background that the embodiments described in this disclosure are presented. Summary of the invention

[0006] Embodiments of the present disclosure provide systems, devices, methods and computer programs for compensating for radio frequency (RF) power loss. It should be understood that embodiments herein can be implemented in a variety of ways, such as processes, devices, systems, parts of hardware, or methods on computer-readable media. Several embodiments are described below.

[0007] Some semiconductor processing tools, such as conductor etch (CE) tools, operate subsystem bias in voltage control mode, while some operate in power control mode. Voltage control mode does not utilize power compensation action. In power control mode, chamber-to-chamber differences in parasitic power losses produce coupled power variability to the plasma load. To provide optimal chamber matching performance, coupled power variability is minimized.

[0008] The systems and methods described herein provide a compensation method for implementing corrective actions to tighten the power variability of coupling between chambers. The systems and methods relate to a chamber matching power compensation scheme for a bias subsystem of a CE tool. The compensation scheme is applicable to a bias subsystem operating in a power control mode. The compensation scheme utilizes a current probe placed at the output of a bias matching network. The current measurement received from the current probe enables the parasitic power losses from the bias matching network to the plasma to be calculated in real time or used to compensate for the parasitic power losses. These parasitic power losses will be calculated using an improved control loop that continuously updates the power set point of the RF generator. The corrective action provides an offset in the power set point in real time that is equal to the parasitic power losses along the RF feed path.

[0009] In some embodiments, in order to account for the parasitic power losses of the bias matching network and the RF feed assembly, a two-step procedure is implemented. The procedure uses a probe, such as a current probe or a voltage and current probe or an impedance measurement probe or an impedance scanning probe. The probe is placed at the output of the bias matching network. First, during the plasma-free test (NPT), the root mean square (RMS) current is measured by the probe. The equivalent series resistance (ESR) value of the bias matching network and the entire assembly is calculated by performing a linear regression on the square of the measured RMS current and the power provided by the RF generator. The ESR value is stored by the host and used as a system constant.

[0010] Second, a control algorithm is implemented to provide real-time corrective action to the recipe power set point (e.g., P_sp_rec) of the RF generator using the ESR values ​​measured above. While the recipe step is operating, the power loss, e.g., P_loss, can be calculated at each time increment or time step i using the following equation:

[0011] P_loss(i)=ERS*(I_RMS(i)) 2 ...(1)

[0012] Here, I_RMS(i) is the RMS current read by the probe at time increment i. The power loss for the current time step is carried forward and added to the recipe power set point P_sp_rec for the RF generator to determine an updated generator power set point, e.g., P_sp_gen, where "sp" represents set point and "gen" represents RF generator. The following equation shows the updated generator power set point at time increment i:

[0013] P_sp_gen(i)=P_sp_rec+P_loss(i-1)...(2)

[0014] This process is repeated until the corrected offset P_loss(i) is equal to the measured loss P_loss(i-1). At this point, the parasitic power losses will be taken into account.

[0015] Some advantages of the systems and methods for compensating for RF power loss (e.g., parasitic power loss) described herein include achieving chamber repeatability when processing one or more substrates. An RF generator provides RF power to an electrode in a plasma chamber. The RF power is transmitted from the RF generator to the electrode via an RF path. Due to the characteristics of the components of the RF path, a portion of the RF power loss may exist on the RF path. Examples of components include RF cables, impedance matching circuits, and RF transmission lines. The RF cable couples the RF generator to an impedance matching circuit, such as a bias matching network. In addition, the RF transmission line couples the impedance matching circuit to the plasma chamber. In order to account for the RF power loss in the RF path, the power delivered by the RF generator is adjusted. The power delivered by the RF generator is adjusted until the RF power loss is stable. After the RF power loss is stable, the RF generator is controlled to deliver the same or substantially the same amount of delivered power. When the RF generator delivers the same or substantially the same amount of power, a substrate or multiple substrates are processed in a uniform manner. For example, a uniform etching rate or a uniform deposition rate is achieved when processing multiple substrates. As another example, the substrate is processed in a desired manner to achieve an etching rate or a deposition rate.

[0016] Other aspects will become apparent from the following detailed description taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The embodiments are understood by referring to the following description in conjunction with the accompanying drawings.

[0018] FIG. 1 is a schematic diagram of an embodiment of a system for illustrating a plasma-free test performed before processing a substrate.

[0019] 2 is a flowchart illustrating an implementation of determining a resistance, such as an equivalent series resistance (ESR), associated with an output of an impedance matching circuit.

[0020] 3 is a schematic diagram of an embodiment of a system for illustrating the use of resistance to determine the amount of power to be generated and delivered by a radio frequency (RF) generator to account for power losses associated with impedance matching circuits and transmission lines.

[0021] Figure 4 is an embodiment of a table illustrating a method in which, during processing of a substrate, a processor continuously modifies an amount of power delivered by an RF generator based on an amount of power loss associated with an output of an impedance matching circuit.

[0022] Figure 5is an embodiment of a diagram illustrating the modification of power delivered by an RF generator to account for power losses delivered at the output of an impedance matching circuit.

[0023] Figure 6 is a schematic diagram of an embodiment of a system for illustrating the application of a method for compensating for transmission power losses.

[0024] FIG. 7 is a diagram of an embodiment of a system for illustrating the use of Figure 4 The amount of power delivered determined by the described method is maintained for processing another substrate. DETAILED DESCRIPTION

[0025] The following embodiments describe systems and methods for compensating for radio frequency (RF) power loss. It will be apparent that the embodiments herein may be implemented without some or all of these specific details. In other cases, well-known processing operations are not described in detail to avoid unnecessarily obscuring the embodiments herein.

[0026] 1 is a schematic diagram of one embodiment of a system 100 for illustrating a plasma-free test performed prior to processing a substrate. The system 100 includes a plurality of components, such as an RF generator 102 , an impedance matching circuit 104 , a current sensor 106 , a plasma chamber 108 , and a host computing device 110 .

[0027] Examples of the RF generator 102 include a kilohertz (kHz) RF generator or a megahertz (MHz) RF generator. An example of a kHz RF generator is an RF generator with an operating frequency of 400kHz. Examples of MHz RF generators include an RF generator with an operating frequency of 1MHz, or an RF generator with an operating frequency of 2MHz, or an RF generator with an operating frequency of 13.56MHz, or an RF generator with an operating frequency of 27MHz, or an RF generator with an operating frequency of 60MHz. The RF generator 102 includes a processor, such as a digital signal processor (DSP), a driver and amplifier circuit, and an RF power supply. The processor is coupled to the driver and amplifier circuit, which is coupled to the RF power supply. An example of an RF power supply includes an RF oscillator.

[0028] Examples of impedance matching circuit 104 include circuits having a network of circuit components coupled to each other in series or in parallel. Examples of circuit components include resistors, inductors, and capacitors. For example, the circuit components are parallel capacitors or series capacitors.

[0029] The plasma chamber 108 is a parallel plate plasma chamber, such as a capacitively coupled plasma (CCP) chamber. The plasma chamber 108 includes a chuck 112 and an upper electrode 114 facing the chuck 112. An example of the chuck 112 includes an electrostatic chuck (ESC), which includes a lower electrode and a ceramic plate located on top of the lower electrode. Each of the chuck 112 and the upper electrode 114 is made of metal, such as aluminum or an alloy of aluminum. The upper electrode 114 is coupled to a ground potential.

[0030] Examples of current sensor 106 include voltage and current (VI) probes or current probes or impedance sensors or impedance scanners or impedance probes. Examples of host computing device 110 include computers and servers. The computer can be a desktop computer or a laptop computer or a smart phone or a tablet computer. Host computing device 110 includes a processor 120 and a memory device 122. Examples of processors used here include central processing units (CPUs), application specific integrated circuits (ASICs), programmable logic devices (PLDs), controllers, microprocessors, and microcontrollers. Examples of memory devices include random access memory (RAM) and read-only memory (ROM). For example, the memory device is a flash memory or a redundant array of independent disks (RAID). The memory device 122 is coupled to the processor 120 via a connection (e.g., a serial transmission connection, a parallel transmission connection, a bus, or a universal serial bus (USB) connection).

[0031] The RF generator 102 is coupled to the impedance matching circuit through the RF cable 116. For example, the output terminal O1 of the RF power supply of the RF generator 102 is coupled to the input terminal I2 of the impedance matching circuit 104 through the RF cable 116. In addition, the impedance matching circuit 104 is coupled to the lower electrode of the chuck 112 through the RF transmission line 118. For example, the output terminal O2 of the impedance matching circuit 104 is coupled to the lower electrode of the chuck 112 through the RF transmission line 118. The RF transmission line 118 is another example of a component of the plasma system 100 and includes an RF rod, an insulator, and a sleeve. The insulator is wrapped around the RF rod, and the sleeve forms a protective cover around the insulator.

[0032] The processor 120 is coupled to the input terminal I1 of the RF generator 102 via a connection cable 125 (e.g., a serial transmission cable, or a parallel transmission cable, an Ethernet cable, or a USB cable). For example, the processor 120 is coupled to the processor of the RF generator 102 through the connection cable 125. The current sensor 106 is coupled to the output terminal O2 of the impedance matching circuit 104 through the RF cable and is coupled to the processor 120 through the connection cable 121. Examples of the connection cables are provided above.

[0033] During the no-plasma test, plasma is not generated within the plasma chamber 108. For example, one or more process gases (e.g., fluorine-containing gas or oxygen-containing gas) are not supplied to the plasma chamber 108 to ignite plasma within the plasma chamber 108. Additionally, in this example, no substrate is placed on the top surface of the chuck 112 for processing.

[0034] The processor 120 provides a command signal with the amount of one or more variables, such as frequency and delivered power, to the RF generator 102 via the connecting cable 125 and the input terminal I1. The delivered power is the sum of the supplied power and the power loss occurring in the RF cable 116. The supplied power is the power generated by the RF generator 102 without receiving the command signal with the amount of delivered power. For example, when the power loss in the RF cable 116 is not taken into account, the supplied power is the power supplied by the RF generator 102 at the output terminal O1. The amounts of the variables are stored in the memory device 122 for access by the processor 120.

[0035] The RF generator 102 receives a command signal having a variable amount and generates an RF signal 124. For example, the processor of the RF generator 102 receives a command signal having a variable amount from the processor 120 and generates a signal having these amounts. The processor of the RF generator 102 provides the signal to the driver and amplifier circuit of the RF generator 102. The driver (e.g., one or more transistors) of the driver and amplifier circuit generates a current signal upon receiving the signal from the processor of the RF generator 102. The amplifier of the driver and amplifier circuit amplifies the current signal to output an amplified current signal and sends the amplified current signal to the RF power supply of the RF generator 102, which oscillates to generate the RF signal 124 having a variable amount. The RF signal 124 is provided by the RF generator 102 to the impedance matching circuit 104 via the output terminal O1, the RF cable 116, and the input terminal I2.

[0036] The impedance matching circuit 104 matches the impedance of a load coupled to the output terminal O2 of the impedance matching circuit 104 with the impedance of a source coupled to the input terminal I2 of the impedance matching circuit 104 to output a modified RF signal 126 at the output terminal O2. Examples of loads include the RF transmission line 118 and the plasma chamber 108. Examples of sources include the RF cable 116 and the RF generator 102.

[0037] The modified RF signal 126 is transmitted to the lower electrode of the chuck 112 via the RF transmission line 118. When the modified RF signal 120 is supplied or provided at the output terminal O2 during the plasma-free test, the current sensor 106 measures the amount of current delivered at the output terminal O2, such as the root mean square current (Irms). The current is an example of a parameter. Each current amount measured by the current sensor 106 is the root mean square (rms) of the multiple current amounts provided at the output terminal O2. The current sensor 106 provides the measured value of the current amount at the output terminal O2, such as Irms, to the processor 120 via the connecting cable 121.

[0038] The processor 120 receives the measured value of the current amount and generates a database, such as a table or list, including the correspondence between the current amount and the amount of power delivered for which the current amount Irms is measured. For example, when the processor 120 controls the RF generator 102 to generate an RF signal 124 with a delivered power amount Pdel1, the current sensor 106 measures the amount of current Irms1 delivered at the output terminal O2. The delivered power is another example of this parameter. The processor 120 stores the correspondence (e.g., a one-to-one correspondence or a connection or an association or a mapping) between the amount Pdel1 and Irms1 in a database, which is stored in the memory device 122. In a similar manner, when the processor 120 controls the RF generator 102 to generate an RF signal 124 with another delivered power amount Pdel2, the current sensor 106 measures another amount of current Irms2 delivered at the output terminal O2 and provides the current Irms2 to the processor 120 via the connecting cable 121. The processor 120 stores the correspondence between the amount Pdel2 and Irms2 in the database. In this manner, a plurality of correspondences between the amount of power delivered by the RF generator 102 via the RF signal 124 and the amount of current measured at the output O2 during the time period t are created or determined by the processor 120 and stored in the database.

[0039] It should be noted that the processor 120 calibrates the RF generator 102 to determine the amount of power P_del, such as P_del1, P_del2, etc., to be delivered by the RF generator 102 at the output terminal O1. For example, the RF generator 102 is coupled to a dummy load, such as a 50 ohm load, via the RF cable 116, which is a load having a resistance of 50 ohms. The dummy load is sometimes referred to as a known load in this article. A measuring device (such as a voltage and current sensor or a power sensor) is coupled to the input terminal of the dummy load and coupled to the processor 120. The processor 120 generates an instruction signal to control the RF generator 120 to provide an RF signal at the output terminal O1. After receiving the instruction signal, the RF generator 102 generates an RF signal and provides the RF signal to the dummy load through the output terminal O1 and the RF cable 116. The measuring device measures the amount of power at the input terminal of the dummy load. The amount of power measured at the input terminal is used to calculate the amount of power loss in the RF cable 116. The processor 120 receives the measured power amount and determines a correspondence between the power amount provided by the RF generator 102 and the power amount measured at the input of the dummy load to determine the power amount to be delivered by the RF generator 102. For example, the processor 120 determines the difference between the power amount provided by the RF generator 102 at the output terminal O1 and the power amount measured at the input of the dummy load. The difference is equal to the amount of power loss in the RF cable 116. The processor 120 adds the difference to the power amount provided by the RF generator 120 to calculate the amount of power to be delivered by the RF generator 120, such as Pdel1. The processor 120 stores a correspondence (e.g., a one-to-one correspondence or a connection or an association or a mapping) between the power amount provided by the RF generator 120 (e.g., Psup1) and the power amount delivered by the RF generator 122 (e.g., Pdel1) in a database to calculate the amount of power loss in the RF cable 116. In this manner, a database having a plurality of delivered power amounts at the output terminal O1 (e.g., Pdel1, Pdel2, etc.) and having a plurality of provided power amounts at the output terminal O1 (e.g., Psup1, Psup2, etc.) is created by the processor 120. The database includes a correspondence between the power amounts provided by the RF generator 102 at the output terminal O1 and the power amounts delivered by the RF generator 102 at the output terminal O1.

[0040] It should be noted that the power P_del delivered at the output O1 of the RF generator 102 is sometimes referred to herein as the power delivered at the input I2 of the impedance matching circuit 104 because the power P_del delivered at the output O1 is calibrated to account for power losses in the RF cable 116 .

[0041] In one embodiment, an impedance matching circuit is sometimes referred to herein as a matcher or a matching network or an impedance matching network or a matching enclosure, and these terms are used interchangeably herein.

[0042] In one embodiment, instead of coupling the upper electrode 114 to ground potential, the lower electrode is coupled to ground potential and the upper electrode 114 is coupled to an RF transmission line, and the RF transmission line 118 is coupled to the output terminal O2 of the impedance matching circuit 118 for receiving the modified RF signal 126.

[0043] In one embodiment, instead of processor 120, multiple processors are used. For example, the functions performed by processor 120 described herein are performed by multiple processors in a distributed manner. In addition, instead of memory device 122, multiple memory devices are used. For example, information stored in memory device 122 is distributed and stored among the multiple memory devices.

[0044] In one embodiment, the functions described herein as being performed by the processor 120 and the processor of the RF generator 102 are instead performed by the processor 120 or the processor of the RF generator 102 or by two or more processors.

[0045] In one embodiment, in addition to the RF generator 102, one or more additional RF generators are coupled to the impedance matching circuit 104. For example, the RF generator 102 is a kHz RF generator and the additional RF generators include two MHz RF generators. As another example, the RF generator 102 is a MHz RF generator and the additional RF generators include two MHz RF generators. The one or more additional RF generators are coupled to the corresponding one or more additional inputs of the impedance matching circuit 104 via corresponding one or more additional RF cables. The one or more additional RF generators generate corresponding one or more additional RF signals and provide the one or more additional RF signals to the impedance matching circuit 104 via corresponding one or more additional RF cables. The impedance matching circuit 104 matches the impedance of the load with the impedance of the source coupled to the input terminal I2 of the impedance matching circuit 104 and the corresponding one or more additional input terminals to output the modified RF signal at the output terminal O2. Examples of sources coupled to input 12 of impedance matching circuit 104 and corresponding one or more additional inputs include one or more additional RF cables, RF cable 116, RF generator 102, and one or more additional RF generators.

[0046] In one embodiment, instead of being coupled to the output terminal O2, the current sensor 106 is coupled at any point on the RF transmission line 108 or at the input terminal I3 of the chuck 112 for measuring the amount of current delivered at the point or input terminal I3. In this embodiment, the amount of power loss occurring from the output terminal O1 of the RF generator 120 to the point or input terminal I3 on ​​the RF transmission line 108 is determined and compensated.

[0047] 2 is an embodiment of a diagram 200 for illustrating determining a resistance (e.g., equivalent series resistance (ESR)) associated with output O2 of impedance matching circuit 104 ( FIG. 1 ). The resistance associated with output O2 is a combination (e.g., a sum) of the resistance of RF cable 116 and the resistance of circuit components of impedance matching circuit 104 and a constant. The circuit components of impedance matching circuit 104 are coupled between input I2 and output O2 of impedance matching circuit 104.

[0048] Graph 200 depicts the power delivered at output O1 of RF generator 102 on the y-axis and the square of the amount of current measured at output O2 corresponding to the delivered power ( FIG. 1 ) on the x-axis in graph 202. The delivered power at output O1 is in Watts (W). During or after the plasma-free test, processor 120 accesses (e.g., reads or obtains) the amount of power delivered at output O1, e.g., Pdel1, Pdel2, etc., from memory device 122. For example, before processing a substrate, processor 120 accesses the amount of power delivered at output O1 from memory device 122. The square of the amount of current is plotted on the x-axis as Irms 2 , and Irms is measured in amperes by the current sensor 106. In addition, during or after the plasma-free test, the processor 120 further accesses the current amount, such as Irms1, Irms2, etc., from the memory device 122. The accessed current amount corresponds to the delivered power amount accessed by the processor 120 from the memory device 122. During or after the plasma-free test, the processor 120 calculates the square of the current amount delivered at the output terminal O2 based on the measured current amount stored in the database to draw the graph 200.

[0049] In addition, during or after the no-plasma test, the processor 120 plots in a graph 200 the amount of power Pdel1 delivered at the output O1 and the square of the amount of current Irms1 delivered at the output O2. 2 and plots the power Pdel2 delivered at the output terminal O2 and the square of the current Irms2 delivered at the output terminal O2. 2 For example, point 204A in diagram 200 represents the quantity Pdel1 and Irms1 2 , while another point 204B in the diagram 200 represents the quantities Pdel2 and Irms2 2Similarly, diagram 200 includes other points 204C, 204D, 204E, and 204F, and each of points 204C, 204D, 204E, and 204F corresponds to the amount of power delivered at output O1 of RF generator 102 and to the square of the amount of current delivered at output O2 of impedance matching circuit 104.

[0050] During or after the no-plasma test, the processor 120 generates the line 202 from the points 204A, 204B, 204C, 204D, 204E, and 204F. For example, the processor 120 performs a linear regression analysis to fit a line through the points 204A, 204B, 204C, 204D, 204E, and 204F. Each point 204A to 204F depicts the relationship between the amount of power delivered at the output terminal O1 and the square of the amount of current delivered at the output terminal O2.

[0051] In addition, during or after the plasma-free test, the processor 120 calculates the slope of the line 202. For example, the processor 120 identifies a plurality of points 204G and 204H located on the line 202, projects the point 204G horizontally toward the y-axis to determine the amount of power delivered P_delB at the output terminal O1 of the RF generator 102, projects the point 204H horizontally toward the y-axis to determine the amount of power delivered P_delA at the output terminal O1 of the RF generator 102, and projects the point 204G vertically toward the x-axis to determine the square of the amount of current IrmsA IrmsA at the output terminal O1 of the RF generator 102. 2 , and projecting point 204H vertically toward the x-axis to determine the square of the current IrmsB at the output terminal O1 of the RF generator 102 2 The processor 120 calculates the first difference between the quantities P_delB and P_delA and the quantity IrsmB 2 and IrmsA 2 and calculates a ratio of the first difference and the second difference to determine the slope of line 202. Processor 120 stores the slope as a resistor ESR associated with output terminal O2 of impedance matching circuit 104.

[0052] 3 is a schematic diagram of an embodiment of a system 300 for illustrating the use of a resistor ESR associated with an output O2 of an impedance matching circuit 104 to determine an amount of power P_sp_gen(i+1) to be generated and delivered by an RF generator 102 to calculate power losses associated with an RF cable 116 and the impedance matching circuit 104. The system 300 is structurally the same as the system 100 of FIG1 . For example, the system 300 includes the same components as the system 100. For example, the system 300 includes an RF generator 102, an RF cable 116, an impedance matching circuit 104, an RF transmission line 118, a plasma chamber 108, a current sensor 106, and a host computing device 110.

[0053] The plasma chamber 108 includes a substrate S1 for being processed, such as a semiconductor wafer. Examples of processing a substrate include depositing one or more materials on a substrate, etching a substrate, sputtering a substrate, and cleaning a substrate. The substrate S1 is placed on the top surface of the chuck 112 for processing.

[0054] During a first time period represented by integer i, processor 120 generates a command signal having a power quantity P_sp_rec generated and output or provided by RF generator 102 at output terminal O1. The terms time period, time increment, and time step are used interchangeably herein. Quantity P_sp_rec is sometimes referred to herein as a recipe set point for operation of RF generator 102, where "sp" refers to set point and "rec" refers to recipe. Processor 120 accesses (e.g., reads) quantity P_sp_rec from memory device 122. A user provides the recipe set point for operation to processor 120 via an input device (e.g., a mouse or keyboard or keypad) of host computing device 110. The input device is coupled to processor 120 via a connecting cable.

[0055] In addition, during the first time period, the processor 120 sends a command signal having a quantity P_sp_rec to the RF generator 102 via the connecting cable 125 and the input terminal I1. After receiving the command signal, the RF generator 102 generates an RF signal 302 having a power quantity P_sp_rec and provides the RF signal 302 to the impedance matching circuit 104 via the output terminal O1 and the RF cable 116 and the input terminal I2. During the first time period, the RF signal 302 is generated in the same manner as the RF signal 124 (Figure 1). For example, the processor of the RF generator 102 receives the command signal having a quantity P_sp_rec and generates a signal having the quantity. The processor of the RF generator 102 provides the signal having the quantity to the driver and amplifier circuit of the RF generator 102. The driver of the driver and amplifier circuit generates a current signal when receiving the signal from the processor of the RF generator 102. The amplifier of the driver and amplifier circuit amplifies the current signal to output the amplified current signal, and sends the amplified current signal to the RF power supply of the RF generator 102. The RF power supply oscillates to generate and provide an RF signal 302 having an amount of power P_sp_rec.

[0056] During the first time period, the impedance matching circuit 104 receives the RF signal 302 at the input terminal I2 and matches the impedance of the load coupled to the output terminal O2 with the impedance of the source coupled to the input terminal I2 to output the modified RF signal 304 at the output terminal O2. The impedance matching circuit 104 provides the modified RF signal 304 to the lower electrode of the chuck 112 via the output terminal O2 and the RF transmission line 118. In addition, one or more process gases are supplied to the plasma chamber 108. When the one or more process gases are supplied to the plasma chamber 108 and the modified RF signal 304 is received by the lower electrode of the plasma chamber 108, plasma is ignited and maintained in the plasma chamber 108, and the plasma processes the substrate S1.

[0057] When the modified RF signal 304 is provided at the output terminal O2 during the first time period, the current sensor 106 measures the current amount I_RMS(i) delivered at the output terminal O2, where i is an integer equal to or greater than zero. The amount I_RMS(i) is the root mean square of multiple current amounts delivered at the output terminal O2. The current sensor 106 provides the current amount I_RMS(i) to the processor 120 through the connecting cable 121. When processing the substrate S1, the processor 120 stores the amount I_RMS(i) in the memory device 122, accesses (e.g., reads or obtains) the amount I_RMS(i) from the memory device 122, and calculates the square I_RMS(i) of the current amount I_RMS(i) during the first time period. 2 The processor 120 also squares I_RMS(i) 2is stored in the memory device 122. In addition, during the first time period of processing the substrate S1 in the plasma chamber 108, the processor 120 accesses (e.g., reads or obtains) the value I_RMS(i) of the resistance ESR quantity and the value associated with the output terminal O2 from the memory device 122. 2 , and the resistance ESR is equal to the square of the current I_RMS(i) 2 The amount P_loss(i) is multiplied to calculate or determine the amount of RF power loss P_loss(i) at the output O2 of the impedance matching circuit 104. The amount P_loss(i) is a combined amount of power loss in or caused by the RF cable 116 and power loss in or caused by circuit components of the impedance matching circuit 104 between the input I2 and the output O2 of the impedance matching circuit 104. During the first time period, the processor 120 determines or calculates the sum of the amount of power P_sp_rec associated with the output O2 and the amount of power P_loss(i) P_sp_gen(i+1) to output the amount of power delivered P_sp_gen(i+1), where "gen" refers to the RF generator 102.

[0058] During the second time period during which the substrate S1 is processed, the processor 120 does not continue to generate a command signal with a power amount P_sp_rec, but instead generates a command signal with a delivered power amount P_sp_gen(i+1), and sends a command signal to the RF generator 102 via the connecting cable 125 and the input terminal I1 to adjust (e.g., change or modify) the recipe set point P_sp_rec for the operation of the RF generator 102. For example, the second time period is adjacent to the first time period, such as being continuous with the first time period. For example, there is no time period between the first time period and the second time period. As another example, there is a period of time after the first time period, and then the second time period.

[0059] In addition, during the second time period, upon receiving the command signal having the amount P_sp_gen(i+1), the RF generator 102 generates an RF signal 302 having the delivered power amount P_sp_gen(i+1) at the output terminal O1. The RF generator 102 processes the command signal having the amount P_sp_gen(i+1) to output the RF signal 302 having the amount P_sp_gen(i+1) in the same manner as the RF signal 302 having the power amount P_sp_rec described above. For example, during the second time period, the processor 120 adjusts (e.g., modifies or changes) the recipe set point P_sp_rec to obtain the amount P_sp_gen(i+1) and provides the command signal having the amount P_sp_gen(i+1) to the RF generator 102 via the connecting cable 125. Upon receiving the command signal, the processor of the RF generator 102 generates and sends a signal having the amount P_sp_gen(i+1) to the driver and amplifier circuits of the RF generator 102. Upon receiving the signal having the quantity P_sp_gen(i+1), the driver and amplifier circuit generates a current signal based on the quantity P_sp_gen(i+1) and provides the current signal to the power supply of the RF generator 102. The power supply of the RF generator 102 oscillates according to the current signal to output an RF signal 302 having the quantity P_sp_gen(i+1).

[0060] An RF signal 302 having a delivered power amount P_sp_gen(i+1) is provided by the RF generator 102 to the impedance matching circuit 104 via the output terminal O1, the RF cable 116, and the input terminal I2. The impedance matching circuit 104 matches the impedance of the load coupled to the output terminal O2 with the impedance of the source coupled to the input terminal I2 to modify the RF signal 302 having the delivered power amount P_sp_gen(i+1), thereby outputting a modified RF signal 304. The lower electrode receives the modified RF signal 304 output based on the delivered power amount P_sp_gen(i+1) to process the substrate S1. The lower electrode receives the modified RF signal 304 via the output terminal O2 and the RF transmission line 118.

[0061] Again during the second time period, the current sensor 106 measures the amount of current I_RMS(i+1) delivered at the output terminal O2 and provides the amount to the processor 120 via the connecting cable 121. The processor stores the amount I_RMS(i+1) in the memory device 122. During the second time period, the processor 120 accesses (e.g., obtains or reads) the amount I_RMS(i+1) from the memory device 122, and determines or calculates the amount of power loss P_loss(i+1) delivered at the output terminal O2 by multiplying the square of the amount I_RMS(i+1) by the resistance ESR associated with the output terminal O2. In addition, during the second time period, the processor 120 calculates the sum of the power amount P_sp_rec and the power loss amount P_loss(i+1) to output the delivered power amount P_sp_gen(i+2).

[0062] During a third time period of processing the substrate S1, the processor 120 controls the RF generator 102 to generate an RF signal 302 having a delivered power amount P_sp_gen(i+2), thereby adjusting the recipe set point P_sp_rec of the power provided by the output terminal O1. For example, during the third time period, the processor 120 adjusts (e.g., modifies or changes) the recipe set point P_sp_rec to obtain the amount P_sp_gen(i+2) and provides a command signal having the amount P_sp_gen(i+2) to the RF generator 102 via the connecting cable 125. After receiving the command signal from the processor 120, the processor of the RF generator 102 sends a signal having the amount P_sp_gen(i+2) to the driver and amplifier circuit of the RF generator 102. After receiving the signal having the amount P_sp_gen(i+2), the driver and amplifier circuit generates a current signal based on the amount P_sp_gen(i+2) and provides the current signal to the power supply. The power supply oscillates according to the current signal to output an RF signal 302 having an amount P_sp_gen(i+2). The third time period is continuous with the second time period. In a similar manner, during additional time periods for processing the substrate S1, the processor 120 continues to control the RF generator 102 to change the amount of power delivered by the RF signal 302 to account for or compensate for power losses associated with (e.g., at) the output end O2 of the impedance matching circuit 104.

[0063] Figure 44 is an embodiment of a table 400 for illustrating a method in which the processor 120 continues to modify the amount of power delivered at the output O1 of the RF generator 102 based on the amount of power loss associated with the output O2 of the impedance matching circuit 104 (FIG. 3) during processing of the substrate S1 or another substrate. The table 400 includes a list of time steps, a list of correction offsets applied to the recipe set point P_sp_rec, the generator set point, the power loss P_loss associated with the output O2, the amount of power coupled to the plasma in the plasma chamber 108 (FIG. 1), and the next time step correction offset. Examples of power loss P_loss include P_loss(i) and P_loss(i+1). When a certain amount of power loss is added to the recipe set point P_sp_rec, the power loss P_loss is used to adjust the recipe set point P_sp_rec. The correction offset, the generator set point, the power loss, the amount of power coupled to the plasma, and the next correction offset are measured in watts (W).

[0064] Examples of time steps include a first time period, a second time period, and a third time period. For example, the first time period is an example of time step 0, the second time period is an example of time step 1, and the third time period is an example of time step 2. For another example, the first time period is an example of time step 4, the second time period is an example of time step 5, and the third time period is an example of time step 6. For another example, the first time period is an example of time step 3, the second time period is an example of time step 4, and the third time period is an example of time step 5.

[0065] Examples of generator set points include the quantity P_sp_rec, the quantity P_sp_gen(i+1), and the quantity P_sp_gen(i+2) as the initial generator recipe set points. Additionally, examples of power losses associated with the output O2 include the quantity P_loss(i) and the quantity P_loss(i+1). During each time step, the power loss associated with the output O2 is the same as the correction offset for the next time step. For example, the correction offset during time step 2 is 5W, which is the same as the power loss of 5W during time step 1.

[0066] During time step 0, processor 120 controls RF generator 102 to generate RF signal 302 (FIG. 3) having a quantity of 500W. The quantity of 500W is an example of a recipe set point P_sp_rec for power. In addition, during time step 0, processor 120 accesses a delivered power loss quantity of 5W associated with output O2 from memory device 122. The delivered power loss quantity of 5W at output O2 is calculated by processor 120 by multiplying the square of the current quantity (e.g., I_RMS(i)) measured by current sensor 106 (FIG. 3) by the resistor ESR. The current quantity I_RMS(i) is measured by current sensor 106 during time step 0. Also during time step 0, a delivered power quantity of 495W is coupled to the plasma for processing substrate S1. The quantity of 495W is the difference between the power quantity of 500W of RF signal 302 and the power loss quantity of 5W at output O2. During time step 0, processor 120 determines that the amount of the next time step correction offset of 5 W is equal to the amount of power loss of 5 W associated with output O2.

[0067] During time step 1, the processor 120 calculates the sum of the recipe set point of 500 W determined during time step 0 and the next time step correction offset of 5 W, and controls the RF generator 102 to generate the RF signal 302 having an amount of 505 W (which is the sum). The amount of 505 W is an example of the amount of power P_sp_gen(i+1) delivered by the RF generator 102 at the output terminal O1 of the RF generator 102. In addition, during time step 1, the processor 120 accesses the delivered power loss amount of 8 W at the output terminal O2 from the memory device 122. The delivered power loss amount of 8 W is calculated by the processor 120 by multiplying the square of the current amount (e.g., I_RMS(i+1)) measured by the current sensor 106 (FIG. 3) by the resistor ESR. The current amount I_RMS(i+1) is measured by the current sensor 106 during time step 1. Also during time step 1, a delivered power amount of 497 W is coupled to the plasma used to process substrate S1. The amount of 497 W is the difference between the delivered power amount of 505 W of RF signal 302 and the power loss amount of 8 W associated with output O2. During time step 1, processor 120 determines a next time step correction offset of 8 W, which is equal to the power loss amount of 8 W associated with output O2.

[0068] During time step 2, the processor 120 calculates the sum of the recipe set point of 500W and the next time step correction offset of 8W determined during time step 1, and controls the RF generator 102 to generate the RF signal 302 having a quantity of 508W (which is the sum). Time step 2 is continuous with time step 1. The quantity of 508W is an example of the amount of power delivered by the RF generator 102, P_sp_gen(i+2). In addition, during time step 2, the processor 120 accesses the delivered power loss quantity of 9W at the output terminal O2 from the memory device 122. The delivered power loss quantity of 9W at the output terminal O2 is calculated by the processor 120 by multiplying the square of the current quantity (e.g., I_RMS(i+2)) measured by the current sensor 106 (FIG. 3) by the resistor ESR. The quantity I_RMS(i+2) is stored by the processor 120 in the memory device 122. The current amount I_RMS(i+2) is measured by the current sensor 106 during time step 2. Also during time step 2, a delivered power amount of 499 W is coupled to the plasma for processing the substrate S1. The amount of 499 W is the difference between the delivered power amount of 508 W of the RF signal 302 and the power loss amount of 9 W associated with the output terminal O2. During time step 2, the processor 120 determines a next time step correction offset of 9 W, which is equal to the power loss amount of 9 W associated with the output terminal O2.

[0069] During time step 3, the processor 120 calculates the sum of the recipe set point of 500W and the next time step correction offset of 9W determined during time step 2, and controls the RF generator 102 to generate the RF signal 302 having an amount of 509W (which is the sum). Time step 3 is consecutive to or after time step 2. The amount of 509W is an example of the amount of power delivered by the RF generator 102, P_sp_gen(i+3). In addition, during time step 3, the processor 120 accesses the delivered power loss amount of 10W at the output terminal O2 from the memory device 122. The delivered power loss amount of 10W at the output terminal O2 is calculated by the processor 120 by multiplying the square of the current amount (e.g., I_RMS(i+3)) measured by the current sensor 106 (FIG. 3) by the resistor ESR. The amount of 10W is measured by the current sensor 106 and provided to the processor 120. The current amount I_RMS(i+3) is measured by the current sensor 106 during time step 3. Also during time step 3, a delivered power amount of 499W is coupled to the plasma for processing the substrate S1. The amount of 499W is the difference between the delivered power amount of 509W of the RF signal 302 and the power loss amount of 10W associated with the output terminal O2. During time step 3, the processor 120 determines a next time step correction offset of 10W, which is equal to the power loss amount of 10W associated with the output terminal O2.

[0070] During time step 4, the processor 120 calculates the sum of the recipe set point of 500W and the next time step correction offset of 10W determined during time step 3, and controls the RF generator 102 to generate an RF signal 302 having an amount of 510W (which is the sum). Time step 4 is consecutive to or after time step 3. The amount of 510W is an example of the amount of power delivered by the RF generator 102, P_sp_gen(i+4). In addition, during time step 4, the processor 120 accesses the delivered power loss amount of 10.5W at the output terminal O2 from the memory device 122. The delivered power loss amount of 10.5W at the output terminal O2 is calculated by the processor 120 by multiplying the square of the current amount (e.g., I_RMS(i+4)) measured by the current sensor 106 (FIG. 3) by the resistor ESR. The current amount I_RMS(i+4) is measured by the current sensor 106 during time step 4. Also during time step 4, a delivered power amount of 499.5 W is coupled to the plasma for processing substrate S1. The amount of 499.5 W is the difference between the delivered power amount of 510 W of RF signal 302 and the power loss amount of 10.5 W associated with output O2. During time step 4, processor 120 determines a next time step correction offset of 10.5 W, which is equal to the power loss amount of 10.5 W associated with output O2.

[0071] During time step 5, the processor 120 calculates the sum of the recipe set point of 500 W and the next time step correction offset of 10.5 W determined during time step 4, and controls the RF generator 102 to generate the RF signal 302 having an amount of 510.5 W (which is the sum). Time step 5 is consecutive to or after time step 4. The amount of 510.5 W is an example of the amount of power delivered by the RF generator 102, P_sp_gen(i+5). In addition, during time step 5, the processor 120 accesses a delivered power loss amount of 10.6 W associated with the output terminal O2 from the memory device 122. The delivered power loss amount of 10.6 W at the output terminal O2 is calculated by the processor 120 by multiplying the square of the current amount I_RMS(i+5) measured by the current sensor 106 (FIG. 3) by the resistor ESR. The amount of current (e.g., I_RMS(i+5)) is measured by the current sensor 106 during time step 5. Also during time step 5, a delivered power amount of 499.9 W is coupled to the plasma for processing the substrate S1. The amount of 499.9 W is the difference between the delivered power amount of 510.5 W of the RF signal 302 and the power loss amount of 10.6 W associated with the output terminal O2. During time step 5, the processor 120 determines a next time step correction offset of 10.6 W, which is equal to the power loss amount of 10.6 W associated with the output terminal O2.

[0072] During time step 6, the processor 120 calculates the sum of the recipe set point of 500 W and the next time step correction offset of 10.6 W determined during time step 5, and controls the RF generator 102 to generate the RF signal 302 having an amount of 510.6 W (which is the sum). Time step 6 is consecutive to or after time step 5. The amount of 510.6 W is an example of the amount of power delivered by the RF generator 102, P_sp_gen(i+6). In addition, during time step 6, the processor 120 accesses the delivered power loss amount of 10.6 W at the output terminal O2 from the memory device 122. The delivered power loss amount of 10.6 W at the output terminal O2 is calculated by the processor 120 by multiplying the square of the current amount (e.g., I_RMS(i+6)) measured by the current sensor 106 (FIG. 3) by the resistor ESR. The current amount I_RMS(i+6) is measured by the current sensor 106 during time step 6. The current amount I_RMS(i+6) is stored in the memory device 122 by the processor 120 and is accessed, e.g., read or obtained, from the memory device 122 by the processor 120. Also during time step 6, a delivered power amount of 500 W is coupled with the plasma for processing the substrate S1. The amount of 500 W is the difference between the delivered power amount of 510.6 W of the RF signal 302 and the power loss amount of 10.6 W associated with the output terminal O2. During time step 6, the processor 120 determines a next time step correction offset of 10.6 W, which is equal to the power loss amount of 10.6 W associated with the output terminal O2.

[0073] In this way, the processor 120 continues to control the amount of power delivered by the RF generator 102 at the output terminal O1 of the RF generator 102 based on the amount of power loss measured at the output terminal O2 of the impedance matching circuit 104 until the amount of power loss is compensated. When the amount of power loss is stable, the amount of power loss is compensated. For example, during time steps 5 and 6, the processor 120 determines that the same amount of power loss of 10.6 W occurs based on the amount of current delivered at the output terminal O2 measured by the current sensor 106 and the resistance ESR associated with the output terminal O2. When it is determined that the amount of power loss is stable, the processor 120 does not control the RF generator 102 to change the amount of power delivered by the RF generator 102 at the output terminal O1 of the RF generator 102. For example, after time step 6, the processor 120 continues to control the RF generator 102 to deliver an amount of power of 510.6 W at the output terminal O1 of the RF generator 102 and does not change the amount of 510.6 W. By further example, after time step 6, the current sensor 106 is decoupled from the output terminal O2 of the impedance matching circuit 104. It is not necessary to continue to measure the current at the output terminal O2 to determine the amount of power loss delivered at the output terminal O2.

[0074] In one embodiment, instead of determining the same power loss amount for two consecutive time steps, the processor 120 determines that the power loss amounts during the two consecutive time steps differ from each other within a predetermined range to determine that the power loss amount of the latter of the two time steps is stable. For example, assuming that the power loss amount during time step 5 is 10.61 W instead of 10.6 W, and assuming that the power loss amount during time step 6 is 10.6 W, the processor 120 determines that the amounts 10.6 W and 10.61 W differ from each other within a predetermined range of 0.1 W or 0.2 W, thereby determining that the power loss amount of 10.6 W during time step 6 is stable. For another example, assuming that the power loss amount during time step 5 is 10.62 W instead of 10.6 W and assuming that the power loss amount during time step 6 is 10.6 W, the processor 120 determines that the amounts of 10.6 W and 10.62 W differ from each other within a predetermined range of 0.2 W or 0.3 W, thereby determining that the power loss amount of 10.6 W during time step 6 is stable.

[0075] In one embodiment, the following method is repeated at a rate ranging from 50 Hertz (Hz) to 1 kHz: measuring the current at the output terminal O2 of the impedance matching circuit 104, determining the amount of power loss at the output terminal O2 of the impedance matching circuit 104 based on the measured value of the current and the resistor ESR, and determining the amount of power to be delivered by the RF generator 102 based on the amount of power loss and the recipe set point of the RF generator 102. For example, the following operations are repeated 50 times per second, or 1000 times per second, or a number of times between 50 and 1000 times per second: measuring the amount of current at the output terminal O2, such as I_RMS(i), determining the amount P_loss(i) based on the measured value I_RMS(i) and the resistor ESR, and determining the amount P_sp_gen(i+1) based on the recipe set point P_sp_rec and the amount P_loss(i). As another example, 50 or 1000 time steps (examples of which are provided above with reference to Table 400) occur within one second. During each time step, a current quantity, for example I_RMS(i), is measured at the output O2, a quantity P_loss(i) is determined from the measured value I_RMS(i) and the resistance ESR, and a quantity P_sp_gen(i+1) is determined from the recipe setpoint P_sp_rec and the quantity P_loss(i).

[0076] In one embodiment, the amount 510 W is an example of the amount of power delivered by the RF generator 102 P_sp_gen(i), the amount 510.5 W is an example of the amount of power delivered by the RF generator 102 P_sp_gen(i+1), and the amount 510.6 W is an example of the amount of power delivered by the RF generator 102 P_sp_gen(i+2).

[0077] Figure 5 3 is an embodiment of a graph 500 for illustrating the change of the power P_sp_gen delivered at the output O1 by the RF generator 102 (FIG. 3) to calculate the power loss P_loss delivered at the output O2 of the impedance matching circuit 104 (FIG. 3). It should be noted that the "sp" in the term "P_sp_gen" represents the set point, and the "gen" in the term "P_sp_gen" represents the RF generator 102. The graph 500 depicts the relationship between the power P_sp_gen delivered by the RF generator 102 and the time t. The graph 500 includes a curve 502, another curve 504, and another curve 506. The curve 502 depicts the delivered power P_sp_gen at the output O1 of the RF generator 102. In addition, the curve 504 depicts the power loss P_loss delivered at the output O2 of the impedance matching circuit 104, and the curve 506 depicts the recipe set point P_sp_rec, which is a constant.

[0078] As shown in the graph 500, when the delivered power loss amount P_loss (e.g., P_loss(i), P_loss(i+1), P_loss(i+2), etc.) increases with the passage of time t, the delivered power amount P_sp_gen (e.g., P_sp_gen(i), P_sp_gen(i+1), P_sp_gen(i+2), P_sp_gen(i+3), P_sp_gen(i+4), P_sp_gen(i+5), P_sp_gen(i+6), etc.) also increases with the passage of time t. By considering the delivered power loss P_loss, when processing the substrate S1( Figure 4 ) or another substrate within a time t. It should be noted that the difference between the delivered power P_sp_gen and the recipe set point P_sp_rec is referred to herein as the set point offset.

[0079] Figure 6 6 is a schematic diagram of an embodiment of a system 600 for illustrating the application of a method for compensating for power loss in a transmission. The system 600 includes a comparator 602, a controller 604, an adder 606, an RF generator 102, an impedance matching circuit 104, a plasma chamber 108, a current sensor 106, a delay circuit 608, a filter 610, a controller 611, and a comparator 612.

[0080] Examples of controller 604 include processor 120 (FIG. 3), ASIC, PLD, CPU, microprocessor, and microcontroller. Another example of controller 604 includes a combination of processor 120 and a processor of RF generator 102. Examples of comparator 602 or comparator 612 include controller, processor, PLD, CPU, microprocessor, and microcontroller. Each of adder 606, delay circuit 608, and filter 610 can be implemented using a controller, processor, PLD, CPU, microprocessor, and microcontroller. An example of filter 610 includes a low pass filter that filters out high frequencies of current I_RMS.

[0081] The comparator 602 is coupled to the controller 604, and the controller 604 is coupled to the adder 606. The adder 606 is coupled to the RF generator 102 via a connection cable. In addition, the delay circuit 608 is coupled to the current sensor 106 via a connection cable. The delay circuit 608 is coupled to the filter 610, and the filter 610 is coupled to the controller 611. The controller 611 is coupled to the comparator 612, and the comparator 612 is coupled to the comparator 602.

[0082] The current sensor 106 measures the current amount I_RMS during substrate processing and provides the measured current amount I_RMS or the current amount Irms measured during the plasma-free test to the delay circuit 608, such as the amount I_RMS(i), I_RMS(i+1), I_RMS(i+2), I_RMS(i+3), I_RMS(i+4), I_RMS(i+5), or I_RMS(i+6), etc. The delay circuit 608 calculates (e.g., reduces or removes) a time delay associated with the current I_RMS measured during substrate processing or the current Irms measured during the plasma-free test. For example, the delay circuit 608 reduces or removes the time delay in the process in which the processor 120 receives the current amount I_RMS from the current sensor 106, the time delay in the process in which the processor 120 processes the measured value of the current I_RMS and the resistor ESR to determine the power loss P_loss at the output terminal O2 of the impedance matching circuit 102, and the time delay in the process in which the processor 120 determines the delivered power amount P_sp_gen according to the power loss P_loss and the recipe set point P_sp_rec. As another example, the delay circuit 608 reduces or removes the time delay in the process in which the processor 120 receives a certain current amount Irms from the current sensor 106. The delay circuit 608 reduces or removes the time delay associated with the current I_RMS and the time delay associated with the current Irms, and provides the current measurement value I_RMS or the current measurement value (e.g., current amount, etc.) Irms to the filter 610.

[0083] The filter 610 removes, for example, filters out, the high frequency component of the current I_RMS or the current Irms measured by the current sensor 106. The controller 611 determines the resistance value ESR according to the relationship between the current Irms measured by the current sensor 106 and the delivered power P_del shown in the diagram 200 (FIG. 2). The controller 611 also determines the power loss P_loss according to the resistance ESR and the square of the current I_RMS, and provides the delivered power loss P_loss to the comparator 612.

[0084] The comparator 612 compares the amount of power delivered to the input terminal I2 of the impedance matching circuit 104 with the delivered power loss amount P_loss to determine the delivered power amount P_coupled coupled to the plasma within the plasma chamber 108. The power delivered to the input terminal I2 is denoted as P_del. The comparator 612 provides the delivered power amount P_coupled coupled to the plasma to the comparator 602.

[0085] In addition, the comparator 602 compares the amount of power P_coupled coupled to the plasma within the plasma chamber 108 with the recipe set point P_sp_rec to determine the amount of delivered power loss P_loss at the output O2 of the impedance matching circuit 104. The controller 604 receives the amount of delivered power loss P_loss at the output O2 of the impedance matching circuit 104 from the comparator 602 and provides the loss amount to the adder 606. The adder 606 adds the amount of delivered power loss P_loss at the output O2 of the impedance matching circuit 104 to the recipe set point P_sp_rec to generate a summed set point or total set point, which is provided as an input to the RF generator 102 via the connecting cable. The RF generator 102 is operated to generate and provide the summed set point of the delivered power at the output O1 of the RF generator 102.

[0086] In one embodiment, the delay circuit 608, the filter 610, the controller 611, the comparator 612, the comparator 602, the controller 604, and the adder 606 are implemented within the processor 120. For example, the delay circuit 608, the filter 610, the controller 611, the comparator 612, the comparator 602, the controller 604, and the adder 606 are part of the processor 120.

[0087] In one embodiment, filter 610 is optional and may not be used in system 600. For example, delay circuit 608 is coupled to controller 611 but not to filter 610.

[0088] In one embodiment, the functions described herein as being performed by the delay circuit 608, the filter 610, the controller 611, the comparator 612, the comparator 602, the controller 604, and the adder 606 are performed by one or more processors. For example, the functions described herein as being performed by the delay circuit 608, the filter 610, and the controller 611 are performed by one processor, and the functions described herein as being performed by the comparator 612, the comparator 602, the controller 604, and the adder 606 are performed by another processor (e.g., the processor 120).

[0089] FIG. 7 is a schematic diagram of an embodiment of a system 700 for illustrating the process of treating substrate S1 by applying the method described in connection with FIG. 3 or Figure 4 The delivered power amount P_sp_gen determined by the described method is maintained for processing another substrate S2. System 700 includes the same components as system 300, except that system 700 does not include current sensor 106. Current sensor 106 is not coupled to output terminal O2 of impedance matching circuit 104. For example, current sensor 106 is decoupled from output terminal O2 of impedance matching circuit 104. In addition, substrate S1 placed on the top surface of chuck 112 is removed from plasma chamber 108, and after removing substrate S1, substrate S2 is placed on the top surface for processing.

[0090] Once the processor 120 determines the delivered power amount to be provided by the RF generator 102 for which the power loss amount P_loss is within a predetermined range, such as P_sp_gen(i+1), or P_sp_gen(i+10), or 510.6W ( Figure 4 ), the processor 120 does not change the amount of delivered power to be provided by the RF generator 102. For example, the processor 120, in the following Figure 4 During each time step after the time step 6 of , the RF generator 102 is provided with an instruction signal having a volume of 510.6 W, so as to generate the RF signal 302 having a delivery power of 510.6 W. When receiving the instruction signal having a volume of 510.6 W, the RF generator 102 generates the RF signal 302 having a volume of 510.6 W, and provides the RF signal 302 to the impedance matching circuit 104 through the output terminal O1 and the input terminal I2.

[0091] After receiving the RF signal 302, the impedance matching circuit 104 matches the impedance of the load coupled to the output terminal O2 with the impedance of the source coupled to the input terminal I2 to output a modified RF signal 304. When one or more gases are supplied to the plasma chamber 108 and the modified RF signal 304 is supplied to the lower electrode of the chuck 112, plasma is ignited or maintained in the plasma chamber 108. The plasma in the plasma chamber 108 processes the substrate S2 placed in the plasma chamber 108.

[0092] In one embodiment, instead of controlling the RF generator 102 to provide the same delivered power amount at the output O1 of the RF generator 102 to process the substrate S2, after processing the substrate S1, the process described with reference to FIGS. 3 and 4 is repeated for the substrate S2 for one or more time steps. Figure 4 The following method is described: measuring the current I_RMS at the output O2 of the impedance matching circuit, determining the power loss P_loss at the output O2 from the current I_RMS and the resistance ESR, and determining the delivered power P_sp_gen to be applied to the RF generator 104 based on the power loss P_loss and the recipe set point P_sp_rec. The delivered power P_sp_gen determined for the substrate S2 is then applied to the substrate S2 for an additional time step.

[0093] In one embodiment, the method for compensating for RF power loss described herein is applicable to other types of semiconductor processing tools, such as an inductively coupled plasma (IC) tool or an electron cyclotron resonance (ECR) tool or a plasma enhanced chemical vapor deposition (PECVD) tool. For example, instead of the CCP plasma chamber 108, an ICP plasma chamber, an ECR plasma chamber, or a PECVD plasma chamber is used. For example, the RF transmission line 118 is coupled to the lower electrode of the ICP plasma chamber. In this description, the transformer coupled plasma (TCP) coil of the ICP plasma chamber is coupled to ground potential or coupled to one or more RF generators via an impedance matching circuit. As another illustration, the RF transmission line 118 is coupled to the base of the PECVD plasma chamber. As yet another example, the RF transmission line 118 is coupled to the TCP coil of the ICP plasma chamber. In this description, the lower electrode of the ICP plasma chamber is coupled to ground potential or coupled to one or more RF generators via an impedance matching circuit. It should be noted that the plasma chamber 108 is a semiconductor processing tool.

[0094] The embodiments described herein may be implemented by various computer system configurations including handheld hardware units, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers, etc. The embodiments described herein may also be implemented in distributed computing environments where work is performed via remote processing hardware units that are linked through a computer network.

[0095] In some embodiments, the controller is part of a system, which may be part of the above examples. The system includes a semiconductor processing device, which includes one or more processing tools, one or more chambers, one or more processing platforms and / or specific processing components (wafer pedestals, gas flow systems, etc.). The system is integrated with electronic equipment to control its operation before, during, and after the processing of semiconductor wafers or substrates. The electronic equipment is called a controller, which can control various components or sub-components of one or more systems. Depending on the processing requirements and / or system type, the controller is programmed to control any of the processes disclosed herein, including the delivery of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, RF generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, wafer transfer in and out of tools connected or engaged with the system and other transfer tools and / or load locks.

[0096] Broadly speaking, in many embodiments, a controller is defined as an electronic device having a number of integrated circuits, logic, memory, and / or software that receives instructions, issues instructions, controls operations, initiates cleaning operations, initiates endpoint measurements, etc. Integrated circuits include: a chip in the form of hardware that stores program instructions, a digital signal processor (DSP), a chip defined as an ASIC, a PLD, one or more microprocessors, or a microcontroller that executes program instructions (e.g., software). Program instructions are instructions sent to a controller or system in the form of different individual settings (or program files) that define operating parameters for performing a specific process (on or for a semiconductor wafer). In some embodiments, the operating parameters are part of a recipe defined by a process engineer to achieve one or more processing steps during the manufacture of one or more (kinds of) layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0097] In some embodiments, the controller is part of or coupled to a computer that is integrated with the system, coupled to the system, or connected to the system via a network, or a combination thereof. For example, the controller is in all or part of a "cloud" or fab host computer system that allows remote access to wafer processing. The controller enables remote access to the system to monitor the current progress of a manufacturing operation, check the history of past manufacturing operations, check trends or performance indicators from multiple manufacturing operations, change parameters of a current process, set a processing step after the current process, or start a new process.

[0098] In some embodiments, a remote computer (e.g., a server) provides a processing recipe to the system via a computer network, which includes a local area network or the Internet. The remote computer includes a user interface that can implement the input of parameters and / or settings, or program parameters and / or settings, which are then communicated to the system by the remote computer. In some examples, the controller receives instructions in the form of settings for processing wafers. It should be understood that the settings are specifically for the type of processing to be performed on the wafer and the type of tool that the controller engages or controls. Therefore, as described above, the controller is distributed, such as by including one or more separate controllers that are connected to each other in a network manner and operate toward a common purpose (e.g., completion processing as described herein). An example of a distributed controller for this purpose includes one or more integrated circuits that communicate with one or more integrated circuits located remotely (e.g., at the platform level, or as part of a remote computer) on the chamber, and the two are combined to control the processing in the chamber.

[0099] In various embodiments, the plasma system includes, but is not limited to, a plasma etching chamber, a deposition chamber, a spin rinse chamber, a metal plating chamber, a cleaning chamber, an edge etching chamber, a physical vapor deposition (PVD) chamber, a chemical vapor deposition (CVD) chamber, an atomic layer deposition (ALD) chamber, an atomic layer etching (ALE) chamber, an ion implantation chamber, a track chamber, and any other semiconductor processing chamber related to and / or used for the manufacture of semiconductor wafers.

[0100] It should also be noted that while the above operations are described with reference to a parallel plate plasma chamber, in some embodiments, the above operations are also applicable to other types of plasma chambers, such as transformer coupled plasma (TCP) reactors, dielectric tools, plasma chambers including electron cyclotron resonance (ECR) reactors, etc. An example of a TCP reactor includes an inductively coupled plasma (ICP) reactor. Another example of a TCP reactor includes a conductor tool. Sometimes, the terms "reactor" and "plasma chamber" are used interchangeably herein.

[0101] As described above, depending on the operations to be performed by the tool, the controller communicates with one or more of the following in the semiconductor manufacturing facility: other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools throughout the facility, a host computer, another controller, or tools used in material transport that transport wafer containers to and from tool locations and / or load ports.

[0102]

[0066] With the above embodiments in mind, it will be appreciated that some embodiments employ various computer-implemented operations involving data stored in computer systems. These computer-implemented operations are operations that manipulate physical quantities.

[0103] Some of the embodiments also relate to hardware units or devices that perform these operations. The device is particularly built for a special-purpose computer. When defined as a special-purpose computer, the computer performs other processing, program execution or non-special-purpose parts and can still operate routines for special purposes at the same time.

[0104] In some embodiments, the operations described herein are performed by a selectively activated computer, or are configured by one or more computer programs stored in a computer memory, or are obtained through a computer network. When data is obtained through a computer network, it can be processed by other computers on the computer network (e.g., a cloud of computing resources).

[0105] One or more embodiments described herein may also be manufactured as computer readable code on a non-transient computer readable medium. A non-transient computer readable medium is any data storage hardware unit (e.g., a memory device, etc.) that stores data, which is then read by a computer system. Examples of non-transient computer readable media include hard disks, network attached storage (NAS), ROM, RAM, compact disk read-only (CD-ROM), recordable compact disk (CD-R), rewritable compact disk (CD-RW), magnetic tapes, and other optical and non-optical data storage hardware units. In some embodiments, a non-transient computer readable medium includes a computer readable tangible medium distributed within a network coupled computer system, such that the computer readable code is stored and executed in a decentralized manner.

[0106] Although some of the method operations described above are presented in a particular order, it should be understood that in many embodiments, other housekeeping operations are performed between multiple operations, or the method operations are adjusted so that these method operations occur at slightly different times, or these method operations are distributed in a system that allows multiple method operations to occur at various intervals, or these method operations are performed in an order different from that described above.

[0107] It should be further noted that in an embodiment, one or more features from any of the above-described embodiments can be combined with one or more features of any other embodiment without departing from the scope described in the various embodiments described in this disclosure.

[0108] Although the foregoing embodiments have been described in considerable detail for the purpose of clear understanding, it should be understood that some changes and modifications may be implemented within the scope of the appended claims. Therefore, the embodiments of the present invention should be considered illustrative rather than restrictive, and these embodiments should not be limited to the details provided herein, but may be modified within the scope and equivalent scope of the appended claims.

Claims

1. A method for compensating for radio frequency (RF) power loss, comprising: obtaining a plurality of measurements of a plurality of parameters associated with components of the plasma system; determining a resistance associated with the component of the plasma system based on the plurality of measurements of the plurality of parameters; obtaining a first value of one of the plurality of parameters associated with the component of the plasma system; determining a first amount of RF power loss associated with the component of the plasma system based on the resistance and the first value of the one of the plurality of parameters; adjusting an operating set point of an RF generator based on the first amount of RF power loss, wherein adjusting the operating set point of the RF generator based on the first amount of RF power loss is performed to control the RF generator to operate at a second set point; obtaining a second value of the one of the plurality of parameters associated with the component of the plasma system; determining a second amount of RF power loss based on the resistance and the second value of the one of the plurality of parameters; as well as adjusting the operating set point of the RF generator based on the second RF power loss amount, wherein adjusting the operating set point of the RF generator based on the second RF power loss amount is performed to control the RF generator to operate at a third set point, Wherein, the operating set point is adjusted based on the first RF power loss amount and the second RF power loss amount to compensate for RF power loss. 2 . The method of claim 1 , wherein when the first and second RF power loss amounts are within a predetermined range of each other, adjusting the set point to compensate for the RF power loss. 3 . The method of claim 1 , wherein said obtaining said plurality of measurements and determining said resistance are performed during or after a no-plasma test.

4. The method of claim 1 , wherein obtaining a first value, determining the first RF power loss amount, adjusting a set point based on the first RF power loss amount, obtaining a second value, determining the second RF power loss amount, and adjusting the second set point based on the second RF power loss amount are performed during substrate processing.

5. The method according to claim 1, wherein: The component of the plasma system is an impedance matching circuit.

6. The method according to claim 1, wherein: The determining the first amount of RF power loss includes multiplying the resistance by the square of the first value of the one parameter of the plurality of parameters. 7 . The method of claim 1 , wherein adjusting the set point based on the first amount of RF power loss comprises adding the first amount of RF power loss to the set point.

8. The method of claim 1, wherein adjusting the set point based on a second amount of RF power loss comprises adding the second amount of RF power loss to the set point.

9. A controller for compensating for radio frequency (RF) power loss, comprising: A processor configured to: obtaining a plurality of measurements of a plurality of parameters associated with components of the plasma system; determining a resistance associated with the component of the plasma system based on the plurality of measurements of the plurality of parameters; obtaining a first value of one of the plurality of parameters associated with the component of the plasma system; determining a first amount of RF power loss associated with the component of the plasma system based on the resistance and the first value of the one of the plurality of parameters; adjusting an operating set point of an RF generator based on the first RF power loss amount, wherein adjusting an operating set point of the RF generator based on the first RF power loss amount to control the RF generator to operate at a second set point; obtaining a second value of the one of the plurality of parameters associated with the component of the plasma system; determining a second amount of RF power loss based on the resistance and the second value of the one of the plurality of parameters; as well as adjusting the operating set point of the RF generator based on the second RF power loss amount, wherein the adjusting the operating set point of the RF generator based on the second RF power loss amount is performed to control the RF generator to operate at a third set point, wherein the operating set point is adjusted based on the first RF power loss amount and the second RF power loss amount to compensate for RF power loss; and A memory device coupled to the processor is configured to store the plurality of measured values ​​of the plurality of parameters.

10. The controller of claim 9, wherein the processor determines that when the first and second RF power losses are within a predetermined range of each other, the set point is adjusted to compensate for the RF power loss.

11. The controller of claim 9, wherein the processor obtains the plurality of measurements and determines the resistance during or after a no-plasma test.

12. The controller of claim 9, wherein the processor obtains a first value, determines the first RF power loss amount, adjusts a set point based on the first RF power loss amount, obtains a second value, determines the second RF power loss amount, and adjusts a second set point based on the second RF power loss amount during processing of a substrate.

13. The controller according to claim 9, wherein: The component of the plasma system is an impedance matching circuit.

14. The controller of claim 9, wherein to determine the first amount of RF power loss, the processor is configured to multiply the resistance by the square of the first value of the one of the parameters.

15. The controller according to claim 9, wherein: To adjust the set point based on the first amount of RF power loss, the processor is configured to add the first amount of RF power loss to the set point.

16. The controller of claim 9, wherein to adjust the set point based on a second amount of RF power loss, the processor is configured to add the second amount of RF power loss to the set point.

17. A plasma system for compensating for radio frequency (RF) power loss, comprising: a radio frequency (RF) generator configured to generate an RF signal; an impedance matching circuit coupled to the RF generator for receiving the RF signal; and a computer coupled to the RF generator, wherein the computer is configured to: obtaining a plurality of measurements of a plurality of parameters associated with components of the plasma system; determining a resistance associated with the component of the plasma system based on the plurality of measurements of the plurality of parameters; obtaining a first value of one of the plurality of parameters associated with the component of the plasma system; determining a first amount of RF power loss associated with the component of the plasma system based on the resistance and the first value of the one of the plurality of parameters; adjusting an operating set point of the RF generator based on the first RF power loss amount, wherein adjusting an operating set point of the RF generator based on the first RF power loss amount to control the RF generator to operate at a second set point; obtaining a second value of the one of the plurality of parameters associated with the component of the plasma system; determining a second amount of RF power loss based on the resistance and the second value of the one of the plurality of parameters; as well as adjusting the operating set point of the RF generator based on the second RF power loss amount, wherein adjusting the operating set point of the RF generator based on the second RF power loss amount is performed to control the RF generator to operate at a third set point, Wherein, the operating set point is adjusted based on the first RF power loss amount and the second RF power loss amount to compensate for RF power loss.

18. The plasma system of claim 17, wherein the computer determines that when the first and second RF power loss amounts are within a predetermined range of each other, the set point is adjusted to compensate for the RF power loss.

19. The plasma system of claim 17, wherein: To adjust the set point based on the first amount of RF power loss, the computer is configured to add the first amount of RF power loss to the set point.

20. The plasma system of claim 17, wherein: To adjust the set point based on the second amount of RF power loss, the computer is configured to add the second amount of RF power loss to the set point.

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