Chemical Vapor Deposition Chamber Products
By setting an oxidative protective layer on the surface of the chemical vapor deposition chamber products and using halogen etchant to remove parasitic deposition, the problem of shortening the product life and cleaning the damaged surface is solved, and the long-term and high-quality product is achieved.
Patent Information
- Application Number
- CN201980098030.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-05-27
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2039-05-27
AI Technical Summary
Existing chemical vapor deposition chamber products are susceptible to parasitic deposition during use, resulting in a shorter product life and traditional chemical or mechanical cleaning methods may damage the surface of the product.
A protective layer is provided on the surface of the chemical vapor deposition chamber article, including an oxidation surface, and the parasitic deposition is removed by a halogen etchant such as Cl2 or HCl without damaging the SiC surface of the article.
By setting the oxidation surface, the etching rate of SiC products is significantly reduced, effectively removing parasitic deposition without damaging the product itself, and extending the life of the product.
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Figure CN114026263B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a chemical vapor deposition chamber product. The present invention also relates to a method for processing a chemical vapor deposition chamber product for manufacturing semiconductor components, and a chemical vapor deposition chamber product obtained by the method. Background Art
[0002] In order to manufacture semiconductor components, such as integrated circuits, light emitting diodes, LEDs, etc., chemical vapor deposition has long been used to perform homoepitaxial and heteroepitaxial growth of various material layers on semiconductor substrates under restricted conditions as part of the process of manufacturing these semiconductor components. Under these restricted conditions, the wafer or substrate is usually placed on a carrier and exposed to one or more volatile precursors, which react and / or decompose on the substrate surface to produce the desired deposit.
[0003] Articles in CVD chambers are typically made of materials such as technical ceramics, quartz, and coated graphite. Graphite chamber articles are often coated with a layer of silicon carbide (SiC), and such SiC or other technical ceramic articles may be used in rapid thermal processing, diffusion, annealing, or epitaxial growth processes, in which wafers are heated from room temperature to elevated temperatures in less than about a minute.
[0004] During deposition in a deposition chamber of a CVD apparatus, one or more materials are grown in layers on a wafer or substrate. However, the growth or deposition of these materials occurs not only on the wafer or substrate, where the wafer or substrate is scored for growth, but also on the chamber artifacts that are subjected to the deposition process. Such deposition in the chamber, performed on a wafer, is undesirable.
[0005] This undesired growth or deposition of these materials on chamber articles is generally referred to as parasitic deposition. Parasitic deposition is undesirable because it interferes with maintaining the stability of deposition process conditions necessary to produce high quality deposited layers.
[0006] Parasitic deposits can be controlled in a deposition system for depositing a film on a substrate by flowing a buffer gas between an inner surface and at least a portion of the process gas to form a gas barrier so that the gas barrier inhibits contact between the inner surface and components of the process gas, as disclosed in US8430960. This method can be used to reduce parasitic deposition on surfaces of an inner chamber that do not carry a substrate being processed (i.e., a wafer carrier) or are not located at a horizontal upstream position of a chamber surface that carries a substrate being processed, as this would adversely affect the epitaxial deposition process. On surfaces that cannot benefit from the above-described methods of reducing parasitic deposition due to the design of the deposition chamber, this leads to an early end of life for these articles, which can often occur even after a few uses in the deposition chamber. As an alternative or in addition to the above, the article can be chemically or mechanically cleaned after several operating runs. Mechanical cleaning may typically introduce other artifacts, such as microcracks. Chemical cleaning can be accomplished by etching the surface of the article with an etchant. During the etching of the article, not only the parasitic deposition is etched, but also the article itself, which can lead to damage to the surface of the article and ultimately end of life. Summary of the invention
[0007] It is an object of the present invention to provide a chemical vapor deposition or other deposition chamber article that alleviates at least some of the above-mentioned disadvantages.
[0008] It is another object of the present invention to provide an improved chemical vapor deposition chamber article that is arranged for chemical cleaning using an etchant that removes at least a majority of parasitic deposits without damaging the surface of the article.
[0009] In a first aspect of the invention, there is provided a chemical vapor deposition chamber product, such as a wafer carrier, for manufacturing semiconductor components, the chamber product having a body and a surface comprising a metal carbide, characterised in that a protective layer is provided on the surface on at least a portion of the surface that is subject to parasitic deposition during manufacturing of the semiconductor component in the chamber, and wherein the protective layer comprises an oxidised surface.
[0010] As shown, a chemical vapor deposition, CVD, reaction chamber is used for the epitaxial growth of silicon carbide, SiC components. Typically, a hot wall type reaction chamber is used. The SiC components are usually made of graphite and coated with SiC. The reaction chamber accommodates a number of chamber articles, including a substrate carrier or wafer carrier. On top of the carrier is placed a substrate, such as a SiC substrate, on which the epitaxial SiC layer is grown during the epitaxial process. These metal carbide articles, like the carrier, are themselves usually made of graphite coated with SiC. However, they can also be formed of solid, monolithic SiC or tantalum carbide, TaC coated graphite or metal carbide in general.
[0011] During the SiC epitaxial growth process, the desired SiC epitaxial layer is formed on the substrate of the wafer. However, undesirable SiC layers are also formed at other locations in the reaction chamber, for example on the carrier itself or on other articles (such as heat rings, lift pins, etc.). Every article in the reaction chamber containing SiC may be susceptible to this undesirable SiC growth, which is generally referred to as parasitic deposition. However, it may not always be an epitaxial layer. Deposition on graphite coated with CVD SiC can also grow polycrystalline, which is the case in polycrystalline SiC and non-SiC materials.
[0012] To remove parasitic deposits, metal carbide articles may be subjected to a chemical cleaning process, wherein the process uses an etchant. Chemical cleaning is extremely challenging because there is no material difference between the desired epitaxial deposits and the undesired parasitic deposits, both being metal carbides, particularly SiC or TaC. When etching, epitaxial SiC and parasitic SiC are roughly equally sensitive to the etchant.
[0013] Halogen etchants are recommended for etching articles containing metal carbides. The preferred halogen used is chlorine, and the preferred metal carbides are SiC and TaC. The latter is preferred for high temperature SiC epitaxy processes.
[0014] To increase the etching resistance, tantalum carbide TaC can be used. However, TaC is significantly more expensive, and when TaC is coated with epitaxial SiC, the TaC coating is easily peeled off from the graphite substrate, and the emissivity of the TaC coating is easily changed.
[0015] The inventors have realised that the etch resistance of an article can be enhanced so that (aggressive) etchants can be used to etch away parasitic deposits of SiC without damaging the SiC surface of the article itself.
[0016] The inventors have found that in said manufacturing process of a semiconductor element in a chamber, providing a protective layer on at least the portion of the surface subjected to parasitic deposition, wherein the protective layer comprises an oxidized surface, can significantly suppress the etching rate of SiC or TaC articles.
[0017] The protective oxide surface enables the use of (highly aggressive) etchants such as HCl, Cl2, NF3, ClF3, etc., which effectively remove parasitic SiC deposits or particles without etching the etch-resistant CVD SiC coated article itself. By using such a protective surface, the life of these SiC articles is extended, which is economically advantageous.
[0018] Preferably, (pure) Cl2 can be used to remove parasitic SiC deposits or particles, Cl2 can react with SiC at elevated temperature according to the following equation:
[0019] SiC+2Cl2=SiCl4(g)+C
[0020] As a result of the above reaction, or other suitable etching agents on SiC, SiC is converted into carbon. The carbon can then be completely or partially removed by oxidation. Thus, not only parasitic SiC deposits or particles deposited on the carrier surface are etched away, but also carrier surfaces coated with CVD SiC coatings or carrier surfaces made of solid or pure SiC.
[0021] In the present invention, it is proposed to use CVD SiC coated graphite articles or parts of reaction chambers, including carriers or parts of CVD SiC coated elements, which are composed of another substrate material different from graphite. The CVD SiC coated parts according to the present invention have excellent etching resistance to Cl2 etchants, HCl etchants or other typical etchants. This means that Cl2 only etches the parasitic deposited SiC species produced during the SiC epitaxy process, but does not etch or etches to a significantly lesser extent the etching-resistant CVD SiC coated article itself.
[0022] Throughout the specification, any reference to SiC articles should not be construed in a limiting manner as CVD SiC on a substrate carrier, but may also be bulk, freestanding CVD-SiC articles, or CVD SiC coated SiC articles, or other materials coated with etch resistant CVD SiC.
[0023] Alternatively, the SiC article may also be any chamber article or bulk silicon material coated with a metal carbide, such as a reaction chamber metal carbide coated article, which includes an oxide layer or an oxide surface or a metal oxycarbide surface.
[0024] The proposed reaction chamber article may also include a body and a surface coated with tantalum carbide TaC. Since TaC has better intrinsic etching resistance, TaC may have advantages over SiC as a coating material for reaction chamber components. However, TAC also has disadvantages, such as being more expensive and being easily peeled off from a graphite substrate.
[0025] In one example, the protective layer includes a silicon dioxide surface.
[0026] In one example, the protective layer includes a silicon monoxide surface.
[0027] In one example, the protective layer includes a silicon oxycarbide surface.
[0028] Several types of etchants can be used on SiC materials, for example, SiC can be etched with HCl, Cl2, ClF3, NF3, etc. The etching mechanism can give different equations, forming different elements, for example.
[0029] SiC+HCl→SiCl4↑+CH4↑
[0030] SiC+2Cl2→SiCl4↑+C
[0031] SiC+ClF3→SiF4↑+3CF4↑+Cl2↑
[0032] In the above etching mechanism, Cl2 is superior to HCl due to its higher etching rate at high temperature. However, CIF3 shows a fast etching rate at relatively low temperature.
[0033] In one example, the SiC article may also be subjected to thermal etching by heating the SiC to a specific predetermined elevated temperature, such as about 1200 degrees C. ClF3 exhibits a fast etching rate at relatively low temperatures [3], and the etching mechanism is as follows.
[0034] In one example, the body of the article is composed of silicon carbide.
[0035] The present invention is not limited to reaction chamber articles having SiC coatings. Chamber articles formed from solid or monolithic SiC may also undergo the same surface treatment to obtain an etch-resistant oxidized surface.
[0036] In one example, the body of the article consists of a graphite core having a silicon carbide coated surface.
[0037] As an alternative to solid SiC, the article may also have a graphite core and a SiC coating, which may be subjected to the same surface treatment to obtain an etch-resistant oxidized surface. Alternatively, the graphite or other core or body may also have a tantalum carbide coating, which may be surface treated to obtain an etch-resistant oxidized surface.
[0038] In one embodiment, the protective layer is formed by subjecting the article to a halogen-based etchant, preferably a Cl2, pure Cl2, or HCl-based etchant.
[0039] In one embodiment, the protective layer is obtained by subjecting the etched article to an oxidation process at elevated temperature, which converts the carbon at the surface obtained from the etching into SiO2 or SiO or SiO x C y Protective layer.
[0040] Oxidation of CVD-SiC coated graphite wafer carrier at high temperature will form fully dense SiO2 or SiO or SiO x C y layer, SiO2 or SiO or SiO x C yThe layer covers part of the surface, but preferably covers the entire surface of the side of the article facing the interior of the reaction chamber during use, and most preferably covers the entire surface periphery of the article. When etching with Cl2 or HCl at high temperature, the SiO2 or SiO or SiO x C y The layer provides protection for the CVD SiC.
[0041] The oxide layer in the embodiment has an oxide phase, or in another embodiment, is composed of SiO2, SiO and SiO x C y phase, or in the case of multiple phases, having phases from SiO2, SiO and SiO x C y In another example, the oxide-containing layer comprises SiO2, SiO and SiO x C y One or more phases.
[0042] In a second aspect of the present invention, a method for processing a chemical vapor deposition chamber article for manufacturing semiconductor devices is provided, the method comprising the following steps:
[0043] providing an article having a body and a surface comprising silicon carbide;
[0044] During the manufacturing of a semiconductor component in a chamber, a protective layer is provided on at least a portion of a surface subject to parasitic deposition, and wherein providing the protective layer comprises obtaining an oxidized surface.
[0045] In one example, the step of providing a protective article comprises subjecting the article to a halogen-based etchant, preferably an etchant based on Cl2, pure Cl2, or HCl.
[0046] In one embodiment, the step of providing a protective article further comprises:
[0047] subjecting the article to an oxidative environment;
[0048] The article is heated to a predetermined elevated temperature, wherein carbon formed on the surface of the article during the etching step is oxidized and removed as CO or CO2, thereby forming SiO2 or SiO or SiO x C y A protective layer covers at least the portion of the surface of the article that is subject to parasitic deposition during fabrication of the semiconductor element in the chamber.
[0049] In a third aspect of the invention, a chemical vapor deposition chamber product processed according to the above method is provided, wherein the chamber product includes any one of the group of wafer carriers, wafer pedestals, preheat rings or lift pins used in epitaxial chemical vapor deposition growth chambers. BRIEF DESCRIPTION OF THE DRAWINGS
[0050] The above and other features and advantages of the present disclosure will be better understood from the following description with reference to the accompanying drawings, which show non-limiting exemplary embodiments. In the accompanying drawings, the same reference numerals represent the same components or components that perform the same or similar functions or operations. Herein, it is shown:
[0051] Figure 1 is a flow chart of method steps according to one aspect of the present invention;
[0052] Figure 2a-2c are details of a CVD SiC article processed according to one aspect of the present invention. DETAILED DESCRIPTION
[0053] Figure 1 Steps for processing chemical vapor deposition chamber articles such as wafer carriers, wafer susceptors, preheat rings, lift pins or any other silicon carbide, SiC or tantalum carbide, TaC chamber articles are shown. These articles may include solid SiC or TaC or have SiC or TaC coatings on graphite substrates or other known substrates for these components.
[0054] Etching of reactor articles such as wafer carriers is preferred to remove parasitic deposits on the article after one or more runs in a CVD process, for example for making semiconductor materials by epitaxial growth on a wafer substrate. By etching the article, parasitic deposits of SiC are removed so that the article can be reused and the end of life of the article is extended.
[0055] Typical etchants for these products are halogens, such as HCl or Cl2. Because the reactions of SiC with HCl or Cl2 and SiO2 with HCl or Cl2 and the associated free energy changes are different, a silicon oxide layer or even silicon oxycarbide on the SiC surface or the surface of the CVD SiC coating can significantly reduce the etching of the SiC coating material. Alternatively, instead of protecting the SiC material with silicon oxide or oxycarbide, the component can be made of or coated with silicon oxycarbide to replace the commonly used CVD SiC. Therefore, protecting the CVD-SiC material with silicon oxide or oxycarbide alleviates the problem of degradation of CVD-coated graphite or solid CVD-SiC components during parasitic deposition in the removal SiC epitaxial chamber. Herein, the SiC coating located on a graphite substrate or a bulk SiC component or a component containing a SiC phase has at least an oxide layer or an oxide surface, or has at least one oxide layer or an oxide surface. The oxide surface(s) provide protection to the SiC coated component or the component comprising SiC or the component comprising metal carbide or the metal carbide coated component or the pure SiC component or the metal carbide component from gas etching by choline gas or halogen gas or halogen containing gas.
[0056] The protective layer is obtained by a method 100 for treating a chemical vapor deposition chamber article for manufacturing a semiconductor device, the method comprising the following steps:
[0057] 101. Provide an article having a main body and a surface composed of silicon carbide.
[0058] 102, subjecting the article to an etchant based on Cl2, pure Cl2 or HCl. At least a portion of the surface subjected to parasitic deposition during the manufacture of semiconductor components in the chamber is subjected to the etchant. However, preferably, at least the entire surface facing the interior of the process gas and / or in contact with the process gas, through which the parasitic deposition occurs, is etched. Even more preferably, the entire article, i.e., all surfaces of the article, are etched.
[0059] Once etched, the article is subjected to an oxidizing environment 103 .
[0060] As a final step, the article is heated 104 to a predetermined elevated temperature, wherein the carbon formed on the surface of the article during the etching step is oxidized and removed as CO or CO2, leaving behind SiO2 or SiO or SiO x C y A protective layer covers at least a portion of a surface of an article that is subject to parasitic deposition during fabrication of a semiconductor component in a chamber.
[0061] Previously, articles such as wafer carriers required manual mechanical grinding to remove parasitic deposits. It is desirable to protect the CVD-SiC coating on the chamber article from the etchant used, thereby removing the parasitic deposits with minimal to no effect on the CVD-SiC material of the chamber article. The introduction of fully dense SiO2 or SiO or SiO2 covering the surface of the CVD SiC material x C y The layer provides this protection from the etchants.
[0062] The proposed SiC surface treatment has several advantages over currently used surface treatments, among which: Complete etching of all parasitic SiC, resulting in a completely clean article that can be reused. Cl2-based treatments may not always be feasible in a CVD reactor chamber or in a separate etching chamber, because not all reaction chamber components are resistant to Cl2 etching. This can be solved by replacing chamber components with materials that meet process requirements (such as purity) and can resist Cl2 etching, or by processing the article separately in a separate processing chamber.
[0063] Through the proposed method, it is also possible to achieve a reduction in particle formation due to the etching process by adjusting the etching time, etching frequency and operating temperature.
[0064] Another advantage of the proposed method is that the oxidation step not only removes the carbon layer remaining after the Cl2 etching, but can also be used to repair the protective oxide layer on the surface. Currently known cleaning processes also etch the original CVD-SiC material due to the uneven thickness of the parasitic deposited SiC layer. Currently known cleaning processes do not include a repair step for the original SiC coating. Therefore, with such cleaning processes, the carrier is significantly degraded in each etching step currently used. In the proposed method or the proposed article, the repeated oxidation step ensures that the thickness of the protective layer is continuously regenerated by the continuous regeneration of the protective SiO2 or SiO or SiO x C y The layer is maintained, which is also attributed to the repair of microcracks that may exist in the CVD-SiC material of the chamber components. Microcracks in the CVD SiC coating can be repaired by silicon oxide formed at the crack surface of the CVD silicon carbide, that is, the cracks are bonded together by the silicon oxide.
[0065] exist Figure 2a In the example, after about 60 minutes of Cl2 etching at 1200 degrees Celsius, the CVD SiC coating was etched to a carbon layer. Figure 2b In FIG. 5 , an oxidized CVD SiC coating is shown which shows no etching after being etched with Cl2 at 1200 degrees Celsius for approximately 60 minutes. Figure 2c In the process, a completely dense SiO2 oxide layer covering the CVD SiC is obtained, which provides sufficient protection for the CVD SiC from the effects of Cl2 etching at high temperatures.
[0066] Cl2 etching was performed on graphite coated with CVD SiC and graphite coated with oxidized CVD SiC. The figure shows the obtained oxidized CVD SiC coating, which has a SiO2 layer with a thickness of about 1.7 microns. After etching with pure Cl2 at 1200 degrees Celsius for 60 minutes, the CVD SiC coating was etched to a carbon layer, and the obtained oxidized CVD SiC coating showed no etching. The thickness of the CVD SiC coating was reduced from 147μm to 98μm, leaving a 44μm thick carbon layer on the top; as shown in Figure 2, the CVD SiC coating was etched to a carbon layer after etching with pure Cl2 at 1200 degrees Celsius for 60 minutes, and the oxidized CVD SiC coating was not etched ... Figure 2a shown.
[0067] Throughout the description, chamber article is used to identify elements of a CVD reactor chamber susceptible to the proposed method. The expression chamber article should be interpreted in a broad sense, also referring to reactor chamber articles, reactor chamber tools, reactor chamber equipment, reactor chamber replaceable parts, etc. The skilled person will understand that all such SiC and / or TaC (coated) elements may be provided with an oxidized surface to achieve high etch resistance.
[0068] In interpreting the specification and its related claims, expressions such as "comprises," "includes," "combines," "contains," "is," and "has" are to be interpreted in a non-exclusive manner, i.e., to allow for the presence of other items or elements not explicitly defined. References to the singular are also to be interpreted as references to the plural, and vice versa.
[0069] Furthermore, the present invention may also be implemented with more or fewer steps than provided in the embodiments described herein, where multiple process steps are described.
[0070] A person skilled in the art will readily appreciate that the method steps may generally be performed separately from the semiconductor manufacturing process to obtain a CVD SiC article with an oxidized surface that can be used by a semiconductor OEM manufacturer. However, these method steps may also be performed by this OEM on a non-oxidized CVD SiC article, or by a separate ex-situ "reactor article oxidation process" that may be performed prior to a (separate) CVD reactor and produce a CVD SiC article according to the invention. However, the method steps may also be performed in-situ, for example, in a SiC epitaxial deposition reactor, in a CVD reactor chamber in an actual semiconductor manufacturing process.
[0071] Furthermore, those skilled in the art will readily appreciate that some of these steps may be performed in parallel, sequentially, or repeatedly, wherein each product may undergo one, multiple, or all method steps multiple times.
[0072] Other variations to the disclosed embodiments may be understood and effected by those skilled in the art in practicing the claimed invention by studying the drawings, the disclosure and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite article "a" or "an" does not exclude a plurality. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Any reference signs in the claims should not be construed as limiting the scope thereof.
Claims
1. A chemical vapor deposition chamber article for manufacturing a semiconductor device, the article having a body and a surface comprising a metal carbide, characterized in that: The surface is provided with a protective layer on at least a portion of the surface that is subjected to parasitic deposition during the manufacture of the semiconductor element in the chamber, and wherein the protective layer comprises an oxidized surface, wherein the protective layer is obtained by oxidation with repeated oxidation steps for regeneration of the protective layer, thereby obtaining a surface comprising SiO2, SiO or SiO x C y A protective layer of one kind; Wherein the article comprises any one of the group consisting of a wafer carrier, a wafer pedestal, a preheat ring, or a lift pin, a lid portion, a roof, or other components used in an epitaxial chemical vapor deposition growth chamber.
2. The chemical vapor deposition chamber article according to claim 1, wherein: The metal carbide includes silicon carbide.
3. The chemical vapor deposition chamber article of claim 1, wherein: The metal carbide includes tantalum carbide.
4. The chemical vapor deposition chamber article according to claim 1, 2 or 3, wherein: The protective layer includes a silicon dioxide surface.
5. The chemical vapor deposition chamber article according to claim 1, 2 or 3, wherein: The protective layer includes a silicon monoxide surface.
6. The chemical vapor deposition chamber article of claim 1, 2 or 3, wherein: The protective layer includes a silicon oxycarbide surface.
7. The chemical vapor deposition chamber article of claim 1, 2 or 3, wherein: The body of the article consists of silicon carbide.
8. The chemical vapor deposition chamber article of claim 1, 2 or 3, wherein: The body of the article consists of a graphite core having a silicon carbide coated surface.
9. The chemical vapor deposition chamber article of claim 1, 2 or 3, wherein: The protective layer is obtained by subjecting the article to an etchant of pure Cl2 or HCl.
10. The chemical vapor deposition chamber article of claim 9, wherein: The protective layer is obtained by subjecting the etched article to an oxidation treatment at a high temperature, thereby converting the carbon on the surface obtained from the etching into SiO2 or SiO or SiO x C y Protective layer.
11. A method of treating a chemical vapor deposition chamber article for manufacturing semiconductor devices, the method comprising the steps of: providing the article, the article having a body and a surface comprising silicon carbide; A protective layer is provided at least on the portion of the surface that is subjected to parasitic deposition during the manufacture of the semiconductor element in the chamber, and wherein providing the protective layer comprises obtaining an oxidized surface, wherein the protective layer is obtained by oxidation with repeated oxidation steps for regeneration of the protective layer, thereby obtaining a surface comprising SiO2, SiO or SiO x C y A protective layer in the.
12. The method according to claim 11, wherein: The steps of obtaining the protective layer include: The article is subjected to a halogen based etchant, which is either pure Cl2 or HCl etchant.
13. The method according to claim 11 or 12, wherein: The step of obtaining the protective layer also includes: subjecting the article to an oxidative environment; The article is heated to a predetermined temperature, wherein carbon formed on the surface of the article during the etching step is oxidized and removed as CO or CO2, thereby forming SiO2 or SiO or SiO x C y A protective layer covers at least the portion of the surface of the article that is subject to parasitic deposition during fabrication of the semiconductor element in the chamber.
Citation Information
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