Device manufacturing method for protecting semiconductor device channel
By growing the oxygen-absorbing sacrificial layer on the FD-SOI substrate and performing a local germanium oxidation concentration process, combined with the repetitive steps of normal temperature oxidation treatment and oxide layer removal, the silicon nitride edge "beak" problem is solved, protecting the semiconductor device channel and improving device performance.
Patent Information
- Application Number
- CN202111175357.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-10-09
- Publication Date
- 2025-04-25
- Estimated Expiration
- 2041-10-09
AI Technical Summary
In the process of local germanium oxidation and concentration to form SGOI channels, the edge "beak" of silicon nitride is often formed at the connection of SOI and SGOI channels, resulting in channel loss of the top silicon layer and affecting subsequent processes and device performance.
The oxygen-absorbing sacrificial layer is grown on the top silicon layer of the FD-SOI substrate and a local germanium oxidation concentration process is performed thereon, followed by the removal of the silicon nitride layer and the oxide layer, and the repeated steps of normal temperature oxidation treatment and removal of the oxide layer are performed until the depression at the SOI and SGOI junction are eliminated.
Effectively remove the "bird beak" at the edge of silicon nitride, protecting the semiconductor device channel, ensuring the smooth implementation of subsequent processes, and improving device performance.
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Figure CN114038790B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a method for manufacturing a device for protecting a semiconductor device channel. Background Art
[0002] With the rapid development of large-scale integrated circuits, FD-SOI (Fully Depleted Silicon On Insulator) technology uses an extremely thin top silicon film layer (less than 500Å) to ensure that it has advantages that cannot be matched by bulk silicon: it can achieve dielectric isolation of components in integrated circuits and completely eliminate the parasitic latch-up effect in bulk silicon CMOS circuits; FD-SOI integrated circuit devices also have the advantages of low power consumption, unique back bias capability, high device operating speed, low leakage current, strong transistor matching effect, and small parasitic capacitance.
[0003] From a materials perspective, silicon and germanium belong to the same family, and germanium metal improves the material's carrier mobility. Transistors based on germanium have switching speeds three to four times faster than silicon, making germanium a promising material for high-speed logic integrated circuit applications. SGOI / GOI (Silicon Germanium On Insulator) combines the advantages of SiGe / Ge and SOI, making it crucial for high-performance CMOS ICs.
[0004] In the prior art, there is a process integration method based on FD-SOI as a substrate, in which NMOS is fabricated on SOI and PMOS is fabricated on SGOI / GOI. The formation of SGOI / GOI uses a localized germanium oxidation concentration technology. The principle is to gradually oxidize the silicon in the SiGe of the PMOS region and the top silicon of the SOI, so that the concentration of germanium gradually increases, and then diffuses into the unoxidized SiGe layer or the silicon layer of the SOI in contact with the SiGe layer, ultimately reaching the required Ge concentration value.
[0005] However, during the process of local germanium oxidation and concentration to form the SGOI channel, this process integration method often forms a "bird's beak" at the edge of the silicon nitride at the junction of the SOI and SGOI channels, resulting in damage to the originally thin top silicon layer channel. After removing the SiO2 film layer, there is a depression between the SOI and SGOI, which seriously affects subsequent processes and device performance. Summary of the Invention
[0006] The technical problem to be solved by the present invention is to provide a device manufacturing method for protecting the channel of a semiconductor device and removing the "bird's beak" formed on the edge of silicon nitride.
[0007] In order to solve the above technical problems, the present invention provides a method for manufacturing a device for protecting a semiconductor device channel, which is characterized by comprising the following steps:
[0008] Step S1: providing an FD-SOI substrate comprising, from bottom to top, a back substrate, a buried oxide layer, and a top silicon layer, and growing an oxygen-absorbing sacrificial layer on the surface of the top silicon layer;
[0009] Step S2: performing a local germanium oxidation concentration process on the oxygen absorption sacrificial layer described in S1 to prepare an SOI substrate having an SGOI channel;
[0010] Step S3: removing the silicon nitride layer on the top of the SOI channel of the substrate obtained in S2, as well as the oxide layers above the SOI and SGOI channels in sequence;
[0011] Step S4: performing room temperature oxidation treatment on the surface trenches of the SOI and SGOI composite structure obtained in S3 to form an oxide layer;
[0012] Step S5: removing the oxide layer formed in S4.
[0013] Preferably, the method further comprises the following steps:
[0014] S6: Repeat steps S4 and S5 until a composite structure substrate without a depression at the connection between SOI and SGOI is formed, and then proceed to the subsequent process.
[0015] Preferably, in step S1 , the material of the oxygen-absorbing sacrificial layer is single crystal silicon.
[0016] Preferably, in step S1 , the oxygen-absorbing sacrificial layer is grown by epitaxial growth.
[0017] Preferably, in step S1, the thickness of the oxygen-absorbing sacrificial layer is .
[0018] Preferably, in step S2, an SOI channel of a preset thickness is left under the SGOI channel.
[0019] Preferably, in step S2, the preset thickness is less than or equal to the thickness of the oxygen absorption sacrificial layer.
[0020] Preferably, in step S4, the room temperature oxidation treatment method is decoupled plasma oxidation.
[0021] Preferably, in step S4, the oxide layer is made of silicon dioxide.
[0022] Preferably, in step S5, the oxide layer is removed by wet etching.
[0023] The present invention epitaxially grows a single crystal silicon layer on the top silicon channel of the FD-SOI substrate as an oxygen-absorbing sacrificial layer. After performing a local germanium oxidation concentration process, the oxidation treatment is continued through a DPO (Decoupled Plasma Oxide) process. Then, the oxide layer is removed through a wet etching process to solve the defects caused by the "bird's beak", which is conducive to the smooth implementation of subsequent processes and achieves the purpose of protecting the channel of the SOI / SGOI composite structure device. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Figure 1 This is a flow chart of a method for manufacturing a device for protecting a semiconductor device channel according to the present invention.
[0025] Figure 2 This is a structural diagram of an FD-SOI substrate for a device manufacturing method for protecting a semiconductor device channel according to the present invention.
[0026] Figure 3 This is a structural schematic diagram corresponding to step S1 of the method for manufacturing a device for protecting a semiconductor device channel of the present invention.
[0027] Figure 4 This is a structural schematic diagram corresponding to step S2 of the method for manufacturing a device for protecting a semiconductor device channel of the present invention.
[0028] Figure 5 This is a structural schematic diagram corresponding to step S3 of the method for manufacturing a device for protecting a semiconductor device channel of the present invention.
[0029] Figure 6 This is a structural schematic diagram corresponding to step S4 of the method for manufacturing a device for protecting a semiconductor device channel of the present invention.
[0030] Figure 7 This is a structural schematic diagram corresponding to steps S5 and S6 of the device manufacturing method for protecting a semiconductor device channel of the present invention.
[0031] Description of Reference Numerals
[0032] 1 Substrate 2 Buried oxide layer
[0033] 3 Top silicon layer 4 Oxygen absorption sacrificial layer
[0034] 5 Pad oxide layer 6 Hard mask layer
[0035] 7 Silicon Germanium channel layer 8 Oxide layer DETAILED DESCRIPTION
[0036] The following is a clear and complete description of the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present invention.
[0037] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features therein may be combined with each other.
[0038] The present invention discloses a Figure 1 As shown, the present invention provides a method for manufacturing a device for protecting a semiconductor device channel, including steps S1 to S6, which is mainly used to protect SOI / SGOI composite structure devices. The specific steps are as follows:
[0039] like Figure 2 As shown, a FD-SOI substrate is provided, which includes, from bottom to top, a substrate 1, a buried oxide (BOX) layer 2 and a top silicon layer 3 (SOI).
[0040] Specifically, the substrate may be a P-type substrate.
[0041] like Figure 3 As shown, step S1 is implemented: an oxygen-absorbing sacrificial layer 4 is grown on the top silicon layer 3 (SOI) of the FD-SOI substrate.
[0042] Specifically, the material of the oxygen absorbing sacrificial layer 4 is single crystal silicon. The oxygen absorbing sacrificial layer 4 can be formed by epitaxial growth. In addition, in a preferred embodiment, the thickness of the oxygen absorbing sacrificial layer 4 in S1 is .
[0043] like Figure 4 As shown, step S2 is implemented: a local germanium oxidation concentration process is performed on the oxygen absorption sacrificial layer 4 to form an SOI substrate having a silicon germanium channel layer 7SGOI.
[0044] In a preferred embodiment, a thin top silicon layer 3 (SOI) is left below the silicon germanium channel layer 7SGOI in S2 , and the channel thickness of the thin top silicon layer 3 (SOI) is less than or equal to the thickness of the oxygen absorption sacrificial layer 4 .
[0045] like Figure 5 As shown, step S3 is implemented: the hard mask layer 6 on the top of the top silicon layer 3 (SOI), and the pad oxide layer 5 on the top silicon layer 3 (SOI) and the silicon germanium channel layer 7 SGOI are removed in sequence.
[0046] Specifically, the material of the hard mask layer is Si 3 N 4 , and the material of the pad oxide layer 5 on the silicon germanium channel layer 7 SGOI is SiO 2 .
[0047] In a preferred embodiment, in step S3, wet etching is used to sequentially remove the hard mask layer 6 and the pad oxide layer 5.
[0048] like Figure 6 As shown, step S4 is implemented: the top silicon layer 3 (SOI) and the silicon germanium channel layer 7 SGOI are oxidized at room temperature to form an oxide layer 8.
[0049] In a preferred embodiment, the material of the DPO oxide layer is SiO 2 . The room temperature oxidation treatment in step S4 is a decoupled plasma oxidation process (DPO for short).
[0050] like Figure 7 As shown, step S5 is performed: removing the oxide layer 8 .
[0051] Implement step S6: repeat S4 and S5 processes until the depression at the connection between SOI and SGOI disappears, and then proceed to the subsequent process.
[0052] Specifically, in S5 , the oxide layer 8 is removed by wet etching.
[0053] Specifically, the repeated processes of S4 and S5 in S6 can be used to remove the oxide layer 8 without repeated removal or multiple repeated cycles according to actual process results.
[0054] The present invention has been described in detail above by way of specific embodiments and examples, but these do not constitute limitations of the present invention. Without departing from the principles of the present invention, those skilled in the art may make many variations and improvements, which should also be considered within the scope of protection of the present invention.
Claims
1. A method for manufacturing a device for protecting a semiconductor device channel, characterized in that: The following steps are involved: Step S1: providing an FD-SOI substrate including a back substrate, a buried oxide layer and a top silicon layer in sequence from bottom to top, and growing an oxygen absorption sacrificial layer on the surface of the top silicon layer; Step S2: performing a local germanium oxidation concentration process on the oxygen absorption sacrificial layer described in S1 to prepare an SOI substrate having an SGOI channel; Step S3: sequentially removing the silicon nitride layer on the top of the SOI channel of the substrate obtained in S2, and the oxide layers on the SOI and SGOI channels; Step S4: performing room temperature oxidation treatment on the surface channels of the SOI and SGOI composite structures obtained in S3 to form an oxide layer; Step S5: removing the oxide layer formed in S4.
2. The method for manufacturing a device for protecting a semiconductor device channel according to claim 1, characterized in that: The following steps are also included: S6: Repeat step S4 and step S5 until a composite structure substrate without a depression at the connection between SOI and SGOI is formed, and then proceed to the subsequent process.
3. The method for manufacturing a device for protecting a semiconductor device channel according to claim 1, characterized in that: In the step S1, the material of the oxygen absorbing sacrificial layer is single crystal silicon.
4. The method for manufacturing a device for protecting a semiconductor device channel according to claim 1, characterized in that: In the step S1, the oxygen absorption sacrificial layer is grown by epitaxial growth.
5. The method for manufacturing a device for protecting a semiconductor device channel according to claim 1, characterized in that: In step S1, the thickness of the oxygen absorbing sacrificial layer is 6. The method for manufacturing a device for protecting a semiconductor device channel according to claim 1, characterized in that: In the step S2, an SOI channel of a preset thickness is left under the SGOI channel.
7. The method for manufacturing a device for protecting a semiconductor device channel according to claim 6, characterized in that: In the step S2, the preset thickness is less than or equal to the thickness of the oxygen absorbing sacrificial layer.
8. The method for manufacturing a device for protecting a semiconductor device channel according to claim 1, wherein: In step S4, the room temperature oxidation treatment method is decoupled plasma oxidation.
9. The method for manufacturing a device for protecting a semiconductor device channel according to claim 1, wherein: In the step S4, the oxide layer is made of silicon dioxide.
10. The method for manufacturing a device for protecting a semiconductor device channel according to claim 1, characterized in that: In step S5, the oxide layer is removed by wet etching.
Citation Information
Patent Citations
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Localized SOI (Silicon-On-Insulator) and GOI (Germanium On Insulator) device structure and process integrating method thereof
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